/** ****************************************************************************** * @file dma.c * @brief This file provides code for the configuration * of all the requested memory to memory DMA transfers. ****************************************************************************** * @attention * *

© Copyright (c) 2022 STMicroelectronics. * All rights reserved.

* * This software component is licensed by ST under Ultimate Liberty license * SLA0044, the "License"; You may not use this file except in compliance with * the License. You may obtain a copy of the License at: * www.st.com/SLA0044 * ****************************************************************************** */ /* Includes ------------------------------------------------------------------*/ #include "dma.h" /* USER CODE BEGIN 0 */ /* USER CODE END 0 */ /*----------------------------------------------------------------------------*/ /* Configure DMA */ /*----------------------------------------------------------------------------*/ /* USER CODE BEGIN 1 */ /* USER CODE END 1 */ /** * Enable DMA controller clock * Configure DMA for memory to memory transfers * hdma_memtomem_dma2_stream0 */ void MX_DMA_Init(void) { __HAL_RCC_DMA2_CLK_ENABLE(); HAL_NVIC_SetPriority(DMA2_Stream0_IRQn, 2, 0); /* MEM_COPY */ HAL_NVIC_EnableIRQ(DMA2_Stream0_IRQn); HAL_NVIC_SetPriority(DMA2_Stream3_IRQn, 5, 0); /* SD_Rx */ HAL_NVIC_EnableIRQ(DMA2_Stream3_IRQn); HAL_NVIC_SetPriority(DMA2_Stream6_IRQn, 5, 0); /* SD_Tx */ HAL_NVIC_EnableIRQ(DMA2_Stream6_IRQn); HAL_NVIC_SetPriority(DMA2_Stream4_IRQn, 1, 0); /* ADC_Bat */ HAL_NVIC_EnableIRQ(DMA2_Stream4_IRQn); HAL_NVIC_SetPriority(DMA2_Stream1_IRQn, 1, 0); /* TACHO */ HAL_NVIC_EnableIRQ(DMA2_Stream1_IRQn); } /* USER CODE BEGIN 2 */ /* USER CODE END 2 */ /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/