68 lines
2.0 KiB
C
68 lines
2.0 KiB
C
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/**
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******************************************************************************
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* @file dma.c
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* @brief This file provides code for the configuration
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* of all the requested memory to memory DMA transfers.
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******************************************************************************
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* @attention
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*
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* <h2><center>© Copyright (c) 2022 STMicroelectronics.
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* All rights reserved.</center></h2>
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*
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* This software component is licensed by ST under Ultimate Liberty license
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* SLA0044, the "License"; You may not use this file except in compliance with
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* the License. You may obtain a copy of the License at:
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* www.st.com/SLA0044
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*
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******************************************************************************
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*/
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/* Includes ------------------------------------------------------------------*/
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#include "dma.h"
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/* USER CODE BEGIN 0 */
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/* USER CODE END 0 */
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/*----------------------------------------------------------------------------*/
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/* Configure DMA */
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/*----------------------------------------------------------------------------*/
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/* USER CODE BEGIN 1 */
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/* USER CODE END 1 */
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/**
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* Enable DMA controller clock
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* Configure DMA for memory to memory transfers
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* hdma_memtomem_dma2_stream0
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*/
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void MX_DMA_Init(void)
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{
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__HAL_RCC_DMA2_CLK_ENABLE();
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HAL_NVIC_SetPriority(DMA2_Stream0_IRQn, 2, 0); /* MEM_COPY */
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HAL_NVIC_EnableIRQ(DMA2_Stream0_IRQn);
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HAL_NVIC_SetPriority(DMA2_Stream3_IRQn, 5, 0); /* SD_Rx */
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HAL_NVIC_EnableIRQ(DMA2_Stream3_IRQn);
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HAL_NVIC_SetPriority(DMA2_Stream6_IRQn, 5, 0); /* SD_Tx */
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HAL_NVIC_EnableIRQ(DMA2_Stream6_IRQn);
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HAL_NVIC_SetPriority(DMA2_Stream4_IRQn, 1, 0); /* ADC_Bat */
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HAL_NVIC_EnableIRQ(DMA2_Stream4_IRQn);
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HAL_NVIC_SetPriority(DMA2_Stream1_IRQn, 1, 0); /* TACHO */
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HAL_NVIC_EnableIRQ(DMA2_Stream1_IRQn);
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}
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/* USER CODE BEGIN 2 */
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/* USER CODE END 2 */
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/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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