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A141/Debug/A141 Amplifier.list

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A141 Amplifier.elf: file format elf32-littlearm
Sections:
Idx Name Size VMA LMA File off Algn
0 .isr_vector 000000c0 08000000 08000000 00010000 2**0
CONTENTS, ALLOC, LOAD, READONLY, DATA
1 .text 00006f64 080000c0 080000c0 000100c0 2**2
CONTENTS, ALLOC, LOAD, READONLY, CODE
2 .rodata 000004a4 08007024 08007024 00017024 2**2
CONTENTS, ALLOC, LOAD, READONLY, DATA
3 .ARM 00000008 080074c8 080074c8 000174c8 2**2
CONTENTS, ALLOC, LOAD, READONLY, DATA
4 .init_array 00000004 080074d0 080074d0 000174d0 2**2
CONTENTS, ALLOC, LOAD, DATA
5 .fini_array 00000004 080074d4 080074d4 000174d4 2**2
CONTENTS, ALLOC, LOAD, DATA
6 .data 00000010 20000000 080074d8 00020000 2**2
CONTENTS, ALLOC, LOAD, DATA
7 .bss 000003a0 20000010 080074e8 00020010 2**2
ALLOC
8 ._user_heap_stack 00000600 200003b0 080074e8 000203b0 2**0
ALLOC
9 .ARM.attributes 00000028 00000000 00000000 00020010 2**0
CONTENTS, READONLY
10 .debug_info 000111e9 00000000 00000000 00020038 2**0
CONTENTS, READONLY, DEBUGGING
11 .debug_abbrev 000029e4 00000000 00000000 00031221 2**0
CONTENTS, READONLY, DEBUGGING
12 .debug_aranges 00000e40 00000000 00000000 00033c08 2**3
CONTENTS, READONLY, DEBUGGING
13 .debug_ranges 00000d18 00000000 00000000 00034a48 2**3
CONTENTS, READONLY, DEBUGGING
14 .debug_line 0000715d 00000000 00000000 00035760 2**0
CONTENTS, READONLY, DEBUGGING
15 .debug_str 000045bb 00000000 00000000 0003c8bd 2**0
CONTENTS, READONLY, DEBUGGING
16 .comment 0000007c 00000000 00000000 00040e78 2**0
CONTENTS, READONLY
17 .debug_frame 00003434 00000000 00000000 00040ef4 2**2
CONTENTS, READONLY, DEBUGGING
Disassembly of section .text:
080000c0 <__do_global_dtors_aux>:
80000c0: b510 push {r4, lr}
80000c2: 4c06 ldr r4, [pc, #24] ; (80000dc <__do_global_dtors_aux+0x1c>)
80000c4: 7823 ldrb r3, [r4, #0]
80000c6: 2b00 cmp r3, #0
80000c8: d107 bne.n 80000da <__do_global_dtors_aux+0x1a>
80000ca: 4b05 ldr r3, [pc, #20] ; (80000e0 <__do_global_dtors_aux+0x20>)
80000cc: 2b00 cmp r3, #0
80000ce: d002 beq.n 80000d6 <__do_global_dtors_aux+0x16>
80000d0: 4804 ldr r0, [pc, #16] ; (80000e4 <__do_global_dtors_aux+0x24>)
80000d2: e000 b.n 80000d6 <__do_global_dtors_aux+0x16>
80000d4: bf00 nop
80000d6: 2301 movs r3, #1
80000d8: 7023 strb r3, [r4, #0]
80000da: bd10 pop {r4, pc}
80000dc: 20000010 .word 0x20000010
80000e0: 00000000 .word 0x00000000
80000e4: 0800700c .word 0x0800700c
080000e8 <frame_dummy>:
80000e8: 4b04 ldr r3, [pc, #16] ; (80000fc <frame_dummy+0x14>)
80000ea: b510 push {r4, lr}
80000ec: 2b00 cmp r3, #0
80000ee: d003 beq.n 80000f8 <frame_dummy+0x10>
80000f0: 4903 ldr r1, [pc, #12] ; (8000100 <frame_dummy+0x18>)
80000f2: 4804 ldr r0, [pc, #16] ; (8000104 <frame_dummy+0x1c>)
80000f4: e000 b.n 80000f8 <frame_dummy+0x10>
80000f6: bf00 nop
80000f8: bd10 pop {r4, pc}
80000fa: 46c0 nop ; (mov r8, r8)
80000fc: 00000000 .word 0x00000000
8000100: 20000014 .word 0x20000014
8000104: 0800700c .word 0x0800700c
08000108 <__udivsi3>:
8000108: 2200 movs r2, #0
800010a: 0843 lsrs r3, r0, #1
800010c: 428b cmp r3, r1
800010e: d374 bcc.n 80001fa <__udivsi3+0xf2>
8000110: 0903 lsrs r3, r0, #4
8000112: 428b cmp r3, r1
8000114: d35f bcc.n 80001d6 <__udivsi3+0xce>
8000116: 0a03 lsrs r3, r0, #8
8000118: 428b cmp r3, r1
800011a: d344 bcc.n 80001a6 <__udivsi3+0x9e>
800011c: 0b03 lsrs r3, r0, #12
800011e: 428b cmp r3, r1
8000120: d328 bcc.n 8000174 <__udivsi3+0x6c>
8000122: 0c03 lsrs r3, r0, #16
8000124: 428b cmp r3, r1
8000126: d30d bcc.n 8000144 <__udivsi3+0x3c>
8000128: 22ff movs r2, #255 ; 0xff
800012a: 0209 lsls r1, r1, #8
800012c: ba12 rev r2, r2
800012e: 0c03 lsrs r3, r0, #16
8000130: 428b cmp r3, r1
8000132: d302 bcc.n 800013a <__udivsi3+0x32>
8000134: 1212 asrs r2, r2, #8
8000136: 0209 lsls r1, r1, #8
8000138: d065 beq.n 8000206 <__udivsi3+0xfe>
800013a: 0b03 lsrs r3, r0, #12
800013c: 428b cmp r3, r1
800013e: d319 bcc.n 8000174 <__udivsi3+0x6c>
8000140: e000 b.n 8000144 <__udivsi3+0x3c>
8000142: 0a09 lsrs r1, r1, #8
8000144: 0bc3 lsrs r3, r0, #15
8000146: 428b cmp r3, r1
8000148: d301 bcc.n 800014e <__udivsi3+0x46>
800014a: 03cb lsls r3, r1, #15
800014c: 1ac0 subs r0, r0, r3
800014e: 4152 adcs r2, r2
8000150: 0b83 lsrs r3, r0, #14
8000152: 428b cmp r3, r1
8000154: d301 bcc.n 800015a <__udivsi3+0x52>
8000156: 038b lsls r3, r1, #14
8000158: 1ac0 subs r0, r0, r3
800015a: 4152 adcs r2, r2
800015c: 0b43 lsrs r3, r0, #13
800015e: 428b cmp r3, r1
8000160: d301 bcc.n 8000166 <__udivsi3+0x5e>
8000162: 034b lsls r3, r1, #13
8000164: 1ac0 subs r0, r0, r3
8000166: 4152 adcs r2, r2
8000168: 0b03 lsrs r3, r0, #12
800016a: 428b cmp r3, r1
800016c: d301 bcc.n 8000172 <__udivsi3+0x6a>
800016e: 030b lsls r3, r1, #12
8000170: 1ac0 subs r0, r0, r3
8000172: 4152 adcs r2, r2
8000174: 0ac3 lsrs r3, r0, #11
8000176: 428b cmp r3, r1
8000178: d301 bcc.n 800017e <__udivsi3+0x76>
800017a: 02cb lsls r3, r1, #11
800017c: 1ac0 subs r0, r0, r3
800017e: 4152 adcs r2, r2
8000180: 0a83 lsrs r3, r0, #10
8000182: 428b cmp r3, r1
8000184: d301 bcc.n 800018a <__udivsi3+0x82>
8000186: 028b lsls r3, r1, #10
8000188: 1ac0 subs r0, r0, r3
800018a: 4152 adcs r2, r2
800018c: 0a43 lsrs r3, r0, #9
800018e: 428b cmp r3, r1
8000190: d301 bcc.n 8000196 <__udivsi3+0x8e>
8000192: 024b lsls r3, r1, #9
8000194: 1ac0 subs r0, r0, r3
8000196: 4152 adcs r2, r2
8000198: 0a03 lsrs r3, r0, #8
800019a: 428b cmp r3, r1
800019c: d301 bcc.n 80001a2 <__udivsi3+0x9a>
800019e: 020b lsls r3, r1, #8
80001a0: 1ac0 subs r0, r0, r3
80001a2: 4152 adcs r2, r2
80001a4: d2cd bcs.n 8000142 <__udivsi3+0x3a>
80001a6: 09c3 lsrs r3, r0, #7
80001a8: 428b cmp r3, r1
80001aa: d301 bcc.n 80001b0 <__udivsi3+0xa8>
80001ac: 01cb lsls r3, r1, #7
80001ae: 1ac0 subs r0, r0, r3
80001b0: 4152 adcs r2, r2
80001b2: 0983 lsrs r3, r0, #6
80001b4: 428b cmp r3, r1
80001b6: d301 bcc.n 80001bc <__udivsi3+0xb4>
80001b8: 018b lsls r3, r1, #6
80001ba: 1ac0 subs r0, r0, r3
80001bc: 4152 adcs r2, r2
80001be: 0943 lsrs r3, r0, #5
80001c0: 428b cmp r3, r1
80001c2: d301 bcc.n 80001c8 <__udivsi3+0xc0>
80001c4: 014b lsls r3, r1, #5
80001c6: 1ac0 subs r0, r0, r3
80001c8: 4152 adcs r2, r2
80001ca: 0903 lsrs r3, r0, #4
80001cc: 428b cmp r3, r1
80001ce: d301 bcc.n 80001d4 <__udivsi3+0xcc>
80001d0: 010b lsls r3, r1, #4
80001d2: 1ac0 subs r0, r0, r3
80001d4: 4152 adcs r2, r2
80001d6: 08c3 lsrs r3, r0, #3
80001d8: 428b cmp r3, r1
80001da: d301 bcc.n 80001e0 <__udivsi3+0xd8>
80001dc: 00cb lsls r3, r1, #3
80001de: 1ac0 subs r0, r0, r3
80001e0: 4152 adcs r2, r2
80001e2: 0883 lsrs r3, r0, #2
80001e4: 428b cmp r3, r1
80001e6: d301 bcc.n 80001ec <__udivsi3+0xe4>
80001e8: 008b lsls r3, r1, #2
80001ea: 1ac0 subs r0, r0, r3
80001ec: 4152 adcs r2, r2
80001ee: 0843 lsrs r3, r0, #1
80001f0: 428b cmp r3, r1
80001f2: d301 bcc.n 80001f8 <__udivsi3+0xf0>
80001f4: 004b lsls r3, r1, #1
80001f6: 1ac0 subs r0, r0, r3
80001f8: 4152 adcs r2, r2
80001fa: 1a41 subs r1, r0, r1
80001fc: d200 bcs.n 8000200 <__udivsi3+0xf8>
80001fe: 4601 mov r1, r0
8000200: 4152 adcs r2, r2
8000202: 4610 mov r0, r2
8000204: 4770 bx lr
8000206: e7ff b.n 8000208 <__udivsi3+0x100>
8000208: b501 push {r0, lr}
800020a: 2000 movs r0, #0
800020c: f000 f806 bl 800021c <__aeabi_idiv0>
8000210: bd02 pop {r1, pc}
8000212: 46c0 nop ; (mov r8, r8)
08000214 <__aeabi_uidivmod>:
8000214: 2900 cmp r1, #0
8000216: d0f7 beq.n 8000208 <__udivsi3+0x100>
8000218: e776 b.n 8000108 <__udivsi3>
800021a: 4770 bx lr
0800021c <__aeabi_idiv0>:
800021c: 4770 bx lr
800021e: 46c0 nop ; (mov r8, r8)
08000220 <__aeabi_cdrcmple>:
8000220: 4684 mov ip, r0
8000222: 1c10 adds r0, r2, #0
8000224: 4662 mov r2, ip
8000226: 468c mov ip, r1
8000228: 1c19 adds r1, r3, #0
800022a: 4663 mov r3, ip
800022c: e000 b.n 8000230 <__aeabi_cdcmpeq>
800022e: 46c0 nop ; (mov r8, r8)
08000230 <__aeabi_cdcmpeq>:
8000230: b51f push {r0, r1, r2, r3, r4, lr}
8000232: f000 ff3f bl 80010b4 <__ledf2>
8000236: 2800 cmp r0, #0
8000238: d401 bmi.n 800023e <__aeabi_cdcmpeq+0xe>
800023a: 2100 movs r1, #0
800023c: 42c8 cmn r0, r1
800023e: bd1f pop {r0, r1, r2, r3, r4, pc}
08000240 <__aeabi_dcmpeq>:
8000240: b510 push {r4, lr}
8000242: f000 fe99 bl 8000f78 <__eqdf2>
8000246: 4240 negs r0, r0
8000248: 3001 adds r0, #1
800024a: bd10 pop {r4, pc}
0800024c <__aeabi_dcmplt>:
800024c: b510 push {r4, lr}
800024e: f000 ff31 bl 80010b4 <__ledf2>
8000252: 2800 cmp r0, #0
8000254: db01 blt.n 800025a <__aeabi_dcmplt+0xe>
8000256: 2000 movs r0, #0
8000258: bd10 pop {r4, pc}
800025a: 2001 movs r0, #1
800025c: bd10 pop {r4, pc}
800025e: 46c0 nop ; (mov r8, r8)
08000260 <__aeabi_dcmple>:
8000260: b510 push {r4, lr}
8000262: f000 ff27 bl 80010b4 <__ledf2>
8000266: 2800 cmp r0, #0
8000268: dd01 ble.n 800026e <__aeabi_dcmple+0xe>
800026a: 2000 movs r0, #0
800026c: bd10 pop {r4, pc}
800026e: 2001 movs r0, #1
8000270: bd10 pop {r4, pc}
8000272: 46c0 nop ; (mov r8, r8)
08000274 <__aeabi_dcmpgt>:
8000274: b510 push {r4, lr}
8000276: f000 feb9 bl 8000fec <__gedf2>
800027a: 2800 cmp r0, #0
800027c: dc01 bgt.n 8000282 <__aeabi_dcmpgt+0xe>
800027e: 2000 movs r0, #0
8000280: bd10 pop {r4, pc}
8000282: 2001 movs r0, #1
8000284: bd10 pop {r4, pc}
8000286: 46c0 nop ; (mov r8, r8)
08000288 <__aeabi_dcmpge>:
8000288: b510 push {r4, lr}
800028a: f000 feaf bl 8000fec <__gedf2>
800028e: 2800 cmp r0, #0
8000290: da01 bge.n 8000296 <__aeabi_dcmpge+0xe>
8000292: 2000 movs r0, #0
8000294: bd10 pop {r4, pc}
8000296: 2001 movs r0, #1
8000298: bd10 pop {r4, pc}
800029a: 46c0 nop ; (mov r8, r8)
0800029c <__aeabi_cfrcmple>:
800029c: 4684 mov ip, r0
800029e: 1c08 adds r0, r1, #0
80002a0: 4661 mov r1, ip
80002a2: e7ff b.n 80002a4 <__aeabi_cfcmpeq>
080002a4 <__aeabi_cfcmpeq>:
80002a4: b51f push {r0, r1, r2, r3, r4, lr}
80002a6: f000 fb03 bl 80008b0 <__lesf2>
80002aa: 2800 cmp r0, #0
80002ac: d401 bmi.n 80002b2 <__aeabi_cfcmpeq+0xe>
80002ae: 2100 movs r1, #0
80002b0: 42c8 cmn r0, r1
80002b2: bd1f pop {r0, r1, r2, r3, r4, pc}
080002b4 <__aeabi_fcmpeq>:
80002b4: b510 push {r4, lr}
80002b6: f000 fa95 bl 80007e4 <__eqsf2>
80002ba: 4240 negs r0, r0
80002bc: 3001 adds r0, #1
80002be: bd10 pop {r4, pc}
080002c0 <__aeabi_fcmplt>:
80002c0: b510 push {r4, lr}
80002c2: f000 faf5 bl 80008b0 <__lesf2>
80002c6: 2800 cmp r0, #0
80002c8: db01 blt.n 80002ce <__aeabi_fcmplt+0xe>
80002ca: 2000 movs r0, #0
80002cc: bd10 pop {r4, pc}
80002ce: 2001 movs r0, #1
80002d0: bd10 pop {r4, pc}
80002d2: 46c0 nop ; (mov r8, r8)
080002d4 <__aeabi_fcmple>:
80002d4: b510 push {r4, lr}
80002d6: f000 faeb bl 80008b0 <__lesf2>
80002da: 2800 cmp r0, #0
80002dc: dd01 ble.n 80002e2 <__aeabi_fcmple+0xe>
80002de: 2000 movs r0, #0
80002e0: bd10 pop {r4, pc}
80002e2: 2001 movs r0, #1
80002e4: bd10 pop {r4, pc}
80002e6: 46c0 nop ; (mov r8, r8)
080002e8 <__aeabi_fcmpgt>:
80002e8: b510 push {r4, lr}
80002ea: f000 faa1 bl 8000830 <__gesf2>
80002ee: 2800 cmp r0, #0
80002f0: dc01 bgt.n 80002f6 <__aeabi_fcmpgt+0xe>
80002f2: 2000 movs r0, #0
80002f4: bd10 pop {r4, pc}
80002f6: 2001 movs r0, #1
80002f8: bd10 pop {r4, pc}
80002fa: 46c0 nop ; (mov r8, r8)
080002fc <__aeabi_fcmpge>:
80002fc: b510 push {r4, lr}
80002fe: f000 fa97 bl 8000830 <__gesf2>
8000302: 2800 cmp r0, #0
8000304: da01 bge.n 800030a <__aeabi_fcmpge+0xe>
8000306: 2000 movs r0, #0
8000308: bd10 pop {r4, pc}
800030a: 2001 movs r0, #1
800030c: bd10 pop {r4, pc}
800030e: 46c0 nop ; (mov r8, r8)
08000310 <__aeabi_uldivmod>:
8000310: 2b00 cmp r3, #0
8000312: d111 bne.n 8000338 <__aeabi_uldivmod+0x28>
8000314: 2a00 cmp r2, #0
8000316: d10f bne.n 8000338 <__aeabi_uldivmod+0x28>
8000318: 2900 cmp r1, #0
800031a: d100 bne.n 800031e <__aeabi_uldivmod+0xe>
800031c: 2800 cmp r0, #0
800031e: d002 beq.n 8000326 <__aeabi_uldivmod+0x16>
8000320: 2100 movs r1, #0
8000322: 43c9 mvns r1, r1
8000324: 1c08 adds r0, r1, #0
8000326: b407 push {r0, r1, r2}
8000328: 4802 ldr r0, [pc, #8] ; (8000334 <__aeabi_uldivmod+0x24>)
800032a: a102 add r1, pc, #8 ; (adr r1, 8000334 <__aeabi_uldivmod+0x24>)
800032c: 1840 adds r0, r0, r1
800032e: 9002 str r0, [sp, #8]
8000330: bd03 pop {r0, r1, pc}
8000332: 46c0 nop ; (mov r8, r8)
8000334: fffffee9 .word 0xfffffee9
8000338: b403 push {r0, r1}
800033a: 4668 mov r0, sp
800033c: b501 push {r0, lr}
800033e: 9802 ldr r0, [sp, #8]
8000340: f000 f848 bl 80003d4 <__udivmoddi4>
8000344: 9b01 ldr r3, [sp, #4]
8000346: 469e mov lr, r3
8000348: b002 add sp, #8
800034a: bc0c pop {r2, r3}
800034c: 4770 bx lr
800034e: 46c0 nop ; (mov r8, r8)
08000350 <__aeabi_lmul>:
8000350: b5f0 push {r4, r5, r6, r7, lr}
8000352: 46ce mov lr, r9
8000354: 4647 mov r7, r8
8000356: 0415 lsls r5, r2, #16
8000358: 0c2d lsrs r5, r5, #16
800035a: 002e movs r6, r5
800035c: b580 push {r7, lr}
800035e: 0407 lsls r7, r0, #16
8000360: 0c14 lsrs r4, r2, #16
8000362: 0c3f lsrs r7, r7, #16
8000364: 4699 mov r9, r3
8000366: 0c03 lsrs r3, r0, #16
8000368: 437e muls r6, r7
800036a: 435d muls r5, r3
800036c: 4367 muls r7, r4
800036e: 4363 muls r3, r4
8000370: 197f adds r7, r7, r5
8000372: 0c34 lsrs r4, r6, #16
8000374: 19e4 adds r4, r4, r7
8000376: 469c mov ip, r3
8000378: 42a5 cmp r5, r4
800037a: d903 bls.n 8000384 <__aeabi_lmul+0x34>
800037c: 2380 movs r3, #128 ; 0x80
800037e: 025b lsls r3, r3, #9
8000380: 4698 mov r8, r3
8000382: 44c4 add ip, r8
8000384: 464b mov r3, r9
8000386: 4351 muls r1, r2
8000388: 4343 muls r3, r0
800038a: 0436 lsls r6, r6, #16
800038c: 0c36 lsrs r6, r6, #16
800038e: 0c25 lsrs r5, r4, #16
8000390: 0424 lsls r4, r4, #16
8000392: 4465 add r5, ip
8000394: 19a4 adds r4, r4, r6
8000396: 1859 adds r1, r3, r1
8000398: 1949 adds r1, r1, r5
800039a: 0020 movs r0, r4
800039c: bc0c pop {r2, r3}
800039e: 4690 mov r8, r2
80003a0: 4699 mov r9, r3
80003a2: bdf0 pop {r4, r5, r6, r7, pc}
080003a4 <__aeabi_f2uiz>:
80003a4: 219e movs r1, #158 ; 0x9e
80003a6: b510 push {r4, lr}
80003a8: 05c9 lsls r1, r1, #23
80003aa: 1c04 adds r4, r0, #0
80003ac: f7ff ffa6 bl 80002fc <__aeabi_fcmpge>
80003b0: 2800 cmp r0, #0
80003b2: d103 bne.n 80003bc <__aeabi_f2uiz+0x18>
80003b4: 1c20 adds r0, r4, #0
80003b6: f000 fd79 bl 8000eac <__aeabi_f2iz>
80003ba: bd10 pop {r4, pc}
80003bc: 219e movs r1, #158 ; 0x9e
80003be: 1c20 adds r0, r4, #0
80003c0: 05c9 lsls r1, r1, #23
80003c2: f000 fbd7 bl 8000b74 <__aeabi_fsub>
80003c6: f000 fd71 bl 8000eac <__aeabi_f2iz>
80003ca: 2380 movs r3, #128 ; 0x80
80003cc: 061b lsls r3, r3, #24
80003ce: 469c mov ip, r3
80003d0: 4460 add r0, ip
80003d2: e7f2 b.n 80003ba <__aeabi_f2uiz+0x16>
080003d4 <__udivmoddi4>:
80003d4: b5f0 push {r4, r5, r6, r7, lr}
80003d6: 4657 mov r7, sl
80003d8: 464e mov r6, r9
80003da: 4645 mov r5, r8
80003dc: 46de mov lr, fp
80003de: b5e0 push {r5, r6, r7, lr}
80003e0: 0004 movs r4, r0
80003e2: b083 sub sp, #12
80003e4: 000d movs r5, r1
80003e6: 4692 mov sl, r2
80003e8: 4699 mov r9, r3
80003ea: 428b cmp r3, r1
80003ec: d82f bhi.n 800044e <__udivmoddi4+0x7a>
80003ee: d02c beq.n 800044a <__udivmoddi4+0x76>
80003f0: 4649 mov r1, r9
80003f2: 4650 mov r0, sl
80003f4: f000 ff30 bl 8001258 <__clzdi2>
80003f8: 0029 movs r1, r5
80003fa: 0006 movs r6, r0
80003fc: 0020 movs r0, r4
80003fe: f000 ff2b bl 8001258 <__clzdi2>
8000402: 1a33 subs r3, r6, r0
8000404: 4698 mov r8, r3
8000406: 3b20 subs r3, #32
8000408: 469b mov fp, r3
800040a: d500 bpl.n 800040e <__udivmoddi4+0x3a>
800040c: e074 b.n 80004f8 <__udivmoddi4+0x124>
800040e: 4653 mov r3, sl
8000410: 465a mov r2, fp
8000412: 4093 lsls r3, r2
8000414: 001f movs r7, r3
8000416: 4653 mov r3, sl
8000418: 4642 mov r2, r8
800041a: 4093 lsls r3, r2
800041c: 001e movs r6, r3
800041e: 42af cmp r7, r5
8000420: d829 bhi.n 8000476 <__udivmoddi4+0xa2>
8000422: d026 beq.n 8000472 <__udivmoddi4+0x9e>
8000424: 465b mov r3, fp
8000426: 1ba4 subs r4, r4, r6
8000428: 41bd sbcs r5, r7
800042a: 2b00 cmp r3, #0
800042c: da00 bge.n 8000430 <__udivmoddi4+0x5c>
800042e: e079 b.n 8000524 <__udivmoddi4+0x150>
8000430: 2200 movs r2, #0
8000432: 2300 movs r3, #0
8000434: 9200 str r2, [sp, #0]
8000436: 9301 str r3, [sp, #4]
8000438: 2301 movs r3, #1
800043a: 465a mov r2, fp
800043c: 4093 lsls r3, r2
800043e: 9301 str r3, [sp, #4]
8000440: 2301 movs r3, #1
8000442: 4642 mov r2, r8
8000444: 4093 lsls r3, r2
8000446: 9300 str r3, [sp, #0]
8000448: e019 b.n 800047e <__udivmoddi4+0xaa>
800044a: 4282 cmp r2, r0
800044c: d9d0 bls.n 80003f0 <__udivmoddi4+0x1c>
800044e: 2200 movs r2, #0
8000450: 2300 movs r3, #0
8000452: 9200 str r2, [sp, #0]
8000454: 9301 str r3, [sp, #4]
8000456: 9b0c ldr r3, [sp, #48] ; 0x30
8000458: 2b00 cmp r3, #0
800045a: d001 beq.n 8000460 <__udivmoddi4+0x8c>
800045c: 601c str r4, [r3, #0]
800045e: 605d str r5, [r3, #4]
8000460: 9800 ldr r0, [sp, #0]
8000462: 9901 ldr r1, [sp, #4]
8000464: b003 add sp, #12
8000466: bc3c pop {r2, r3, r4, r5}
8000468: 4690 mov r8, r2
800046a: 4699 mov r9, r3
800046c: 46a2 mov sl, r4
800046e: 46ab mov fp, r5
8000470: bdf0 pop {r4, r5, r6, r7, pc}
8000472: 42a3 cmp r3, r4
8000474: d9d6 bls.n 8000424 <__udivmoddi4+0x50>
8000476: 2200 movs r2, #0
8000478: 2300 movs r3, #0
800047a: 9200 str r2, [sp, #0]
800047c: 9301 str r3, [sp, #4]
800047e: 4643 mov r3, r8
8000480: 2b00 cmp r3, #0
8000482: d0e8 beq.n 8000456 <__udivmoddi4+0x82>
8000484: 07fb lsls r3, r7, #31
8000486: 0872 lsrs r2, r6, #1
8000488: 431a orrs r2, r3
800048a: 4646 mov r6, r8
800048c: 087b lsrs r3, r7, #1
800048e: e00e b.n 80004ae <__udivmoddi4+0xda>
8000490: 42ab cmp r3, r5
8000492: d101 bne.n 8000498 <__udivmoddi4+0xc4>
8000494: 42a2 cmp r2, r4
8000496: d80c bhi.n 80004b2 <__udivmoddi4+0xde>
8000498: 1aa4 subs r4, r4, r2
800049a: 419d sbcs r5, r3
800049c: 2001 movs r0, #1
800049e: 1924 adds r4, r4, r4
80004a0: 416d adcs r5, r5
80004a2: 2100 movs r1, #0
80004a4: 3e01 subs r6, #1
80004a6: 1824 adds r4, r4, r0
80004a8: 414d adcs r5, r1
80004aa: 2e00 cmp r6, #0
80004ac: d006 beq.n 80004bc <__udivmoddi4+0xe8>
80004ae: 42ab cmp r3, r5
80004b0: d9ee bls.n 8000490 <__udivmoddi4+0xbc>
80004b2: 3e01 subs r6, #1
80004b4: 1924 adds r4, r4, r4
80004b6: 416d adcs r5, r5
80004b8: 2e00 cmp r6, #0
80004ba: d1f8 bne.n 80004ae <__udivmoddi4+0xda>
80004bc: 465b mov r3, fp
80004be: 9800 ldr r0, [sp, #0]
80004c0: 9901 ldr r1, [sp, #4]
80004c2: 1900 adds r0, r0, r4
80004c4: 4169 adcs r1, r5
80004c6: 2b00 cmp r3, #0
80004c8: db22 blt.n 8000510 <__udivmoddi4+0x13c>
80004ca: 002b movs r3, r5
80004cc: 465a mov r2, fp
80004ce: 40d3 lsrs r3, r2
80004d0: 002a movs r2, r5
80004d2: 4644 mov r4, r8
80004d4: 40e2 lsrs r2, r4
80004d6: 001c movs r4, r3
80004d8: 465b mov r3, fp
80004da: 0015 movs r5, r2
80004dc: 2b00 cmp r3, #0
80004de: db2c blt.n 800053a <__udivmoddi4+0x166>
80004e0: 0026 movs r6, r4
80004e2: 409e lsls r6, r3
80004e4: 0033 movs r3, r6
80004e6: 0026 movs r6, r4
80004e8: 4647 mov r7, r8
80004ea: 40be lsls r6, r7
80004ec: 0032 movs r2, r6
80004ee: 1a80 subs r0, r0, r2
80004f0: 4199 sbcs r1, r3
80004f2: 9000 str r0, [sp, #0]
80004f4: 9101 str r1, [sp, #4]
80004f6: e7ae b.n 8000456 <__udivmoddi4+0x82>
80004f8: 4642 mov r2, r8
80004fa: 2320 movs r3, #32
80004fc: 1a9b subs r3, r3, r2
80004fe: 4652 mov r2, sl
8000500: 40da lsrs r2, r3
8000502: 4641 mov r1, r8
8000504: 0013 movs r3, r2
8000506: 464a mov r2, r9
8000508: 408a lsls r2, r1
800050a: 0017 movs r7, r2
800050c: 431f orrs r7, r3
800050e: e782 b.n 8000416 <__udivmoddi4+0x42>
8000510: 4642 mov r2, r8
8000512: 2320 movs r3, #32
8000514: 1a9b subs r3, r3, r2
8000516: 002a movs r2, r5
8000518: 4646 mov r6, r8
800051a: 409a lsls r2, r3
800051c: 0023 movs r3, r4
800051e: 40f3 lsrs r3, r6
8000520: 4313 orrs r3, r2
8000522: e7d5 b.n 80004d0 <__udivmoddi4+0xfc>
8000524: 4642 mov r2, r8
8000526: 2320 movs r3, #32
8000528: 2100 movs r1, #0
800052a: 1a9b subs r3, r3, r2
800052c: 2200 movs r2, #0
800052e: 9100 str r1, [sp, #0]
8000530: 9201 str r2, [sp, #4]
8000532: 2201 movs r2, #1
8000534: 40da lsrs r2, r3
8000536: 9201 str r2, [sp, #4]
8000538: e782 b.n 8000440 <__udivmoddi4+0x6c>
800053a: 4642 mov r2, r8
800053c: 2320 movs r3, #32
800053e: 0026 movs r6, r4
8000540: 1a9b subs r3, r3, r2
8000542: 40de lsrs r6, r3
8000544: 002f movs r7, r5
8000546: 46b4 mov ip, r6
8000548: 4097 lsls r7, r2
800054a: 4666 mov r6, ip
800054c: 003b movs r3, r7
800054e: 4333 orrs r3, r6
8000550: e7c9 b.n 80004e6 <__udivmoddi4+0x112>
8000552: 46c0 nop ; (mov r8, r8)
08000554 <__aeabi_fdiv>:
8000554: b5f0 push {r4, r5, r6, r7, lr}
8000556: 4657 mov r7, sl
8000558: 464e mov r6, r9
800055a: 46de mov lr, fp
800055c: 4645 mov r5, r8
800055e: b5e0 push {r5, r6, r7, lr}
8000560: 0244 lsls r4, r0, #9
8000562: 0043 lsls r3, r0, #1
8000564: 0fc6 lsrs r6, r0, #31
8000566: b083 sub sp, #12
8000568: 1c0f adds r7, r1, #0
800056a: 0a64 lsrs r4, r4, #9
800056c: 0e1b lsrs r3, r3, #24
800056e: 46b2 mov sl, r6
8000570: d053 beq.n 800061a <__aeabi_fdiv+0xc6>
8000572: 2bff cmp r3, #255 ; 0xff
8000574: d027 beq.n 80005c6 <__aeabi_fdiv+0x72>
8000576: 2280 movs r2, #128 ; 0x80
8000578: 00e4 lsls r4, r4, #3
800057a: 04d2 lsls r2, r2, #19
800057c: 4314 orrs r4, r2
800057e: 227f movs r2, #127 ; 0x7f
8000580: 4252 negs r2, r2
8000582: 4690 mov r8, r2
8000584: 4498 add r8, r3
8000586: 2300 movs r3, #0
8000588: 4699 mov r9, r3
800058a: 469b mov fp, r3
800058c: 027d lsls r5, r7, #9
800058e: 0078 lsls r0, r7, #1
8000590: 0ffb lsrs r3, r7, #31
8000592: 0a6d lsrs r5, r5, #9
8000594: 0e00 lsrs r0, r0, #24
8000596: 9300 str r3, [sp, #0]
8000598: d024 beq.n 80005e4 <__aeabi_fdiv+0x90>
800059a: 28ff cmp r0, #255 ; 0xff
800059c: d046 beq.n 800062c <__aeabi_fdiv+0xd8>
800059e: 2380 movs r3, #128 ; 0x80
80005a0: 2100 movs r1, #0
80005a2: 00ed lsls r5, r5, #3
80005a4: 04db lsls r3, r3, #19
80005a6: 431d orrs r5, r3
80005a8: 387f subs r0, #127 ; 0x7f
80005aa: 4647 mov r7, r8
80005ac: 1a38 subs r0, r7, r0
80005ae: 464f mov r7, r9
80005b0: 430f orrs r7, r1
80005b2: 00bf lsls r7, r7, #2
80005b4: 46b9 mov r9, r7
80005b6: 0033 movs r3, r6
80005b8: 9a00 ldr r2, [sp, #0]
80005ba: 4f87 ldr r7, [pc, #540] ; (80007d8 <__aeabi_fdiv+0x284>)
80005bc: 4053 eors r3, r2
80005be: 464a mov r2, r9
80005c0: 58ba ldr r2, [r7, r2]
80005c2: 9301 str r3, [sp, #4]
80005c4: 4697 mov pc, r2
80005c6: 2c00 cmp r4, #0
80005c8: d14e bne.n 8000668 <__aeabi_fdiv+0x114>
80005ca: 2308 movs r3, #8
80005cc: 4699 mov r9, r3
80005ce: 33f7 adds r3, #247 ; 0xf7
80005d0: 4698 mov r8, r3
80005d2: 3bfd subs r3, #253 ; 0xfd
80005d4: 469b mov fp, r3
80005d6: 027d lsls r5, r7, #9
80005d8: 0078 lsls r0, r7, #1
80005da: 0ffb lsrs r3, r7, #31
80005dc: 0a6d lsrs r5, r5, #9
80005de: 0e00 lsrs r0, r0, #24
80005e0: 9300 str r3, [sp, #0]
80005e2: d1da bne.n 800059a <__aeabi_fdiv+0x46>
80005e4: 2d00 cmp r5, #0
80005e6: d126 bne.n 8000636 <__aeabi_fdiv+0xe2>
80005e8: 2000 movs r0, #0
80005ea: 2101 movs r1, #1
80005ec: 0033 movs r3, r6
80005ee: 9a00 ldr r2, [sp, #0]
80005f0: 4f7a ldr r7, [pc, #488] ; (80007dc <__aeabi_fdiv+0x288>)
80005f2: 4053 eors r3, r2
80005f4: 4642 mov r2, r8
80005f6: 1a10 subs r0, r2, r0
80005f8: 464a mov r2, r9
80005fa: 430a orrs r2, r1
80005fc: 0092 lsls r2, r2, #2
80005fe: 58ba ldr r2, [r7, r2]
8000600: 001d movs r5, r3
8000602: 4697 mov pc, r2
8000604: 9b00 ldr r3, [sp, #0]
8000606: 002c movs r4, r5
8000608: 469a mov sl, r3
800060a: 468b mov fp, r1
800060c: 465b mov r3, fp
800060e: 2b02 cmp r3, #2
8000610: d131 bne.n 8000676 <__aeabi_fdiv+0x122>
8000612: 4653 mov r3, sl
8000614: 21ff movs r1, #255 ; 0xff
8000616: 2400 movs r4, #0
8000618: e038 b.n 800068c <__aeabi_fdiv+0x138>
800061a: 2c00 cmp r4, #0
800061c: d117 bne.n 800064e <__aeabi_fdiv+0xfa>
800061e: 2304 movs r3, #4
8000620: 4699 mov r9, r3
8000622: 2300 movs r3, #0
8000624: 4698 mov r8, r3
8000626: 3301 adds r3, #1
8000628: 469b mov fp, r3
800062a: e7af b.n 800058c <__aeabi_fdiv+0x38>
800062c: 20ff movs r0, #255 ; 0xff
800062e: 2d00 cmp r5, #0
8000630: d10b bne.n 800064a <__aeabi_fdiv+0xf6>
8000632: 2102 movs r1, #2
8000634: e7da b.n 80005ec <__aeabi_fdiv+0x98>
8000636: 0028 movs r0, r5
8000638: f000 fdf0 bl 800121c <__clzsi2>
800063c: 1f43 subs r3, r0, #5
800063e: 409d lsls r5, r3
8000640: 2376 movs r3, #118 ; 0x76
8000642: 425b negs r3, r3
8000644: 1a18 subs r0, r3, r0
8000646: 2100 movs r1, #0
8000648: e7af b.n 80005aa <__aeabi_fdiv+0x56>
800064a: 2103 movs r1, #3
800064c: e7ad b.n 80005aa <__aeabi_fdiv+0x56>
800064e: 0020 movs r0, r4
8000650: f000 fde4 bl 800121c <__clzsi2>
8000654: 1f43 subs r3, r0, #5
8000656: 409c lsls r4, r3
8000658: 2376 movs r3, #118 ; 0x76
800065a: 425b negs r3, r3
800065c: 1a1b subs r3, r3, r0
800065e: 4698 mov r8, r3
8000660: 2300 movs r3, #0
8000662: 4699 mov r9, r3
8000664: 469b mov fp, r3
8000666: e791 b.n 800058c <__aeabi_fdiv+0x38>
8000668: 230c movs r3, #12
800066a: 4699 mov r9, r3
800066c: 33f3 adds r3, #243 ; 0xf3
800066e: 4698 mov r8, r3
8000670: 3bfc subs r3, #252 ; 0xfc
8000672: 469b mov fp, r3
8000674: e78a b.n 800058c <__aeabi_fdiv+0x38>
8000676: 2b03 cmp r3, #3
8000678: d100 bne.n 800067c <__aeabi_fdiv+0x128>
800067a: e0a5 b.n 80007c8 <__aeabi_fdiv+0x274>
800067c: 4655 mov r5, sl
800067e: 2b01 cmp r3, #1
8000680: d000 beq.n 8000684 <__aeabi_fdiv+0x130>
8000682: e081 b.n 8000788 <__aeabi_fdiv+0x234>
8000684: 2301 movs r3, #1
8000686: 2100 movs r1, #0
8000688: 2400 movs r4, #0
800068a: 402b ands r3, r5
800068c: 0264 lsls r4, r4, #9
800068e: 05c9 lsls r1, r1, #23
8000690: 0a60 lsrs r0, r4, #9
8000692: 07db lsls r3, r3, #31
8000694: 4308 orrs r0, r1
8000696: 4318 orrs r0, r3
8000698: b003 add sp, #12
800069a: bc3c pop {r2, r3, r4, r5}
800069c: 4690 mov r8, r2
800069e: 4699 mov r9, r3
80006a0: 46a2 mov sl, r4
80006a2: 46ab mov fp, r5
80006a4: bdf0 pop {r4, r5, r6, r7, pc}
80006a6: 2480 movs r4, #128 ; 0x80
80006a8: 2300 movs r3, #0
80006aa: 03e4 lsls r4, r4, #15
80006ac: 21ff movs r1, #255 ; 0xff
80006ae: e7ed b.n 800068c <__aeabi_fdiv+0x138>
80006b0: 21ff movs r1, #255 ; 0xff
80006b2: 2400 movs r4, #0
80006b4: e7ea b.n 800068c <__aeabi_fdiv+0x138>
80006b6: 2301 movs r3, #1
80006b8: 1a59 subs r1, r3, r1
80006ba: 291b cmp r1, #27
80006bc: dd66 ble.n 800078c <__aeabi_fdiv+0x238>
80006be: 9a01 ldr r2, [sp, #4]
80006c0: 4013 ands r3, r2
80006c2: 2100 movs r1, #0
80006c4: 2400 movs r4, #0
80006c6: e7e1 b.n 800068c <__aeabi_fdiv+0x138>
80006c8: 2380 movs r3, #128 ; 0x80
80006ca: 03db lsls r3, r3, #15
80006cc: 421c tst r4, r3
80006ce: d038 beq.n 8000742 <__aeabi_fdiv+0x1ee>
80006d0: 421d tst r5, r3
80006d2: d051 beq.n 8000778 <__aeabi_fdiv+0x224>
80006d4: 431c orrs r4, r3
80006d6: 0264 lsls r4, r4, #9
80006d8: 0a64 lsrs r4, r4, #9
80006da: 0033 movs r3, r6
80006dc: 21ff movs r1, #255 ; 0xff
80006de: e7d5 b.n 800068c <__aeabi_fdiv+0x138>
80006e0: 0163 lsls r3, r4, #5
80006e2: 016c lsls r4, r5, #5
80006e4: 42a3 cmp r3, r4
80006e6: d23b bcs.n 8000760 <__aeabi_fdiv+0x20c>
80006e8: 261b movs r6, #27
80006ea: 2100 movs r1, #0
80006ec: 3801 subs r0, #1
80006ee: 2501 movs r5, #1
80006f0: 001f movs r7, r3
80006f2: 0049 lsls r1, r1, #1
80006f4: 005b lsls r3, r3, #1
80006f6: 2f00 cmp r7, #0
80006f8: db01 blt.n 80006fe <__aeabi_fdiv+0x1aa>
80006fa: 429c cmp r4, r3
80006fc: d801 bhi.n 8000702 <__aeabi_fdiv+0x1ae>
80006fe: 1b1b subs r3, r3, r4
8000700: 4329 orrs r1, r5
8000702: 3e01 subs r6, #1
8000704: 2e00 cmp r6, #0
8000706: d1f3 bne.n 80006f0 <__aeabi_fdiv+0x19c>
8000708: 001c movs r4, r3
800070a: 1e63 subs r3, r4, #1
800070c: 419c sbcs r4, r3
800070e: 430c orrs r4, r1
8000710: 0001 movs r1, r0
8000712: 317f adds r1, #127 ; 0x7f
8000714: 2900 cmp r1, #0
8000716: ddce ble.n 80006b6 <__aeabi_fdiv+0x162>
8000718: 0763 lsls r3, r4, #29
800071a: d004 beq.n 8000726 <__aeabi_fdiv+0x1d2>
800071c: 230f movs r3, #15
800071e: 4023 ands r3, r4
8000720: 2b04 cmp r3, #4
8000722: d000 beq.n 8000726 <__aeabi_fdiv+0x1d2>
8000724: 3404 adds r4, #4
8000726: 0123 lsls r3, r4, #4
8000728: d503 bpl.n 8000732 <__aeabi_fdiv+0x1de>
800072a: 0001 movs r1, r0
800072c: 4b2c ldr r3, [pc, #176] ; (80007e0 <__aeabi_fdiv+0x28c>)
800072e: 3180 adds r1, #128 ; 0x80
8000730: 401c ands r4, r3
8000732: 29fe cmp r1, #254 ; 0xfe
8000734: dd0d ble.n 8000752 <__aeabi_fdiv+0x1fe>
8000736: 2301 movs r3, #1
8000738: 9a01 ldr r2, [sp, #4]
800073a: 21ff movs r1, #255 ; 0xff
800073c: 4013 ands r3, r2
800073e: 2400 movs r4, #0
8000740: e7a4 b.n 800068c <__aeabi_fdiv+0x138>
8000742: 2380 movs r3, #128 ; 0x80
8000744: 03db lsls r3, r3, #15
8000746: 431c orrs r4, r3
8000748: 0264 lsls r4, r4, #9
800074a: 0a64 lsrs r4, r4, #9
800074c: 0033 movs r3, r6
800074e: 21ff movs r1, #255 ; 0xff
8000750: e79c b.n 800068c <__aeabi_fdiv+0x138>
8000752: 2301 movs r3, #1
8000754: 9a01 ldr r2, [sp, #4]
8000756: 01a4 lsls r4, r4, #6
8000758: 0a64 lsrs r4, r4, #9
800075a: b2c9 uxtb r1, r1
800075c: 4013 ands r3, r2
800075e: e795 b.n 800068c <__aeabi_fdiv+0x138>
8000760: 1b1b subs r3, r3, r4
8000762: 261a movs r6, #26
8000764: 2101 movs r1, #1
8000766: e7c2 b.n 80006ee <__aeabi_fdiv+0x19a>
8000768: 9b00 ldr r3, [sp, #0]
800076a: 468b mov fp, r1
800076c: 469a mov sl, r3
800076e: 2400 movs r4, #0
8000770: e74c b.n 800060c <__aeabi_fdiv+0xb8>
8000772: 0263 lsls r3, r4, #9
8000774: d5e5 bpl.n 8000742 <__aeabi_fdiv+0x1ee>
8000776: 2500 movs r5, #0
8000778: 2480 movs r4, #128 ; 0x80
800077a: 03e4 lsls r4, r4, #15
800077c: 432c orrs r4, r5
800077e: 0264 lsls r4, r4, #9
8000780: 0a64 lsrs r4, r4, #9
8000782: 9b00 ldr r3, [sp, #0]
8000784: 21ff movs r1, #255 ; 0xff
8000786: e781 b.n 800068c <__aeabi_fdiv+0x138>
8000788: 9501 str r5, [sp, #4]
800078a: e7c1 b.n 8000710 <__aeabi_fdiv+0x1bc>
800078c: 0023 movs r3, r4
800078e: 2020 movs r0, #32
8000790: 40cb lsrs r3, r1
8000792: 1a41 subs r1, r0, r1
8000794: 408c lsls r4, r1
8000796: 1e61 subs r1, r4, #1
8000798: 418c sbcs r4, r1
800079a: 431c orrs r4, r3
800079c: 0763 lsls r3, r4, #29
800079e: d004 beq.n 80007aa <__aeabi_fdiv+0x256>
80007a0: 230f movs r3, #15
80007a2: 4023 ands r3, r4
80007a4: 2b04 cmp r3, #4
80007a6: d000 beq.n 80007aa <__aeabi_fdiv+0x256>
80007a8: 3404 adds r4, #4
80007aa: 0163 lsls r3, r4, #5
80007ac: d505 bpl.n 80007ba <__aeabi_fdiv+0x266>
80007ae: 2301 movs r3, #1
80007b0: 9a01 ldr r2, [sp, #4]
80007b2: 2101 movs r1, #1
80007b4: 4013 ands r3, r2
80007b6: 2400 movs r4, #0
80007b8: e768 b.n 800068c <__aeabi_fdiv+0x138>
80007ba: 2301 movs r3, #1
80007bc: 9a01 ldr r2, [sp, #4]
80007be: 01a4 lsls r4, r4, #6
80007c0: 0a64 lsrs r4, r4, #9
80007c2: 4013 ands r3, r2
80007c4: 2100 movs r1, #0
80007c6: e761 b.n 800068c <__aeabi_fdiv+0x138>
80007c8: 2380 movs r3, #128 ; 0x80
80007ca: 03db lsls r3, r3, #15
80007cc: 431c orrs r4, r3
80007ce: 0264 lsls r4, r4, #9
80007d0: 0a64 lsrs r4, r4, #9
80007d2: 4653 mov r3, sl
80007d4: 21ff movs r1, #255 ; 0xff
80007d6: e759 b.n 800068c <__aeabi_fdiv+0x138>
80007d8: 08007024 .word 0x08007024
80007dc: 08007064 .word 0x08007064
80007e0: f7ffffff .word 0xf7ffffff
080007e4 <__eqsf2>:
80007e4: b570 push {r4, r5, r6, lr}
80007e6: 0042 lsls r2, r0, #1
80007e8: 0245 lsls r5, r0, #9
80007ea: 024e lsls r6, r1, #9
80007ec: 004c lsls r4, r1, #1
80007ee: 0fc3 lsrs r3, r0, #31
80007f0: 0a6d lsrs r5, r5, #9
80007f2: 0e12 lsrs r2, r2, #24
80007f4: 0a76 lsrs r6, r6, #9
80007f6: 0e24 lsrs r4, r4, #24
80007f8: 0fc9 lsrs r1, r1, #31
80007fa: 2001 movs r0, #1
80007fc: 2aff cmp r2, #255 ; 0xff
80007fe: d006 beq.n 800080e <__eqsf2+0x2a>
8000800: 2cff cmp r4, #255 ; 0xff
8000802: d003 beq.n 800080c <__eqsf2+0x28>
8000804: 42a2 cmp r2, r4
8000806: d101 bne.n 800080c <__eqsf2+0x28>
8000808: 42b5 cmp r5, r6
800080a: d006 beq.n 800081a <__eqsf2+0x36>
800080c: bd70 pop {r4, r5, r6, pc}
800080e: 2d00 cmp r5, #0
8000810: d1fc bne.n 800080c <__eqsf2+0x28>
8000812: 2cff cmp r4, #255 ; 0xff
8000814: d1fa bne.n 800080c <__eqsf2+0x28>
8000816: 2e00 cmp r6, #0
8000818: d1f8 bne.n 800080c <__eqsf2+0x28>
800081a: 428b cmp r3, r1
800081c: d006 beq.n 800082c <__eqsf2+0x48>
800081e: 2001 movs r0, #1
8000820: 2a00 cmp r2, #0
8000822: d1f3 bne.n 800080c <__eqsf2+0x28>
8000824: 0028 movs r0, r5
8000826: 1e45 subs r5, r0, #1
8000828: 41a8 sbcs r0, r5
800082a: e7ef b.n 800080c <__eqsf2+0x28>
800082c: 2000 movs r0, #0
800082e: e7ed b.n 800080c <__eqsf2+0x28>
08000830 <__gesf2>:
8000830: b5f0 push {r4, r5, r6, r7, lr}
8000832: 0042 lsls r2, r0, #1
8000834: 0245 lsls r5, r0, #9
8000836: 024c lsls r4, r1, #9
8000838: 0fc3 lsrs r3, r0, #31
800083a: 0048 lsls r0, r1, #1
800083c: 0a6d lsrs r5, r5, #9
800083e: 0e12 lsrs r2, r2, #24
8000840: 0a64 lsrs r4, r4, #9
8000842: 0e00 lsrs r0, r0, #24
8000844: 0fc9 lsrs r1, r1, #31
8000846: 2aff cmp r2, #255 ; 0xff
8000848: d01e beq.n 8000888 <__gesf2+0x58>
800084a: 28ff cmp r0, #255 ; 0xff
800084c: d021 beq.n 8000892 <__gesf2+0x62>
800084e: 2a00 cmp r2, #0
8000850: d10a bne.n 8000868 <__gesf2+0x38>
8000852: 426e negs r6, r5
8000854: 416e adcs r6, r5
8000856: b2f6 uxtb r6, r6
8000858: 2800 cmp r0, #0
800085a: d10f bne.n 800087c <__gesf2+0x4c>
800085c: 2c00 cmp r4, #0
800085e: d10d bne.n 800087c <__gesf2+0x4c>
8000860: 2000 movs r0, #0
8000862: 2d00 cmp r5, #0
8000864: d009 beq.n 800087a <__gesf2+0x4a>
8000866: e005 b.n 8000874 <__gesf2+0x44>
8000868: 2800 cmp r0, #0
800086a: d101 bne.n 8000870 <__gesf2+0x40>
800086c: 2c00 cmp r4, #0
800086e: d001 beq.n 8000874 <__gesf2+0x44>
8000870: 428b cmp r3, r1
8000872: d011 beq.n 8000898 <__gesf2+0x68>
8000874: 2101 movs r1, #1
8000876: 4258 negs r0, r3
8000878: 4308 orrs r0, r1
800087a: bdf0 pop {r4, r5, r6, r7, pc}
800087c: 2e00 cmp r6, #0
800087e: d0f7 beq.n 8000870 <__gesf2+0x40>
8000880: 2001 movs r0, #1
8000882: 3901 subs r1, #1
8000884: 4308 orrs r0, r1
8000886: e7f8 b.n 800087a <__gesf2+0x4a>
8000888: 2d00 cmp r5, #0
800088a: d0de beq.n 800084a <__gesf2+0x1a>
800088c: 2002 movs r0, #2
800088e: 4240 negs r0, r0
8000890: e7f3 b.n 800087a <__gesf2+0x4a>
8000892: 2c00 cmp r4, #0
8000894: d0db beq.n 800084e <__gesf2+0x1e>
8000896: e7f9 b.n 800088c <__gesf2+0x5c>
8000898: 4282 cmp r2, r0
800089a: dceb bgt.n 8000874 <__gesf2+0x44>
800089c: db04 blt.n 80008a8 <__gesf2+0x78>
800089e: 42a5 cmp r5, r4
80008a0: d8e8 bhi.n 8000874 <__gesf2+0x44>
80008a2: 2000 movs r0, #0
80008a4: 42a5 cmp r5, r4
80008a6: d2e8 bcs.n 800087a <__gesf2+0x4a>
80008a8: 2101 movs r1, #1
80008aa: 1e58 subs r0, r3, #1
80008ac: 4308 orrs r0, r1
80008ae: e7e4 b.n 800087a <__gesf2+0x4a>
080008b0 <__lesf2>:
80008b0: b5f0 push {r4, r5, r6, r7, lr}
80008b2: 0042 lsls r2, r0, #1
80008b4: 024d lsls r5, r1, #9
80008b6: 004c lsls r4, r1, #1
80008b8: 0246 lsls r6, r0, #9
80008ba: 0a76 lsrs r6, r6, #9
80008bc: 0e12 lsrs r2, r2, #24
80008be: 0fc3 lsrs r3, r0, #31
80008c0: 0a6d lsrs r5, r5, #9
80008c2: 0e24 lsrs r4, r4, #24
80008c4: 0fc9 lsrs r1, r1, #31
80008c6: 2aff cmp r2, #255 ; 0xff
80008c8: d016 beq.n 80008f8 <__lesf2+0x48>
80008ca: 2cff cmp r4, #255 ; 0xff
80008cc: d018 beq.n 8000900 <__lesf2+0x50>
80008ce: 2a00 cmp r2, #0
80008d0: d10a bne.n 80008e8 <__lesf2+0x38>
80008d2: 4270 negs r0, r6
80008d4: 4170 adcs r0, r6
80008d6: b2c0 uxtb r0, r0
80008d8: 2c00 cmp r4, #0
80008da: d015 beq.n 8000908 <__lesf2+0x58>
80008dc: 2800 cmp r0, #0
80008de: d005 beq.n 80008ec <__lesf2+0x3c>
80008e0: 2001 movs r0, #1
80008e2: 3901 subs r1, #1
80008e4: 4308 orrs r0, r1
80008e6: bdf0 pop {r4, r5, r6, r7, pc}
80008e8: 2c00 cmp r4, #0
80008ea: d013 beq.n 8000914 <__lesf2+0x64>
80008ec: 4299 cmp r1, r3
80008ee: d014 beq.n 800091a <__lesf2+0x6a>
80008f0: 2001 movs r0, #1
80008f2: 425b negs r3, r3
80008f4: 4318 orrs r0, r3
80008f6: e7f6 b.n 80008e6 <__lesf2+0x36>
80008f8: 2002 movs r0, #2
80008fa: 2e00 cmp r6, #0
80008fc: d1f3 bne.n 80008e6 <__lesf2+0x36>
80008fe: e7e4 b.n 80008ca <__lesf2+0x1a>
8000900: 2002 movs r0, #2
8000902: 2d00 cmp r5, #0
8000904: d1ef bne.n 80008e6 <__lesf2+0x36>
8000906: e7e2 b.n 80008ce <__lesf2+0x1e>
8000908: 2d00 cmp r5, #0
800090a: d1e7 bne.n 80008dc <__lesf2+0x2c>
800090c: 2000 movs r0, #0
800090e: 2e00 cmp r6, #0
8000910: d0e9 beq.n 80008e6 <__lesf2+0x36>
8000912: e7ed b.n 80008f0 <__lesf2+0x40>
8000914: 2d00 cmp r5, #0
8000916: d1e9 bne.n 80008ec <__lesf2+0x3c>
8000918: e7ea b.n 80008f0 <__lesf2+0x40>
800091a: 42a2 cmp r2, r4
800091c: dc06 bgt.n 800092c <__lesf2+0x7c>
800091e: dbdf blt.n 80008e0 <__lesf2+0x30>
8000920: 42ae cmp r6, r5
8000922: d803 bhi.n 800092c <__lesf2+0x7c>
8000924: 2000 movs r0, #0
8000926: 42ae cmp r6, r5
8000928: d3da bcc.n 80008e0 <__lesf2+0x30>
800092a: e7dc b.n 80008e6 <__lesf2+0x36>
800092c: 2001 movs r0, #1
800092e: 4249 negs r1, r1
8000930: 4308 orrs r0, r1
8000932: e7d8 b.n 80008e6 <__lesf2+0x36>
08000934 <__aeabi_fmul>:
8000934: b5f8 push {r3, r4, r5, r6, r7, lr}
8000936: 4657 mov r7, sl
8000938: 464e mov r6, r9
800093a: 4645 mov r5, r8
800093c: 46de mov lr, fp
800093e: b5e0 push {r5, r6, r7, lr}
8000940: 0247 lsls r7, r0, #9
8000942: 0046 lsls r6, r0, #1
8000944: 4688 mov r8, r1
8000946: 0a7f lsrs r7, r7, #9
8000948: 0e36 lsrs r6, r6, #24
800094a: 0fc4 lsrs r4, r0, #31
800094c: 2e00 cmp r6, #0
800094e: d047 beq.n 80009e0 <__aeabi_fmul+0xac>
8000950: 2eff cmp r6, #255 ; 0xff
8000952: d024 beq.n 800099e <__aeabi_fmul+0x6a>
8000954: 00fb lsls r3, r7, #3
8000956: 2780 movs r7, #128 ; 0x80
8000958: 04ff lsls r7, r7, #19
800095a: 431f orrs r7, r3
800095c: 2300 movs r3, #0
800095e: 4699 mov r9, r3
8000960: 469a mov sl, r3
8000962: 3e7f subs r6, #127 ; 0x7f
8000964: 4643 mov r3, r8
8000966: 025d lsls r5, r3, #9
8000968: 0058 lsls r0, r3, #1
800096a: 0fdb lsrs r3, r3, #31
800096c: 0a6d lsrs r5, r5, #9
800096e: 0e00 lsrs r0, r0, #24
8000970: 4698 mov r8, r3
8000972: d043 beq.n 80009fc <__aeabi_fmul+0xc8>
8000974: 28ff cmp r0, #255 ; 0xff
8000976: d03b beq.n 80009f0 <__aeabi_fmul+0xbc>
8000978: 00eb lsls r3, r5, #3
800097a: 2580 movs r5, #128 ; 0x80
800097c: 2200 movs r2, #0
800097e: 04ed lsls r5, r5, #19
8000980: 431d orrs r5, r3
8000982: 387f subs r0, #127 ; 0x7f
8000984: 1836 adds r6, r6, r0
8000986: 1c73 adds r3, r6, #1
8000988: 4641 mov r1, r8
800098a: 469b mov fp, r3
800098c: 464b mov r3, r9
800098e: 4061 eors r1, r4
8000990: 4313 orrs r3, r2
8000992: 2b0f cmp r3, #15
8000994: d864 bhi.n 8000a60 <__aeabi_fmul+0x12c>
8000996: 4875 ldr r0, [pc, #468] ; (8000b6c <__aeabi_fmul+0x238>)
8000998: 009b lsls r3, r3, #2
800099a: 58c3 ldr r3, [r0, r3]
800099c: 469f mov pc, r3
800099e: 2f00 cmp r7, #0
80009a0: d142 bne.n 8000a28 <__aeabi_fmul+0xf4>
80009a2: 2308 movs r3, #8
80009a4: 4699 mov r9, r3
80009a6: 3b06 subs r3, #6
80009a8: 26ff movs r6, #255 ; 0xff
80009aa: 469a mov sl, r3
80009ac: e7da b.n 8000964 <__aeabi_fmul+0x30>
80009ae: 4641 mov r1, r8
80009b0: 2a02 cmp r2, #2
80009b2: d028 beq.n 8000a06 <__aeabi_fmul+0xd2>
80009b4: 2a03 cmp r2, #3
80009b6: d100 bne.n 80009ba <__aeabi_fmul+0x86>
80009b8: e0ce b.n 8000b58 <__aeabi_fmul+0x224>
80009ba: 2a01 cmp r2, #1
80009bc: d000 beq.n 80009c0 <__aeabi_fmul+0x8c>
80009be: e0ac b.n 8000b1a <__aeabi_fmul+0x1e6>
80009c0: 4011 ands r1, r2
80009c2: 2000 movs r0, #0
80009c4: 2200 movs r2, #0
80009c6: b2cc uxtb r4, r1
80009c8: 0240 lsls r0, r0, #9
80009ca: 05d2 lsls r2, r2, #23
80009cc: 0a40 lsrs r0, r0, #9
80009ce: 07e4 lsls r4, r4, #31
80009d0: 4310 orrs r0, r2
80009d2: 4320 orrs r0, r4
80009d4: bc3c pop {r2, r3, r4, r5}
80009d6: 4690 mov r8, r2
80009d8: 4699 mov r9, r3
80009da: 46a2 mov sl, r4
80009dc: 46ab mov fp, r5
80009de: bdf8 pop {r3, r4, r5, r6, r7, pc}
80009e0: 2f00 cmp r7, #0
80009e2: d115 bne.n 8000a10 <__aeabi_fmul+0xdc>
80009e4: 2304 movs r3, #4
80009e6: 4699 mov r9, r3
80009e8: 3b03 subs r3, #3
80009ea: 2600 movs r6, #0
80009ec: 469a mov sl, r3
80009ee: e7b9 b.n 8000964 <__aeabi_fmul+0x30>
80009f0: 20ff movs r0, #255 ; 0xff
80009f2: 2202 movs r2, #2
80009f4: 2d00 cmp r5, #0
80009f6: d0c5 beq.n 8000984 <__aeabi_fmul+0x50>
80009f8: 2203 movs r2, #3
80009fa: e7c3 b.n 8000984 <__aeabi_fmul+0x50>
80009fc: 2d00 cmp r5, #0
80009fe: d119 bne.n 8000a34 <__aeabi_fmul+0x100>
8000a00: 2000 movs r0, #0
8000a02: 2201 movs r2, #1
8000a04: e7be b.n 8000984 <__aeabi_fmul+0x50>
8000a06: 2401 movs r4, #1
8000a08: 22ff movs r2, #255 ; 0xff
8000a0a: 400c ands r4, r1
8000a0c: 2000 movs r0, #0
8000a0e: e7db b.n 80009c8 <__aeabi_fmul+0x94>
8000a10: 0038 movs r0, r7
8000a12: f000 fc03 bl 800121c <__clzsi2>
8000a16: 2676 movs r6, #118 ; 0x76
8000a18: 1f43 subs r3, r0, #5
8000a1a: 409f lsls r7, r3
8000a1c: 2300 movs r3, #0
8000a1e: 4276 negs r6, r6
8000a20: 1a36 subs r6, r6, r0
8000a22: 4699 mov r9, r3
8000a24: 469a mov sl, r3
8000a26: e79d b.n 8000964 <__aeabi_fmul+0x30>
8000a28: 230c movs r3, #12
8000a2a: 4699 mov r9, r3
8000a2c: 3b09 subs r3, #9
8000a2e: 26ff movs r6, #255 ; 0xff
8000a30: 469a mov sl, r3
8000a32: e797 b.n 8000964 <__aeabi_fmul+0x30>
8000a34: 0028 movs r0, r5
8000a36: f000 fbf1 bl 800121c <__clzsi2>
8000a3a: 1f43 subs r3, r0, #5
8000a3c: 409d lsls r5, r3
8000a3e: 2376 movs r3, #118 ; 0x76
8000a40: 425b negs r3, r3
8000a42: 1a18 subs r0, r3, r0
8000a44: 2200 movs r2, #0
8000a46: e79d b.n 8000984 <__aeabi_fmul+0x50>
8000a48: 2080 movs r0, #128 ; 0x80
8000a4a: 2400 movs r4, #0
8000a4c: 03c0 lsls r0, r0, #15
8000a4e: 22ff movs r2, #255 ; 0xff
8000a50: e7ba b.n 80009c8 <__aeabi_fmul+0x94>
8000a52: 003d movs r5, r7
8000a54: 4652 mov r2, sl
8000a56: e7ab b.n 80009b0 <__aeabi_fmul+0x7c>
8000a58: 003d movs r5, r7
8000a5a: 0021 movs r1, r4
8000a5c: 4652 mov r2, sl
8000a5e: e7a7 b.n 80009b0 <__aeabi_fmul+0x7c>
8000a60: 0c3b lsrs r3, r7, #16
8000a62: 469c mov ip, r3
8000a64: 042a lsls r2, r5, #16
8000a66: 0c12 lsrs r2, r2, #16
8000a68: 0c2b lsrs r3, r5, #16
8000a6a: 0014 movs r4, r2
8000a6c: 4660 mov r0, ip
8000a6e: 4665 mov r5, ip
8000a70: 043f lsls r7, r7, #16
8000a72: 0c3f lsrs r7, r7, #16
8000a74: 437c muls r4, r7
8000a76: 4342 muls r2, r0
8000a78: 435d muls r5, r3
8000a7a: 437b muls r3, r7
8000a7c: 0c27 lsrs r7, r4, #16
8000a7e: 189b adds r3, r3, r2
8000a80: 18ff adds r7, r7, r3
8000a82: 42ba cmp r2, r7
8000a84: d903 bls.n 8000a8e <__aeabi_fmul+0x15a>
8000a86: 2380 movs r3, #128 ; 0x80
8000a88: 025b lsls r3, r3, #9
8000a8a: 469c mov ip, r3
8000a8c: 4465 add r5, ip
8000a8e: 0424 lsls r4, r4, #16
8000a90: 043a lsls r2, r7, #16
8000a92: 0c24 lsrs r4, r4, #16
8000a94: 1912 adds r2, r2, r4
8000a96: 0193 lsls r3, r2, #6
8000a98: 1e5c subs r4, r3, #1
8000a9a: 41a3 sbcs r3, r4
8000a9c: 0c3f lsrs r7, r7, #16
8000a9e: 0e92 lsrs r2, r2, #26
8000aa0: 197d adds r5, r7, r5
8000aa2: 431a orrs r2, r3
8000aa4: 01ad lsls r5, r5, #6
8000aa6: 4315 orrs r5, r2
8000aa8: 012b lsls r3, r5, #4
8000aaa: d504 bpl.n 8000ab6 <__aeabi_fmul+0x182>
8000aac: 2301 movs r3, #1
8000aae: 465e mov r6, fp
8000ab0: 086a lsrs r2, r5, #1
8000ab2: 401d ands r5, r3
8000ab4: 4315 orrs r5, r2
8000ab6: 0032 movs r2, r6
8000ab8: 327f adds r2, #127 ; 0x7f
8000aba: 2a00 cmp r2, #0
8000abc: dd25 ble.n 8000b0a <__aeabi_fmul+0x1d6>
8000abe: 076b lsls r3, r5, #29
8000ac0: d004 beq.n 8000acc <__aeabi_fmul+0x198>
8000ac2: 230f movs r3, #15
8000ac4: 402b ands r3, r5
8000ac6: 2b04 cmp r3, #4
8000ac8: d000 beq.n 8000acc <__aeabi_fmul+0x198>
8000aca: 3504 adds r5, #4
8000acc: 012b lsls r3, r5, #4
8000ace: d503 bpl.n 8000ad8 <__aeabi_fmul+0x1a4>
8000ad0: 0032 movs r2, r6
8000ad2: 4b27 ldr r3, [pc, #156] ; (8000b70 <__aeabi_fmul+0x23c>)
8000ad4: 3280 adds r2, #128 ; 0x80
8000ad6: 401d ands r5, r3
8000ad8: 2afe cmp r2, #254 ; 0xfe
8000ada: dc94 bgt.n 8000a06 <__aeabi_fmul+0xd2>
8000adc: 2401 movs r4, #1
8000ade: 01a8 lsls r0, r5, #6
8000ae0: 0a40 lsrs r0, r0, #9
8000ae2: b2d2 uxtb r2, r2
8000ae4: 400c ands r4, r1
8000ae6: e76f b.n 80009c8 <__aeabi_fmul+0x94>
8000ae8: 2080 movs r0, #128 ; 0x80
8000aea: 03c0 lsls r0, r0, #15
8000aec: 4207 tst r7, r0
8000aee: d007 beq.n 8000b00 <__aeabi_fmul+0x1cc>
8000af0: 4205 tst r5, r0
8000af2: d105 bne.n 8000b00 <__aeabi_fmul+0x1cc>
8000af4: 4328 orrs r0, r5
8000af6: 0240 lsls r0, r0, #9
8000af8: 0a40 lsrs r0, r0, #9
8000afa: 4644 mov r4, r8
8000afc: 22ff movs r2, #255 ; 0xff
8000afe: e763 b.n 80009c8 <__aeabi_fmul+0x94>
8000b00: 4338 orrs r0, r7
8000b02: 0240 lsls r0, r0, #9
8000b04: 0a40 lsrs r0, r0, #9
8000b06: 22ff movs r2, #255 ; 0xff
8000b08: e75e b.n 80009c8 <__aeabi_fmul+0x94>
8000b0a: 2401 movs r4, #1
8000b0c: 1aa3 subs r3, r4, r2
8000b0e: 2b1b cmp r3, #27
8000b10: dd05 ble.n 8000b1e <__aeabi_fmul+0x1ea>
8000b12: 400c ands r4, r1
8000b14: 2200 movs r2, #0
8000b16: 2000 movs r0, #0
8000b18: e756 b.n 80009c8 <__aeabi_fmul+0x94>
8000b1a: 465e mov r6, fp
8000b1c: e7cb b.n 8000ab6 <__aeabi_fmul+0x182>
8000b1e: 002a movs r2, r5
8000b20: 2020 movs r0, #32
8000b22: 40da lsrs r2, r3
8000b24: 1ac3 subs r3, r0, r3
8000b26: 409d lsls r5, r3
8000b28: 002b movs r3, r5
8000b2a: 1e5d subs r5, r3, #1
8000b2c: 41ab sbcs r3, r5
8000b2e: 4313 orrs r3, r2
8000b30: 075a lsls r2, r3, #29
8000b32: d004 beq.n 8000b3e <__aeabi_fmul+0x20a>
8000b34: 220f movs r2, #15
8000b36: 401a ands r2, r3
8000b38: 2a04 cmp r2, #4
8000b3a: d000 beq.n 8000b3e <__aeabi_fmul+0x20a>
8000b3c: 3304 adds r3, #4
8000b3e: 015a lsls r2, r3, #5
8000b40: d504 bpl.n 8000b4c <__aeabi_fmul+0x218>
8000b42: 2401 movs r4, #1
8000b44: 2201 movs r2, #1
8000b46: 400c ands r4, r1
8000b48: 2000 movs r0, #0
8000b4a: e73d b.n 80009c8 <__aeabi_fmul+0x94>
8000b4c: 2401 movs r4, #1
8000b4e: 019b lsls r3, r3, #6
8000b50: 0a58 lsrs r0, r3, #9
8000b52: 400c ands r4, r1
8000b54: 2200 movs r2, #0
8000b56: e737 b.n 80009c8 <__aeabi_fmul+0x94>
8000b58: 2080 movs r0, #128 ; 0x80
8000b5a: 2401 movs r4, #1
8000b5c: 03c0 lsls r0, r0, #15
8000b5e: 4328 orrs r0, r5
8000b60: 0240 lsls r0, r0, #9
8000b62: 0a40 lsrs r0, r0, #9
8000b64: 400c ands r4, r1
8000b66: 22ff movs r2, #255 ; 0xff
8000b68: e72e b.n 80009c8 <__aeabi_fmul+0x94>
8000b6a: 46c0 nop ; (mov r8, r8)
8000b6c: 080070a4 .word 0x080070a4
8000b70: f7ffffff .word 0xf7ffffff
08000b74 <__aeabi_fsub>:
8000b74: b5f0 push {r4, r5, r6, r7, lr}
8000b76: 464f mov r7, r9
8000b78: 46d6 mov lr, sl
8000b7a: 4646 mov r6, r8
8000b7c: 0044 lsls r4, r0, #1
8000b7e: b5c0 push {r6, r7, lr}
8000b80: 0fc2 lsrs r2, r0, #31
8000b82: 0247 lsls r7, r0, #9
8000b84: 0248 lsls r0, r1, #9
8000b86: 0a40 lsrs r0, r0, #9
8000b88: 4684 mov ip, r0
8000b8a: 4666 mov r6, ip
8000b8c: 0a7b lsrs r3, r7, #9
8000b8e: 0048 lsls r0, r1, #1
8000b90: 0fc9 lsrs r1, r1, #31
8000b92: 469a mov sl, r3
8000b94: 0e24 lsrs r4, r4, #24
8000b96: 0015 movs r5, r2
8000b98: 00db lsls r3, r3, #3
8000b9a: 0e00 lsrs r0, r0, #24
8000b9c: 4689 mov r9, r1
8000b9e: 00f6 lsls r6, r6, #3
8000ba0: 28ff cmp r0, #255 ; 0xff
8000ba2: d100 bne.n 8000ba6 <__aeabi_fsub+0x32>
8000ba4: e08f b.n 8000cc6 <__aeabi_fsub+0x152>
8000ba6: 2101 movs r1, #1
8000ba8: 464f mov r7, r9
8000baa: 404f eors r7, r1
8000bac: 0039 movs r1, r7
8000bae: 4291 cmp r1, r2
8000bb0: d066 beq.n 8000c80 <__aeabi_fsub+0x10c>
8000bb2: 1a22 subs r2, r4, r0
8000bb4: 2a00 cmp r2, #0
8000bb6: dc00 bgt.n 8000bba <__aeabi_fsub+0x46>
8000bb8: e09d b.n 8000cf6 <__aeabi_fsub+0x182>
8000bba: 2800 cmp r0, #0
8000bbc: d13d bne.n 8000c3a <__aeabi_fsub+0xc6>
8000bbe: 2e00 cmp r6, #0
8000bc0: d100 bne.n 8000bc4 <__aeabi_fsub+0x50>
8000bc2: e08b b.n 8000cdc <__aeabi_fsub+0x168>
8000bc4: 1e51 subs r1, r2, #1
8000bc6: 2900 cmp r1, #0
8000bc8: d000 beq.n 8000bcc <__aeabi_fsub+0x58>
8000bca: e0b5 b.n 8000d38 <__aeabi_fsub+0x1c4>
8000bcc: 2401 movs r4, #1
8000bce: 1b9b subs r3, r3, r6
8000bd0: 015a lsls r2, r3, #5
8000bd2: d544 bpl.n 8000c5e <__aeabi_fsub+0xea>
8000bd4: 019b lsls r3, r3, #6
8000bd6: 099f lsrs r7, r3, #6
8000bd8: 0038 movs r0, r7
8000bda: f000 fb1f bl 800121c <__clzsi2>
8000bde: 3805 subs r0, #5
8000be0: 4087 lsls r7, r0
8000be2: 4284 cmp r4, r0
8000be4: dd00 ble.n 8000be8 <__aeabi_fsub+0x74>
8000be6: e096 b.n 8000d16 <__aeabi_fsub+0x1a2>
8000be8: 1b04 subs r4, r0, r4
8000bea: 003a movs r2, r7
8000bec: 2020 movs r0, #32
8000bee: 3401 adds r4, #1
8000bf0: 40e2 lsrs r2, r4
8000bf2: 1b04 subs r4, r0, r4
8000bf4: 40a7 lsls r7, r4
8000bf6: 003b movs r3, r7
8000bf8: 1e5f subs r7, r3, #1
8000bfa: 41bb sbcs r3, r7
8000bfc: 2400 movs r4, #0
8000bfe: 4313 orrs r3, r2
8000c00: 075a lsls r2, r3, #29
8000c02: d004 beq.n 8000c0e <__aeabi_fsub+0x9a>
8000c04: 220f movs r2, #15
8000c06: 401a ands r2, r3
8000c08: 2a04 cmp r2, #4
8000c0a: d000 beq.n 8000c0e <__aeabi_fsub+0x9a>
8000c0c: 3304 adds r3, #4
8000c0e: 015a lsls r2, r3, #5
8000c10: d527 bpl.n 8000c62 <__aeabi_fsub+0xee>
8000c12: 3401 adds r4, #1
8000c14: 2cff cmp r4, #255 ; 0xff
8000c16: d100 bne.n 8000c1a <__aeabi_fsub+0xa6>
8000c18: e079 b.n 8000d0e <__aeabi_fsub+0x19a>
8000c1a: 2201 movs r2, #1
8000c1c: 019b lsls r3, r3, #6
8000c1e: 0a5b lsrs r3, r3, #9
8000c20: b2e4 uxtb r4, r4
8000c22: 402a ands r2, r5
8000c24: 025b lsls r3, r3, #9
8000c26: 05e4 lsls r4, r4, #23
8000c28: 0a58 lsrs r0, r3, #9
8000c2a: 07d2 lsls r2, r2, #31
8000c2c: 4320 orrs r0, r4
8000c2e: 4310 orrs r0, r2
8000c30: bc1c pop {r2, r3, r4}
8000c32: 4690 mov r8, r2
8000c34: 4699 mov r9, r3
8000c36: 46a2 mov sl, r4
8000c38: bdf0 pop {r4, r5, r6, r7, pc}
8000c3a: 2cff cmp r4, #255 ; 0xff
8000c3c: d0e0 beq.n 8000c00 <__aeabi_fsub+0x8c>
8000c3e: 2180 movs r1, #128 ; 0x80
8000c40: 04c9 lsls r1, r1, #19
8000c42: 430e orrs r6, r1
8000c44: 2a1b cmp r2, #27
8000c46: dc7b bgt.n 8000d40 <__aeabi_fsub+0x1cc>
8000c48: 0031 movs r1, r6
8000c4a: 2020 movs r0, #32
8000c4c: 40d1 lsrs r1, r2
8000c4e: 1a82 subs r2, r0, r2
8000c50: 4096 lsls r6, r2
8000c52: 1e72 subs r2, r6, #1
8000c54: 4196 sbcs r6, r2
8000c56: 430e orrs r6, r1
8000c58: 1b9b subs r3, r3, r6
8000c5a: 015a lsls r2, r3, #5
8000c5c: d4ba bmi.n 8000bd4 <__aeabi_fsub+0x60>
8000c5e: 075a lsls r2, r3, #29
8000c60: d1d0 bne.n 8000c04 <__aeabi_fsub+0x90>
8000c62: 2201 movs r2, #1
8000c64: 08df lsrs r7, r3, #3
8000c66: 402a ands r2, r5
8000c68: 2cff cmp r4, #255 ; 0xff
8000c6a: d133 bne.n 8000cd4 <__aeabi_fsub+0x160>
8000c6c: 2f00 cmp r7, #0
8000c6e: d100 bne.n 8000c72 <__aeabi_fsub+0xfe>
8000c70: e0a8 b.n 8000dc4 <__aeabi_fsub+0x250>
8000c72: 2380 movs r3, #128 ; 0x80
8000c74: 03db lsls r3, r3, #15
8000c76: 433b orrs r3, r7
8000c78: 025b lsls r3, r3, #9
8000c7a: 0a5b lsrs r3, r3, #9
8000c7c: 24ff movs r4, #255 ; 0xff
8000c7e: e7d1 b.n 8000c24 <__aeabi_fsub+0xb0>
8000c80: 1a21 subs r1, r4, r0
8000c82: 2900 cmp r1, #0
8000c84: dd4c ble.n 8000d20 <__aeabi_fsub+0x1ac>
8000c86: 2800 cmp r0, #0
8000c88: d02a beq.n 8000ce0 <__aeabi_fsub+0x16c>
8000c8a: 2cff cmp r4, #255 ; 0xff
8000c8c: d0b8 beq.n 8000c00 <__aeabi_fsub+0x8c>
8000c8e: 2080 movs r0, #128 ; 0x80
8000c90: 04c0 lsls r0, r0, #19
8000c92: 4306 orrs r6, r0
8000c94: 291b cmp r1, #27
8000c96: dd00 ble.n 8000c9a <__aeabi_fsub+0x126>
8000c98: e0af b.n 8000dfa <__aeabi_fsub+0x286>
8000c9a: 0030 movs r0, r6
8000c9c: 2720 movs r7, #32
8000c9e: 40c8 lsrs r0, r1
8000ca0: 1a79 subs r1, r7, r1
8000ca2: 408e lsls r6, r1
8000ca4: 1e71 subs r1, r6, #1
8000ca6: 418e sbcs r6, r1
8000ca8: 4306 orrs r6, r0
8000caa: 199b adds r3, r3, r6
8000cac: 0159 lsls r1, r3, #5
8000cae: d5d6 bpl.n 8000c5e <__aeabi_fsub+0xea>
8000cb0: 3401 adds r4, #1
8000cb2: 2cff cmp r4, #255 ; 0xff
8000cb4: d100 bne.n 8000cb8 <__aeabi_fsub+0x144>
8000cb6: e085 b.n 8000dc4 <__aeabi_fsub+0x250>
8000cb8: 2201 movs r2, #1
8000cba: 497a ldr r1, [pc, #488] ; (8000ea4 <__aeabi_fsub+0x330>)
8000cbc: 401a ands r2, r3
8000cbe: 085b lsrs r3, r3, #1
8000cc0: 400b ands r3, r1
8000cc2: 4313 orrs r3, r2
8000cc4: e79c b.n 8000c00 <__aeabi_fsub+0x8c>
8000cc6: 2e00 cmp r6, #0
8000cc8: d000 beq.n 8000ccc <__aeabi_fsub+0x158>
8000cca: e770 b.n 8000bae <__aeabi_fsub+0x3a>
8000ccc: e76b b.n 8000ba6 <__aeabi_fsub+0x32>
8000cce: 1e3b subs r3, r7, #0
8000cd0: d1c5 bne.n 8000c5e <__aeabi_fsub+0xea>
8000cd2: 2200 movs r2, #0
8000cd4: 027b lsls r3, r7, #9
8000cd6: 0a5b lsrs r3, r3, #9
8000cd8: b2e4 uxtb r4, r4
8000cda: e7a3 b.n 8000c24 <__aeabi_fsub+0xb0>
8000cdc: 0014 movs r4, r2
8000cde: e78f b.n 8000c00 <__aeabi_fsub+0x8c>
8000ce0: 2e00 cmp r6, #0
8000ce2: d04d beq.n 8000d80 <__aeabi_fsub+0x20c>
8000ce4: 1e48 subs r0, r1, #1
8000ce6: 2800 cmp r0, #0
8000ce8: d157 bne.n 8000d9a <__aeabi_fsub+0x226>
8000cea: 199b adds r3, r3, r6
8000cec: 2401 movs r4, #1
8000cee: 015a lsls r2, r3, #5
8000cf0: d5b5 bpl.n 8000c5e <__aeabi_fsub+0xea>
8000cf2: 2402 movs r4, #2
8000cf4: e7e0 b.n 8000cb8 <__aeabi_fsub+0x144>
8000cf6: 2a00 cmp r2, #0
8000cf8: d125 bne.n 8000d46 <__aeabi_fsub+0x1d2>
8000cfa: 1c62 adds r2, r4, #1
8000cfc: b2d2 uxtb r2, r2
8000cfe: 2a01 cmp r2, #1
8000d00: dd72 ble.n 8000de8 <__aeabi_fsub+0x274>
8000d02: 1b9f subs r7, r3, r6
8000d04: 017a lsls r2, r7, #5
8000d06: d535 bpl.n 8000d74 <__aeabi_fsub+0x200>
8000d08: 1af7 subs r7, r6, r3
8000d0a: 000d movs r5, r1
8000d0c: e764 b.n 8000bd8 <__aeabi_fsub+0x64>
8000d0e: 2201 movs r2, #1
8000d10: 2300 movs r3, #0
8000d12: 402a ands r2, r5
8000d14: e786 b.n 8000c24 <__aeabi_fsub+0xb0>
8000d16: 003b movs r3, r7
8000d18: 4a63 ldr r2, [pc, #396] ; (8000ea8 <__aeabi_fsub+0x334>)
8000d1a: 1a24 subs r4, r4, r0
8000d1c: 4013 ands r3, r2
8000d1e: e76f b.n 8000c00 <__aeabi_fsub+0x8c>
8000d20: 2900 cmp r1, #0
8000d22: d16c bne.n 8000dfe <__aeabi_fsub+0x28a>
8000d24: 1c61 adds r1, r4, #1
8000d26: b2c8 uxtb r0, r1
8000d28: 2801 cmp r0, #1
8000d2a: dd4e ble.n 8000dca <__aeabi_fsub+0x256>
8000d2c: 29ff cmp r1, #255 ; 0xff
8000d2e: d049 beq.n 8000dc4 <__aeabi_fsub+0x250>
8000d30: 199b adds r3, r3, r6
8000d32: 085b lsrs r3, r3, #1
8000d34: 000c movs r4, r1
8000d36: e763 b.n 8000c00 <__aeabi_fsub+0x8c>
8000d38: 2aff cmp r2, #255 ; 0xff
8000d3a: d041 beq.n 8000dc0 <__aeabi_fsub+0x24c>
8000d3c: 000a movs r2, r1
8000d3e: e781 b.n 8000c44 <__aeabi_fsub+0xd0>
8000d40: 2601 movs r6, #1
8000d42: 1b9b subs r3, r3, r6
8000d44: e789 b.n 8000c5a <__aeabi_fsub+0xe6>
8000d46: 2c00 cmp r4, #0
8000d48: d01c beq.n 8000d84 <__aeabi_fsub+0x210>
8000d4a: 28ff cmp r0, #255 ; 0xff
8000d4c: d021 beq.n 8000d92 <__aeabi_fsub+0x21e>
8000d4e: 2480 movs r4, #128 ; 0x80
8000d50: 04e4 lsls r4, r4, #19
8000d52: 4252 negs r2, r2
8000d54: 4323 orrs r3, r4
8000d56: 2a1b cmp r2, #27
8000d58: dd00 ble.n 8000d5c <__aeabi_fsub+0x1e8>
8000d5a: e096 b.n 8000e8a <__aeabi_fsub+0x316>
8000d5c: 001c movs r4, r3
8000d5e: 2520 movs r5, #32
8000d60: 40d4 lsrs r4, r2
8000d62: 1aaa subs r2, r5, r2
8000d64: 4093 lsls r3, r2
8000d66: 1e5a subs r2, r3, #1
8000d68: 4193 sbcs r3, r2
8000d6a: 4323 orrs r3, r4
8000d6c: 1af3 subs r3, r6, r3
8000d6e: 0004 movs r4, r0
8000d70: 000d movs r5, r1
8000d72: e72d b.n 8000bd0 <__aeabi_fsub+0x5c>
8000d74: 2f00 cmp r7, #0
8000d76: d000 beq.n 8000d7a <__aeabi_fsub+0x206>
8000d78: e72e b.n 8000bd8 <__aeabi_fsub+0x64>
8000d7a: 2200 movs r2, #0
8000d7c: 2400 movs r4, #0
8000d7e: e7a9 b.n 8000cd4 <__aeabi_fsub+0x160>
8000d80: 000c movs r4, r1
8000d82: e73d b.n 8000c00 <__aeabi_fsub+0x8c>
8000d84: 2b00 cmp r3, #0
8000d86: d058 beq.n 8000e3a <__aeabi_fsub+0x2c6>
8000d88: 43d2 mvns r2, r2
8000d8a: 2a00 cmp r2, #0
8000d8c: d0ee beq.n 8000d6c <__aeabi_fsub+0x1f8>
8000d8e: 28ff cmp r0, #255 ; 0xff
8000d90: d1e1 bne.n 8000d56 <__aeabi_fsub+0x1e2>
8000d92: 0033 movs r3, r6
8000d94: 24ff movs r4, #255 ; 0xff
8000d96: 000d movs r5, r1
8000d98: e732 b.n 8000c00 <__aeabi_fsub+0x8c>
8000d9a: 29ff cmp r1, #255 ; 0xff
8000d9c: d010 beq.n 8000dc0 <__aeabi_fsub+0x24c>
8000d9e: 0001 movs r1, r0
8000da0: e778 b.n 8000c94 <__aeabi_fsub+0x120>
8000da2: 2b00 cmp r3, #0
8000da4: d06e beq.n 8000e84 <__aeabi_fsub+0x310>
8000da6: 24ff movs r4, #255 ; 0xff
8000da8: 2e00 cmp r6, #0
8000daa: d100 bne.n 8000dae <__aeabi_fsub+0x23a>
8000dac: e728 b.n 8000c00 <__aeabi_fsub+0x8c>
8000dae: 2280 movs r2, #128 ; 0x80
8000db0: 4651 mov r1, sl
8000db2: 03d2 lsls r2, r2, #15
8000db4: 4211 tst r1, r2
8000db6: d003 beq.n 8000dc0 <__aeabi_fsub+0x24c>
8000db8: 4661 mov r1, ip
8000dba: 4211 tst r1, r2
8000dbc: d100 bne.n 8000dc0 <__aeabi_fsub+0x24c>
8000dbe: 0033 movs r3, r6
8000dc0: 24ff movs r4, #255 ; 0xff
8000dc2: e71d b.n 8000c00 <__aeabi_fsub+0x8c>
8000dc4: 24ff movs r4, #255 ; 0xff
8000dc6: 2300 movs r3, #0
8000dc8: e72c b.n 8000c24 <__aeabi_fsub+0xb0>
8000dca: 2c00 cmp r4, #0
8000dcc: d1e9 bne.n 8000da2 <__aeabi_fsub+0x22e>
8000dce: 2b00 cmp r3, #0
8000dd0: d063 beq.n 8000e9a <__aeabi_fsub+0x326>
8000dd2: 2e00 cmp r6, #0
8000dd4: d100 bne.n 8000dd8 <__aeabi_fsub+0x264>
8000dd6: e713 b.n 8000c00 <__aeabi_fsub+0x8c>
8000dd8: 199b adds r3, r3, r6
8000dda: 015a lsls r2, r3, #5
8000ddc: d400 bmi.n 8000de0 <__aeabi_fsub+0x26c>
8000dde: e73e b.n 8000c5e <__aeabi_fsub+0xea>
8000de0: 4a31 ldr r2, [pc, #196] ; (8000ea8 <__aeabi_fsub+0x334>)
8000de2: 000c movs r4, r1
8000de4: 4013 ands r3, r2
8000de6: e70b b.n 8000c00 <__aeabi_fsub+0x8c>
8000de8: 2c00 cmp r4, #0
8000dea: d11e bne.n 8000e2a <__aeabi_fsub+0x2b6>
8000dec: 2b00 cmp r3, #0
8000dee: d12f bne.n 8000e50 <__aeabi_fsub+0x2dc>
8000df0: 2e00 cmp r6, #0
8000df2: d04f beq.n 8000e94 <__aeabi_fsub+0x320>
8000df4: 0033 movs r3, r6
8000df6: 000d movs r5, r1
8000df8: e702 b.n 8000c00 <__aeabi_fsub+0x8c>
8000dfa: 2601 movs r6, #1
8000dfc: e755 b.n 8000caa <__aeabi_fsub+0x136>
8000dfe: 2c00 cmp r4, #0
8000e00: d11f bne.n 8000e42 <__aeabi_fsub+0x2ce>
8000e02: 2b00 cmp r3, #0
8000e04: d043 beq.n 8000e8e <__aeabi_fsub+0x31a>
8000e06: 43c9 mvns r1, r1
8000e08: 2900 cmp r1, #0
8000e0a: d00b beq.n 8000e24 <__aeabi_fsub+0x2b0>
8000e0c: 28ff cmp r0, #255 ; 0xff
8000e0e: d039 beq.n 8000e84 <__aeabi_fsub+0x310>
8000e10: 291b cmp r1, #27
8000e12: dc44 bgt.n 8000e9e <__aeabi_fsub+0x32a>
8000e14: 001c movs r4, r3
8000e16: 2720 movs r7, #32
8000e18: 40cc lsrs r4, r1
8000e1a: 1a79 subs r1, r7, r1
8000e1c: 408b lsls r3, r1
8000e1e: 1e59 subs r1, r3, #1
8000e20: 418b sbcs r3, r1
8000e22: 4323 orrs r3, r4
8000e24: 199b adds r3, r3, r6
8000e26: 0004 movs r4, r0
8000e28: e740 b.n 8000cac <__aeabi_fsub+0x138>
8000e2a: 2b00 cmp r3, #0
8000e2c: d11a bne.n 8000e64 <__aeabi_fsub+0x2f0>
8000e2e: 2e00 cmp r6, #0
8000e30: d124 bne.n 8000e7c <__aeabi_fsub+0x308>
8000e32: 2780 movs r7, #128 ; 0x80
8000e34: 2200 movs r2, #0
8000e36: 03ff lsls r7, r7, #15
8000e38: e71b b.n 8000c72 <__aeabi_fsub+0xfe>
8000e3a: 0033 movs r3, r6
8000e3c: 0004 movs r4, r0
8000e3e: 000d movs r5, r1
8000e40: e6de b.n 8000c00 <__aeabi_fsub+0x8c>
8000e42: 28ff cmp r0, #255 ; 0xff
8000e44: d01e beq.n 8000e84 <__aeabi_fsub+0x310>
8000e46: 2480 movs r4, #128 ; 0x80
8000e48: 04e4 lsls r4, r4, #19
8000e4a: 4249 negs r1, r1
8000e4c: 4323 orrs r3, r4
8000e4e: e7df b.n 8000e10 <__aeabi_fsub+0x29c>
8000e50: 2e00 cmp r6, #0
8000e52: d100 bne.n 8000e56 <__aeabi_fsub+0x2e2>
8000e54: e6d4 b.n 8000c00 <__aeabi_fsub+0x8c>
8000e56: 1b9f subs r7, r3, r6
8000e58: 017a lsls r2, r7, #5
8000e5a: d400 bmi.n 8000e5e <__aeabi_fsub+0x2ea>
8000e5c: e737 b.n 8000cce <__aeabi_fsub+0x15a>
8000e5e: 1af3 subs r3, r6, r3
8000e60: 000d movs r5, r1
8000e62: e6cd b.n 8000c00 <__aeabi_fsub+0x8c>
8000e64: 24ff movs r4, #255 ; 0xff
8000e66: 2e00 cmp r6, #0
8000e68: d100 bne.n 8000e6c <__aeabi_fsub+0x2f8>
8000e6a: e6c9 b.n 8000c00 <__aeabi_fsub+0x8c>
8000e6c: 2280 movs r2, #128 ; 0x80
8000e6e: 4650 mov r0, sl
8000e70: 03d2 lsls r2, r2, #15
8000e72: 4210 tst r0, r2
8000e74: d0a4 beq.n 8000dc0 <__aeabi_fsub+0x24c>
8000e76: 4660 mov r0, ip
8000e78: 4210 tst r0, r2
8000e7a: d1a1 bne.n 8000dc0 <__aeabi_fsub+0x24c>
8000e7c: 0033 movs r3, r6
8000e7e: 000d movs r5, r1
8000e80: 24ff movs r4, #255 ; 0xff
8000e82: e6bd b.n 8000c00 <__aeabi_fsub+0x8c>
8000e84: 0033 movs r3, r6
8000e86: 24ff movs r4, #255 ; 0xff
8000e88: e6ba b.n 8000c00 <__aeabi_fsub+0x8c>
8000e8a: 2301 movs r3, #1
8000e8c: e76e b.n 8000d6c <__aeabi_fsub+0x1f8>
8000e8e: 0033 movs r3, r6
8000e90: 0004 movs r4, r0
8000e92: e6b5 b.n 8000c00 <__aeabi_fsub+0x8c>
8000e94: 2700 movs r7, #0
8000e96: 2200 movs r2, #0
8000e98: e71c b.n 8000cd4 <__aeabi_fsub+0x160>
8000e9a: 0033 movs r3, r6
8000e9c: e6b0 b.n 8000c00 <__aeabi_fsub+0x8c>
8000e9e: 2301 movs r3, #1
8000ea0: e7c0 b.n 8000e24 <__aeabi_fsub+0x2b0>
8000ea2: 46c0 nop ; (mov r8, r8)
8000ea4: 7dffffff .word 0x7dffffff
8000ea8: fbffffff .word 0xfbffffff
08000eac <__aeabi_f2iz>:
8000eac: 0241 lsls r1, r0, #9
8000eae: 0043 lsls r3, r0, #1
8000eb0: 0fc2 lsrs r2, r0, #31
8000eb2: 0a49 lsrs r1, r1, #9
8000eb4: 0e1b lsrs r3, r3, #24
8000eb6: 2000 movs r0, #0
8000eb8: 2b7e cmp r3, #126 ; 0x7e
8000eba: dd0d ble.n 8000ed8 <__aeabi_f2iz+0x2c>
8000ebc: 2b9d cmp r3, #157 ; 0x9d
8000ebe: dc0c bgt.n 8000eda <__aeabi_f2iz+0x2e>
8000ec0: 2080 movs r0, #128 ; 0x80
8000ec2: 0400 lsls r0, r0, #16
8000ec4: 4301 orrs r1, r0
8000ec6: 2b95 cmp r3, #149 ; 0x95
8000ec8: dc0a bgt.n 8000ee0 <__aeabi_f2iz+0x34>
8000eca: 2096 movs r0, #150 ; 0x96
8000ecc: 1ac3 subs r3, r0, r3
8000ece: 40d9 lsrs r1, r3
8000ed0: 4248 negs r0, r1
8000ed2: 2a00 cmp r2, #0
8000ed4: d100 bne.n 8000ed8 <__aeabi_f2iz+0x2c>
8000ed6: 0008 movs r0, r1
8000ed8: 4770 bx lr
8000eda: 4b03 ldr r3, [pc, #12] ; (8000ee8 <__aeabi_f2iz+0x3c>)
8000edc: 18d0 adds r0, r2, r3
8000ede: e7fb b.n 8000ed8 <__aeabi_f2iz+0x2c>
8000ee0: 3b96 subs r3, #150 ; 0x96
8000ee2: 4099 lsls r1, r3
8000ee4: e7f4 b.n 8000ed0 <__aeabi_f2iz+0x24>
8000ee6: 46c0 nop ; (mov r8, r8)
8000ee8: 7fffffff .word 0x7fffffff
08000eec <__aeabi_ui2f>:
8000eec: b510 push {r4, lr}
8000eee: 1e04 subs r4, r0, #0
8000ef0: d027 beq.n 8000f42 <__aeabi_ui2f+0x56>
8000ef2: f000 f993 bl 800121c <__clzsi2>
8000ef6: 239e movs r3, #158 ; 0x9e
8000ef8: 1a1b subs r3, r3, r0
8000efa: 2b96 cmp r3, #150 ; 0x96
8000efc: dc0a bgt.n 8000f14 <__aeabi_ui2f+0x28>
8000efe: 2296 movs r2, #150 ; 0x96
8000f00: 1ad2 subs r2, r2, r3
8000f02: 4094 lsls r4, r2
8000f04: 0264 lsls r4, r4, #9
8000f06: 0a64 lsrs r4, r4, #9
8000f08: b2db uxtb r3, r3
8000f0a: 0264 lsls r4, r4, #9
8000f0c: 05db lsls r3, r3, #23
8000f0e: 0a60 lsrs r0, r4, #9
8000f10: 4318 orrs r0, r3
8000f12: bd10 pop {r4, pc}
8000f14: 2b99 cmp r3, #153 ; 0x99
8000f16: dc17 bgt.n 8000f48 <__aeabi_ui2f+0x5c>
8000f18: 2299 movs r2, #153 ; 0x99
8000f1a: 1ad2 subs r2, r2, r3
8000f1c: 2a00 cmp r2, #0
8000f1e: dd27 ble.n 8000f70 <__aeabi_ui2f+0x84>
8000f20: 4094 lsls r4, r2
8000f22: 0022 movs r2, r4
8000f24: 4c13 ldr r4, [pc, #76] ; (8000f74 <__aeabi_ui2f+0x88>)
8000f26: 4014 ands r4, r2
8000f28: 0751 lsls r1, r2, #29
8000f2a: d004 beq.n 8000f36 <__aeabi_ui2f+0x4a>
8000f2c: 210f movs r1, #15
8000f2e: 400a ands r2, r1
8000f30: 2a04 cmp r2, #4
8000f32: d000 beq.n 8000f36 <__aeabi_ui2f+0x4a>
8000f34: 3404 adds r4, #4
8000f36: 0162 lsls r2, r4, #5
8000f38: d412 bmi.n 8000f60 <__aeabi_ui2f+0x74>
8000f3a: 01a4 lsls r4, r4, #6
8000f3c: 0a64 lsrs r4, r4, #9
8000f3e: b2db uxtb r3, r3
8000f40: e7e3 b.n 8000f0a <__aeabi_ui2f+0x1e>
8000f42: 2300 movs r3, #0
8000f44: 2400 movs r4, #0
8000f46: e7e0 b.n 8000f0a <__aeabi_ui2f+0x1e>
8000f48: 22b9 movs r2, #185 ; 0xb9
8000f4a: 0021 movs r1, r4
8000f4c: 1ad2 subs r2, r2, r3
8000f4e: 4091 lsls r1, r2
8000f50: 000a movs r2, r1
8000f52: 1e51 subs r1, r2, #1
8000f54: 418a sbcs r2, r1
8000f56: 2105 movs r1, #5
8000f58: 1a09 subs r1, r1, r0
8000f5a: 40cc lsrs r4, r1
8000f5c: 4314 orrs r4, r2
8000f5e: e7db b.n 8000f18 <__aeabi_ui2f+0x2c>
8000f60: 4b04 ldr r3, [pc, #16] ; (8000f74 <__aeabi_ui2f+0x88>)
8000f62: 401c ands r4, r3
8000f64: 239f movs r3, #159 ; 0x9f
8000f66: 01a4 lsls r4, r4, #6
8000f68: 1a1b subs r3, r3, r0
8000f6a: 0a64 lsrs r4, r4, #9
8000f6c: b2db uxtb r3, r3
8000f6e: e7cc b.n 8000f0a <__aeabi_ui2f+0x1e>
8000f70: 0022 movs r2, r4
8000f72: e7d7 b.n 8000f24 <__aeabi_ui2f+0x38>
8000f74: fbffffff .word 0xfbffffff
08000f78 <__eqdf2>:
8000f78: b5f0 push {r4, r5, r6, r7, lr}
8000f7a: 464f mov r7, r9
8000f7c: 4646 mov r6, r8
8000f7e: 46d6 mov lr, sl
8000f80: 005c lsls r4, r3, #1
8000f82: b5c0 push {r6, r7, lr}
8000f84: 031f lsls r7, r3, #12
8000f86: 0fdb lsrs r3, r3, #31
8000f88: 469a mov sl, r3
8000f8a: 4b17 ldr r3, [pc, #92] ; (8000fe8 <__eqdf2+0x70>)
8000f8c: 030e lsls r6, r1, #12
8000f8e: 004d lsls r5, r1, #1
8000f90: 4684 mov ip, r0
8000f92: 4680 mov r8, r0
8000f94: 0b36 lsrs r6, r6, #12
8000f96: 0d6d lsrs r5, r5, #21
8000f98: 0fc9 lsrs r1, r1, #31
8000f9a: 4691 mov r9, r2
8000f9c: 0b3f lsrs r7, r7, #12
8000f9e: 0d64 lsrs r4, r4, #21
8000fa0: 2001 movs r0, #1
8000fa2: 429d cmp r5, r3
8000fa4: d008 beq.n 8000fb8 <__eqdf2+0x40>
8000fa6: 429c cmp r4, r3
8000fa8: d001 beq.n 8000fae <__eqdf2+0x36>
8000faa: 42a5 cmp r5, r4
8000fac: d00b beq.n 8000fc6 <__eqdf2+0x4e>
8000fae: bc1c pop {r2, r3, r4}
8000fb0: 4690 mov r8, r2
8000fb2: 4699 mov r9, r3
8000fb4: 46a2 mov sl, r4
8000fb6: bdf0 pop {r4, r5, r6, r7, pc}
8000fb8: 4663 mov r3, ip
8000fba: 4333 orrs r3, r6
8000fbc: d1f7 bne.n 8000fae <__eqdf2+0x36>
8000fbe: 42ac cmp r4, r5
8000fc0: d1f5 bne.n 8000fae <__eqdf2+0x36>
8000fc2: 433a orrs r2, r7
8000fc4: d1f3 bne.n 8000fae <__eqdf2+0x36>
8000fc6: 2001 movs r0, #1
8000fc8: 42be cmp r6, r7
8000fca: d1f0 bne.n 8000fae <__eqdf2+0x36>
8000fcc: 45c8 cmp r8, r9
8000fce: d1ee bne.n 8000fae <__eqdf2+0x36>
8000fd0: 4551 cmp r1, sl
8000fd2: d007 beq.n 8000fe4 <__eqdf2+0x6c>
8000fd4: 2d00 cmp r5, #0
8000fd6: d1ea bne.n 8000fae <__eqdf2+0x36>
8000fd8: 4663 mov r3, ip
8000fda: 431e orrs r6, r3
8000fdc: 0030 movs r0, r6
8000fde: 1e46 subs r6, r0, #1
8000fe0: 41b0 sbcs r0, r6
8000fe2: e7e4 b.n 8000fae <__eqdf2+0x36>
8000fe4: 2000 movs r0, #0
8000fe6: e7e2 b.n 8000fae <__eqdf2+0x36>
8000fe8: 000007ff .word 0x000007ff
08000fec <__gedf2>:
8000fec: b5f0 push {r4, r5, r6, r7, lr}
8000fee: 4645 mov r5, r8
8000ff0: 46de mov lr, fp
8000ff2: 4657 mov r7, sl
8000ff4: 464e mov r6, r9
8000ff6: b5e0 push {r5, r6, r7, lr}
8000ff8: 031f lsls r7, r3, #12
8000ffa: 0b3d lsrs r5, r7, #12
8000ffc: 4f2c ldr r7, [pc, #176] ; (80010b0 <__gedf2+0xc4>)
8000ffe: 030e lsls r6, r1, #12
8001000: 004c lsls r4, r1, #1
8001002: 46ab mov fp, r5
8001004: 005d lsls r5, r3, #1
8001006: 4684 mov ip, r0
8001008: 0b36 lsrs r6, r6, #12
800100a: 0d64 lsrs r4, r4, #21
800100c: 0fc9 lsrs r1, r1, #31
800100e: 4690 mov r8, r2
8001010: 0d6d lsrs r5, r5, #21
8001012: 0fdb lsrs r3, r3, #31
8001014: 42bc cmp r4, r7
8001016: d02a beq.n 800106e <__gedf2+0x82>
8001018: 4f25 ldr r7, [pc, #148] ; (80010b0 <__gedf2+0xc4>)
800101a: 42bd cmp r5, r7
800101c: d02d beq.n 800107a <__gedf2+0x8e>
800101e: 2c00 cmp r4, #0
8001020: d10f bne.n 8001042 <__gedf2+0x56>
8001022: 4330 orrs r0, r6
8001024: 0007 movs r7, r0
8001026: 4681 mov r9, r0
8001028: 4278 negs r0, r7
800102a: 4178 adcs r0, r7
800102c: b2c0 uxtb r0, r0
800102e: 2d00 cmp r5, #0
8001030: d117 bne.n 8001062 <__gedf2+0x76>
8001032: 465f mov r7, fp
8001034: 433a orrs r2, r7
8001036: d114 bne.n 8001062 <__gedf2+0x76>
8001038: 464b mov r3, r9
800103a: 2000 movs r0, #0
800103c: 2b00 cmp r3, #0
800103e: d00a beq.n 8001056 <__gedf2+0x6a>
8001040: e006 b.n 8001050 <__gedf2+0x64>
8001042: 2d00 cmp r5, #0
8001044: d102 bne.n 800104c <__gedf2+0x60>
8001046: 4658 mov r0, fp
8001048: 4302 orrs r2, r0
800104a: d001 beq.n 8001050 <__gedf2+0x64>
800104c: 4299 cmp r1, r3
800104e: d018 beq.n 8001082 <__gedf2+0x96>
8001050: 4248 negs r0, r1
8001052: 2101 movs r1, #1
8001054: 4308 orrs r0, r1
8001056: bc3c pop {r2, r3, r4, r5}
8001058: 4690 mov r8, r2
800105a: 4699 mov r9, r3
800105c: 46a2 mov sl, r4
800105e: 46ab mov fp, r5
8001060: bdf0 pop {r4, r5, r6, r7, pc}
8001062: 2800 cmp r0, #0
8001064: d0f2 beq.n 800104c <__gedf2+0x60>
8001066: 2001 movs r0, #1
8001068: 3b01 subs r3, #1
800106a: 4318 orrs r0, r3
800106c: e7f3 b.n 8001056 <__gedf2+0x6a>
800106e: 0037 movs r7, r6
8001070: 4307 orrs r7, r0
8001072: d0d1 beq.n 8001018 <__gedf2+0x2c>
8001074: 2002 movs r0, #2
8001076: 4240 negs r0, r0
8001078: e7ed b.n 8001056 <__gedf2+0x6a>
800107a: 465f mov r7, fp
800107c: 4317 orrs r7, r2
800107e: d0ce beq.n 800101e <__gedf2+0x32>
8001080: e7f8 b.n 8001074 <__gedf2+0x88>
8001082: 42ac cmp r4, r5
8001084: dce4 bgt.n 8001050 <__gedf2+0x64>
8001086: da03 bge.n 8001090 <__gedf2+0xa4>
8001088: 1e48 subs r0, r1, #1
800108a: 2101 movs r1, #1
800108c: 4308 orrs r0, r1
800108e: e7e2 b.n 8001056 <__gedf2+0x6a>
8001090: 455e cmp r6, fp
8001092: d8dd bhi.n 8001050 <__gedf2+0x64>
8001094: d006 beq.n 80010a4 <__gedf2+0xb8>
8001096: 2000 movs r0, #0
8001098: 455e cmp r6, fp
800109a: d2dc bcs.n 8001056 <__gedf2+0x6a>
800109c: 2301 movs r3, #1
800109e: 1e48 subs r0, r1, #1
80010a0: 4318 orrs r0, r3
80010a2: e7d8 b.n 8001056 <__gedf2+0x6a>
80010a4: 45c4 cmp ip, r8
80010a6: d8d3 bhi.n 8001050 <__gedf2+0x64>
80010a8: 2000 movs r0, #0
80010aa: 45c4 cmp ip, r8
80010ac: d3f6 bcc.n 800109c <__gedf2+0xb0>
80010ae: e7d2 b.n 8001056 <__gedf2+0x6a>
80010b0: 000007ff .word 0x000007ff
080010b4 <__ledf2>:
80010b4: b5f0 push {r4, r5, r6, r7, lr}
80010b6: 464e mov r6, r9
80010b8: 4645 mov r5, r8
80010ba: 46de mov lr, fp
80010bc: 4657 mov r7, sl
80010be: 005c lsls r4, r3, #1
80010c0: b5e0 push {r5, r6, r7, lr}
80010c2: 031f lsls r7, r3, #12
80010c4: 0fdb lsrs r3, r3, #31
80010c6: 4699 mov r9, r3
80010c8: 4b2a ldr r3, [pc, #168] ; (8001174 <__ledf2+0xc0>)
80010ca: 030e lsls r6, r1, #12
80010cc: 004d lsls r5, r1, #1
80010ce: 0fc9 lsrs r1, r1, #31
80010d0: 4684 mov ip, r0
80010d2: 0b36 lsrs r6, r6, #12
80010d4: 0d6d lsrs r5, r5, #21
80010d6: 468b mov fp, r1
80010d8: 4690 mov r8, r2
80010da: 0b3f lsrs r7, r7, #12
80010dc: 0d64 lsrs r4, r4, #21
80010de: 429d cmp r5, r3
80010e0: d020 beq.n 8001124 <__ledf2+0x70>
80010e2: 4b24 ldr r3, [pc, #144] ; (8001174 <__ledf2+0xc0>)
80010e4: 429c cmp r4, r3
80010e6: d022 beq.n 800112e <__ledf2+0x7a>
80010e8: 2d00 cmp r5, #0
80010ea: d112 bne.n 8001112 <__ledf2+0x5e>
80010ec: 4330 orrs r0, r6
80010ee: 4243 negs r3, r0
80010f0: 4143 adcs r3, r0
80010f2: b2db uxtb r3, r3
80010f4: 2c00 cmp r4, #0
80010f6: d01f beq.n 8001138 <__ledf2+0x84>
80010f8: 2b00 cmp r3, #0
80010fa: d00c beq.n 8001116 <__ledf2+0x62>
80010fc: 464b mov r3, r9
80010fe: 2001 movs r0, #1
8001100: 3b01 subs r3, #1
8001102: 4303 orrs r3, r0
8001104: 0018 movs r0, r3
8001106: bc3c pop {r2, r3, r4, r5}
8001108: 4690 mov r8, r2
800110a: 4699 mov r9, r3
800110c: 46a2 mov sl, r4
800110e: 46ab mov fp, r5
8001110: bdf0 pop {r4, r5, r6, r7, pc}
8001112: 2c00 cmp r4, #0
8001114: d016 beq.n 8001144 <__ledf2+0x90>
8001116: 45cb cmp fp, r9
8001118: d017 beq.n 800114a <__ledf2+0x96>
800111a: 465b mov r3, fp
800111c: 4259 negs r1, r3
800111e: 2301 movs r3, #1
8001120: 430b orrs r3, r1
8001122: e7ef b.n 8001104 <__ledf2+0x50>
8001124: 0031 movs r1, r6
8001126: 2302 movs r3, #2
8001128: 4301 orrs r1, r0
800112a: d1eb bne.n 8001104 <__ledf2+0x50>
800112c: e7d9 b.n 80010e2 <__ledf2+0x2e>
800112e: 0039 movs r1, r7
8001130: 2302 movs r3, #2
8001132: 4311 orrs r1, r2
8001134: d1e6 bne.n 8001104 <__ledf2+0x50>
8001136: e7d7 b.n 80010e8 <__ledf2+0x34>
8001138: 433a orrs r2, r7
800113a: d1dd bne.n 80010f8 <__ledf2+0x44>
800113c: 2300 movs r3, #0
800113e: 2800 cmp r0, #0
8001140: d0e0 beq.n 8001104 <__ledf2+0x50>
8001142: e7ea b.n 800111a <__ledf2+0x66>
8001144: 433a orrs r2, r7
8001146: d1e6 bne.n 8001116 <__ledf2+0x62>
8001148: e7e7 b.n 800111a <__ledf2+0x66>
800114a: 42a5 cmp r5, r4
800114c: dce5 bgt.n 800111a <__ledf2+0x66>
800114e: db05 blt.n 800115c <__ledf2+0xa8>
8001150: 42be cmp r6, r7
8001152: d8e2 bhi.n 800111a <__ledf2+0x66>
8001154: d007 beq.n 8001166 <__ledf2+0xb2>
8001156: 2300 movs r3, #0
8001158: 42be cmp r6, r7
800115a: d2d3 bcs.n 8001104 <__ledf2+0x50>
800115c: 4659 mov r1, fp
800115e: 2301 movs r3, #1
8001160: 3901 subs r1, #1
8001162: 430b orrs r3, r1
8001164: e7ce b.n 8001104 <__ledf2+0x50>
8001166: 45c4 cmp ip, r8
8001168: d8d7 bhi.n 800111a <__ledf2+0x66>
800116a: 2300 movs r3, #0
800116c: 45c4 cmp ip, r8
800116e: d3f5 bcc.n 800115c <__ledf2+0xa8>
8001170: e7c8 b.n 8001104 <__ledf2+0x50>
8001172: 46c0 nop ; (mov r8, r8)
8001174: 000007ff .word 0x000007ff
08001178 <__aeabi_f2d>:
8001178: 0041 lsls r1, r0, #1
800117a: 0e09 lsrs r1, r1, #24
800117c: 1c4b adds r3, r1, #1
800117e: b570 push {r4, r5, r6, lr}
8001180: b2db uxtb r3, r3
8001182: 0246 lsls r6, r0, #9
8001184: 0a75 lsrs r5, r6, #9
8001186: 0fc4 lsrs r4, r0, #31
8001188: 2b01 cmp r3, #1
800118a: dd14 ble.n 80011b6 <__aeabi_f2d+0x3e>
800118c: 23e0 movs r3, #224 ; 0xe0
800118e: 009b lsls r3, r3, #2
8001190: 076d lsls r5, r5, #29
8001192: 0b36 lsrs r6, r6, #12
8001194: 18cb adds r3, r1, r3
8001196: 2100 movs r1, #0
8001198: 0d0a lsrs r2, r1, #20
800119a: 0028 movs r0, r5
800119c: 0512 lsls r2, r2, #20
800119e: 4d1c ldr r5, [pc, #112] ; (8001210 <__aeabi_f2d+0x98>)
80011a0: 4332 orrs r2, r6
80011a2: 055b lsls r3, r3, #21
80011a4: 402a ands r2, r5
80011a6: 085b lsrs r3, r3, #1
80011a8: 4313 orrs r3, r2
80011aa: 005b lsls r3, r3, #1
80011ac: 07e4 lsls r4, r4, #31
80011ae: 085b lsrs r3, r3, #1
80011b0: 4323 orrs r3, r4
80011b2: 0019 movs r1, r3
80011b4: bd70 pop {r4, r5, r6, pc}
80011b6: 2900 cmp r1, #0
80011b8: d114 bne.n 80011e4 <__aeabi_f2d+0x6c>
80011ba: 2d00 cmp r5, #0
80011bc: d01e beq.n 80011fc <__aeabi_f2d+0x84>
80011be: 0028 movs r0, r5
80011c0: f000 f82c bl 800121c <__clzsi2>
80011c4: 280a cmp r0, #10
80011c6: dc1c bgt.n 8001202 <__aeabi_f2d+0x8a>
80011c8: 230b movs r3, #11
80011ca: 002a movs r2, r5
80011cc: 1a1b subs r3, r3, r0
80011ce: 40da lsrs r2, r3
80011d0: 0003 movs r3, r0
80011d2: 3315 adds r3, #21
80011d4: 409d lsls r5, r3
80011d6: 4b0f ldr r3, [pc, #60] ; (8001214 <__aeabi_f2d+0x9c>)
80011d8: 0312 lsls r2, r2, #12
80011da: 1a1b subs r3, r3, r0
80011dc: 055b lsls r3, r3, #21
80011de: 0b16 lsrs r6, r2, #12
80011e0: 0d5b lsrs r3, r3, #21
80011e2: e7d8 b.n 8001196 <__aeabi_f2d+0x1e>
80011e4: 2d00 cmp r5, #0
80011e6: d006 beq.n 80011f6 <__aeabi_f2d+0x7e>
80011e8: 0b32 lsrs r2, r6, #12
80011ea: 2680 movs r6, #128 ; 0x80
80011ec: 0336 lsls r6, r6, #12
80011ee: 076d lsls r5, r5, #29
80011f0: 4316 orrs r6, r2
80011f2: 4b09 ldr r3, [pc, #36] ; (8001218 <__aeabi_f2d+0xa0>)
80011f4: e7cf b.n 8001196 <__aeabi_f2d+0x1e>
80011f6: 4b08 ldr r3, [pc, #32] ; (8001218 <__aeabi_f2d+0xa0>)
80011f8: 2600 movs r6, #0
80011fa: e7cc b.n 8001196 <__aeabi_f2d+0x1e>
80011fc: 2300 movs r3, #0
80011fe: 2600 movs r6, #0
8001200: e7c9 b.n 8001196 <__aeabi_f2d+0x1e>
8001202: 0003 movs r3, r0
8001204: 002a movs r2, r5
8001206: 3b0b subs r3, #11
8001208: 409a lsls r2, r3
800120a: 2500 movs r5, #0
800120c: e7e3 b.n 80011d6 <__aeabi_f2d+0x5e>
800120e: 46c0 nop ; (mov r8, r8)
8001210: 800fffff .word 0x800fffff
8001214: 00000389 .word 0x00000389
8001218: 000007ff .word 0x000007ff
0800121c <__clzsi2>:
800121c: 211c movs r1, #28
800121e: 2301 movs r3, #1
8001220: 041b lsls r3, r3, #16
8001222: 4298 cmp r0, r3
8001224: d301 bcc.n 800122a <__clzsi2+0xe>
8001226: 0c00 lsrs r0, r0, #16
8001228: 3910 subs r1, #16
800122a: 0a1b lsrs r3, r3, #8
800122c: 4298 cmp r0, r3
800122e: d301 bcc.n 8001234 <__clzsi2+0x18>
8001230: 0a00 lsrs r0, r0, #8
8001232: 3908 subs r1, #8
8001234: 091b lsrs r3, r3, #4
8001236: 4298 cmp r0, r3
8001238: d301 bcc.n 800123e <__clzsi2+0x22>
800123a: 0900 lsrs r0, r0, #4
800123c: 3904 subs r1, #4
800123e: a202 add r2, pc, #8 ; (adr r2, 8001248 <__clzsi2+0x2c>)
8001240: 5c10 ldrb r0, [r2, r0]
8001242: 1840 adds r0, r0, r1
8001244: 4770 bx lr
8001246: 46c0 nop ; (mov r8, r8)
8001248: 02020304 .word 0x02020304
800124c: 01010101 .word 0x01010101
...
08001258 <__clzdi2>:
8001258: b510 push {r4, lr}
800125a: 2900 cmp r1, #0
800125c: d103 bne.n 8001266 <__clzdi2+0xe>
800125e: f7ff ffdd bl 800121c <__clzsi2>
8001262: 3020 adds r0, #32
8001264: e002 b.n 800126c <__clzdi2+0x14>
8001266: 1c08 adds r0, r1, #0
8001268: f7ff ffd8 bl 800121c <__clzsi2>
800126c: bd10 pop {r4, pc}
800126e: 46c0 nop ; (mov r8, r8)
08001270 <SetAndCorrect>:
//------------------------------------------------------
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
//------------------------------------------------------
void SetAndCorrect(void)
{
8001270: b580 push {r7, lr}
8001272: b082 sub sp, #8
8001274: af00 add r7, sp, #0
float fKU, sens_f;
uint32_t k;
switch(pardata.IIN)
8001276: 4bd3 ldr r3, [pc, #844] ; (80015c4 <SetAndCorrect+0x354>)
8001278: 88db ldrh r3, [r3, #6]
800127a: b29b uxth r3, r3
800127c: 2b00 cmp r3, #0
800127e: d002 beq.n 8001286 <SetAndCorrect+0x16>
8001280: 2b01 cmp r3, #1
8001282: d037 beq.n 80012f4 <SetAndCorrect+0x84>
8001284: e06f b.n 8001366 <SetAndCorrect+0xf6>
{
case CHARGE: // ZAR
HAL_GPIO_WritePin(GPIOB, (A2_Pin | A3_Pin), GPIO_PIN_RESET);
8001286: 4bd0 ldr r3, [pc, #832] ; (80015c8 <SetAndCorrect+0x358>)
8001288: 2200 movs r2, #0
800128a: 210c movs r1, #12
800128c: 0018 movs r0, r3
800128e: f003 fc5c bl 8004b4a <HAL_GPIO_WritePin>
if(pardata.IKU < Ku1)
8001292: 4bcc ldr r3, [pc, #816] ; (80015c4 <SetAndCorrect+0x354>)
8001294: 899b ldrh r3, [r3, #12]
8001296: b29b uxth r3, r3
8001298: 2b02 cmp r3, #2
800129a: d80c bhi.n 80012b6 <SetAndCorrect+0x46>
{
HAL_GPIO_WritePin(GPIOB, A0_Pin, GPIO_PIN_RESET);
800129c: 4bca ldr r3, [pc, #808] ; (80015c8 <SetAndCorrect+0x358>)
800129e: 2200 movs r2, #0
80012a0: 2101 movs r1, #1
80012a2: 0018 movs r0, r3
80012a4: f003 fc51 bl 8004b4a <HAL_GPIO_WritePin>
HAL_GPIO_WritePin(GPIOB, A1_Pin, GPIO_PIN_SET);
80012a8: 4bc7 ldr r3, [pc, #796] ; (80015c8 <SetAndCorrect+0x358>)
80012aa: 2201 movs r2, #1
80012ac: 2102 movs r1, #2
80012ae: 0018 movs r0, r3
80012b0: f003 fc4b bl 8004b4a <HAL_GPIO_WritePin>
else
{
HAL_GPIO_WritePin(GPIOB, A0_Pin, GPIO_PIN_RESET);
HAL_GPIO_WritePin(GPIOB, A1_Pin, GPIO_PIN_RESET);
}
break;
80012b4: e057 b.n 8001366 <SetAndCorrect+0xf6>
if(pardata.IKU > Ku100) // >= x200
80012b6: 4bc3 ldr r3, [pc, #780] ; (80015c4 <SetAndCorrect+0x354>)
80012b8: 899b ldrh r3, [r3, #12]
80012ba: b29b uxth r3, r3
80012bc: 2b09 cmp r3, #9
80012be: d90c bls.n 80012da <SetAndCorrect+0x6a>
HAL_GPIO_WritePin(GPIOB, A0_Pin, GPIO_PIN_SET);
80012c0: 4bc1 ldr r3, [pc, #772] ; (80015c8 <SetAndCorrect+0x358>)
80012c2: 2201 movs r2, #1
80012c4: 2101 movs r1, #1
80012c6: 0018 movs r0, r3
80012c8: f003 fc3f bl 8004b4a <HAL_GPIO_WritePin>
HAL_GPIO_WritePin(GPIOB, A1_Pin, GPIO_PIN_RESET);
80012cc: 4bbe ldr r3, [pc, #760] ; (80015c8 <SetAndCorrect+0x358>)
80012ce: 2200 movs r2, #0
80012d0: 2102 movs r1, #2
80012d2: 0018 movs r0, r3
80012d4: f003 fc39 bl 8004b4a <HAL_GPIO_WritePin>
break;
80012d8: e045 b.n 8001366 <SetAndCorrect+0xf6>
HAL_GPIO_WritePin(GPIOB, A0_Pin, GPIO_PIN_RESET);
80012da: 4bbb ldr r3, [pc, #748] ; (80015c8 <SetAndCorrect+0x358>)
80012dc: 2200 movs r2, #0
80012de: 2101 movs r1, #1
80012e0: 0018 movs r0, r3
80012e2: f003 fc32 bl 8004b4a <HAL_GPIO_WritePin>
HAL_GPIO_WritePin(GPIOB, A1_Pin, GPIO_PIN_RESET);
80012e6: 4bb8 ldr r3, [pc, #736] ; (80015c8 <SetAndCorrect+0x358>)
80012e8: 2200 movs r2, #0
80012ea: 2102 movs r1, #2
80012ec: 0018 movs r0, r3
80012ee: f003 fc2c bl 8004b4a <HAL_GPIO_WritePin>
break;
80012f2: e038 b.n 8001366 <SetAndCorrect+0xf6>
case ICP: // ICP
if(pardata.IKU<Ku1){
80012f4: 4bb3 ldr r3, [pc, #716] ; (80015c4 <SetAndCorrect+0x354>)
80012f6: 899b ldrh r3, [r3, #12]
80012f8: b29b uxth r3, r3
80012fa: 2b02 cmp r3, #2
80012fc: d802 bhi.n 8001304 <SetAndCorrect+0x94>
pardata.IKU=Ku1;
80012fe: 4bb1 ldr r3, [pc, #708] ; (80015c4 <SetAndCorrect+0x354>)
8001300: 2203 movs r2, #3
8001302: 819a strh r2, [r3, #12]
}
if(pardata.IKU > Ku100) // >= x200
8001304: 4baf ldr r3, [pc, #700] ; (80015c4 <SetAndCorrect+0x354>)
8001306: 899b ldrh r3, [r3, #12]
8001308: b29b uxth r3, r3
800130a: 2b09 cmp r3, #9
800130c: d912 bls.n 8001334 <SetAndCorrect+0xc4>
{
HAL_GPIO_WritePin(GPIOB, A0_Pin, GPIO_PIN_SET);
800130e: 4bae ldr r3, [pc, #696] ; (80015c8 <SetAndCorrect+0x358>)
8001310: 2201 movs r2, #1
8001312: 2101 movs r1, #1
8001314: 0018 movs r0, r3
8001316: f003 fc18 bl 8004b4a <HAL_GPIO_WritePin>
HAL_GPIO_WritePin(GPIOB, A1_Pin, GPIO_PIN_RESET);
800131a: 4bab ldr r3, [pc, #684] ; (80015c8 <SetAndCorrect+0x358>)
800131c: 2200 movs r2, #0
800131e: 2102 movs r1, #2
8001320: 0018 movs r0, r3
8001322: f003 fc12 bl 8004b4a <HAL_GPIO_WritePin>
HAL_GPIO_WritePin(GPIOB, (A2_Pin | A3_Pin), GPIO_PIN_SET);
8001326: 4ba8 ldr r3, [pc, #672] ; (80015c8 <SetAndCorrect+0x358>)
8001328: 2201 movs r2, #1
800132a: 210c movs r1, #12
800132c: 0018 movs r0, r3
800132e: f003 fc0c bl 8004b4a <HAL_GPIO_WritePin>
HAL_GPIO_WritePin(GPIOB, A1_Pin, GPIO_PIN_RESET);
HAL_GPIO_WritePin(GPIOB, A2_Pin, GPIO_PIN_SET);
HAL_GPIO_WritePin(GPIOB, A3_Pin, GPIO_PIN_RESET);
}
break;
8001332: e017 b.n 8001364 <SetAndCorrect+0xf4>
HAL_GPIO_WritePin(GPIOB, A0_Pin, GPIO_PIN_RESET);
8001334: 4ba4 ldr r3, [pc, #656] ; (80015c8 <SetAndCorrect+0x358>)
8001336: 2200 movs r2, #0
8001338: 2101 movs r1, #1
800133a: 0018 movs r0, r3
800133c: f003 fc05 bl 8004b4a <HAL_GPIO_WritePin>
HAL_GPIO_WritePin(GPIOB, A1_Pin, GPIO_PIN_RESET);
8001340: 4ba1 ldr r3, [pc, #644] ; (80015c8 <SetAndCorrect+0x358>)
8001342: 2200 movs r2, #0
8001344: 2102 movs r1, #2
8001346: 0018 movs r0, r3
8001348: f003 fbff bl 8004b4a <HAL_GPIO_WritePin>
HAL_GPIO_WritePin(GPIOB, A2_Pin, GPIO_PIN_SET);
800134c: 4b9e ldr r3, [pc, #632] ; (80015c8 <SetAndCorrect+0x358>)
800134e: 2201 movs r2, #1
8001350: 2104 movs r1, #4
8001352: 0018 movs r0, r3
8001354: f003 fbf9 bl 8004b4a <HAL_GPIO_WritePin>
HAL_GPIO_WritePin(GPIOB, A3_Pin, GPIO_PIN_RESET);
8001358: 4b9b ldr r3, [pc, #620] ; (80015c8 <SetAndCorrect+0x358>)
800135a: 2200 movs r2, #0
800135c: 2108 movs r1, #8
800135e: 0018 movs r0, r3
8001360: f003 fbf3 bl 8004b4a <HAL_GPIO_WritePin>
break;
8001364: 46c0 nop ; (mov r8, r8)
}
switch(pardata.IKU)
8001366: 4b97 ldr r3, [pc, #604] ; (80015c4 <SetAndCorrect+0x354>)
8001368: 899b ldrh r3, [r3, #12]
800136a: b29b uxth r3, r3
800136c: 2b0c cmp r3, #12
800136e: d853 bhi.n 8001418 <SetAndCorrect+0x1a8>
8001370: 009a lsls r2, r3, #2
8001372: 4b96 ldr r3, [pc, #600] ; (80015cc <SetAndCorrect+0x35c>)
8001374: 18d3 adds r3, r2, r3
8001376: 681b ldr r3, [r3, #0]
8001378: 469f mov pc, r3
{//todo
case Ku0_1: case Ku1: // 0.1, 1
HAL_GPIO_WritePin(GPIOB, (A4_Pin | A5_Pin | A6_Pin), GPIO_PIN_RESET);
800137a: 4b93 ldr r3, [pc, #588] ; (80015c8 <SetAndCorrect+0x358>)
800137c: 2200 movs r2, #0
800137e: 2170 movs r1, #112 ; 0x70
8001380: 0018 movs r0, r3
8001382: f003 fbe2 bl 8004b4a <HAL_GPIO_WritePin>
break;
8001386: e047 b.n 8001418 <SetAndCorrect+0x1a8>
case Ku0_2: case Ku2: // 0.2, 2
HAL_GPIO_WritePin(GPIOB, A4_Pin, GPIO_PIN_SET);
8001388: 4b8f ldr r3, [pc, #572] ; (80015c8 <SetAndCorrect+0x358>)
800138a: 2201 movs r2, #1
800138c: 2110 movs r1, #16
800138e: 0018 movs r0, r3
8001390: f003 fbdb bl 8004b4a <HAL_GPIO_WritePin>
HAL_GPIO_WritePin(GPIOB, (A5_Pin | A6_Pin), GPIO_PIN_RESET);
8001394: 4b8c ldr r3, [pc, #560] ; (80015c8 <SetAndCorrect+0x358>)
8001396: 2200 movs r2, #0
8001398: 2160 movs r1, #96 ; 0x60
800139a: 0018 movs r0, r3
800139c: f003 fbd5 bl 8004b4a <HAL_GPIO_WritePin>
break;
80013a0: e03a b.n 8001418 <SetAndCorrect+0x1a8>
case Ku0_5: case Ku5: // 0.5, 5
HAL_GPIO_WritePin(GPIOB, A5_Pin, GPIO_PIN_SET);
80013a2: 4b89 ldr r3, [pc, #548] ; (80015c8 <SetAndCorrect+0x358>)
80013a4: 2201 movs r2, #1
80013a6: 2120 movs r1, #32
80013a8: 0018 movs r0, r3
80013aa: f003 fbce bl 8004b4a <HAL_GPIO_WritePin>
HAL_GPIO_WritePin(GPIOB, (A4_Pin | A6_Pin), GPIO_PIN_RESET);
80013ae: 4b86 ldr r3, [pc, #536] ; (80015c8 <SetAndCorrect+0x358>)
80013b0: 2200 movs r2, #0
80013b2: 2150 movs r1, #80 ; 0x50
80013b4: 0018 movs r0, r3
80013b6: f003 fbc8 bl 8004b4a <HAL_GPIO_WritePin>
break;
80013ba: e02d b.n 8001418 <SetAndCorrect+0x1a8>
case Ku10: // 10
HAL_GPIO_WritePin(GPIOB, A6_Pin, GPIO_PIN_RESET);
80013bc: 4b82 ldr r3, [pc, #520] ; (80015c8 <SetAndCorrect+0x358>)
80013be: 2200 movs r2, #0
80013c0: 2140 movs r1, #64 ; 0x40
80013c2: 0018 movs r0, r3
80013c4: f003 fbc1 bl 8004b4a <HAL_GPIO_WritePin>
HAL_GPIO_WritePin(GPIOB, (A4_Pin | A5_Pin), GPIO_PIN_SET);
80013c8: 4b7f ldr r3, [pc, #508] ; (80015c8 <SetAndCorrect+0x358>)
80013ca: 2201 movs r2, #1
80013cc: 2130 movs r1, #48 ; 0x30
80013ce: 0018 movs r0, r3
80013d0: f003 fbbb bl 8004b4a <HAL_GPIO_WritePin>
break;
80013d4: e020 b.n 8001418 <SetAndCorrect+0x1a8>
case Ku20: case Ku200: // 20, 200
HAL_GPIO_WritePin(GPIOB, (A4_Pin | A6_Pin), GPIO_PIN_SET);
80013d6: 4b7c ldr r3, [pc, #496] ; (80015c8 <SetAndCorrect+0x358>)
80013d8: 2201 movs r2, #1
80013da: 2150 movs r1, #80 ; 0x50
80013dc: 0018 movs r0, r3
80013de: f003 fbb4 bl 8004b4a <HAL_GPIO_WritePin>
HAL_GPIO_WritePin(GPIOB, A5_Pin, GPIO_PIN_RESET);
80013e2: 4b79 ldr r3, [pc, #484] ; (80015c8 <SetAndCorrect+0x358>)
80013e4: 2200 movs r2, #0
80013e6: 2120 movs r1, #32
80013e8: 0018 movs r0, r3
80013ea: f003 fbae bl 8004b4a <HAL_GPIO_WritePin>
break;
80013ee: e013 b.n 8001418 <SetAndCorrect+0x1a8>
case Ku50: case Ku500: // 50, 500
HAL_GPIO_WritePin(GPIOB, (A5_Pin | A6_Pin), GPIO_PIN_SET);
80013f0: 4b75 ldr r3, [pc, #468] ; (80015c8 <SetAndCorrect+0x358>)
80013f2: 2201 movs r2, #1
80013f4: 2160 movs r1, #96 ; 0x60
80013f6: 0018 movs r0, r3
80013f8: f003 fba7 bl 8004b4a <HAL_GPIO_WritePin>
HAL_GPIO_WritePin(GPIOB, A4_Pin, GPIO_PIN_RESET);
80013fc: 4b72 ldr r3, [pc, #456] ; (80015c8 <SetAndCorrect+0x358>)
80013fe: 2200 movs r2, #0
8001400: 2110 movs r1, #16
8001402: 0018 movs r0, r3
8001404: f003 fba1 bl 8004b4a <HAL_GPIO_WritePin>
break;
8001408: e006 b.n 8001418 <SetAndCorrect+0x1a8>
case Ku100: case Ku1000: // 100, 1000
HAL_GPIO_WritePin(GPIOB, (A4_Pin | A5_Pin | A6_Pin), GPIO_PIN_SET);
800140a: 4b6f ldr r3, [pc, #444] ; (80015c8 <SetAndCorrect+0x358>)
800140c: 2201 movs r2, #1
800140e: 2170 movs r1, #112 ; 0x70
8001410: 0018 movs r0, r3
8001412: f003 fb9a bl 8004b4a <HAL_GPIO_WritePin>
break;
8001416: 46c0 nop ; (mov r8, r8)
}
if(clbr)
8001418: 4b6d ldr r3, [pc, #436] ; (80015d0 <SetAndCorrect+0x360>)
800141a: 781b ldrb r3, [r3, #0]
800141c: b2db uxtb r3, r3
800141e: 2b00 cmp r3, #0
8001420: d015 beq.n 800144e <SetAndCorrect+0x1de>
{
HAL_GPIO_WritePin(GPIOB, (A7_Pin | A8_Pin), GPIO_PIN_SET); //HP 2HZ
8001422: 23c0 movs r3, #192 ; 0xc0
8001424: 005b lsls r3, r3, #1
8001426: 4868 ldr r0, [pc, #416] ; (80015c8 <SetAndCorrect+0x358>)
8001428: 2201 movs r2, #1
800142a: 0019 movs r1, r3
800142c: f003 fb8d bl 8004b4a <HAL_GPIO_WritePin>
HAL_GPIO_WritePin(GPIOB, A9_Pin, GPIO_PIN_RESET); //HP 2HZ
8001430: 2380 movs r3, #128 ; 0x80
8001432: 009b lsls r3, r3, #2
8001434: 4864 ldr r0, [pc, #400] ; (80015c8 <SetAndCorrect+0x358>)
8001436: 2200 movs r2, #0
8001438: 0019 movs r1, r3
800143a: f003 fb86 bl 8004b4a <HAL_GPIO_WritePin>
HAL_GPIO_WritePin(GPIOB, (A10_Pin | A11_Pin | A12_Pin), GPIO_PIN_SET); //LP 100kHz
800143e: 23e0 movs r3, #224 ; 0xe0
8001440: 015b lsls r3, r3, #5
8001442: 4861 ldr r0, [pc, #388] ; (80015c8 <SetAndCorrect+0x358>)
8001444: 2201 movs r2, #1
8001446: 0019 movs r1, r3
8001448: f003 fb7f bl 8004b4a <HAL_GPIO_WritePin>
800144c: e0ce b.n 80015ec <SetAndCorrect+0x37c>
}
else
{
switch(pardata.IFV) // HPF
800144e: 4b5d ldr r3, [pc, #372] ; (80015c4 <SetAndCorrect+0x354>)
8001450: 891b ldrh r3, [r3, #8]
8001452: b29b uxth r3, r3
8001454: 2b04 cmp r3, #4
8001456: d847 bhi.n 80014e8 <SetAndCorrect+0x278>
8001458: 009a lsls r2, r3, #2
800145a: 4b5e ldr r3, [pc, #376] ; (80015d4 <SetAndCorrect+0x364>)
800145c: 18d3 adds r3, r2, r3
800145e: 681b ldr r3, [r3, #0]
8001460: 469f mov pc, r3
{
case Hp0_2: // 0,2 Hz
HAL_GPIO_WritePin(GPIOB, (A7_Pin | A8_Pin | A9_Pin), GPIO_PIN_RESET);
8001462: 23e0 movs r3, #224 ; 0xe0
8001464: 009b lsls r3, r3, #2
8001466: 4858 ldr r0, [pc, #352] ; (80015c8 <SetAndCorrect+0x358>)
8001468: 2200 movs r2, #0
800146a: 0019 movs r1, r3
800146c: f003 fb6d bl 8004b4a <HAL_GPIO_WritePin>
break;
8001470: e03a b.n 80014e8 <SetAndCorrect+0x278>
case Hp0_3: // 0,3 Hz
HAL_GPIO_WritePin(GPIOB, A7_Pin, GPIO_PIN_SET);
8001472: 4b55 ldr r3, [pc, #340] ; (80015c8 <SetAndCorrect+0x358>)
8001474: 2201 movs r2, #1
8001476: 2180 movs r1, #128 ; 0x80
8001478: 0018 movs r0, r3
800147a: f003 fb66 bl 8004b4a <HAL_GPIO_WritePin>
HAL_GPIO_WritePin(GPIOB, (A8_Pin | A9_Pin), GPIO_PIN_RESET);
800147e: 23c0 movs r3, #192 ; 0xc0
8001480: 009b lsls r3, r3, #2
8001482: 4851 ldr r0, [pc, #324] ; (80015c8 <SetAndCorrect+0x358>)
8001484: 2200 movs r2, #0
8001486: 0019 movs r1, r3
8001488: f003 fb5f bl 8004b4a <HAL_GPIO_WritePin>
break;
800148c: e02c b.n 80014e8 <SetAndCorrect+0x278>
case Hp1: // 1 Hz
HAL_GPIO_WritePin(GPIOB, A8_Pin, GPIO_PIN_SET);
800148e: 2380 movs r3, #128 ; 0x80
8001490: 005b lsls r3, r3, #1
8001492: 484d ldr r0, [pc, #308] ; (80015c8 <SetAndCorrect+0x358>)
8001494: 2201 movs r2, #1
8001496: 0019 movs r1, r3
8001498: f003 fb57 bl 8004b4a <HAL_GPIO_WritePin>
HAL_GPIO_WritePin(GPIOB, (A7_Pin | A9_Pin), GPIO_PIN_RESET);
800149c: 23a0 movs r3, #160 ; 0xa0
800149e: 009b lsls r3, r3, #2
80014a0: 4849 ldr r0, [pc, #292] ; (80015c8 <SetAndCorrect+0x358>)
80014a2: 2200 movs r2, #0
80014a4: 0019 movs r1, r3
80014a6: f003 fb50 bl 8004b4a <HAL_GPIO_WritePin>
break;
80014aa: e01d b.n 80014e8 <SetAndCorrect+0x278>
case Hp2: // 2 Hz
HAL_GPIO_WritePin(GPIOB, (A7_Pin | A8_Pin), GPIO_PIN_SET);
80014ac: 23c0 movs r3, #192 ; 0xc0
80014ae: 005b lsls r3, r3, #1
80014b0: 4845 ldr r0, [pc, #276] ; (80015c8 <SetAndCorrect+0x358>)
80014b2: 2201 movs r2, #1
80014b4: 0019 movs r1, r3
80014b6: f003 fb48 bl 8004b4a <HAL_GPIO_WritePin>
HAL_GPIO_WritePin(GPIOB, A9_Pin, GPIO_PIN_RESET);
80014ba: 2380 movs r3, #128 ; 0x80
80014bc: 009b lsls r3, r3, #2
80014be: 4842 ldr r0, [pc, #264] ; (80015c8 <SetAndCorrect+0x358>)
80014c0: 2200 movs r2, #0
80014c2: 0019 movs r1, r3
80014c4: f003 fb41 bl 8004b4a <HAL_GPIO_WritePin>
break;
80014c8: e00e b.n 80014e8 <SetAndCorrect+0x278>
case Hp10: // 10 Hz
HAL_GPIO_WritePin(GPIOB, A9_Pin, GPIO_PIN_SET);
80014ca: 2380 movs r3, #128 ; 0x80
80014cc: 009b lsls r3, r3, #2
80014ce: 483e ldr r0, [pc, #248] ; (80015c8 <SetAndCorrect+0x358>)
80014d0: 2201 movs r2, #1
80014d2: 0019 movs r1, r3
80014d4: f003 fb39 bl 8004b4a <HAL_GPIO_WritePin>
HAL_GPIO_WritePin(GPIOB, (A7_Pin | A8_Pin), GPIO_PIN_RESET);
80014d8: 23c0 movs r3, #192 ; 0xc0
80014da: 005b lsls r3, r3, #1
80014dc: 483a ldr r0, [pc, #232] ; (80015c8 <SetAndCorrect+0x358>)
80014de: 2200 movs r2, #0
80014e0: 0019 movs r1, r3
80014e2: f003 fb32 bl 8004b4a <HAL_GPIO_WritePin>
break;
80014e6: 46c0 nop ; (mov r8, r8)
}
switch(pardata.IFN) //LPF
80014e8: 4b36 ldr r3, [pc, #216] ; (80015c4 <SetAndCorrect+0x354>)
80014ea: 895b ldrh r3, [r3, #10]
80014ec: b29b uxth r3, r3
80014ee: 2b07 cmp r3, #7
80014f0: d900 bls.n 80014f4 <SetAndCorrect+0x284>
80014f2: e07b b.n 80015ec <SetAndCorrect+0x37c>
80014f4: 009a lsls r2, r3, #2
80014f6: 4b38 ldr r3, [pc, #224] ; (80015d8 <SetAndCorrect+0x368>)
80014f8: 18d3 adds r3, r2, r3
80014fa: 681b ldr r3, [r3, #0]
80014fc: 469f mov pc, r3
{
case Lp200: // 200 Hz
HAL_GPIO_WritePin(GPIOB, (A10_Pin | A11_Pin | A12_Pin), GPIO_PIN_RESET);
80014fe: 23e0 movs r3, #224 ; 0xe0
8001500: 015b lsls r3, r3, #5
8001502: 4831 ldr r0, [pc, #196] ; (80015c8 <SetAndCorrect+0x358>)
8001504: 2200 movs r2, #0
8001506: 0019 movs r1, r3
8001508: f003 fb1f bl 8004b4a <HAL_GPIO_WritePin>
break; // 500 Hz
800150c: e06e b.n 80015ec <SetAndCorrect+0x37c>
case Lp500:
HAL_GPIO_WritePin(GPIOB, A10_Pin, GPIO_PIN_SET);
800150e: 2380 movs r3, #128 ; 0x80
8001510: 00db lsls r3, r3, #3
8001512: 482d ldr r0, [pc, #180] ; (80015c8 <SetAndCorrect+0x358>)
8001514: 2201 movs r2, #1
8001516: 0019 movs r1, r3
8001518: f003 fb17 bl 8004b4a <HAL_GPIO_WritePin>
HAL_GPIO_WritePin(GPIOB, (A11_Pin | A12_Pin), GPIO_PIN_RESET);
800151c: 23c0 movs r3, #192 ; 0xc0
800151e: 015b lsls r3, r3, #5
8001520: 4829 ldr r0, [pc, #164] ; (80015c8 <SetAndCorrect+0x358>)
8001522: 2200 movs r2, #0
8001524: 0019 movs r1, r3
8001526: f003 fb10 bl 8004b4a <HAL_GPIO_WritePin>
break;
800152a: e05f b.n 80015ec <SetAndCorrect+0x37c>
case Lp1000: // 1 kHz
HAL_GPIO_WritePin(GPIOB, A11_Pin, GPIO_PIN_SET);
800152c: 2380 movs r3, #128 ; 0x80
800152e: 011b lsls r3, r3, #4
8001530: 4825 ldr r0, [pc, #148] ; (80015c8 <SetAndCorrect+0x358>)
8001532: 2201 movs r2, #1
8001534: 0019 movs r1, r3
8001536: f003 fb08 bl 8004b4a <HAL_GPIO_WritePin>
HAL_GPIO_WritePin(GPIOB, (A10_Pin | A12_Pin), GPIO_PIN_RESET);
800153a: 23a0 movs r3, #160 ; 0xa0
800153c: 015b lsls r3, r3, #5
800153e: 4822 ldr r0, [pc, #136] ; (80015c8 <SetAndCorrect+0x358>)
8001540: 2200 movs r2, #0
8001542: 0019 movs r1, r3
8001544: f003 fb01 bl 8004b4a <HAL_GPIO_WritePin>
break;
8001548: e050 b.n 80015ec <SetAndCorrect+0x37c>
case Lp5000: // 5 kHz
HAL_GPIO_WritePin(GPIOB, (A10_Pin | A11_Pin), GPIO_PIN_SET);
800154a: 23c0 movs r3, #192 ; 0xc0
800154c: 011b lsls r3, r3, #4
800154e: 481e ldr r0, [pc, #120] ; (80015c8 <SetAndCorrect+0x358>)
8001550: 2201 movs r2, #1
8001552: 0019 movs r1, r3
8001554: f003 faf9 bl 8004b4a <HAL_GPIO_WritePin>
HAL_GPIO_WritePin(GPIOB, A12_Pin, GPIO_PIN_RESET);
8001558: 2380 movs r3, #128 ; 0x80
800155a: 015b lsls r3, r3, #5
800155c: 481a ldr r0, [pc, #104] ; (80015c8 <SetAndCorrect+0x358>)
800155e: 2200 movs r2, #0
8001560: 0019 movs r1, r3
8001562: f003 faf2 bl 8004b4a <HAL_GPIO_WritePin>
break;
8001566: e041 b.n 80015ec <SetAndCorrect+0x37c>
case Lp10000: // 10 kHz
HAL_GPIO_WritePin(GPIOB, A12_Pin, GPIO_PIN_SET);
8001568: 2380 movs r3, #128 ; 0x80
800156a: 015b lsls r3, r3, #5
800156c: 4816 ldr r0, [pc, #88] ; (80015c8 <SetAndCorrect+0x358>)
800156e: 2201 movs r2, #1
8001570: 0019 movs r1, r3
8001572: f003 faea bl 8004b4a <HAL_GPIO_WritePin>
HAL_GPIO_WritePin(GPIOB, (A10_Pin | A11_Pin), GPIO_PIN_RESET);
8001576: 23c0 movs r3, #192 ; 0xc0
8001578: 011b lsls r3, r3, #4
800157a: 4813 ldr r0, [pc, #76] ; (80015c8 <SetAndCorrect+0x358>)
800157c: 2200 movs r2, #0
800157e: 0019 movs r1, r3
8001580: f003 fae3 bl 8004b4a <HAL_GPIO_WritePin>
break;
8001584: e032 b.n 80015ec <SetAndCorrect+0x37c>
case Lp20000: // 20 kHz
HAL_GPIO_WritePin(GPIOB, (A12_Pin | A10_Pin), GPIO_PIN_SET);
8001586: 23a0 movs r3, #160 ; 0xa0
8001588: 015b lsls r3, r3, #5
800158a: 480f ldr r0, [pc, #60] ; (80015c8 <SetAndCorrect+0x358>)
800158c: 2201 movs r2, #1
800158e: 0019 movs r1, r3
8001590: f003 fadb bl 8004b4a <HAL_GPIO_WritePin>
HAL_GPIO_WritePin(GPIOB, A11_Pin, GPIO_PIN_RESET);
8001594: 2380 movs r3, #128 ; 0x80
8001596: 011b lsls r3, r3, #4
8001598: 480b ldr r0, [pc, #44] ; (80015c8 <SetAndCorrect+0x358>)
800159a: 2200 movs r2, #0
800159c: 0019 movs r1, r3
800159e: f003 fad4 bl 8004b4a <HAL_GPIO_WritePin>
break;
80015a2: e023 b.n 80015ec <SetAndCorrect+0x37c>
case Lp50000: // 50 kHz
HAL_GPIO_WritePin(GPIOB, (A12_Pin | A11_Pin), GPIO_PIN_SET);
80015a4: 23c0 movs r3, #192 ; 0xc0
80015a6: 015b lsls r3, r3, #5
80015a8: 4807 ldr r0, [pc, #28] ; (80015c8 <SetAndCorrect+0x358>)
80015aa: 2201 movs r2, #1
80015ac: 0019 movs r1, r3
80015ae: f003 facc bl 8004b4a <HAL_GPIO_WritePin>
HAL_GPIO_WritePin(GPIOB, A10_Pin, GPIO_PIN_RESET);
80015b2: 2380 movs r3, #128 ; 0x80
80015b4: 00db lsls r3, r3, #3
80015b6: 4804 ldr r0, [pc, #16] ; (80015c8 <SetAndCorrect+0x358>)
80015b8: 2200 movs r2, #0
80015ba: 0019 movs r1, r3
80015bc: f003 fac5 bl 8004b4a <HAL_GPIO_WritePin>
break;
80015c0: e014 b.n 80015ec <SetAndCorrect+0x37c>
80015c2: 46c0 nop ; (mov r8, r8)
80015c4: 200000a0 .word 0x200000a0
80015c8: 50000400 .word 0x50000400
80015cc: 080070e4 .word 0x080070e4
80015d0: 2000003c .word 0x2000003c
80015d4: 08007118 .word 0x08007118
80015d8: 0800712c .word 0x0800712c
case Lp100000: // 100 kHz
HAL_GPIO_WritePin(GPIOB, (A10_Pin | A11_Pin | A12_Pin), GPIO_PIN_SET);
80015dc: 23e0 movs r3, #224 ; 0xe0
80015de: 015b lsls r3, r3, #5
80015e0: 48a6 ldr r0, [pc, #664] ; (800187c <SetAndCorrect+0x60c>)
80015e2: 2201 movs r2, #1
80015e4: 0019 movs r1, r3
80015e6: f003 fab0 bl 8004b4a <HAL_GPIO_WritePin>
break;
80015ea: 46c0 nop ; (mov r8, r8)
}
}
fKU = (float) CorrWord[pardata.IIN][pardata.IKU];
80015ec: 4ba4 ldr r3, [pc, #656] ; (8001880 <SetAndCorrect+0x610>)
80015ee: 88db ldrh r3, [r3, #6]
80015f0: b29b uxth r3, r3
80015f2: 0019 movs r1, r3
80015f4: 4ba2 ldr r3, [pc, #648] ; (8001880 <SetAndCorrect+0x610>)
80015f6: 899b ldrh r3, [r3, #12]
80015f8: b29b uxth r3, r3
80015fa: 0018 movs r0, r3
80015fc: 4aa1 ldr r2, [pc, #644] ; (8001884 <SetAndCorrect+0x614>)
80015fe: 000b movs r3, r1
8001600: 009b lsls r3, r3, #2
8001602: 185b adds r3, r3, r1
8001604: 009b lsls r3, r3, #2
8001606: 181b adds r3, r3, r0
8001608: 005b lsls r3, r3, #1
800160a: 5a9b ldrh r3, [r3, r2]
800160c: b29b uxth r3, r3
800160e: 0018 movs r0, r3
8001610: f7ff fc6c bl 8000eec <__aeabi_ui2f>
8001614: 1c03 adds r3, r0, #0
8001616: 607b str r3, [r7, #4]
if(DVD > 0xfff) {
DVD = 0xfff;
}
*/
if (pardata.SENS>=0.0001&&pardata.SENS<0.001) {OffsetKuDisplay=0; kNormToDAC=pardata.SENS*10000;} // <20><><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
8001618: 4b99 ldr r3, [pc, #612] ; (8001880 <SetAndCorrect+0x610>)
800161a: 6a1b ldr r3, [r3, #32]
800161c: 1c18 adds r0, r3, #0
800161e: f7ff fdab bl 8001178 <__aeabi_f2d>
8001622: 4a99 ldr r2, [pc, #612] ; (8001888 <SetAndCorrect+0x618>)
8001624: 4b99 ldr r3, [pc, #612] ; (800188c <SetAndCorrect+0x61c>)
8001626: f7fe fe2f bl 8000288 <__aeabi_dcmpge>
800162a: 1e03 subs r3, r0, #0
800162c: d018 beq.n 8001660 <SetAndCorrect+0x3f0>
800162e: 4b94 ldr r3, [pc, #592] ; (8001880 <SetAndCorrect+0x610>)
8001630: 6a1b ldr r3, [r3, #32]
8001632: 1c18 adds r0, r3, #0
8001634: f7ff fda0 bl 8001178 <__aeabi_f2d>
8001638: 4a95 ldr r2, [pc, #596] ; (8001890 <SetAndCorrect+0x620>)
800163a: 4b96 ldr r3, [pc, #600] ; (8001894 <SetAndCorrect+0x624>)
800163c: f7fe fe06 bl 800024c <__aeabi_dcmplt>
8001640: 1e03 subs r3, r0, #0
8001642: d00d beq.n 8001660 <SetAndCorrect+0x3f0>
8001644: 4b94 ldr r3, [pc, #592] ; (8001898 <SetAndCorrect+0x628>)
8001646: 2200 movs r2, #0
8001648: 601a str r2, [r3, #0]
800164a: 4b8d ldr r3, [pc, #564] ; (8001880 <SetAndCorrect+0x610>)
800164c: 6a1b ldr r3, [r3, #32]
800164e: 4993 ldr r1, [pc, #588] ; (800189c <SetAndCorrect+0x62c>)
8001650: 1c18 adds r0, r3, #0
8001652: f7ff f96f bl 8000934 <__aeabi_fmul>
8001656: 1c03 adds r3, r0, #0
8001658: 1c1a adds r2, r3, #0
800165a: 4b91 ldr r3, [pc, #580] ; (80018a0 <SetAndCorrect+0x630>)
800165c: 601a str r2, [r3, #0]
800165e: e0f9 b.n 8001854 <SetAndCorrect+0x5e4>
else if (pardata.SENS>=0.001&&pardata.SENS<0.01){OffsetKuDisplay=0; kNormToDAC=pardata.SENS*1000;}
8001660: 4b87 ldr r3, [pc, #540] ; (8001880 <SetAndCorrect+0x610>)
8001662: 6a1b ldr r3, [r3, #32]
8001664: 1c18 adds r0, r3, #0
8001666: f7ff fd87 bl 8001178 <__aeabi_f2d>
800166a: 4a89 ldr r2, [pc, #548] ; (8001890 <SetAndCorrect+0x620>)
800166c: 4b89 ldr r3, [pc, #548] ; (8001894 <SetAndCorrect+0x624>)
800166e: f7fe fe0b bl 8000288 <__aeabi_dcmpge>
8001672: 1e03 subs r3, r0, #0
8001674: d018 beq.n 80016a8 <SetAndCorrect+0x438>
8001676: 4b82 ldr r3, [pc, #520] ; (8001880 <SetAndCorrect+0x610>)
8001678: 6a1b ldr r3, [r3, #32]
800167a: 1c18 adds r0, r3, #0
800167c: f7ff fd7c bl 8001178 <__aeabi_f2d>
8001680: 4a88 ldr r2, [pc, #544] ; (80018a4 <SetAndCorrect+0x634>)
8001682: 4b89 ldr r3, [pc, #548] ; (80018a8 <SetAndCorrect+0x638>)
8001684: f7fe fde2 bl 800024c <__aeabi_dcmplt>
8001688: 1e03 subs r3, r0, #0
800168a: d00d beq.n 80016a8 <SetAndCorrect+0x438>
800168c: 4b82 ldr r3, [pc, #520] ; (8001898 <SetAndCorrect+0x628>)
800168e: 2200 movs r2, #0
8001690: 601a str r2, [r3, #0]
8001692: 4b7b ldr r3, [pc, #492] ; (8001880 <SetAndCorrect+0x610>)
8001694: 6a1b ldr r3, [r3, #32]
8001696: 4985 ldr r1, [pc, #532] ; (80018ac <SetAndCorrect+0x63c>)
8001698: 1c18 adds r0, r3, #0
800169a: f7ff f94b bl 8000934 <__aeabi_fmul>
800169e: 1c03 adds r3, r0, #0
80016a0: 1c1a adds r2, r3, #0
80016a2: 4b7f ldr r3, [pc, #508] ; (80018a0 <SetAndCorrect+0x630>)
80016a4: 601a str r2, [r3, #0]
80016a6: e0d5 b.n 8001854 <SetAndCorrect+0x5e4>
else if (pardata.SENS>=0.01&&pardata.SENS<0.1){OffsetKuDisplay=3; kNormToDAC=pardata.SENS*100;}
80016a8: 4b75 ldr r3, [pc, #468] ; (8001880 <SetAndCorrect+0x610>)
80016aa: 6a1b ldr r3, [r3, #32]
80016ac: 1c18 adds r0, r3, #0
80016ae: f7ff fd63 bl 8001178 <__aeabi_f2d>
80016b2: 4a7c ldr r2, [pc, #496] ; (80018a4 <SetAndCorrect+0x634>)
80016b4: 4b7c ldr r3, [pc, #496] ; (80018a8 <SetAndCorrect+0x638>)
80016b6: f7fe fde7 bl 8000288 <__aeabi_dcmpge>
80016ba: 1e03 subs r3, r0, #0
80016bc: d018 beq.n 80016f0 <SetAndCorrect+0x480>
80016be: 4b70 ldr r3, [pc, #448] ; (8001880 <SetAndCorrect+0x610>)
80016c0: 6a1b ldr r3, [r3, #32]
80016c2: 1c18 adds r0, r3, #0
80016c4: f7ff fd58 bl 8001178 <__aeabi_f2d>
80016c8: 4a79 ldr r2, [pc, #484] ; (80018b0 <SetAndCorrect+0x640>)
80016ca: 4b7a ldr r3, [pc, #488] ; (80018b4 <SetAndCorrect+0x644>)
80016cc: f7fe fdbe bl 800024c <__aeabi_dcmplt>
80016d0: 1e03 subs r3, r0, #0
80016d2: d00d beq.n 80016f0 <SetAndCorrect+0x480>
80016d4: 4b70 ldr r3, [pc, #448] ; (8001898 <SetAndCorrect+0x628>)
80016d6: 2203 movs r2, #3
80016d8: 601a str r2, [r3, #0]
80016da: 4b69 ldr r3, [pc, #420] ; (8001880 <SetAndCorrect+0x610>)
80016dc: 6a1b ldr r3, [r3, #32]
80016de: 4976 ldr r1, [pc, #472] ; (80018b8 <SetAndCorrect+0x648>)
80016e0: 1c18 adds r0, r3, #0
80016e2: f7ff f927 bl 8000934 <__aeabi_fmul>
80016e6: 1c03 adds r3, r0, #0
80016e8: 1c1a adds r2, r3, #0
80016ea: 4b6d ldr r3, [pc, #436] ; (80018a0 <SetAndCorrect+0x630>)
80016ec: 601a str r2, [r3, #0]
80016ee: e0b1 b.n 8001854 <SetAndCorrect+0x5e4>
else if (pardata.SENS>=0.1&&pardata.SENS<1){OffsetKuDisplay=6; kNormToDAC=pardata.SENS*10;}
80016f0: 4b63 ldr r3, [pc, #396] ; (8001880 <SetAndCorrect+0x610>)
80016f2: 6a1b ldr r3, [r3, #32]
80016f4: 1c18 adds r0, r3, #0
80016f6: f7ff fd3f bl 8001178 <__aeabi_f2d>
80016fa: 4a6d ldr r2, [pc, #436] ; (80018b0 <SetAndCorrect+0x640>)
80016fc: 4b6d ldr r3, [pc, #436] ; (80018b4 <SetAndCorrect+0x644>)
80016fe: f7fe fdc3 bl 8000288 <__aeabi_dcmpge>
8001702: 1e03 subs r3, r0, #0
8001704: d016 beq.n 8001734 <SetAndCorrect+0x4c4>
8001706: 4b5e ldr r3, [pc, #376] ; (8001880 <SetAndCorrect+0x610>)
8001708: 6a1b ldr r3, [r3, #32]
800170a: 21fe movs r1, #254 ; 0xfe
800170c: 0589 lsls r1, r1, #22
800170e: 1c18 adds r0, r3, #0
8001710: f7fe fdd6 bl 80002c0 <__aeabi_fcmplt>
8001714: 1e03 subs r3, r0, #0
8001716: d00d beq.n 8001734 <SetAndCorrect+0x4c4>
8001718: 4b5f ldr r3, [pc, #380] ; (8001898 <SetAndCorrect+0x628>)
800171a: 2206 movs r2, #6
800171c: 601a str r2, [r3, #0]
800171e: 4b58 ldr r3, [pc, #352] ; (8001880 <SetAndCorrect+0x610>)
8001720: 6a1b ldr r3, [r3, #32]
8001722: 4966 ldr r1, [pc, #408] ; (80018bc <SetAndCorrect+0x64c>)
8001724: 1c18 adds r0, r3, #0
8001726: f7ff f905 bl 8000934 <__aeabi_fmul>
800172a: 1c03 adds r3, r0, #0
800172c: 1c1a adds r2, r3, #0
800172e: 4b5c ldr r3, [pc, #368] ; (80018a0 <SetAndCorrect+0x630>)
8001730: 601a str r2, [r3, #0]
8001732: e08f b.n 8001854 <SetAndCorrect+0x5e4>
else if (pardata.SENS>=1&&pardata.SENS<10){OffsetKuDisplay=9; kNormToDAC=pardata.SENS/1;}
8001734: 4b52 ldr r3, [pc, #328] ; (8001880 <SetAndCorrect+0x610>)
8001736: 6a1b ldr r3, [r3, #32]
8001738: 21fe movs r1, #254 ; 0xfe
800173a: 0589 lsls r1, r1, #22
800173c: 1c18 adds r0, r3, #0
800173e: f7fe fddd bl 80002fc <__aeabi_fcmpge>
8001742: 1e03 subs r3, r0, #0
8001744: d00f beq.n 8001766 <SetAndCorrect+0x4f6>
8001746: 4b4e ldr r3, [pc, #312] ; (8001880 <SetAndCorrect+0x610>)
8001748: 6a1b ldr r3, [r3, #32]
800174a: 495c ldr r1, [pc, #368] ; (80018bc <SetAndCorrect+0x64c>)
800174c: 1c18 adds r0, r3, #0
800174e: f7fe fdb7 bl 80002c0 <__aeabi_fcmplt>
8001752: 1e03 subs r3, r0, #0
8001754: d007 beq.n 8001766 <SetAndCorrect+0x4f6>
8001756: 4b50 ldr r3, [pc, #320] ; (8001898 <SetAndCorrect+0x628>)
8001758: 2209 movs r2, #9
800175a: 601a str r2, [r3, #0]
800175c: 4b48 ldr r3, [pc, #288] ; (8001880 <SetAndCorrect+0x610>)
800175e: 6a1a ldr r2, [r3, #32]
8001760: 4b4f ldr r3, [pc, #316] ; (80018a0 <SetAndCorrect+0x630>)
8001762: 601a str r2, [r3, #0]
8001764: e076 b.n 8001854 <SetAndCorrect+0x5e4>
else if (pardata.SENS>=10&&pardata.SENS<100){OffsetKuDisplay=12; kNormToDAC=pardata.SENS/10;}
8001766: 4b46 ldr r3, [pc, #280] ; (8001880 <SetAndCorrect+0x610>)
8001768: 6a1b ldr r3, [r3, #32]
800176a: 4954 ldr r1, [pc, #336] ; (80018bc <SetAndCorrect+0x64c>)
800176c: 1c18 adds r0, r3, #0
800176e: f7fe fdc5 bl 80002fc <__aeabi_fcmpge>
8001772: 1e03 subs r3, r0, #0
8001774: d015 beq.n 80017a2 <SetAndCorrect+0x532>
8001776: 4b42 ldr r3, [pc, #264] ; (8001880 <SetAndCorrect+0x610>)
8001778: 6a1b ldr r3, [r3, #32]
800177a: 494f ldr r1, [pc, #316] ; (80018b8 <SetAndCorrect+0x648>)
800177c: 1c18 adds r0, r3, #0
800177e: f7fe fd9f bl 80002c0 <__aeabi_fcmplt>
8001782: 1e03 subs r3, r0, #0
8001784: d00d beq.n 80017a2 <SetAndCorrect+0x532>
8001786: 4b44 ldr r3, [pc, #272] ; (8001898 <SetAndCorrect+0x628>)
8001788: 220c movs r2, #12
800178a: 601a str r2, [r3, #0]
800178c: 4b3c ldr r3, [pc, #240] ; (8001880 <SetAndCorrect+0x610>)
800178e: 6a1b ldr r3, [r3, #32]
8001790: 494a ldr r1, [pc, #296] ; (80018bc <SetAndCorrect+0x64c>)
8001792: 1c18 adds r0, r3, #0
8001794: f7fe fede bl 8000554 <__aeabi_fdiv>
8001798: 1c03 adds r3, r0, #0
800179a: 1c1a adds r2, r3, #0
800179c: 4b40 ldr r3, [pc, #256] ; (80018a0 <SetAndCorrect+0x630>)
800179e: 601a str r2, [r3, #0]
80017a0: e058 b.n 8001854 <SetAndCorrect+0x5e4>
else if (pardata.SENS>=100&&pardata.SENS<1000){OffsetKuDisplay=15; kNormToDAC=pardata.SENS/100;}
80017a2: 4b37 ldr r3, [pc, #220] ; (8001880 <SetAndCorrect+0x610>)
80017a4: 6a1b ldr r3, [r3, #32]
80017a6: 4944 ldr r1, [pc, #272] ; (80018b8 <SetAndCorrect+0x648>)
80017a8: 1c18 adds r0, r3, #0
80017aa: f7fe fda7 bl 80002fc <__aeabi_fcmpge>
80017ae: 1e03 subs r3, r0, #0
80017b0: d015 beq.n 80017de <SetAndCorrect+0x56e>
80017b2: 4b33 ldr r3, [pc, #204] ; (8001880 <SetAndCorrect+0x610>)
80017b4: 6a1b ldr r3, [r3, #32]
80017b6: 493d ldr r1, [pc, #244] ; (80018ac <SetAndCorrect+0x63c>)
80017b8: 1c18 adds r0, r3, #0
80017ba: f7fe fd81 bl 80002c0 <__aeabi_fcmplt>
80017be: 1e03 subs r3, r0, #0
80017c0: d00d beq.n 80017de <SetAndCorrect+0x56e>
80017c2: 4b35 ldr r3, [pc, #212] ; (8001898 <SetAndCorrect+0x628>)
80017c4: 220f movs r2, #15
80017c6: 601a str r2, [r3, #0]
80017c8: 4b2d ldr r3, [pc, #180] ; (8001880 <SetAndCorrect+0x610>)
80017ca: 6a1b ldr r3, [r3, #32]
80017cc: 493a ldr r1, [pc, #232] ; (80018b8 <SetAndCorrect+0x648>)
80017ce: 1c18 adds r0, r3, #0
80017d0: f7fe fec0 bl 8000554 <__aeabi_fdiv>
80017d4: 1c03 adds r3, r0, #0
80017d6: 1c1a adds r2, r3, #0
80017d8: 4b31 ldr r3, [pc, #196] ; (80018a0 <SetAndCorrect+0x630>)
80017da: 601a str r2, [r3, #0]
80017dc: e03a b.n 8001854 <SetAndCorrect+0x5e4>
else if (pardata.SENS>=1000&&pardata.SENS<10000){OffsetKuDisplay=18; kNormToDAC=pardata.SENS/1000;}
80017de: 4b28 ldr r3, [pc, #160] ; (8001880 <SetAndCorrect+0x610>)
80017e0: 6a1b ldr r3, [r3, #32]
80017e2: 4932 ldr r1, [pc, #200] ; (80018ac <SetAndCorrect+0x63c>)
80017e4: 1c18 adds r0, r3, #0
80017e6: f7fe fd89 bl 80002fc <__aeabi_fcmpge>
80017ea: 1e03 subs r3, r0, #0
80017ec: d015 beq.n 800181a <SetAndCorrect+0x5aa>
80017ee: 4b24 ldr r3, [pc, #144] ; (8001880 <SetAndCorrect+0x610>)
80017f0: 6a1b ldr r3, [r3, #32]
80017f2: 492a ldr r1, [pc, #168] ; (800189c <SetAndCorrect+0x62c>)
80017f4: 1c18 adds r0, r3, #0
80017f6: f7fe fd63 bl 80002c0 <__aeabi_fcmplt>
80017fa: 1e03 subs r3, r0, #0
80017fc: d00d beq.n 800181a <SetAndCorrect+0x5aa>
80017fe: 4b26 ldr r3, [pc, #152] ; (8001898 <SetAndCorrect+0x628>)
8001800: 2212 movs r2, #18
8001802: 601a str r2, [r3, #0]
8001804: 4b1e ldr r3, [pc, #120] ; (8001880 <SetAndCorrect+0x610>)
8001806: 6a1b ldr r3, [r3, #32]
8001808: 4928 ldr r1, [pc, #160] ; (80018ac <SetAndCorrect+0x63c>)
800180a: 1c18 adds r0, r3, #0
800180c: f7fe fea2 bl 8000554 <__aeabi_fdiv>
8001810: 1c03 adds r3, r0, #0
8001812: 1c1a adds r2, r3, #0
8001814: 4b22 ldr r3, [pc, #136] ; (80018a0 <SetAndCorrect+0x630>)
8001816: 601a str r2, [r3, #0]
8001818: e01c b.n 8001854 <SetAndCorrect+0x5e4>
else if (pardata.SENS>=10000&&pardata.SENS<100000){OffsetKuDisplay=21; kNormToDAC=pardata.SENS/10000;}
800181a: 4b19 ldr r3, [pc, #100] ; (8001880 <SetAndCorrect+0x610>)
800181c: 6a1b ldr r3, [r3, #32]
800181e: 491f ldr r1, [pc, #124] ; (800189c <SetAndCorrect+0x62c>)
8001820: 1c18 adds r0, r3, #0
8001822: f7fe fd6b bl 80002fc <__aeabi_fcmpge>
8001826: 1e03 subs r3, r0, #0
8001828: d014 beq.n 8001854 <SetAndCorrect+0x5e4>
800182a: 4b15 ldr r3, [pc, #84] ; (8001880 <SetAndCorrect+0x610>)
800182c: 6a1b ldr r3, [r3, #32]
800182e: 4924 ldr r1, [pc, #144] ; (80018c0 <SetAndCorrect+0x650>)
8001830: 1c18 adds r0, r3, #0
8001832: f7fe fd45 bl 80002c0 <__aeabi_fcmplt>
8001836: 1e03 subs r3, r0, #0
8001838: d00c beq.n 8001854 <SetAndCorrect+0x5e4>
800183a: 4b17 ldr r3, [pc, #92] ; (8001898 <SetAndCorrect+0x628>)
800183c: 2215 movs r2, #21
800183e: 601a str r2, [r3, #0]
8001840: 4b0f ldr r3, [pc, #60] ; (8001880 <SetAndCorrect+0x610>)
8001842: 6a1b ldr r3, [r3, #32]
8001844: 4915 ldr r1, [pc, #84] ; (800189c <SetAndCorrect+0x62c>)
8001846: 1c18 adds r0, r3, #0
8001848: f7fe fe84 bl 8000554 <__aeabi_fdiv>
800184c: 1c03 adds r3, r0, #0
800184e: 1c1a adds r2, r3, #0
8001850: 4b13 ldr r3, [pc, #76] ; (80018a0 <SetAndCorrect+0x630>)
8001852: 601a str r2, [r3, #0]
//void setDAC(void) //from 1210
DVD = fKU/kNormToDAC; // <20><><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
8001854: 4b12 ldr r3, [pc, #72] ; (80018a0 <SetAndCorrect+0x630>)
8001856: 681b ldr r3, [r3, #0]
8001858: 1c19 adds r1, r3, #0
800185a: 6878 ldr r0, [r7, #4]
800185c: f7fe fe7a bl 8000554 <__aeabi_fdiv>
8001860: 1c03 adds r3, r0, #0
8001862: 1c18 adds r0, r3, #0
8001864: f7fe fd9e bl 80003a4 <__aeabi_f2uiz>
8001868: 0003 movs r3, r0
800186a: b29a uxth r2, r3
800186c: 4b15 ldr r3, [pc, #84] ; (80018c4 <SetAndCorrect+0x654>)
800186e: 801a strh r2, [r3, #0]
WRDAC();
8001870: f000 f8f6 bl 8001a60 <WRDAC>
// Load RDAC
}
8001874: 46c0 nop ; (mov r8, r8)
8001876: 46bd mov sp, r7
8001878: b002 add sp, #8
800187a: bd80 pop {r7, pc}
800187c: 50000400 .word 0x50000400
8001880: 200000a0 .word 0x200000a0
8001884: 20000050 .word 0x20000050
8001888: eb1c432d .word 0xeb1c432d
800188c: 3f1a36e2 .word 0x3f1a36e2
8001890: d2f1a9fc .word 0xd2f1a9fc
8001894: 3f50624d .word 0x3f50624d
8001898: 20000044 .word 0x20000044
800189c: 461c4000 .word 0x461c4000
80018a0: 2000004c .word 0x2000004c
80018a4: 47ae147b .word 0x47ae147b
80018a8: 3f847ae1 .word 0x3f847ae1
80018ac: 447a0000 .word 0x447a0000
80018b0: 9999999a .word 0x9999999a
80018b4: 3fb99999 .word 0x3fb99999
80018b8: 42c80000 .word 0x42c80000
80018bc: 41200000 .word 0x41200000
80018c0: 47c35000 .word 0x47c35000
80018c4: 20000048 .word 0x20000048
080018c8 <initCalibr>:
void initCalibr(void)
{
80018c8: b580 push {r7, lr}
80018ca: af00 add r7, sp, #0
pardata.IKE = 0;
80018cc: 4b60 ldr r3, [pc, #384] ; (8001a50 <initCalibr+0x188>)
80018ce: 2200 movs r2, #0
80018d0: 81da strh r2, [r3, #14]
pardata.IKD = 0;
80018d2: 4b5f ldr r3, [pc, #380] ; (8001a50 <initCalibr+0x188>)
80018d4: 2200 movs r2, #0
80018d6: 821a strh r2, [r3, #16]
pardata.IKS = 1;
80018d8: 4b5d ldr r3, [pc, #372] ; (8001a50 <initCalibr+0x188>)
80018da: 2201 movs r2, #1
80018dc: 825a strh r2, [r3, #18]
pardata.IFV = Hp1;
80018de: 4b5c ldr r3, [pc, #368] ; (8001a50 <initCalibr+0x188>)
80018e0: 2202 movs r2, #2
80018e2: 811a strh r2, [r3, #8]
pardata.IFN = Lp100000;
80018e4: 4b5a ldr r3, [pc, #360] ; (8001a50 <initCalibr+0x188>)
80018e6: 2207 movs r2, #7
80018e8: 815a strh r2, [r3, #10]
switch(faseClbr)
80018ea: 4b5a ldr r3, [pc, #360] ; (8001a54 <initCalibr+0x18c>)
80018ec: 681b ldr r3, [r3, #0]
80018ee: 2b16 cmp r3, #22
80018f0: d900 bls.n 80018f4 <initCalibr+0x2c>
80018f2: e0a5 b.n 8001a40 <initCalibr+0x178>
80018f4: 009a lsls r2, r3, #2
80018f6: 4b58 ldr r3, [pc, #352] ; (8001a58 <initCalibr+0x190>)
80018f8: 18d3 adds r3, r2, r3
80018fa: 681b ldr r3, [r3, #0]
80018fc: 469f mov pc, r3
{
case 0: // CHARGE 0.1
pardata.IIN = CHARGE;
80018fe: 4b54 ldr r3, [pc, #336] ; (8001a50 <initCalibr+0x188>)
8001900: 2200 movs r2, #0
8001902: 80da strh r2, [r3, #6]
pardata.IKU = Ku0_1;
8001904: 4b52 ldr r3, [pc, #328] ; (8001a50 <initCalibr+0x188>)
8001906: 2200 movs r2, #0
8001908: 819a strh r2, [r3, #12]
break;
800190a: e099 b.n 8001a40 <initCalibr+0x178>
case 1: // CHARGE 0.2
pardata.IIN = CHARGE;
800190c: 4b50 ldr r3, [pc, #320] ; (8001a50 <initCalibr+0x188>)
800190e: 2200 movs r2, #0
8001910: 80da strh r2, [r3, #6]
pardata.IKU = Ku0_2;
8001912: 4b4f ldr r3, [pc, #316] ; (8001a50 <initCalibr+0x188>)
8001914: 2201 movs r2, #1
8001916: 819a strh r2, [r3, #12]
break;
8001918: e092 b.n 8001a40 <initCalibr+0x178>
case 2: // CHARGE 0.5
pardata.IIN = CHARGE;
800191a: 4b4d ldr r3, [pc, #308] ; (8001a50 <initCalibr+0x188>)
800191c: 2200 movs r2, #0
800191e: 80da strh r2, [r3, #6]
pardata.IKU = Ku0_5;
8001920: 4b4b ldr r3, [pc, #300] ; (8001a50 <initCalibr+0x188>)
8001922: 2202 movs r2, #2
8001924: 819a strh r2, [r3, #12]
break;
8001926: e08b b.n 8001a40 <initCalibr+0x178>
case 3: // CHARGE 1
pardata.IIN = CHARGE;
8001928: 4b49 ldr r3, [pc, #292] ; (8001a50 <initCalibr+0x188>)
800192a: 2200 movs r2, #0
800192c: 80da strh r2, [r3, #6]
pardata.IKU = Ku1;
800192e: 4b48 ldr r3, [pc, #288] ; (8001a50 <initCalibr+0x188>)
8001930: 2203 movs r2, #3
8001932: 819a strh r2, [r3, #12]
break;
8001934: e084 b.n 8001a40 <initCalibr+0x178>
case 4: // CHARGE 2
pardata.IIN = CHARGE;
8001936: 4b46 ldr r3, [pc, #280] ; (8001a50 <initCalibr+0x188>)
8001938: 2200 movs r2, #0
800193a: 80da strh r2, [r3, #6]
pardata.IKU = Ku2;
800193c: 4b44 ldr r3, [pc, #272] ; (8001a50 <initCalibr+0x188>)
800193e: 2204 movs r2, #4
8001940: 819a strh r2, [r3, #12]
break;
8001942: e07d b.n 8001a40 <initCalibr+0x178>
case 5: // CHARGE 5
pardata.IIN = CHARGE;
8001944: 4b42 ldr r3, [pc, #264] ; (8001a50 <initCalibr+0x188>)
8001946: 2200 movs r2, #0
8001948: 80da strh r2, [r3, #6]
pardata.IKU = Ku5;
800194a: 4b41 ldr r3, [pc, #260] ; (8001a50 <initCalibr+0x188>)
800194c: 2205 movs r2, #5
800194e: 819a strh r2, [r3, #12]
break;
8001950: e076 b.n 8001a40 <initCalibr+0x178>
case 6: // CHARGE 10
pardata.IIN = CHARGE;
8001952: 4b3f ldr r3, [pc, #252] ; (8001a50 <initCalibr+0x188>)
8001954: 2200 movs r2, #0
8001956: 80da strh r2, [r3, #6]
pardata.IKU = Ku10;
8001958: 4b3d ldr r3, [pc, #244] ; (8001a50 <initCalibr+0x188>)
800195a: 2206 movs r2, #6
800195c: 819a strh r2, [r3, #12]
break;
800195e: e06f b.n 8001a40 <initCalibr+0x178>
case 7: // CHARGE 20
pardata.IIN = CHARGE;
8001960: 4b3b ldr r3, [pc, #236] ; (8001a50 <initCalibr+0x188>)
8001962: 2200 movs r2, #0
8001964: 80da strh r2, [r3, #6]
pardata.IKU = Ku20;
8001966: 4b3a ldr r3, [pc, #232] ; (8001a50 <initCalibr+0x188>)
8001968: 2207 movs r2, #7
800196a: 819a strh r2, [r3, #12]
break;
800196c: e068 b.n 8001a40 <initCalibr+0x178>
case 8: // CHARGE 50
pardata.IIN = CHARGE;
800196e: 4b38 ldr r3, [pc, #224] ; (8001a50 <initCalibr+0x188>)
8001970: 2200 movs r2, #0
8001972: 80da strh r2, [r3, #6]
pardata.IKU = Ku50;
8001974: 4b36 ldr r3, [pc, #216] ; (8001a50 <initCalibr+0x188>)
8001976: 2208 movs r2, #8
8001978: 819a strh r2, [r3, #12]
break;
800197a: e061 b.n 8001a40 <initCalibr+0x178>
case 9: // CHARGE 100
pardata.IIN = CHARGE;
800197c: 4b34 ldr r3, [pc, #208] ; (8001a50 <initCalibr+0x188>)
800197e: 2200 movs r2, #0
8001980: 80da strh r2, [r3, #6]
pardata.IKU = Ku100;
8001982: 4b33 ldr r3, [pc, #204] ; (8001a50 <initCalibr+0x188>)
8001984: 2209 movs r2, #9
8001986: 819a strh r2, [r3, #12]
break;
8001988: e05a b.n 8001a40 <initCalibr+0x178>
case 10:// CHARGE 200
pardata.IIN = CHARGE;
800198a: 4b31 ldr r3, [pc, #196] ; (8001a50 <initCalibr+0x188>)
800198c: 2200 movs r2, #0
800198e: 80da strh r2, [r3, #6]
pardata.IKU = Ku200;
8001990: 4b2f ldr r3, [pc, #188] ; (8001a50 <initCalibr+0x188>)
8001992: 220a movs r2, #10
8001994: 819a strh r2, [r3, #12]
break;
8001996: e053 b.n 8001a40 <initCalibr+0x178>
case 11:// CHARGE 500
pardata.IIN = CHARGE;
8001998: 4b2d ldr r3, [pc, #180] ; (8001a50 <initCalibr+0x188>)
800199a: 2200 movs r2, #0
800199c: 80da strh r2, [r3, #6]
pardata.IKU = Ku500;
800199e: 4b2c ldr r3, [pc, #176] ; (8001a50 <initCalibr+0x188>)
80019a0: 220b movs r2, #11
80019a2: 819a strh r2, [r3, #12]
break;
80019a4: e04c b.n 8001a40 <initCalibr+0x178>
case 12:// CHARGE 1000
pardata.IIN = CHARGE;
80019a6: 4b2a ldr r3, [pc, #168] ; (8001a50 <initCalibr+0x188>)
80019a8: 2200 movs r2, #0
80019aa: 80da strh r2, [r3, #6]
pardata.IKU = Ku1000;
80019ac: 4b28 ldr r3, [pc, #160] ; (8001a50 <initCalibr+0x188>)
80019ae: 220c movs r2, #12
80019b0: 819a strh r2, [r3, #12]
break;
80019b2: e045 b.n 8001a40 <initCalibr+0x178>
case 13: // ICP 1
pardata.IIN = ICP;
80019b4: 4b26 ldr r3, [pc, #152] ; (8001a50 <initCalibr+0x188>)
80019b6: 2201 movs r2, #1
80019b8: 80da strh r2, [r3, #6]
pardata.IKU = Ku1;
80019ba: 4b25 ldr r3, [pc, #148] ; (8001a50 <initCalibr+0x188>)
80019bc: 2203 movs r2, #3
80019be: 819a strh r2, [r3, #12]
break;
80019c0: e03e b.n 8001a40 <initCalibr+0x178>
case 14: // ICP 2
pardata.IIN = ICP;
80019c2: 4b23 ldr r3, [pc, #140] ; (8001a50 <initCalibr+0x188>)
80019c4: 2201 movs r2, #1
80019c6: 80da strh r2, [r3, #6]
pardata.IKU = Ku2;
80019c8: 4b21 ldr r3, [pc, #132] ; (8001a50 <initCalibr+0x188>)
80019ca: 2204 movs r2, #4
80019cc: 819a strh r2, [r3, #12]
break;
80019ce: e037 b.n 8001a40 <initCalibr+0x178>
case 15: // ICP 5
pardata.IIN = ICP;
80019d0: 4b1f ldr r3, [pc, #124] ; (8001a50 <initCalibr+0x188>)
80019d2: 2201 movs r2, #1
80019d4: 80da strh r2, [r3, #6]
pardata.IKU = Ku5;
80019d6: 4b1e ldr r3, [pc, #120] ; (8001a50 <initCalibr+0x188>)
80019d8: 2205 movs r2, #5
80019da: 819a strh r2, [r3, #12]
break;
80019dc: e030 b.n 8001a40 <initCalibr+0x178>
case 16: // ICP 10
pardata.IIN = ICP;
80019de: 4b1c ldr r3, [pc, #112] ; (8001a50 <initCalibr+0x188>)
80019e0: 2201 movs r2, #1
80019e2: 80da strh r2, [r3, #6]
pardata.IKU = Ku10;
80019e4: 4b1a ldr r3, [pc, #104] ; (8001a50 <initCalibr+0x188>)
80019e6: 2206 movs r2, #6
80019e8: 819a strh r2, [r3, #12]
break;
80019ea: e029 b.n 8001a40 <initCalibr+0x178>
case 17: // ICP 20
pardata.IIN = ICP;
80019ec: 4b18 ldr r3, [pc, #96] ; (8001a50 <initCalibr+0x188>)
80019ee: 2201 movs r2, #1
80019f0: 80da strh r2, [r3, #6]
pardata.IKU = Ku20;
80019f2: 4b17 ldr r3, [pc, #92] ; (8001a50 <initCalibr+0x188>)
80019f4: 2207 movs r2, #7
80019f6: 819a strh r2, [r3, #12]
break;
80019f8: e022 b.n 8001a40 <initCalibr+0x178>
case 18: // ICP 50
pardata.IIN = ICP;
80019fa: 4b15 ldr r3, [pc, #84] ; (8001a50 <initCalibr+0x188>)
80019fc: 2201 movs r2, #1
80019fe: 80da strh r2, [r3, #6]
pardata.IKU = Ku50;
8001a00: 4b13 ldr r3, [pc, #76] ; (8001a50 <initCalibr+0x188>)
8001a02: 2208 movs r2, #8
8001a04: 819a strh r2, [r3, #12]
break;
8001a06: e01b b.n 8001a40 <initCalibr+0x178>
case 19: // ICP 100
pardata.IIN = ICP;
8001a08: 4b11 ldr r3, [pc, #68] ; (8001a50 <initCalibr+0x188>)
8001a0a: 2201 movs r2, #1
8001a0c: 80da strh r2, [r3, #6]
pardata.IKU = Ku100;
8001a0e: 4b10 ldr r3, [pc, #64] ; (8001a50 <initCalibr+0x188>)
8001a10: 2209 movs r2, #9
8001a12: 819a strh r2, [r3, #12]
break;
8001a14: e014 b.n 8001a40 <initCalibr+0x178>
case 20: // ICP 200
pardata.IIN = ICP;
8001a16: 4b0e ldr r3, [pc, #56] ; (8001a50 <initCalibr+0x188>)
8001a18: 2201 movs r2, #1
8001a1a: 80da strh r2, [r3, #6]
pardata.IKU = Ku200;
8001a1c: 4b0c ldr r3, [pc, #48] ; (8001a50 <initCalibr+0x188>)
8001a1e: 220a movs r2, #10
8001a20: 819a strh r2, [r3, #12]
break;
8001a22: e00d b.n 8001a40 <initCalibr+0x178>
case 21: // ICP 500
pardata.IIN = ICP;
8001a24: 4b0a ldr r3, [pc, #40] ; (8001a50 <initCalibr+0x188>)
8001a26: 2201 movs r2, #1
8001a28: 80da strh r2, [r3, #6]
pardata.IKU = Ku500;
8001a2a: 4b09 ldr r3, [pc, #36] ; (8001a50 <initCalibr+0x188>)
8001a2c: 220b movs r2, #11
8001a2e: 819a strh r2, [r3, #12]
break;
8001a30: e006 b.n 8001a40 <initCalibr+0x178>
case 22: // ICP 1000
pardata.IIN = ICP;
8001a32: 4b07 ldr r3, [pc, #28] ; (8001a50 <initCalibr+0x188>)
8001a34: 2201 movs r2, #1
8001a36: 80da strh r2, [r3, #6]
pardata.IKU = Ku1000;
8001a38: 4b05 ldr r3, [pc, #20] ; (8001a50 <initCalibr+0x188>)
8001a3a: 220c movs r2, #12
8001a3c: 819a strh r2, [r3, #12]
break;
8001a3e: 46c0 nop ; (mov r8, r8)
}
clbr = true;
8001a40: 4b06 ldr r3, [pc, #24] ; (8001a5c <initCalibr+0x194>)
8001a42: 2201 movs r2, #1
8001a44: 701a strb r2, [r3, #0]
SetAndCorrect();
8001a46: f7ff fc13 bl 8001270 <SetAndCorrect>
}
8001a4a: 46c0 nop ; (mov r8, r8)
8001a4c: 46bd mov sp, r7
8001a4e: bd80 pop {r7, pc}
8001a50: 200000a0 .word 0x200000a0
8001a54: 20000038 .word 0x20000038
8001a58: 0800714c .word 0x0800714c
8001a5c: 2000003c .word 0x2000003c
08001a60 <WRDAC>:
//******************************************************************************
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
//******************************************************************************
void WRDAC(void)
{
8001a60: b580 push {r7, lr}
8001a62: b082 sub sp, #8
8001a64: af00 add r7, sp, #0
uint8_t i;
uint16_t dvd = DVD;
8001a66: 1d3b adds r3, r7, #4
8001a68: 4a2a ldr r2, [pc, #168] ; (8001b14 <WRDAC+0xb4>)
8001a6a: 8812 ldrh r2, [r2, #0]
8001a6c: 801a strh r2, [r3, #0]
dvd <<= 4;
8001a6e: 1d3b adds r3, r7, #4
8001a70: 1d3a adds r2, r7, #4
8001a72: 8812 ldrh r2, [r2, #0]
8001a74: 0112 lsls r2, r2, #4
8001a76: 801a strh r2, [r3, #0]
for(i = 0; i < 12; i++)
8001a78: 1dfb adds r3, r7, #7
8001a7a: 2200 movs r2, #0
8001a7c: 701a strb r2, [r3, #0]
8001a7e: e02b b.n 8001ad8 <WRDAC+0x78>
{
if(dvd & 0x8000)
8001a80: 1d3b adds r3, r7, #4
8001a82: 2200 movs r2, #0
8001a84: 5e9b ldrsh r3, [r3, r2]
8001a86: 2b00 cmp r3, #0
8001a88: da07 bge.n 8001a9a <WRDAC+0x3a>
HAL_GPIO_WritePin(GPIOB, STD_Pin, GPIO_PIN_SET);
8001a8a: 2380 movs r3, #128 ; 0x80
8001a8c: 01db lsls r3, r3, #7
8001a8e: 4822 ldr r0, [pc, #136] ; (8001b18 <WRDAC+0xb8>)
8001a90: 2201 movs r2, #1
8001a92: 0019 movs r1, r3
8001a94: f003 f859 bl 8004b4a <HAL_GPIO_WritePin>
8001a98: e006 b.n 8001aa8 <WRDAC+0x48>
else HAL_GPIO_WritePin(GPIOB, STD_Pin, GPIO_PIN_RESET);
8001a9a: 2380 movs r3, #128 ; 0x80
8001a9c: 01db lsls r3, r3, #7
8001a9e: 481e ldr r0, [pc, #120] ; (8001b18 <WRDAC+0xb8>)
8001aa0: 2200 movs r2, #0
8001aa2: 0019 movs r1, r3
8001aa4: f003 f851 bl 8004b4a <HAL_GPIO_WritePin>
HAL_GPIO_WritePin(GPIOB, SCK_Pin, GPIO_PIN_RESET);
8001aa8: 2380 movs r3, #128 ; 0x80
8001aaa: 021b lsls r3, r3, #8
8001aac: 481a ldr r0, [pc, #104] ; (8001b18 <WRDAC+0xb8>)
8001aae: 2200 movs r2, #0
8001ab0: 0019 movs r1, r3
8001ab2: f003 f84a bl 8004b4a <HAL_GPIO_WritePin>
HAL_GPIO_WritePin(GPIOB, SCK_Pin, GPIO_PIN_SET);
8001ab6: 2380 movs r3, #128 ; 0x80
8001ab8: 021b lsls r3, r3, #8
8001aba: 4817 ldr r0, [pc, #92] ; (8001b18 <WRDAC+0xb8>)
8001abc: 2201 movs r2, #1
8001abe: 0019 movs r1, r3
8001ac0: f003 f843 bl 8004b4a <HAL_GPIO_WritePin>
dvd <<= 1;
8001ac4: 1d3a adds r2, r7, #4
8001ac6: 1d3b adds r3, r7, #4
8001ac8: 881b ldrh r3, [r3, #0]
8001aca: 18db adds r3, r3, r3
8001acc: 8013 strh r3, [r2, #0]
for(i = 0; i < 12; i++)
8001ace: 1dfb adds r3, r7, #7
8001ad0: 781a ldrb r2, [r3, #0]
8001ad2: 1dfb adds r3, r7, #7
8001ad4: 3201 adds r2, #1
8001ad6: 701a strb r2, [r3, #0]
8001ad8: 1dfb adds r3, r7, #7
8001ada: 781b ldrb r3, [r3, #0]
8001adc: 2b0b cmp r3, #11
8001ade: d9cf bls.n 8001a80 <WRDAC+0x20>
}
HAL_GPIO_WritePin(GPIOB, FL_Pin, GPIO_PIN_RESET);
8001ae0: 2380 movs r3, #128 ; 0x80
8001ae2: 019b lsls r3, r3, #6
8001ae4: 480c ldr r0, [pc, #48] ; (8001b18 <WRDAC+0xb8>)
8001ae6: 2200 movs r2, #0
8001ae8: 0019 movs r1, r3
8001aea: f003 f82e bl 8004b4a <HAL_GPIO_WritePin>
HAL_GPIO_WritePin(GPIOB, FL_Pin, GPIO_PIN_SET);
8001aee: 2380 movs r3, #128 ; 0x80
8001af0: 019b lsls r3, r3, #6
8001af2: 4809 ldr r0, [pc, #36] ; (8001b18 <WRDAC+0xb8>)
8001af4: 2201 movs r2, #1
8001af6: 0019 movs r1, r3
8001af8: f003 f827 bl 8004b4a <HAL_GPIO_WritePin>
HAL_GPIO_WritePin(GPIOB, STD_Pin, GPIO_PIN_SET);
8001afc: 2380 movs r3, #128 ; 0x80
8001afe: 01db lsls r3, r3, #7
8001b00: 4805 ldr r0, [pc, #20] ; (8001b18 <WRDAC+0xb8>)
8001b02: 2201 movs r2, #1
8001b04: 0019 movs r1, r3
8001b06: f003 f820 bl 8004b4a <HAL_GPIO_WritePin>
}
8001b0a: 46c0 nop ; (mov r8, r8)
8001b0c: 46bd mov sp, r7
8001b0e: b002 add sp, #8
8001b10: bd80 pop {r7, pc}
8001b12: 46c0 nop ; (mov r8, r8)
8001b14: 20000048 .word 0x20000048
8001b18: 50000400 .word 0x50000400
08001b1c <MX_FLASH_Init>:
void MX_FLASH_Init(void)
{
8001b1c: b580 push {r7, lr}
8001b1e: af00 add r7, sp, #0
__HAL_RCC_SYSCFG_CLK_ENABLE();
8001b20: 4b06 ldr r3, [pc, #24] ; (8001b3c <MX_FLASH_Init+0x20>)
8001b22: 4a06 ldr r2, [pc, #24] ; (8001b3c <MX_FLASH_Init+0x20>)
8001b24: 6b52 ldr r2, [r2, #52] ; 0x34
8001b26: 2101 movs r1, #1
8001b28: 430a orrs r2, r1
8001b2a: 635a str r2, [r3, #52] ; 0x34
rdPar();
8001b2c: f000 f866 bl 8001bfc <rdPar>
rdCorr();
8001b30: f000 f97a bl 8001e28 <rdCorr>
}
8001b34: 46c0 nop ; (mov r8, r8)
8001b36: 46bd mov sp, r7
8001b38: bd80 pop {r7, pc}
8001b3a: 46c0 nop ; (mov r8, r8)
8001b3c: 40021000 .word 0x40021000
08001b40 <wrPar>:
void wrPar(void)
{
8001b40: b580 push {r7, lr}
8001b42: b084 sub sp, #16
8001b44: af00 add r7, sp, #0
uint8_t i, len;
uint32_t *pData, Address;
len = sizeof(UserData_TypeDef);
8001b46: 1cfb adds r3, r7, #3
8001b48: 2228 movs r2, #40 ; 0x28
8001b4a: 701a strb r2, [r3, #0]
len >>= 2;
8001b4c: 1cfb adds r3, r7, #3
8001b4e: 1cfa adds r2, r7, #3
8001b50: 7812 ldrb r2, [r2, #0]
8001b52: 0892 lsrs r2, r2, #2
8001b54: 701a strb r2, [r3, #0]
HAL_FLASH_Unlock();
8001b56: f002 fbe5 bl 8004324 <HAL_FLASH_Unlock>
FLASH_PageErase(USERPAGE);
8001b5a: 4b24 ldr r3, [pc, #144] ; (8001bec <wrPar+0xac>)
8001b5c: 0018 movs r0, r3
8001b5e: f002 fd53 bl 8004608 <FLASH_PageErase>
CLEAR_BIT(FLASH->PECR, FLASH_PECR_PROG);
8001b62: 4b23 ldr r3, [pc, #140] ; (8001bf0 <wrPar+0xb0>)
8001b64: 4a22 ldr r2, [pc, #136] ; (8001bf0 <wrPar+0xb0>)
8001b66: 6852 ldr r2, [r2, #4]
8001b68: 2108 movs r1, #8
8001b6a: 438a bics r2, r1
8001b6c: 605a str r2, [r3, #4]
CLEAR_BIT(FLASH->PECR, FLASH_PECR_ERASE);
8001b6e: 4b20 ldr r3, [pc, #128] ; (8001bf0 <wrPar+0xb0>)
8001b70: 4a1f ldr r2, [pc, #124] ; (8001bf0 <wrPar+0xb0>)
8001b72: 6852 ldr r2, [r2, #4]
8001b74: 491f ldr r1, [pc, #124] ; (8001bf4 <wrPar+0xb4>)
8001b76: 400a ands r2, r1
8001b78: 605a str r2, [r3, #4]
FLASH_WaitForLastOperation(100);
8001b7a: 2064 movs r0, #100 ; 0x64
8001b7c: f002 fc36 bl 80043ec <FLASH_WaitForLastOperation>
Address = USERPAGE;
8001b80: 4b1a ldr r3, [pc, #104] ; (8001bec <wrPar+0xac>)
8001b82: 607b str r3, [r7, #4]
pData = (uint32_t *) &pardata;
8001b84: 4b1c ldr r3, [pc, #112] ; (8001bf8 <wrPar+0xb8>)
8001b86: 60bb str r3, [r7, #8]
for(i = 0; i < len; i++)
8001b88: 230f movs r3, #15
8001b8a: 18fb adds r3, r7, r3
8001b8c: 2200 movs r2, #0
8001b8e: 701a strb r2, [r3, #0]
8001b90: e012 b.n 8001bb8 <wrPar+0x78>
{
HAL_FLASH_Program(FLASH_TYPEPROGRAM_WORD, Address, *pData++);
8001b92: 68bb ldr r3, [r7, #8]
8001b94: 1d1a adds r2, r3, #4
8001b96: 60ba str r2, [r7, #8]
8001b98: 681a ldr r2, [r3, #0]
8001b9a: 687b ldr r3, [r7, #4]
8001b9c: 0019 movs r1, r3
8001b9e: 2002 movs r0, #2
8001ba0: f002 fb84 bl 80042ac <HAL_FLASH_Program>
Address += 4;
8001ba4: 687b ldr r3, [r7, #4]
8001ba6: 3304 adds r3, #4
8001ba8: 607b str r3, [r7, #4]
for(i = 0; i < len; i++)
8001baa: 230f movs r3, #15
8001bac: 18fb adds r3, r7, r3
8001bae: 781a ldrb r2, [r3, #0]
8001bb0: 230f movs r3, #15
8001bb2: 18fb adds r3, r7, r3
8001bb4: 3201 adds r2, #1
8001bb6: 701a strb r2, [r3, #0]
8001bb8: 230f movs r3, #15
8001bba: 18fa adds r2, r7, r3
8001bbc: 1cfb adds r3, r7, #3
8001bbe: 7812 ldrb r2, [r2, #0]
8001bc0: 781b ldrb r3, [r3, #0]
8001bc2: 429a cmp r2, r3
8001bc4: d3e5 bcc.n 8001b92 <wrPar+0x52>
}
CLEAR_BIT(FLASH->PECR, FLASH_PECR_PROG);
8001bc6: 4b0a ldr r3, [pc, #40] ; (8001bf0 <wrPar+0xb0>)
8001bc8: 4a09 ldr r2, [pc, #36] ; (8001bf0 <wrPar+0xb0>)
8001bca: 6852 ldr r2, [r2, #4]
8001bcc: 2108 movs r1, #8
8001bce: 438a bics r2, r1
8001bd0: 605a str r2, [r3, #4]
CLEAR_BIT(FLASH->PECR, FLASH_PECR_ERASE);
8001bd2: 4b07 ldr r3, [pc, #28] ; (8001bf0 <wrPar+0xb0>)
8001bd4: 4a06 ldr r2, [pc, #24] ; (8001bf0 <wrPar+0xb0>)
8001bd6: 6852 ldr r2, [r2, #4]
8001bd8: 4906 ldr r1, [pc, #24] ; (8001bf4 <wrPar+0xb4>)
8001bda: 400a ands r2, r1
8001bdc: 605a str r2, [r3, #4]
HAL_FLASH_Lock();
8001bde: f002 fbf1 bl 80043c4 <HAL_FLASH_Lock>
}
8001be2: 46c0 nop ; (mov r8, r8)
8001be4: 46bd mov sp, r7
8001be6: b004 add sp, #16
8001be8: bd80 pop {r7, pc}
8001bea: 46c0 nop ; (mov r8, r8)
8001bec: 0801ff00 .word 0x0801ff00
8001bf0: 40022000 .word 0x40022000
8001bf4: fffffdff .word 0xfffffdff
8001bf8: 200000a0 .word 0x200000a0
08001bfc <rdPar>:
void rdPar(void)
{
8001bfc: b590 push {r4, r7, lr}
8001bfe: b083 sub sp, #12
8001c00: af00 add r7, sp, #0
uint8_t rewrite = 0;
8001c02: 1dfb adds r3, r7, #7
8001c04: 2200 movs r2, #0
8001c06: 701a strb r2, [r3, #0]
memcpy((void *) &pardata, (void *) USERPAGE, sizeof(UserData_TypeDef));
8001c08: 4b54 ldr r3, [pc, #336] ; (8001d5c <rdPar+0x160>)
8001c0a: 4a55 ldr r2, [pc, #340] ; (8001d60 <rdPar+0x164>)
8001c0c: ca13 ldmia r2!, {r0, r1, r4}
8001c0e: c313 stmia r3!, {r0, r1, r4}
8001c10: ca13 ldmia r2!, {r0, r1, r4}
8001c12: c313 stmia r3!, {r0, r1, r4}
8001c14: ca13 ldmia r2!, {r0, r1, r4}
8001c16: c313 stmia r3!, {r0, r1, r4}
8001c18: 6812 ldr r2, [r2, #0]
8001c1a: 601a str r2, [r3, #0]
//pardata.OWN = 0;
if((pardata.OWN != MY_ADDRESS) || (pardata.OWN == 0))
8001c1c: 4b4f ldr r3, [pc, #316] ; (8001d5c <rdPar+0x160>)
8001c1e: 881b ldrh r3, [r3, #0]
8001c20: b29b uxth r3, r3
8001c22: 2b01 cmp r3, #1
8001c24: d104 bne.n 8001c30 <rdPar+0x34>
8001c26: 4b4d ldr r3, [pc, #308] ; (8001d5c <rdPar+0x160>)
8001c28: 881b ldrh r3, [r3, #0]
8001c2a: b29b uxth r3, r3
8001c2c: 2b00 cmp r3, #0
8001c2e: d132 bne.n 8001c96 <rdPar+0x9a>
{
pardata.OWN = MY_ADDRESS;
8001c30: 4b4a ldr r3, [pc, #296] ; (8001d5c <rdPar+0x160>)
8001c32: 2201 movs r2, #1
8001c34: 801a strh r2, [r3, #0]
pardata.BAUD = 7; //115200
8001c36: 4b49 ldr r3, [pc, #292] ; (8001d5c <rdPar+0x160>)
8001c38: 2207 movs r2, #7
8001c3a: 805a strh r2, [r3, #2]
pardata.INFB = 0;
8001c3c: 4b47 ldr r3, [pc, #284] ; (8001d5c <rdPar+0x160>)
8001c3e: 2200 movs r2, #0
8001c40: 809a strh r2, [r3, #4]
pardata.IIN = CHARGE;
8001c42: 4b46 ldr r3, [pc, #280] ; (8001d5c <rdPar+0x160>)
8001c44: 2200 movs r2, #0
8001c46: 80da strh r2, [r3, #6]
pardata.IFV = Hp0_2;
8001c48: 4b44 ldr r3, [pc, #272] ; (8001d5c <rdPar+0x160>)
8001c4a: 2200 movs r2, #0
8001c4c: 811a strh r2, [r3, #8]
pardata.IFN = Lp100000;
8001c4e: 4b43 ldr r3, [pc, #268] ; (8001d5c <rdPar+0x160>)
8001c50: 2207 movs r2, #7
8001c52: 815a strh r2, [r3, #10]
pardata.IKU = Ku1;
8001c54: 4b41 ldr r3, [pc, #260] ; (8001d5c <rdPar+0x160>)
8001c56: 2203 movs r2, #3
8001c58: 819a strh r2, [r3, #12]
pardata.IKE = 0;
8001c5a: 4b40 ldr r3, [pc, #256] ; (8001d5c <rdPar+0x160>)
8001c5c: 2200 movs r2, #0
8001c5e: 81da strh r2, [r3, #14]
pardata.IKD = 0;
8001c60: 4b3e ldr r3, [pc, #248] ; (8001d5c <rdPar+0x160>)
8001c62: 2200 movs r2, #0
8001c64: 821a strh r2, [r3, #16]
pardata.IKS = 1;
8001c66: 4b3d ldr r3, [pc, #244] ; (8001d5c <rdPar+0x160>)
8001c68: 2201 movs r2, #1
8001c6a: 825a strh r2, [r3, #18]
pardata.IPZ = 0;
8001c6c: 4b3b ldr r3, [pc, #236] ; (8001d5c <rdPar+0x160>)
8001c6e: 2200 movs r2, #0
8001c70: 829a strh r2, [r3, #20]
pardata.OPZ = 0;
8001c72: 4b3a ldr r3, [pc, #232] ; (8001d5c <rdPar+0x160>)
8001c74: 2200 movs r2, #0
8001c76: 82da strh r2, [r3, #22]
pardata.VAL = Accel;
8001c78: 4b38 ldr r3, [pc, #224] ; (8001d5c <rdPar+0x160>)
8001c7a: 2200 movs r2, #0
8001c7c: 831a strh r2, [r3, #24]
pardata.KCOND = 1.00001f;
8001c7e: 4b37 ldr r3, [pc, #220] ; (8001d5c <rdPar+0x160>)
8001c80: 4a38 ldr r2, [pc, #224] ; (8001d64 <rdPar+0x168>)
8001c82: 61da str r2, [r3, #28]
pardata.SENS = 1.00001f;
8001c84: 4b35 ldr r3, [pc, #212] ; (8001d5c <rdPar+0x160>)
8001c86: 4a37 ldr r2, [pc, #220] ; (8001d64 <rdPar+0x168>)
8001c88: 621a str r2, [r3, #32]
pardata.ACCEL = 10.00001f;
8001c8a: 4b34 ldr r3, [pc, #208] ; (8001d5c <rdPar+0x160>)
8001c8c: 4a36 ldr r2, [pc, #216] ; (8001d68 <rdPar+0x16c>)
8001c8e: 625a str r2, [r3, #36] ; 0x24
rewrite = 1;
8001c90: 1dfb adds r3, r7, #7
8001c92: 2201 movs r2, #1
8001c94: 701a strb r2, [r3, #0]
}
if((pardata.IKE == 0) && (pardata.IKD == 0) && (pardata.IKS == 0)) {
8001c96: 4b31 ldr r3, [pc, #196] ; (8001d5c <rdPar+0x160>)
8001c98: 89db ldrh r3, [r3, #14]
8001c9a: b29b uxth r3, r3
8001c9c: 2b00 cmp r3, #0
8001c9e: d115 bne.n 8001ccc <rdPar+0xd0>
8001ca0: 4b2e ldr r3, [pc, #184] ; (8001d5c <rdPar+0x160>)
8001ca2: 8a1b ldrh r3, [r3, #16]
8001ca4: b29b uxth r3, r3
8001ca6: 2b00 cmp r3, #0
8001ca8: d110 bne.n 8001ccc <rdPar+0xd0>
8001caa: 4b2c ldr r3, [pc, #176] ; (8001d5c <rdPar+0x160>)
8001cac: 8a5b ldrh r3, [r3, #18]
8001cae: b29b uxth r3, r3
8001cb0: 2b00 cmp r3, #0
8001cb2: d10b bne.n 8001ccc <rdPar+0xd0>
pardata.IKE = 0;
8001cb4: 4b29 ldr r3, [pc, #164] ; (8001d5c <rdPar+0x160>)
8001cb6: 2200 movs r2, #0
8001cb8: 81da strh r2, [r3, #14]
pardata.IKD = 0;
8001cba: 4b28 ldr r3, [pc, #160] ; (8001d5c <rdPar+0x160>)
8001cbc: 2200 movs r2, #0
8001cbe: 821a strh r2, [r3, #16]
pardata.IKS = 1;
8001cc0: 4b26 ldr r3, [pc, #152] ; (8001d5c <rdPar+0x160>)
8001cc2: 2201 movs r2, #1
8001cc4: 825a strh r2, [r3, #18]
rewrite = true;
8001cc6: 1dfb adds r3, r7, #7
8001cc8: 2201 movs r2, #1
8001cca: 701a strb r2, [r3, #0]
}
if(pardata.SENS == 0.0f) {
8001ccc: 4b23 ldr r3, [pc, #140] ; (8001d5c <rdPar+0x160>)
8001cce: 6a1b ldr r3, [r3, #32]
8001cd0: 2100 movs r1, #0
8001cd2: 1c18 adds r0, r3, #0
8001cd4: f7fe faee bl 80002b4 <__aeabi_fcmpeq>
8001cd8: 1e03 subs r3, r0, #0
8001cda: d006 beq.n 8001cea <rdPar+0xee>
pardata.SENS = 1.0f;
8001cdc: 4b1f ldr r3, [pc, #124] ; (8001d5c <rdPar+0x160>)
8001cde: 22fe movs r2, #254 ; 0xfe
8001ce0: 0592 lsls r2, r2, #22
8001ce2: 621a str r2, [r3, #32]
rewrite = true;
8001ce4: 1dfb adds r3, r7, #7
8001ce6: 2201 movs r2, #1
8001ce8: 701a strb r2, [r3, #0]
}
if(pardata.IFN > Lp100000) {
8001cea: 4b1c ldr r3, [pc, #112] ; (8001d5c <rdPar+0x160>)
8001cec: 895b ldrh r3, [r3, #10]
8001cee: b29b uxth r3, r3
8001cf0: 2b07 cmp r3, #7
8001cf2: d905 bls.n 8001d00 <rdPar+0x104>
pardata.IFN = Lp100000;
8001cf4: 4b19 ldr r3, [pc, #100] ; (8001d5c <rdPar+0x160>)
8001cf6: 2207 movs r2, #7
8001cf8: 815a strh r2, [r3, #10]
rewrite = true;
8001cfa: 1dfb adds r3, r7, #7
8001cfc: 2201 movs r2, #1
8001cfe: 701a strb r2, [r3, #0]
}
if(pardata.IFV > Hp10) {
8001d00: 4b16 ldr r3, [pc, #88] ; (8001d5c <rdPar+0x160>)
8001d02: 891b ldrh r3, [r3, #8]
8001d04: b29b uxth r3, r3
8001d06: 2b04 cmp r3, #4
8001d08: d905 bls.n 8001d16 <rdPar+0x11a>
pardata.IFN = Hp10;
8001d0a: 4b14 ldr r3, [pc, #80] ; (8001d5c <rdPar+0x160>)
8001d0c: 2204 movs r2, #4
8001d0e: 815a strh r2, [r3, #10]
rewrite = true;
8001d10: 1dfb adds r3, r7, #7
8001d12: 2201 movs r2, #1
8001d14: 701a strb r2, [r3, #0]
}
if(pardata.IKU > Ku1000) {
8001d16: 4b11 ldr r3, [pc, #68] ; (8001d5c <rdPar+0x160>)
8001d18: 899b ldrh r3, [r3, #12]
8001d1a: b29b uxth r3, r3
8001d1c: 2b0c cmp r3, #12
8001d1e: d905 bls.n 8001d2c <rdPar+0x130>
pardata.IKU = Ku1000;
8001d20: 4b0e ldr r3, [pc, #56] ; (8001d5c <rdPar+0x160>)
8001d22: 220c movs r2, #12
8001d24: 819a strh r2, [r3, #12]
rewrite = true;
8001d26: 1dfb adds r3, r7, #7
8001d28: 2201 movs r2, #1
8001d2a: 701a strb r2, [r3, #0]
}
if(pardata.VAL > Nython) {
8001d2c: 4b0b ldr r3, [pc, #44] ; (8001d5c <rdPar+0x160>)
8001d2e: 8b1b ldrh r3, [r3, #24]
8001d30: b29b uxth r3, r3
8001d32: 2b05 cmp r3, #5
8001d34: d905 bls.n 8001d42 <rdPar+0x146>
pardata.VAL = Accel;
8001d36: 4b09 ldr r3, [pc, #36] ; (8001d5c <rdPar+0x160>)
8001d38: 2200 movs r2, #0
8001d3a: 831a strh r2, [r3, #24]
rewrite = true;
8001d3c: 1dfb adds r3, r7, #7
8001d3e: 2201 movs r2, #1
8001d40: 701a strb r2, [r3, #0]
}
/////////////////////////////
if(rewrite)
8001d42: 1dfb adds r3, r7, #7
8001d44: 781b ldrb r3, [r3, #0]
8001d46: 2b00 cmp r3, #0
8001d48: d004 beq.n 8001d54 <rdPar+0x158>
{
rewrite = 0;
8001d4a: 1dfb adds r3, r7, #7
8001d4c: 2200 movs r2, #0
8001d4e: 701a strb r2, [r3, #0]
wrPar();
8001d50: f7ff fef6 bl 8001b40 <wrPar>
}
/////////////////////////////
}
8001d54: 46c0 nop ; (mov r8, r8)
8001d56: 46bd mov sp, r7
8001d58: b003 add sp, #12
8001d5a: bd90 pop {r4, r7, pc}
8001d5c: 200000a0 .word 0x200000a0
8001d60: 0801ff00 .word 0x0801ff00
8001d64: 3f800054 .word 0x3f800054
8001d68: 4120000a .word 0x4120000a
08001d6c <wrCorr>:
void wrCorr(void)
{
8001d6c: b580 push {r7, lr}
8001d6e: b084 sub sp, #16
8001d70: af00 add r7, sp, #0
uint8_t i, len;
uint32_t *pData, Address;
len = sizeof(CorrWord);
8001d72: 1cfb adds r3, r7, #3
8001d74: 2250 movs r2, #80 ; 0x50
8001d76: 701a strb r2, [r3, #0]
len >>= 2;
8001d78: 1cfb adds r3, r7, #3
8001d7a: 1cfa adds r2, r7, #3
8001d7c: 7812 ldrb r2, [r2, #0]
8001d7e: 0892 lsrs r2, r2, #2
8001d80: 701a strb r2, [r3, #0]
HAL_FLASH_Unlock();
8001d82: f002 facf bl 8004324 <HAL_FLASH_Unlock>
FLASH_PageErase(CORRPAGE);
8001d86: 4b24 ldr r3, [pc, #144] ; (8001e18 <wrCorr+0xac>)
8001d88: 0018 movs r0, r3
8001d8a: f002 fc3d bl 8004608 <FLASH_PageErase>
CLEAR_BIT(FLASH->PECR, FLASH_PECR_PROG);
8001d8e: 4b23 ldr r3, [pc, #140] ; (8001e1c <wrCorr+0xb0>)
8001d90: 4a22 ldr r2, [pc, #136] ; (8001e1c <wrCorr+0xb0>)
8001d92: 6852 ldr r2, [r2, #4]
8001d94: 2108 movs r1, #8
8001d96: 438a bics r2, r1
8001d98: 605a str r2, [r3, #4]
CLEAR_BIT(FLASH->PECR, FLASH_PECR_ERASE);
8001d9a: 4b20 ldr r3, [pc, #128] ; (8001e1c <wrCorr+0xb0>)
8001d9c: 4a1f ldr r2, [pc, #124] ; (8001e1c <wrCorr+0xb0>)
8001d9e: 6852 ldr r2, [r2, #4]
8001da0: 491f ldr r1, [pc, #124] ; (8001e20 <wrCorr+0xb4>)
8001da2: 400a ands r2, r1
8001da4: 605a str r2, [r3, #4]
FLASH_WaitForLastOperation(100);
8001da6: 2064 movs r0, #100 ; 0x64
8001da8: f002 fb20 bl 80043ec <FLASH_WaitForLastOperation>
Address = CORRPAGE;
8001dac: 4b1a ldr r3, [pc, #104] ; (8001e18 <wrCorr+0xac>)
8001dae: 607b str r3, [r7, #4]
pData = (uint32_t *) &CorrWord;
8001db0: 4b1c ldr r3, [pc, #112] ; (8001e24 <wrCorr+0xb8>)
8001db2: 60bb str r3, [r7, #8]
for(i = 0; i < len; i++)
8001db4: 230f movs r3, #15
8001db6: 18fb adds r3, r7, r3
8001db8: 2200 movs r2, #0
8001dba: 701a strb r2, [r3, #0]
8001dbc: e012 b.n 8001de4 <wrCorr+0x78>
{
HAL_FLASH_Program(FLASH_TYPEPROGRAM_WORD, Address, *pData++);
8001dbe: 68bb ldr r3, [r7, #8]
8001dc0: 1d1a adds r2, r3, #4
8001dc2: 60ba str r2, [r7, #8]
8001dc4: 681a ldr r2, [r3, #0]
8001dc6: 687b ldr r3, [r7, #4]
8001dc8: 0019 movs r1, r3
8001dca: 2002 movs r0, #2
8001dcc: f002 fa6e bl 80042ac <HAL_FLASH_Program>
Address += 4;
8001dd0: 687b ldr r3, [r7, #4]
8001dd2: 3304 adds r3, #4
8001dd4: 607b str r3, [r7, #4]
for(i = 0; i < len; i++)
8001dd6: 230f movs r3, #15
8001dd8: 18fb adds r3, r7, r3
8001dda: 781a ldrb r2, [r3, #0]
8001ddc: 230f movs r3, #15
8001dde: 18fb adds r3, r7, r3
8001de0: 3201 adds r2, #1
8001de2: 701a strb r2, [r3, #0]
8001de4: 230f movs r3, #15
8001de6: 18fa adds r2, r7, r3
8001de8: 1cfb adds r3, r7, #3
8001dea: 7812 ldrb r2, [r2, #0]
8001dec: 781b ldrb r3, [r3, #0]
8001dee: 429a cmp r2, r3
8001df0: d3e5 bcc.n 8001dbe <wrCorr+0x52>
}
CLEAR_BIT(FLASH->PECR, FLASH_PECR_PROG);
8001df2: 4b0a ldr r3, [pc, #40] ; (8001e1c <wrCorr+0xb0>)
8001df4: 4a09 ldr r2, [pc, #36] ; (8001e1c <wrCorr+0xb0>)
8001df6: 6852 ldr r2, [r2, #4]
8001df8: 2108 movs r1, #8
8001dfa: 438a bics r2, r1
8001dfc: 605a str r2, [r3, #4]
CLEAR_BIT(FLASH->PECR, FLASH_PECR_ERASE);
8001dfe: 4b07 ldr r3, [pc, #28] ; (8001e1c <wrCorr+0xb0>)
8001e00: 4a06 ldr r2, [pc, #24] ; (8001e1c <wrCorr+0xb0>)
8001e02: 6852 ldr r2, [r2, #4]
8001e04: 4906 ldr r1, [pc, #24] ; (8001e20 <wrCorr+0xb4>)
8001e06: 400a ands r2, r1
8001e08: 605a str r2, [r3, #4]
HAL_FLASH_Lock();
8001e0a: f002 fadb bl 80043c4 <HAL_FLASH_Lock>
}
8001e0e: 46c0 nop ; (mov r8, r8)
8001e10: 46bd mov sp, r7
8001e12: b004 add sp, #16
8001e14: bd80 pop {r7, pc}
8001e16: 46c0 nop ; (mov r8, r8)
8001e18: 0801ff80 .word 0x0801ff80
8001e1c: 40022000 .word 0x40022000
8001e20: fffffdff .word 0xfffffdff
8001e24: 20000050 .word 0x20000050
08001e28 <rdCorr>:
void rdCorr(void)
{
8001e28: b5b0 push {r4, r5, r7, lr}
8001e2a: b082 sub sp, #8
8001e2c: af00 add r7, sp, #0
uint8_t i, j;
memcpy((void *) &CorrWord, (void *) CORRPAGE, sizeof(CorrWord));
8001e2e: 4b2b ldr r3, [pc, #172] ; (8001edc <rdCorr+0xb4>)
8001e30: 4a2b ldr r2, [pc, #172] ; (8001ee0 <rdCorr+0xb8>)
8001e32: 0018 movs r0, r3
8001e34: 0011 movs r1, r2
8001e36: 2350 movs r3, #80 ; 0x50
8001e38: 001a movs r2, r3
8001e3a: f005 f8d5 bl 8006fe8 <memcpy>
if(((CorrWord[0][0] == 0xffff) || (CorrWord[0][1] == 0xffff)) || ((CorrWord[0][0] == 0) || (CorrWord[0][1] == 0)))
8001e3e: 4b27 ldr r3, [pc, #156] ; (8001edc <rdCorr+0xb4>)
8001e40: 881b ldrh r3, [r3, #0]
8001e42: b29b uxth r3, r3
8001e44: 4a27 ldr r2, [pc, #156] ; (8001ee4 <rdCorr+0xbc>)
8001e46: 4293 cmp r3, r2
8001e48: d00f beq.n 8001e6a <rdCorr+0x42>
8001e4a: 4b24 ldr r3, [pc, #144] ; (8001edc <rdCorr+0xb4>)
8001e4c: 885b ldrh r3, [r3, #2]
8001e4e: b29b uxth r3, r3
8001e50: 4a24 ldr r2, [pc, #144] ; (8001ee4 <rdCorr+0xbc>)
8001e52: 4293 cmp r3, r2
8001e54: d009 beq.n 8001e6a <rdCorr+0x42>
8001e56: 4b21 ldr r3, [pc, #132] ; (8001edc <rdCorr+0xb4>)
8001e58: 881b ldrh r3, [r3, #0]
8001e5a: b29b uxth r3, r3
8001e5c: 2b00 cmp r3, #0
8001e5e: d004 beq.n 8001e6a <rdCorr+0x42>
8001e60: 4b1e ldr r3, [pc, #120] ; (8001edc <rdCorr+0xb4>)
8001e62: 885b ldrh r3, [r3, #2]
8001e64: b29b uxth r3, r3
8001e66: 2b00 cmp r3, #0
8001e68: d134 bne.n 8001ed4 <rdCorr+0xac>
{
for(j = 0; j < 2; j++)
8001e6a: 1dbb adds r3, r7, #6
8001e6c: 2200 movs r2, #0
8001e6e: 701a strb r2, [r3, #0]
8001e70: e02a b.n 8001ec8 <rdCorr+0xa0>
{
for(i = 0; i < 20; i++) {
8001e72: 1dfb adds r3, r7, #7
8001e74: 2200 movs r2, #0
8001e76: 701a strb r2, [r3, #0]
8001e78: e01d b.n 8001eb6 <rdCorr+0x8e>
CorrWord[j][i] = FACTORY_CORR[j][i];
8001e7a: 1dbb adds r3, r7, #6
8001e7c: 781a ldrb r2, [r3, #0]
8001e7e: 1dfb adds r3, r7, #7
8001e80: 7818 ldrb r0, [r3, #0]
8001e82: 1dbb adds r3, r7, #6
8001e84: 7819 ldrb r1, [r3, #0]
8001e86: 1dfb adds r3, r7, #7
8001e88: 781d ldrb r5, [r3, #0]
8001e8a: 4c17 ldr r4, [pc, #92] ; (8001ee8 <rdCorr+0xc0>)
8001e8c: 000b movs r3, r1
8001e8e: 009b lsls r3, r3, #2
8001e90: 185b adds r3, r3, r1
8001e92: 009b lsls r3, r3, #2
8001e94: 195b adds r3, r3, r5
8001e96: 005b lsls r3, r3, #1
8001e98: 5b1c ldrh r4, [r3, r4]
8001e9a: 4910 ldr r1, [pc, #64] ; (8001edc <rdCorr+0xb4>)
8001e9c: 0013 movs r3, r2
8001e9e: 009b lsls r3, r3, #2
8001ea0: 189b adds r3, r3, r2
8001ea2: 009b lsls r3, r3, #2
8001ea4: 181b adds r3, r3, r0
8001ea6: 005b lsls r3, r3, #1
8001ea8: 1c22 adds r2, r4, #0
8001eaa: 525a strh r2, [r3, r1]
for(i = 0; i < 20; i++) {
8001eac: 1dfb adds r3, r7, #7
8001eae: 781a ldrb r2, [r3, #0]
8001eb0: 1dfb adds r3, r7, #7
8001eb2: 3201 adds r2, #1
8001eb4: 701a strb r2, [r3, #0]
8001eb6: 1dfb adds r3, r7, #7
8001eb8: 781b ldrb r3, [r3, #0]
8001eba: 2b13 cmp r3, #19
8001ebc: d9dd bls.n 8001e7a <rdCorr+0x52>
for(j = 0; j < 2; j++)
8001ebe: 1dbb adds r3, r7, #6
8001ec0: 781a ldrb r2, [r3, #0]
8001ec2: 1dbb adds r3, r7, #6
8001ec4: 3201 adds r2, #1
8001ec6: 701a strb r2, [r3, #0]
8001ec8: 1dbb adds r3, r7, #6
8001eca: 781b ldrb r3, [r3, #0]
8001ecc: 2b01 cmp r3, #1
8001ece: d9d0 bls.n 8001e72 <rdCorr+0x4a>
}
}
wrCorr();
8001ed0: f7ff ff4c bl 8001d6c <wrCorr>
}
}
8001ed4: 46c0 nop ; (mov r8, r8)
8001ed6: 46bd mov sp, r7
8001ed8: b002 add sp, #8
8001eda: bdb0 pop {r4, r5, r7, pc}
8001edc: 20000050 .word 0x20000050
8001ee0: 0801ff80 .word 0x0801ff80
8001ee4: 0000ffff .word 0x0000ffff
8001ee8: 080071a8 .word 0x080071a8
08001eec <MX_GPIO_Init>:
* Output
* EVENT_OUT
* EXTI
*/
void MX_GPIO_Init(void)
{
8001eec: b580 push {r7, lr}
8001eee: b088 sub sp, #32
8001ef0: af00 add r7, sp, #0
GPIO_InitTypeDef GPIO_InitStruct = {0};
8001ef2: 230c movs r3, #12
8001ef4: 18fb adds r3, r7, r3
8001ef6: 0018 movs r0, r3
8001ef8: 2314 movs r3, #20
8001efa: 001a movs r2, r3
8001efc: 2100 movs r1, #0
8001efe: f005 f87c bl 8006ffa <memset>
/* GPIO Ports Clock Enable */
__HAL_RCC_GPIOA_CLK_ENABLE();
8001f02: 4b52 ldr r3, [pc, #328] ; (800204c <MX_GPIO_Init+0x160>)
8001f04: 4a51 ldr r2, [pc, #324] ; (800204c <MX_GPIO_Init+0x160>)
8001f06: 6ad2 ldr r2, [r2, #44] ; 0x2c
8001f08: 2101 movs r1, #1
8001f0a: 430a orrs r2, r1
8001f0c: 62da str r2, [r3, #44] ; 0x2c
8001f0e: 4b4f ldr r3, [pc, #316] ; (800204c <MX_GPIO_Init+0x160>)
8001f10: 6adb ldr r3, [r3, #44] ; 0x2c
8001f12: 2201 movs r2, #1
8001f14: 4013 ands r3, r2
8001f16: 60bb str r3, [r7, #8]
8001f18: 68bb ldr r3, [r7, #8]
__HAL_RCC_GPIOB_CLK_ENABLE();
8001f1a: 4b4c ldr r3, [pc, #304] ; (800204c <MX_GPIO_Init+0x160>)
8001f1c: 4a4b ldr r2, [pc, #300] ; (800204c <MX_GPIO_Init+0x160>)
8001f1e: 6ad2 ldr r2, [r2, #44] ; 0x2c
8001f20: 2102 movs r1, #2
8001f22: 430a orrs r2, r1
8001f24: 62da str r2, [r3, #44] ; 0x2c
8001f26: 4b49 ldr r3, [pc, #292] ; (800204c <MX_GPIO_Init+0x160>)
8001f28: 6adb ldr r3, [r3, #44] ; 0x2c
8001f2a: 2202 movs r2, #2
8001f2c: 4013 ands r3, r2
8001f2e: 607b str r3, [r7, #4]
8001f30: 687b ldr r3, [r7, #4]
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(GPIOA, PER_Pin|RE_Pin, GPIO_PIN_RESET);
8001f32: 2388 movs r3, #136 ; 0x88
8001f34: 0059 lsls r1, r3, #1
8001f36: 23a0 movs r3, #160 ; 0xa0
8001f38: 05db lsls r3, r3, #23
8001f3a: 2200 movs r2, #0
8001f3c: 0018 movs r0, r3
8001f3e: f002 fe04 bl 8004b4a <HAL_GPIO_WritePin>
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(GPIOB, A0_Pin|A1_Pin|A2_Pin|A10_Pin
8001f42: 4943 ldr r1, [pc, #268] ; (8002050 <MX_GPIO_Init+0x164>)
8001f44: 4b43 ldr r3, [pc, #268] ; (8002054 <MX_GPIO_Init+0x168>)
8001f46: 2200 movs r2, #0
8001f48: 0018 movs r0, r3
8001f4a: f002 fdfe bl 8004b4a <HAL_GPIO_WritePin>
|A11_Pin|A12_Pin|A3_Pin|A4_Pin
|A5_Pin|A6_Pin|A7_Pin|A8_Pin
|A9_Pin, GPIO_PIN_RESET);
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(GPIOB, FL_Pin|STD_Pin|SCK_Pin, GPIO_PIN_SET);
8001f4e: 23e0 movs r3, #224 ; 0xe0
8001f50: 021b lsls r3, r3, #8
8001f52: 4840 ldr r0, [pc, #256] ; (8002054 <MX_GPIO_Init+0x168>)
8001f54: 2201 movs r2, #1
8001f56: 0019 movs r1, r3
8001f58: f002 fdf7 bl 8004b4a <HAL_GPIO_WritePin>
/*Configure GPIO pin : PtPin */
GPIO_InitStruct.Pin = PER_Pin;
8001f5c: 230c movs r3, #12
8001f5e: 18fb adds r3, r7, r3
8001f60: 2210 movs r2, #16
8001f62: 601a str r2, [r3, #0]
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
8001f64: 230c movs r3, #12
8001f66: 18fb adds r3, r7, r3
8001f68: 2201 movs r2, #1
8001f6a: 605a str r2, [r3, #4]
GPIO_InitStruct.Pull = GPIO_NOPULL;
8001f6c: 230c movs r3, #12
8001f6e: 18fb adds r3, r7, r3
8001f70: 2200 movs r2, #0
8001f72: 609a str r2, [r3, #8]
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
8001f74: 230c movs r3, #12
8001f76: 18fb adds r3, r7, r3
8001f78: 2202 movs r2, #2
8001f7a: 60da str r2, [r3, #12]
HAL_GPIO_Init(PER_GPIO_Port, &GPIO_InitStruct);
8001f7c: 230c movs r3, #12
8001f7e: 18fa adds r2, r7, r3
8001f80: 23a0 movs r3, #160 ; 0xa0
8001f82: 05db lsls r3, r3, #23
8001f84: 0011 movs r1, r2
8001f86: 0018 movs r0, r3
8001f88: f002 fb60 bl 800464c <HAL_GPIO_Init>
/*Configure GPIO pins : PBPin PBPin PBPin PBPin
PBPin PBPin PBPin PBPin
PBPin PBPin PBPin PBPin
PBPin */
GPIO_InitStruct.Pin = A0_Pin|A1_Pin|A2_Pin|A10_Pin
8001f8c: 230c movs r3, #12
8001f8e: 18fb adds r3, r7, r3
8001f90: 4a2f ldr r2, [pc, #188] ; (8002050 <MX_GPIO_Init+0x164>)
8001f92: 601a str r2, [r3, #0]
|A11_Pin|A12_Pin|A3_Pin|A4_Pin
|A5_Pin|A6_Pin|A7_Pin|A8_Pin
|A9_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
8001f94: 230c movs r3, #12
8001f96: 18fb adds r3, r7, r3
8001f98: 2201 movs r2, #1
8001f9a: 605a str r2, [r3, #4]
GPIO_InitStruct.Pull = GPIO_NOPULL;
8001f9c: 230c movs r3, #12
8001f9e: 18fb adds r3, r7, r3
8001fa0: 2200 movs r2, #0
8001fa2: 609a str r2, [r3, #8]
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
8001fa4: 230c movs r3, #12
8001fa6: 18fb adds r3, r7, r3
8001fa8: 2200 movs r2, #0
8001faa: 60da str r2, [r3, #12]
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
8001fac: 230c movs r3, #12
8001fae: 18fb adds r3, r7, r3
8001fb0: 4a28 ldr r2, [pc, #160] ; (8002054 <MX_GPIO_Init+0x168>)
8001fb2: 0019 movs r1, r3
8001fb4: 0010 movs r0, r2
8001fb6: f002 fb49 bl 800464c <HAL_GPIO_Init>
/*Configure GPIO pins : PBPin PBPin PBPin */
GPIO_InitStruct.Pin = FL_Pin|STD_Pin|SCK_Pin;
8001fba: 230c movs r3, #12
8001fbc: 18fb adds r3, r7, r3
8001fbe: 22e0 movs r2, #224 ; 0xe0
8001fc0: 0212 lsls r2, r2, #8
8001fc2: 601a str r2, [r3, #0]
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
8001fc4: 230c movs r3, #12
8001fc6: 18fb adds r3, r7, r3
8001fc8: 2201 movs r2, #1
8001fca: 605a str r2, [r3, #4]
GPIO_InitStruct.Pull = GPIO_NOPULL;
8001fcc: 230c movs r3, #12
8001fce: 18fb adds r3, r7, r3
8001fd0: 2200 movs r2, #0
8001fd2: 609a str r2, [r3, #8]
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
8001fd4: 230c movs r3, #12
8001fd6: 18fb adds r3, r7, r3
8001fd8: 2203 movs r2, #3
8001fda: 60da str r2, [r3, #12]
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
8001fdc: 230c movs r3, #12
8001fde: 18fb adds r3, r7, r3
8001fe0: 4a1c ldr r2, [pc, #112] ; (8002054 <MX_GPIO_Init+0x168>)
8001fe2: 0019 movs r1, r3
8001fe4: 0010 movs r0, r2
8001fe6: f002 fb31 bl 800464c <HAL_GPIO_Init>
/*Configure GPIO pin : PtPin */
GPIO_InitStruct.Pin = RE_Pin;
8001fea: 230c movs r3, #12
8001fec: 18fb adds r3, r7, r3
8001fee: 2280 movs r2, #128 ; 0x80
8001ff0: 0052 lsls r2, r2, #1
8001ff2: 601a str r2, [r3, #0]
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
8001ff4: 230c movs r3, #12
8001ff6: 18fb adds r3, r7, r3
8001ff8: 2201 movs r2, #1
8001ffa: 605a str r2, [r3, #4]
GPIO_InitStruct.Pull = GPIO_NOPULL;
8001ffc: 230c movs r3, #12
8001ffe: 18fb adds r3, r7, r3
8002000: 2200 movs r2, #0
8002002: 609a str r2, [r3, #8]
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
8002004: 230c movs r3, #12
8002006: 18fb adds r3, r7, r3
8002008: 2203 movs r2, #3
800200a: 60da str r2, [r3, #12]
HAL_GPIO_Init(RE_GPIO_Port, &GPIO_InitStruct);
800200c: 230c movs r3, #12
800200e: 18fa adds r2, r7, r3
8002010: 23a0 movs r3, #160 ; 0xa0
8002012: 05db lsls r3, r3, #23
8002014: 0011 movs r1, r2
8002016: 0018 movs r0, r3
8002018: f002 fb18 bl 800464c <HAL_GPIO_Init>
/*Configure GPIO pins : PAPin PAPin PAPin */
GPIO_InitStruct.Pin = UPER_Pin|OP_Pin|KZ_Pin;
800201c: 230c movs r3, #12
800201e: 18fb adds r3, r7, r3
8002020: 2207 movs r2, #7
8002022: 601a str r2, [r3, #0]
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
8002024: 230c movs r3, #12
8002026: 18fb adds r3, r7, r3
8002028: 2200 movs r2, #0
800202a: 605a str r2, [r3, #4]
GPIO_InitStruct.Pull = GPIO_NOPULL;
800202c: 230c movs r3, #12
800202e: 18fb adds r3, r7, r3
8002030: 2200 movs r2, #0
8002032: 609a str r2, [r3, #8]
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
8002034: 230c movs r3, #12
8002036: 18fa adds r2, r7, r3
8002038: 23a0 movs r3, #160 ; 0xa0
800203a: 05db lsls r3, r3, #23
800203c: 0011 movs r1, r2
800203e: 0018 movs r0, r3
8002040: f002 fb04 bl 800464c <HAL_GPIO_Init>
HAL_NVIC_SetPriority(EXTI0_1_IRQn, 4, 0); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> <20><><EFBFBD> <20><><EFBFBD><EFBFBD>, <20><><EFBFBD> <20><> <20><><EFBFBD> <20><> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>
HAL_NVIC_EnableIRQ(EXTI0_1_IRQn);
HAL_NVIC_SetPriority(EXTI2_3_IRQn, 4, 0); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> <20><><EFBFBD> <20><><EFBFBD><EFBFBD>, <20><><EFBFBD> <20><> <20><><EFBFBD> <20><> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>
HAL_NVIC_EnableIRQ(EXTI2_3_IRQn);
*/
}
8002044: 46c0 nop ; (mov r8, r8)
8002046: 46bd mov sp, r7
8002048: b008 add sp, #32
800204a: bd80 pop {r7, pc}
800204c: 40021000 .word 0x40021000
8002050: 00001fff .word 0x00001fff
8002054: 50000400 .word 0x50000400
08002058 <main>:
/**
* @brief The application entry point.
* @retval int
*/
int main(void)
{
8002058: b580 push {r7, lr}
800205a: af00 add r7, sp, #0
HAL_Init();
800205c: f001 ff1e bl 8003e9c <HAL_Init>
SystemClock_Config();
8002060: f000 f836 bl 80020d0 <SystemClock_Config>
MX_GPIO_Init();
8002064: f7ff ff42 bl 8001eec <MX_GPIO_Init>
MX_FLASH_Init();
8002068: f7ff fd58 bl 8001b1c <MX_FLASH_Init>
MX_TIM7_Init();
800206c: f000 f960 bl 8002330 <MX_TIM7_Init>
//pardata.OWN = 4; // was defined in my.h
SetAndCorrect();
8002070: f7ff f8fe bl 8001270 <SetAndCorrect>
MX_USART1_UART_Init();
8002074: f000 f9d2 bl 800241c <MX_USART1_UART_Init>
while (1)
{
if(needClbr)
8002078: 4b12 ldr r3, [pc, #72] ; (80020c4 <main+0x6c>)
800207a: 781b ldrb r3, [r3, #0]
800207c: b2db uxtb r3, r3
800207e: 2b00 cmp r3, #0
8002080: d004 beq.n 800208c <main+0x34>
{
needClbr = false;
8002082: 4b10 ldr r3, [pc, #64] ; (80020c4 <main+0x6c>)
8002084: 2200 movs r2, #0
8002086: 701a strb r2, [r3, #0]
initCalibr();
8002088: f7ff fc1e bl 80018c8 <initCalibr>
}
if(needSave)
800208c: 4b0e ldr r3, [pc, #56] ; (80020c8 <main+0x70>)
800208e: 781b ldrb r3, [r3, #0]
8002090: b2db uxtb r3, r3
8002092: 2b00 cmp r3, #0
8002094: d006 beq.n 80020a4 <main+0x4c>
{
needSave = false;
8002096: 4b0c ldr r3, [pc, #48] ; (80020c8 <main+0x70>)
8002098: 2200 movs r2, #0
800209a: 701a strb r2, [r3, #0]
SetAndCorrect();
800209c: f7ff f8e8 bl 8001270 <SetAndCorrect>
wrPar();
80020a0: f7ff fd4e bl 8001b40 <wrPar>
}
if(needCorr)
80020a4: 4b09 ldr r3, [pc, #36] ; (80020cc <main+0x74>)
80020a6: 781b ldrb r3, [r3, #0]
80020a8: b2db uxtb r3, r3
80020aa: 2b00 cmp r3, #0
80020ac: d006 beq.n 80020bc <main+0x64>
{
needCorr = false;
80020ae: 4b07 ldr r3, [pc, #28] ; (80020cc <main+0x74>)
80020b0: 2200 movs r2, #0
80020b2: 701a strb r2, [r3, #0]
SetAndCorrect();
80020b4: f7ff f8dc bl 8001270 <SetAndCorrect>
wrCorr();
80020b8: f7ff fe58 bl 8001d6c <wrCorr>
}
HAL_GPIO_EXTI_Callback(0); // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
80020bc: 2000 movs r0, #0
80020be: f001 fe63 bl 8003d88 <HAL_GPIO_EXTI_Callback>
if(needClbr)
80020c2: e7d9 b.n 8002078 <main+0x20>
80020c4: 20000034 .word 0x20000034
80020c8: 2000003f .word 0x2000003f
80020cc: 20000040 .word 0x20000040
080020d0 <SystemClock_Config>:
/**
* @brief System Clock Configuration
* @retval None
*/
void SystemClock_Config(void)
{
80020d0: b580 push {r7, lr}
80020d2: b09c sub sp, #112 ; 0x70
80020d4: af00 add r7, sp, #0
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
80020d6: 2338 movs r3, #56 ; 0x38
80020d8: 18fb adds r3, r7, r3
80020da: 0018 movs r0, r3
80020dc: 2338 movs r3, #56 ; 0x38
80020de: 001a movs r2, r3
80020e0: 2100 movs r1, #0
80020e2: f004 ff8a bl 8006ffa <memset>
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
80020e6: 2324 movs r3, #36 ; 0x24
80020e8: 18fb adds r3, r7, r3
80020ea: 0018 movs r0, r3
80020ec: 2314 movs r3, #20
80020ee: 001a movs r2, r3
80020f0: 2100 movs r1, #0
80020f2: f004 ff82 bl 8006ffa <memset>
RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
80020f6: 003b movs r3, r7
80020f8: 0018 movs r0, r3
80020fa: 2324 movs r3, #36 ; 0x24
80020fc: 001a movs r2, r3
80020fe: 2100 movs r1, #0
8002100: f004 ff7b bl 8006ffa <memset>
/** Configure the main internal regulator output voltage
*/
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
8002104: 4b2f ldr r3, [pc, #188] ; (80021c4 <SystemClock_Config+0xf4>)
8002106: 4a2f ldr r2, [pc, #188] ; (80021c4 <SystemClock_Config+0xf4>)
8002108: 6812 ldr r2, [r2, #0]
800210a: 492f ldr r1, [pc, #188] ; (80021c8 <SystemClock_Config+0xf8>)
800210c: 400a ands r2, r1
800210e: 2180 movs r1, #128 ; 0x80
8002110: 0109 lsls r1, r1, #4
8002112: 430a orrs r2, r1
8002114: 601a str r2, [r3, #0]
/** Initializes the RCC Oscillators according to the specified parameters
* in the RCC_OscInitTypeDef structure.
*/
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
8002116: 2338 movs r3, #56 ; 0x38
8002118: 18fb adds r3, r7, r3
800211a: 2202 movs r2, #2
800211c: 601a str r2, [r3, #0]
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
800211e: 2338 movs r3, #56 ; 0x38
8002120: 18fb adds r3, r7, r3
8002122: 2201 movs r2, #1
8002124: 60da str r2, [r3, #12]
RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
8002126: 2338 movs r3, #56 ; 0x38
8002128: 18fb adds r3, r7, r3
800212a: 2210 movs r2, #16
800212c: 611a str r2, [r3, #16]
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
800212e: 2338 movs r3, #56 ; 0x38
8002130: 18fb adds r3, r7, r3
8002132: 2202 movs r2, #2
8002134: 629a str r2, [r3, #40] ; 0x28
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
8002136: 2338 movs r3, #56 ; 0x38
8002138: 18fb adds r3, r7, r3
800213a: 2200 movs r2, #0
800213c: 62da str r2, [r3, #44] ; 0x2c
RCC_OscInitStruct.PLL.PLLMUL = RCC_PLLMUL_3;
800213e: 2338 movs r3, #56 ; 0x38
8002140: 18fb adds r3, r7, r3
8002142: 2200 movs r2, #0
8002144: 631a str r2, [r3, #48] ; 0x30
RCC_OscInitStruct.PLL.PLLDIV = RCC_PLLDIV_3;
8002146: 2338 movs r3, #56 ; 0x38
8002148: 18fb adds r3, r7, r3
800214a: 2280 movs r2, #128 ; 0x80
800214c: 0412 lsls r2, r2, #16
800214e: 635a str r2, [r3, #52] ; 0x34
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
8002150: 2338 movs r3, #56 ; 0x38
8002152: 18fb adds r3, r7, r3
8002154: 0018 movs r0, r3
8002156: f002 fd31 bl 8004bbc <HAL_RCC_OscConfig>
800215a: 1e03 subs r3, r0, #0
800215c: d001 beq.n 8002162 <SystemClock_Config+0x92>
{
Error_Handler();
800215e: f000 f835 bl 80021cc <Error_Handler>
}
/** Initializes the CPU, AHB and APB buses clocks
*/
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
8002162: 2324 movs r3, #36 ; 0x24
8002164: 18fb adds r3, r7, r3
8002166: 220f movs r2, #15
8002168: 601a str r2, [r3, #0]
|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
800216a: 2324 movs r3, #36 ; 0x24
800216c: 18fb adds r3, r7, r3
800216e: 2203 movs r2, #3
8002170: 605a str r2, [r3, #4]
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV2;
8002172: 2324 movs r3, #36 ; 0x24
8002174: 18fb adds r3, r7, r3
8002176: 2280 movs r2, #128 ; 0x80
8002178: 609a str r2, [r3, #8]
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
800217a: 2324 movs r3, #36 ; 0x24
800217c: 18fb adds r3, r7, r3
800217e: 2200 movs r2, #0
8002180: 60da str r2, [r3, #12]
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
8002182: 2324 movs r3, #36 ; 0x24
8002184: 18fb adds r3, r7, r3
8002186: 2200 movs r2, #0
8002188: 611a str r2, [r3, #16]
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK)
800218a: 2324 movs r3, #36 ; 0x24
800218c: 18fb adds r3, r7, r3
800218e: 2100 movs r1, #0
8002190: 0018 movs r0, r3
8002192: f003 f8e5 bl 8005360 <HAL_RCC_ClockConfig>
8002196: 1e03 subs r3, r0, #0
8002198: d001 beq.n 800219e <SystemClock_Config+0xce>
{
Error_Handler();
800219a: f000 f817 bl 80021cc <Error_Handler>
}
PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USART1;
800219e: 003b movs r3, r7
80021a0: 2201 movs r2, #1
80021a2: 601a str r2, [r3, #0]
PeriphClkInit.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2;
80021a4: 003b movs r3, r7
80021a6: 2200 movs r2, #0
80021a8: 609a str r2, [r3, #8]
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
80021aa: 003b movs r3, r7
80021ac: 0018 movs r0, r3
80021ae: f003 faf7 bl 80057a0 <HAL_RCCEx_PeriphCLKConfig>
80021b2: 1e03 subs r3, r0, #0
80021b4: d001 beq.n 80021ba <SystemClock_Config+0xea>
{
Error_Handler();
80021b6: f000 f809 bl 80021cc <Error_Handler>
}
}
80021ba: 46c0 nop ; (mov r8, r8)
80021bc: 46bd mov sp, r7
80021be: b01c add sp, #112 ; 0x70
80021c0: bd80 pop {r7, pc}
80021c2: 46c0 nop ; (mov r8, r8)
80021c4: 40007000 .word 0x40007000
80021c8: ffffe7ff .word 0xffffe7ff
080021cc <Error_Handler>:
/**
* @brief This function is executed in case of error occurrence.
* @retval None
*/
void Error_Handler(void)
{
80021cc: b580 push {r7, lr}
80021ce: af00 add r7, sp, #0
\details Disables IRQ interrupts by setting the I-bit in the CPSR.
Can only be executed in Privileged modes.
*/
__STATIC_FORCEINLINE void __disable_irq(void)
{
__ASM volatile ("cpsid i" : : : "memory");
80021d0: b672 cpsid i
/* USER CODE BEGIN Error_Handler_Debug */
/* User can add his own implementation to report the HAL error return state */
__disable_irq();
while (1)
80021d2: e7fe b.n 80021d2 <Error_Handler+0x6>
080021d4 <HAL_MspInit>:
/* USER CODE END 0 */
/**
* Initializes the Global MSP.
*/
void HAL_MspInit(void)
{
80021d4: b580 push {r7, lr}
80021d6: af00 add r7, sp, #0
/* USER CODE BEGIN MspInit 0 */
/* USER CODE END MspInit 0 */
__HAL_RCC_SYSCFG_CLK_ENABLE();
80021d8: 4b07 ldr r3, [pc, #28] ; (80021f8 <HAL_MspInit+0x24>)
80021da: 4a07 ldr r2, [pc, #28] ; (80021f8 <HAL_MspInit+0x24>)
80021dc: 6b52 ldr r2, [r2, #52] ; 0x34
80021de: 2101 movs r1, #1
80021e0: 430a orrs r2, r1
80021e2: 635a str r2, [r3, #52] ; 0x34
__HAL_RCC_PWR_CLK_ENABLE();
80021e4: 4b04 ldr r3, [pc, #16] ; (80021f8 <HAL_MspInit+0x24>)
80021e6: 4a04 ldr r2, [pc, #16] ; (80021f8 <HAL_MspInit+0x24>)
80021e8: 6b92 ldr r2, [r2, #56] ; 0x38
80021ea: 2180 movs r1, #128 ; 0x80
80021ec: 0549 lsls r1, r1, #21
80021ee: 430a orrs r2, r1
80021f0: 639a str r2, [r3, #56] ; 0x38
/* System interrupt init*/
/* USER CODE BEGIN MspInit 1 */
/* USER CODE END MspInit 1 */
}
80021f2: 46c0 nop ; (mov r8, r8)
80021f4: 46bd mov sp, r7
80021f6: bd80 pop {r7, pc}
80021f8: 40021000 .word 0x40021000
080021fc <NMI_Handler>:
/******************************************************************************/
/**
* @brief This function handles Non maskable Interrupt.
*/
void NMI_Handler(void)
{
80021fc: b580 push {r7, lr}
80021fe: af00 add r7, sp, #0
/* USER CODE BEGIN NonMaskableInt_IRQn 0 */
/* USER CODE END NonMaskableInt_IRQn 0 */
/* USER CODE BEGIN NonMaskableInt_IRQn 1 */
while (1)
8002200: e7fe b.n 8002200 <NMI_Handler+0x4>
08002202 <HardFault_Handler>:
/**
* @brief This function handles Hard fault interrupt.
*/
void HardFault_Handler(void)
{
8002202: b580 push {r7, lr}
8002204: af00 add r7, sp, #0
/* USER CODE BEGIN HardFault_IRQn 0 */
/* USER CODE END HardFault_IRQn 0 */
while (1)
8002206: e7fe b.n 8002206 <HardFault_Handler+0x4>
08002208 <SVC_Handler>:
/**
* @brief This function handles System service call via SWI instruction.
*/
void SVC_Handler(void)
{
8002208: b580 push {r7, lr}
800220a: af00 add r7, sp, #0
/* USER CODE END SVC_IRQn 0 */
/* USER CODE BEGIN SVC_IRQn 1 */
/* USER CODE END SVC_IRQn 1 */
}
800220c: 46c0 nop ; (mov r8, r8)
800220e: 46bd mov sp, r7
8002210: bd80 pop {r7, pc}
08002212 <PendSV_Handler>:
/**
* @brief This function handles Pendable request for system service.
*/
void PendSV_Handler(void)
{
8002212: b580 push {r7, lr}
8002214: af00 add r7, sp, #0
/* USER CODE END PendSV_IRQn 0 */
/* USER CODE BEGIN PendSV_IRQn 1 */
/* USER CODE END PendSV_IRQn 1 */
}
8002216: 46c0 nop ; (mov r8, r8)
8002218: 46bd mov sp, r7
800221a: bd80 pop {r7, pc}
0800221c <SysTick_Handler>:
/**
* @brief This function handles System tick timer.
*/
void SysTick_Handler(void)
{
800221c: b580 push {r7, lr}
800221e: af00 add r7, sp, #0
/* USER CODE BEGIN SysTick_IRQn 0 */
/* USER CODE END SysTick_IRQn 0 */
HAL_IncTick();
8002220: f001 fe90 bl 8003f44 <HAL_IncTick>
if(timerUPER)
8002224: 4b26 ldr r3, [pc, #152] ; (80022c0 <SysTick_Handler+0xa4>)
8002226: 881b ldrh r3, [r3, #0]
8002228: 2b00 cmp r3, #0
800222a: d005 beq.n 8002238 <SysTick_Handler+0x1c>
timerUPER--;
800222c: 4b24 ldr r3, [pc, #144] ; (80022c0 <SysTick_Handler+0xa4>)
800222e: 881b ldrh r3, [r3, #0]
8002230: 3b01 subs r3, #1
8002232: b29a uxth r2, r3
8002234: 4b22 ldr r3, [pc, #136] ; (80022c0 <SysTick_Handler+0xa4>)
8002236: 801a strh r2, [r3, #0]
if(timerOP)
8002238: 4b22 ldr r3, [pc, #136] ; (80022c4 <SysTick_Handler+0xa8>)
800223a: 881b ldrh r3, [r3, #0]
800223c: 2b00 cmp r3, #0
800223e: d005 beq.n 800224c <SysTick_Handler+0x30>
timerOP--;
8002240: 4b20 ldr r3, [pc, #128] ; (80022c4 <SysTick_Handler+0xa8>)
8002242: 881b ldrh r3, [r3, #0]
8002244: 3b01 subs r3, #1
8002246: b29a uxth r2, r3
8002248: 4b1e ldr r3, [pc, #120] ; (80022c4 <SysTick_Handler+0xa8>)
800224a: 801a strh r2, [r3, #0]
if(timerKZ)
800224c: 4b1e ldr r3, [pc, #120] ; (80022c8 <SysTick_Handler+0xac>)
800224e: 881b ldrh r3, [r3, #0]
8002250: 2b00 cmp r3, #0
8002252: d005 beq.n 8002260 <SysTick_Handler+0x44>
timerKZ--;
8002254: 4b1c ldr r3, [pc, #112] ; (80022c8 <SysTick_Handler+0xac>)
8002256: 881b ldrh r3, [r3, #0]
8002258: 3b01 subs r3, #1
800225a: b29a uxth r2, r3
800225c: 4b1a ldr r3, [pc, #104] ; (80022c8 <SysTick_Handler+0xac>)
800225e: 801a strh r2, [r3, #0]
if(timeout)
8002260: 4b1a ldr r3, [pc, #104] ; (80022cc <SysTick_Handler+0xb0>)
8002262: 781b ldrb r3, [r3, #0]
8002264: 2b00 cmp r3, #0
8002266: d006 beq.n 8002276 <SysTick_Handler+0x5a>
timeout--;
8002268: 4b18 ldr r3, [pc, #96] ; (80022cc <SysTick_Handler+0xb0>)
800226a: 781b ldrb r3, [r3, #0]
800226c: 3b01 subs r3, #1
800226e: b2da uxtb r2, r3
8002270: 4b16 ldr r3, [pc, #88] ; (80022cc <SysTick_Handler+0xb0>)
8002272: 701a strb r2, [r3, #0]
}
else
send = false;
}
}
8002274: e020 b.n 80022b8 <SysTick_Handler+0x9c>
if(iolen)
8002276: 4b16 ldr r3, [pc, #88] ; (80022d0 <SysTick_Handler+0xb4>)
8002278: 781b ldrb r3, [r3, #0]
800227a: 2b00 cmp r3, #0
800227c: d002 beq.n 8002284 <SysTick_Handler+0x68>
iolen = 0;
800227e: 4b14 ldr r3, [pc, #80] ; (80022d0 <SysTick_Handler+0xb4>)
8002280: 2200 movs r2, #0
8002282: 701a strb r2, [r3, #0]
if(sendreq)
8002284: 4b13 ldr r3, [pc, #76] ; (80022d4 <SysTick_Handler+0xb8>)
8002286: 781b ldrb r3, [r3, #0]
8002288: 2b00 cmp r3, #0
800228a: d012 beq.n 80022b2 <SysTick_Handler+0x96>
sendreq = false;
800228c: 4b11 ldr r3, [pc, #68] ; (80022d4 <SysTick_Handler+0xb8>)
800228e: 2200 movs r2, #0
8002290: 701a strb r2, [r3, #0]
send = true;
8002292: 4b11 ldr r3, [pc, #68] ; (80022d8 <SysTick_Handler+0xbc>)
8002294: 2201 movs r2, #1
8002296: 701a strb r2, [r3, #0]
timeout = time35[pardata.BAUD];
8002298: 4b10 ldr r3, [pc, #64] ; (80022dc <SysTick_Handler+0xc0>)
800229a: 885b ldrh r3, [r3, #2]
800229c: b29b uxth r3, r3
800229e: 001a movs r2, r3
80022a0: 4b0f ldr r3, [pc, #60] ; (80022e0 <SysTick_Handler+0xc4>)
80022a2: 0052 lsls r2, r2, #1
80022a4: 5ad3 ldrh r3, [r2, r3]
80022a6: b2da uxtb r2, r3
80022a8: 4b08 ldr r3, [pc, #32] ; (80022cc <SysTick_Handler+0xb0>)
80022aa: 701a strb r2, [r3, #0]
StartTransfer();
80022ac: f001 fd58 bl 8003d60 <StartTransfer>
}
80022b0: e002 b.n 80022b8 <SysTick_Handler+0x9c>
send = false;
80022b2: 4b09 ldr r3, [pc, #36] ; (80022d8 <SysTick_Handler+0xbc>)
80022b4: 2200 movs r2, #0
80022b6: 701a strb r2, [r3, #0]
}
80022b8: 46c0 nop ; (mov r8, r8)
80022ba: 46bd mov sp, r7
80022bc: bd80 pop {r7, pc}
80022be: 46c0 nop ; (mov r8, r8)
80022c0: 2000002e .word 0x2000002e
80022c4: 20000030 .word 0x20000030
80022c8: 20000032 .word 0x20000032
80022cc: 20000290 .word 0x20000290
80022d0: 2000003d .word 0x2000003d
80022d4: 2000003e .word 0x2000003e
80022d8: 20000005 .word 0x20000005
80022dc: 200000a0 .word 0x200000a0
80022e0: 080071f8 .word 0x080071f8
080022e4 <EXTI0_1_IRQHandler>:
/**
* @brief This function handles EXTI line 0 and line 1 interrupts.
*/
void EXTI0_1_IRQHandler(void)
{
80022e4: b580 push {r7, lr}
80022e6: af00 add r7, sp, #0
/* USER CODE BEGIN EXTI0_1_IRQn 0 */
/* USER CODE END EXTI0_1_IRQn 0 */
HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_0);
80022e8: 2001 movs r0, #1
80022ea: f002 fc4b bl 8004b84 <HAL_GPIO_EXTI_IRQHandler>
HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_1);
80022ee: 2002 movs r0, #2
80022f0: f002 fc48 bl 8004b84 <HAL_GPIO_EXTI_IRQHandler>
/* USER CODE BEGIN EXTI0_1_IRQn 1 */
/* USER CODE END EXTI0_1_IRQn 1 */
}
80022f4: 46c0 nop ; (mov r8, r8)
80022f6: 46bd mov sp, r7
80022f8: bd80 pop {r7, pc}
080022fa <EXTI2_3_IRQHandler>:
/**
* @brief This function handles EXTI line 2 and line 3 interrupts.
*/
void EXTI2_3_IRQHandler(void)
{
80022fa: b580 push {r7, lr}
80022fc: af00 add r7, sp, #0
/* USER CODE BEGIN EXTI2_3_IRQn 0 */
/* USER CODE END EXTI2_3_IRQn 0 */
HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_2);
80022fe: 2004 movs r0, #4
8002300: f002 fc40 bl 8004b84 <HAL_GPIO_EXTI_IRQHandler>
/* USER CODE BEGIN EXTI2_3_IRQn 1 */
/* USER CODE END EXTI2_3_IRQn 1 */
}
8002304: 46c0 nop ; (mov r8, r8)
8002306: 46bd mov sp, r7
8002308: bd80 pop {r7, pc}
...
0800230c <TIM7_IRQHandler>:
*/
/* USER CODE BEGIN 1 */
void TIM7_IRQHandler(void)
{
800230c: b580 push {r7, lr}
800230e: af00 add r7, sp, #0
HAL_TIM_IRQHandler(&htim7);
8002310: 4b03 ldr r3, [pc, #12] ; (8002320 <TIM7_IRQHandler+0x14>)
8002312: 0018 movs r0, r3
8002314: f003 fc28 bl 8005b68 <HAL_TIM_IRQHandler>
}
8002318: 46c0 nop ; (mov r8, r8)
800231a: 46bd mov sp, r7
800231c: bd80 pop {r7, pc}
800231e: 46c0 nop ; (mov r8, r8)
8002320: 200000c8 .word 0x200000c8
08002324 <SystemInit>:
* @brief Setup the microcontroller system.
* @param None
* @retval None
*/
void SystemInit (void)
{
8002324: b580 push {r7, lr}
8002326: af00 add r7, sp, #0
/* Configure the Vector Table location add offset address ------------------*/
#if defined (USER_VECT_TAB_ADDRESS)
SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
#endif /* USER_VECT_TAB_ADDRESS */
}
8002328: 46c0 nop ; (mov r8, r8)
800232a: 46bd mov sp, r7
800232c: bd80 pop {r7, pc}
...
08002330 <MX_TIM7_Init>:
/* TIM7 init function */
void MX_TIM7_Init(void)
{
8002330: b580 push {r7, lr}
8002332: b082 sub sp, #8
8002334: af00 add r7, sp, #0
TIM_MasterConfigTypeDef sMasterConfig = {0};
8002336: 003b movs r3, r7
8002338: 0018 movs r0, r3
800233a: 2308 movs r3, #8
800233c: 001a movs r2, r3
800233e: 2100 movs r1, #0
8002340: f004 fe5b bl 8006ffa <memset>
htim7.Instance = TIM7;
8002344: 4b17 ldr r3, [pc, #92] ; (80023a4 <MX_TIM7_Init+0x74>)
8002346: 4a18 ldr r2, [pc, #96] ; (80023a8 <MX_TIM7_Init+0x78>)
8002348: 601a str r2, [r3, #0]
htim7.Init.Prescaler = 0;
800234a: 4b16 ldr r3, [pc, #88] ; (80023a4 <MX_TIM7_Init+0x74>)
800234c: 2200 movs r2, #0
800234e: 605a str r2, [r3, #4]
htim7.Init.CounterMode = TIM_COUNTERMODE_UP;
8002350: 4b14 ldr r3, [pc, #80] ; (80023a4 <MX_TIM7_Init+0x74>)
8002352: 2200 movs r2, #0
8002354: 609a str r2, [r3, #8]
htim7.Init.Period = 7999; // Irq's 1ms
8002356: 4b13 ldr r3, [pc, #76] ; (80023a4 <MX_TIM7_Init+0x74>)
8002358: 4a14 ldr r2, [pc, #80] ; (80023ac <MX_TIM7_Init+0x7c>)
800235a: 60da str r2, [r3, #12]
htim7.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
800235c: 4b11 ldr r3, [pc, #68] ; (80023a4 <MX_TIM7_Init+0x74>)
800235e: 2200 movs r2, #0
8002360: 615a str r2, [r3, #20]
if (HAL_TIM_Base_Init(&htim7) != HAL_OK)
8002362: 4b10 ldr r3, [pc, #64] ; (80023a4 <MX_TIM7_Init+0x74>)
8002364: 0018 movs r0, r3
8002366: f003 fb6d bl 8005a44 <HAL_TIM_Base_Init>
800236a: 1e03 subs r3, r0, #0
800236c: d001 beq.n 8002372 <MX_TIM7_Init+0x42>
{
Error_Handler();
800236e: f7ff ff2d bl 80021cc <Error_Handler>
}
sMasterConfig.MasterOutputTrigger = TIM_TRGO_UPDATE;
8002372: 003b movs r3, r7
8002374: 2220 movs r2, #32
8002376: 601a str r2, [r3, #0]
sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
8002378: 003b movs r3, r7
800237a: 2200 movs r2, #0
800237c: 605a str r2, [r3, #4]
if (HAL_TIMEx_MasterConfigSynchronization(&htim7, &sMasterConfig) != HAL_OK)
800237e: 003a movs r2, r7
8002380: 4b08 ldr r3, [pc, #32] ; (80023a4 <MX_TIM7_Init+0x74>)
8002382: 0011 movs r1, r2
8002384: 0018 movs r0, r3
8002386: f003 fd55 bl 8005e34 <HAL_TIMEx_MasterConfigSynchronization>
800238a: 1e03 subs r3, r0, #0
800238c: d001 beq.n 8002392 <MX_TIM7_Init+0x62>
{
Error_Handler();
800238e: f7ff ff1d bl 80021cc <Error_Handler>
}
/* USER CODE BEGIN TIM7_Init 2 */
HAL_TIM_Base_Start_IT(&htim7);
8002392: 4b04 ldr r3, [pc, #16] ; (80023a4 <MX_TIM7_Init+0x74>)
8002394: 0018 movs r0, r3
8002396: f003 fb95 bl 8005ac4 <HAL_TIM_Base_Start_IT>
/* USER CODE END TIM7_Init 2 */
}
800239a: 46c0 nop ; (mov r8, r8)
800239c: 46bd mov sp, r7
800239e: b002 add sp, #8
80023a0: bd80 pop {r7, pc}
80023a2: 46c0 nop ; (mov r8, r8)
80023a4: 200000c8 .word 0x200000c8
80023a8: 40001400 .word 0x40001400
80023ac: 00001f3f .word 0x00001f3f
080023b0 <HAL_TIM_Base_MspInit>:
void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* tim_baseHandle)
{
80023b0: b580 push {r7, lr}
80023b2: b082 sub sp, #8
80023b4: af00 add r7, sp, #0
80023b6: 6078 str r0, [r7, #4]
if(tim_baseHandle->Instance==TIM7)
80023b8: 687b ldr r3, [r7, #4]
80023ba: 681b ldr r3, [r3, #0]
80023bc: 4a0a ldr r2, [pc, #40] ; (80023e8 <HAL_TIM_Base_MspInit+0x38>)
80023be: 4293 cmp r3, r2
80023c0: d10d bne.n 80023de <HAL_TIM_Base_MspInit+0x2e>
{
/* USER CODE BEGIN TIM7_MspInit 0 */
/* USER CODE END TIM7_MspInit 0 */
/* TIM7 clock enable */
__HAL_RCC_TIM7_CLK_ENABLE();
80023c2: 4b0a ldr r3, [pc, #40] ; (80023ec <HAL_TIM_Base_MspInit+0x3c>)
80023c4: 4a09 ldr r2, [pc, #36] ; (80023ec <HAL_TIM_Base_MspInit+0x3c>)
80023c6: 6b92 ldr r2, [r2, #56] ; 0x38
80023c8: 2120 movs r1, #32
80023ca: 430a orrs r2, r1
80023cc: 639a str r2, [r3, #56] ; 0x38
/* TIM7 interrupt Init */
HAL_NVIC_SetPriority(TIM7_IRQn, 2, 0);
80023ce: 2200 movs r2, #0
80023d0: 2102 movs r1, #2
80023d2: 2012 movs r0, #18
80023d4: f001 fe9e bl 8004114 <HAL_NVIC_SetPriority>
HAL_NVIC_EnableIRQ(TIM7_IRQn);
80023d8: 2012 movs r0, #18
80023da: f001 feb1 bl 8004140 <HAL_NVIC_EnableIRQ>
/* USER CODE BEGIN TIM7_MspInit 1 */
/* USER CODE END TIM7_MspInit 1 */
}
}
80023de: 46c0 nop ; (mov r8, r8)
80023e0: 46bd mov sp, r7
80023e2: b002 add sp, #8
80023e4: bd80 pop {r7, pc}
80023e6: 46c0 nop ; (mov r8, r8)
80023e8: 40001400 .word 0x40001400
80023ec: 40021000 .word 0x40021000
080023f0 <HAL_TIM_PeriodElapsedCallback>:
/* USER CODE BEGIN 1 */
/* USER CODE BEGIN 1 */
void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
{
80023f0: b580 push {r7, lr}
80023f2: b082 sub sp, #8
80023f4: af00 add r7, sp, #0
80023f6: 6078 str r0, [r7, #4]
if((uint32_t) htim->Instance == TIM7_SOURCE) //TIM2_IRQs every 1024 Hz
80023f8: 687b ldr r3, [r7, #4]
80023fa: 681b ldr r3, [r3, #0]
80023fc: 001a movs r2, r3
80023fe: 4b06 ldr r3, [pc, #24] ; (8002418 <HAL_TIM_PeriodElapsedCallback+0x28>)
8002400: 429a cmp r2, r3
8002402: d104 bne.n 800240e <HAL_TIM_PeriodElapsedCallback+0x1e>
{
__HAL_TIM_CLEAR_IT(htim, TIM_IT_UPDATE);
8002404: 687b ldr r3, [r7, #4]
8002406: 681b ldr r3, [r3, #0]
8002408: 2202 movs r2, #2
800240a: 4252 negs r2, r2
800240c: 611a str r2, [r3, #16]
timerKZ--;
if(!timerKZ)
AMP_STATUS &= ~KZ_Pin;
}*/
}
}
800240e: 46c0 nop ; (mov r8, r8)
8002410: 46bd mov sp, r7
8002412: b002 add sp, #8
8002414: bd80 pop {r7, pc}
8002416: 46c0 nop ; (mov r8, r8)
8002418: 40001400 .word 0x40001400
0800241c <MX_USART1_UART_Init>:
const int8_t inversely[] = {3, 1, -1,-3};
static const uint32_t BAUDRATE[] = {4800, 7200, 9600, 14400, 19200, 38400, 57600, 115200, 128000, 230400};
void MX_USART1_UART_Init(void)
{
800241c: b580 push {r7, lr}
800241e: af00 add r7, sp, #0
huart1.Instance = USART1;
8002420: 4b4a ldr r3, [pc, #296] ; (800254c <MX_USART1_UART_Init+0x130>)
8002422: 4a4b ldr r2, [pc, #300] ; (8002550 <MX_USART1_UART_Init+0x134>)
8002424: 601a str r2, [r3, #0]
huart1.Init.BaudRate = BAUDRATE[pardata.BAUD];
8002426: 4b4b ldr r3, [pc, #300] ; (8002554 <MX_USART1_UART_Init+0x138>)
8002428: 885b ldrh r3, [r3, #2]
800242a: b29b uxth r3, r3
800242c: 001a movs r2, r3
800242e: 4b4a ldr r3, [pc, #296] ; (8002558 <MX_USART1_UART_Init+0x13c>)
8002430: 0092 lsls r2, r2, #2
8002432: 58d2 ldr r2, [r2, r3]
8002434: 4b45 ldr r3, [pc, #276] ; (800254c <MX_USART1_UART_Init+0x130>)
8002436: 605a str r2, [r3, #4]
huart1.Init.WordLength = UART_WORDLENGTH_8B;
8002438: 4b44 ldr r3, [pc, #272] ; (800254c <MX_USART1_UART_Init+0x130>)
800243a: 2200 movs r2, #0
800243c: 609a str r2, [r3, #8]
huart1.Init.StopBits = UART_STOPBITS_1;
800243e: 4b43 ldr r3, [pc, #268] ; (800254c <MX_USART1_UART_Init+0x130>)
8002440: 2200 movs r2, #0
8002442: 60da str r2, [r3, #12]
switch(pardata.INFB)
8002444: 4b43 ldr r3, [pc, #268] ; (8002554 <MX_USART1_UART_Init+0x138>)
8002446: 889b ldrh r3, [r3, #4]
8002448: b29b uxth r3, r3
800244a: 2b01 cmp r3, #1
800244c: d00a beq.n 8002464 <MX_USART1_UART_Init+0x48>
800244e: 2b02 cmp r3, #2
8002450: d011 beq.n 8002476 <MX_USART1_UART_Init+0x5a>
8002452: 2b00 cmp r3, #0
8002454: d118 bne.n 8002488 <MX_USART1_UART_Init+0x6c>
{
case 0: //NONE
huart1.Init.WordLength = UART_WORDLENGTH_8B;
8002456: 4b3d ldr r3, [pc, #244] ; (800254c <MX_USART1_UART_Init+0x130>)
8002458: 2200 movs r2, #0
800245a: 609a str r2, [r3, #8]
huart1.Init.Parity = UART_PARITY_NONE;
800245c: 4b3b ldr r3, [pc, #236] ; (800254c <MX_USART1_UART_Init+0x130>)
800245e: 2200 movs r2, #0
8002460: 611a str r2, [r3, #16]
break;
8002462: e011 b.n 8002488 <MX_USART1_UART_Init+0x6c>
case 1: //ODD
huart1.Init.WordLength = UART_WORDLENGTH_9B;
8002464: 4b39 ldr r3, [pc, #228] ; (800254c <MX_USART1_UART_Init+0x130>)
8002466: 2280 movs r2, #128 ; 0x80
8002468: 0152 lsls r2, r2, #5
800246a: 609a str r2, [r3, #8]
huart1.Init.Parity = UART_PARITY_ODD;
800246c: 4b37 ldr r3, [pc, #220] ; (800254c <MX_USART1_UART_Init+0x130>)
800246e: 22c0 movs r2, #192 ; 0xc0
8002470: 00d2 lsls r2, r2, #3
8002472: 611a str r2, [r3, #16]
break;
8002474: e008 b.n 8002488 <MX_USART1_UART_Init+0x6c>
case 2: //EVEN
huart1.Init.WordLength = UART_WORDLENGTH_9B;
8002476: 4b35 ldr r3, [pc, #212] ; (800254c <MX_USART1_UART_Init+0x130>)
8002478: 2280 movs r2, #128 ; 0x80
800247a: 0152 lsls r2, r2, #5
800247c: 609a str r2, [r3, #8]
huart1.Init.Parity = UART_PARITY_EVEN;
800247e: 4b33 ldr r3, [pc, #204] ; (800254c <MX_USART1_UART_Init+0x130>)
8002480: 2280 movs r2, #128 ; 0x80
8002482: 00d2 lsls r2, r2, #3
8002484: 611a str r2, [r3, #16]
break;
8002486: 46c0 nop ; (mov r8, r8)
}
if(pardata.BAUD < 7)
8002488: 4b32 ldr r3, [pc, #200] ; (8002554 <MX_USART1_UART_Init+0x138>)
800248a: 885b ldrh r3, [r3, #2]
800248c: b29b uxth r3, r3
800248e: 2b06 cmp r3, #6
8002490: d804 bhi.n 800249c <MX_USART1_UART_Init+0x80>
huart1.Init.OverSampling = UART_OVERSAMPLING_8;
8002492: 4b2e ldr r3, [pc, #184] ; (800254c <MX_USART1_UART_Init+0x130>)
8002494: 2280 movs r2, #128 ; 0x80
8002496: 0212 lsls r2, r2, #8
8002498: 61da str r2, [r3, #28]
800249a: e002 b.n 80024a2 <MX_USART1_UART_Init+0x86>
else huart1.Init.OverSampling = UART_OVERSAMPLING_16;
800249c: 4b2b ldr r3, [pc, #172] ; (800254c <MX_USART1_UART_Init+0x130>)
800249e: 2200 movs r2, #0
80024a0: 61da str r2, [r3, #28]
huart1.Init.Mode = UART_MODE_TX_RX;
80024a2: 4b2a ldr r3, [pc, #168] ; (800254c <MX_USART1_UART_Init+0x130>)
80024a4: 220c movs r2, #12
80024a6: 615a str r2, [r3, #20]
huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
80024a8: 4b28 ldr r3, [pc, #160] ; (800254c <MX_USART1_UART_Init+0x130>)
80024aa: 2200 movs r2, #0
80024ac: 619a str r2, [r3, #24]
huart1.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
80024ae: 4b27 ldr r3, [pc, #156] ; (800254c <MX_USART1_UART_Init+0x130>)
80024b0: 2200 movs r2, #0
80024b2: 621a str r2, [r3, #32]
huart1.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
80024b4: 4b25 ldr r3, [pc, #148] ; (800254c <MX_USART1_UART_Init+0x130>)
80024b6: 2200 movs r2, #0
80024b8: 625a str r2, [r3, #36] ; 0x24
if(HAL_UART_Init(&huart1) != HAL_OK) {
80024ba: 4b24 ldr r3, [pc, #144] ; (800254c <MX_USART1_UART_Init+0x130>)
80024bc: 0018 movs r0, r3
80024be: f003 fd17 bl 8005ef0 <HAL_UART_Init>
80024c2: 1e03 subs r3, r0, #0
80024c4: d001 beq.n 80024ca <MX_USART1_UART_Init+0xae>
Error_Handler();
80024c6: f7ff fe81 bl 80021cc <Error_Handler>
}
if(__HAL_UART_GET_FLAG(&huart1, UART_FLAG_ORE))
80024ca: 4b20 ldr r3, [pc, #128] ; (800254c <MX_USART1_UART_Init+0x130>)
80024cc: 681b ldr r3, [r3, #0]
80024ce: 69db ldr r3, [r3, #28]
80024d0: 2208 movs r2, #8
80024d2: 4013 ands r3, r2
80024d4: 2b08 cmp r3, #8
80024d6: d103 bne.n 80024e0 <MX_USART1_UART_Init+0xc4>
__HAL_UART_CLEAR_FLAG(&huart1, UART_FLAG_ORE);
80024d8: 4b1c ldr r3, [pc, #112] ; (800254c <MX_USART1_UART_Init+0x130>)
80024da: 681b ldr r3, [r3, #0]
80024dc: 2208 movs r2, #8
80024de: 621a str r2, [r3, #32]
if(__HAL_UART_GET_FLAG(&huart1, UART_FLAG_PE))
80024e0: 4b1a ldr r3, [pc, #104] ; (800254c <MX_USART1_UART_Init+0x130>)
80024e2: 681b ldr r3, [r3, #0]
80024e4: 69db ldr r3, [r3, #28]
80024e6: 2201 movs r2, #1
80024e8: 4013 ands r3, r2
80024ea: 2b01 cmp r3, #1
80024ec: d103 bne.n 80024f6 <MX_USART1_UART_Init+0xda>
__HAL_UART_CLEAR_FLAG(&huart1, UART_FLAG_PE);
80024ee: 4b17 ldr r3, [pc, #92] ; (800254c <MX_USART1_UART_Init+0x130>)
80024f0: 681b ldr r3, [r3, #0]
80024f2: 2201 movs r2, #1
80024f4: 621a str r2, [r3, #32]
if(__HAL_UART_GET_FLAG(&huart1, UART_FLAG_FE))
80024f6: 4b15 ldr r3, [pc, #84] ; (800254c <MX_USART1_UART_Init+0x130>)
80024f8: 681b ldr r3, [r3, #0]
80024fa: 69db ldr r3, [r3, #28]
80024fc: 2202 movs r2, #2
80024fe: 4013 ands r3, r2
8002500: 2b02 cmp r3, #2
8002502: d103 bne.n 800250c <MX_USART1_UART_Init+0xf0>
__HAL_UART_CLEAR_FLAG(&huart1, UART_FLAG_FE);
8002504: 4b11 ldr r3, [pc, #68] ; (800254c <MX_USART1_UART_Init+0x130>)
8002506: 681b ldr r3, [r3, #0]
8002508: 2202 movs r2, #2
800250a: 621a str r2, [r3, #32]
if(__HAL_UART_GET_FLAG(&huart1, UART_FLAG_NE))
800250c: 4b0f ldr r3, [pc, #60] ; (800254c <MX_USART1_UART_Init+0x130>)
800250e: 681b ldr r3, [r3, #0]
8002510: 69db ldr r3, [r3, #28]
8002512: 2204 movs r2, #4
8002514: 4013 ands r3, r2
8002516: 2b04 cmp r3, #4
8002518: d103 bne.n 8002522 <MX_USART1_UART_Init+0x106>
__HAL_UART_CLEAR_FLAG(&huart1, UART_FLAG_NE);
800251a: 4b0c ldr r3, [pc, #48] ; (800254c <MX_USART1_UART_Init+0x130>)
800251c: 681b ldr r3, [r3, #0]
800251e: 2204 movs r2, #4
8002520: 621a str r2, [r3, #32]
HAL_GPIO_WritePin(RE_GPIO_Port, RE_Pin, GPIO_PIN_RESET);
8002522: 2380 movs r3, #128 ; 0x80
8002524: 0059 lsls r1, r3, #1
8002526: 23a0 movs r3, #160 ; 0xa0
8002528: 05db lsls r3, r3, #23
800252a: 2200 movs r2, #0
800252c: 0018 movs r0, r3
800252e: f002 fb0c bl 8004b4a <HAL_GPIO_WritePin>
SET_BIT(huart1.Instance->CR1, USART_CR1_RXNEIE | USART_CR1_PEIE);
8002532: 4b06 ldr r3, [pc, #24] ; (800254c <MX_USART1_UART_Init+0x130>)
8002534: 681b ldr r3, [r3, #0]
8002536: 4a05 ldr r2, [pc, #20] ; (800254c <MX_USART1_UART_Init+0x130>)
8002538: 6812 ldr r2, [r2, #0]
800253a: 6812 ldr r2, [r2, #0]
800253c: 2190 movs r1, #144 ; 0x90
800253e: 0049 lsls r1, r1, #1
8002540: 430a orrs r2, r1
8002542: 601a str r2, [r3, #0]
}
8002544: 46c0 nop ; (mov r8, r8)
8002546: 46bd mov sp, r7
8002548: bd80 pop {r7, pc}
800254a: 46c0 nop ; (mov r8, r8)
800254c: 2000010c .word 0x2000010c
8002550: 40013800 .word 0x40013800
8002554: 200000a0 .word 0x200000a0
8002558: 08007458 .word 0x08007458
0800255c <MX_USART1_UART_DeInit>:
void MX_USART1_UART_DeInit(void)
{
800255c: b580 push {r7, lr}
800255e: af00 add r7, sp, #0
if(HAL_UART_DeInit(&huart1) != HAL_OK) {
8002560: 4b06 ldr r3, [pc, #24] ; (800257c <MX_USART1_UART_DeInit+0x20>)
8002562: 0018 movs r0, r3
8002564: f003 fd18 bl 8005f98 <HAL_UART_DeInit>
8002568: 1e03 subs r3, r0, #0
800256a: d001 beq.n 8002570 <MX_USART1_UART_DeInit+0x14>
Error_Handler();
800256c: f7ff fe2e bl 80021cc <Error_Handler>
}
HAL_NVIC_DisableIRQ(USART1_IRQn);
8002570: 201b movs r0, #27
8002572: f001 fdf5 bl 8004160 <HAL_NVIC_DisableIRQ>
}
8002576: 46c0 nop ; (mov r8, r8)
8002578: 46bd mov sp, r7
800257a: bd80 pop {r7, pc}
800257c: 2000010c .word 0x2000010c
08002580 <HAL_UART_MspInit>:
void HAL_UART_MspInit(UART_HandleTypeDef* uartHandle)
{
8002580: b580 push {r7, lr}
8002582: b088 sub sp, #32
8002584: af00 add r7, sp, #0
8002586: 6078 str r0, [r7, #4]
GPIO_InitTypeDef GPIO_InitStruct = {0};
8002588: 230c movs r3, #12
800258a: 18fb adds r3, r7, r3
800258c: 0018 movs r0, r3
800258e: 2314 movs r3, #20
8002590: 001a movs r2, r3
8002592: 2100 movs r1, #0
8002594: f004 fd31 bl 8006ffa <memset>
if(uartHandle->Instance==USART1)
8002598: 687b ldr r3, [r7, #4]
800259a: 681b ldr r3, [r3, #0]
800259c: 4a1f ldr r2, [pc, #124] ; (800261c <HAL_UART_MspInit+0x9c>)
800259e: 4293 cmp r3, r2
80025a0: d137 bne.n 8002612 <HAL_UART_MspInit+0x92>
{
__HAL_RCC_USART1_CLK_ENABLE();
80025a2: 4b1f ldr r3, [pc, #124] ; (8002620 <HAL_UART_MspInit+0xa0>)
80025a4: 4a1e ldr r2, [pc, #120] ; (8002620 <HAL_UART_MspInit+0xa0>)
80025a6: 6b52 ldr r2, [r2, #52] ; 0x34
80025a8: 2180 movs r1, #128 ; 0x80
80025aa: 01c9 lsls r1, r1, #7
80025ac: 430a orrs r2, r1
80025ae: 635a str r2, [r3, #52] ; 0x34
__HAL_RCC_GPIOA_CLK_ENABLE();
80025b0: 4b1b ldr r3, [pc, #108] ; (8002620 <HAL_UART_MspInit+0xa0>)
80025b2: 4a1b ldr r2, [pc, #108] ; (8002620 <HAL_UART_MspInit+0xa0>)
80025b4: 6ad2 ldr r2, [r2, #44] ; 0x2c
80025b6: 2101 movs r1, #1
80025b8: 430a orrs r2, r1
80025ba: 62da str r2, [r3, #44] ; 0x2c
80025bc: 4b18 ldr r3, [pc, #96] ; (8002620 <HAL_UART_MspInit+0xa0>)
80025be: 6adb ldr r3, [r3, #44] ; 0x2c
80025c0: 2201 movs r2, #1
80025c2: 4013 ands r3, r2
80025c4: 60bb str r3, [r7, #8]
80025c6: 68bb ldr r3, [r7, #8]
/**USART1 GPIO Configuration
PA9 ------> USART1_TX
PA10 ------> USART1_RX
*/
GPIO_InitStruct.Pin = GPIO_PIN_9|GPIO_PIN_10;
80025c8: 230c movs r3, #12
80025ca: 18fb adds r3, r7, r3
80025cc: 22c0 movs r2, #192 ; 0xc0
80025ce: 00d2 lsls r2, r2, #3
80025d0: 601a str r2, [r3, #0]
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
80025d2: 230c movs r3, #12
80025d4: 18fb adds r3, r7, r3
80025d6: 2202 movs r2, #2
80025d8: 605a str r2, [r3, #4]
GPIO_InitStruct.Pull = GPIO_NOPULL;
80025da: 230c movs r3, #12
80025dc: 18fb adds r3, r7, r3
80025de: 2200 movs r2, #0
80025e0: 609a str r2, [r3, #8]
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
80025e2: 230c movs r3, #12
80025e4: 18fb adds r3, r7, r3
80025e6: 2203 movs r2, #3
80025e8: 60da str r2, [r3, #12]
GPIO_InitStruct.Alternate = GPIO_AF4_USART1;
80025ea: 230c movs r3, #12
80025ec: 18fb adds r3, r7, r3
80025ee: 2204 movs r2, #4
80025f0: 611a str r2, [r3, #16]
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
80025f2: 230c movs r3, #12
80025f4: 18fa adds r2, r7, r3
80025f6: 23a0 movs r3, #160 ; 0xa0
80025f8: 05db lsls r3, r3, #23
80025fa: 0011 movs r1, r2
80025fc: 0018 movs r0, r3
80025fe: f002 f825 bl 800464c <HAL_GPIO_Init>
/* USART1 interrupt Init */
HAL_NVIC_SetPriority(USART1_IRQn, 3, 0);
8002602: 2200 movs r2, #0
8002604: 2103 movs r1, #3
8002606: 201b movs r0, #27
8002608: f001 fd84 bl 8004114 <HAL_NVIC_SetPriority>
HAL_NVIC_EnableIRQ(USART1_IRQn);
800260c: 201b movs r0, #27
800260e: f001 fd97 bl 8004140 <HAL_NVIC_EnableIRQ>
}
}
8002612: 46c0 nop ; (mov r8, r8)
8002614: 46bd mov sp, r7
8002616: b008 add sp, #32
8002618: bd80 pop {r7, pc}
800261a: 46c0 nop ; (mov r8, r8)
800261c: 40013800 .word 0x40013800
8002620: 40021000 .word 0x40021000
08002624 <HAL_UART_MspDeInit>:
void HAL_UART_MspDeInit(UART_HandleTypeDef* uartHandle)
{
8002624: b580 push {r7, lr}
8002626: b082 sub sp, #8
8002628: af00 add r7, sp, #0
800262a: 6078 str r0, [r7, #4]
if(uartHandle->Instance==USART1)
800262c: 687b ldr r3, [r7, #4]
800262e: 681b ldr r3, [r3, #0]
8002630: 4a0b ldr r2, [pc, #44] ; (8002660 <HAL_UART_MspDeInit+0x3c>)
8002632: 4293 cmp r3, r2
8002634: d110 bne.n 8002658 <HAL_UART_MspDeInit+0x34>
{
/* USER CODE BEGIN USART1_MspDeInit 0 */
/* USER CODE END USART1_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_USART1_CLK_DISABLE();
8002636: 4b0b ldr r3, [pc, #44] ; (8002664 <HAL_UART_MspDeInit+0x40>)
8002638: 4a0a ldr r2, [pc, #40] ; (8002664 <HAL_UART_MspDeInit+0x40>)
800263a: 6b52 ldr r2, [r2, #52] ; 0x34
800263c: 490a ldr r1, [pc, #40] ; (8002668 <HAL_UART_MspDeInit+0x44>)
800263e: 400a ands r2, r1
8002640: 635a str r2, [r3, #52] ; 0x34
/**USART1 GPIO Configuration
PA9 ------> USART1_TX
PA10 ------> USART1_RX
*/
HAL_GPIO_DeInit(GPIOA, GPIO_PIN_9|GPIO_PIN_10);
8002642: 23c0 movs r3, #192 ; 0xc0
8002644: 00da lsls r2, r3, #3
8002646: 23a0 movs r3, #160 ; 0xa0
8002648: 05db lsls r3, r3, #23
800264a: 0011 movs r1, r2
800264c: 0018 movs r0, r3
800264e: f002 f97b bl 8004948 <HAL_GPIO_DeInit>
/* USART1 interrupt Deinit */
HAL_NVIC_DisableIRQ(USART1_IRQn);
8002652: 201b movs r0, #27
8002654: f001 fd84 bl 8004160 <HAL_NVIC_DisableIRQ>
/* USER CODE BEGIN USART1_MspDeInit 1 */
/* USER CODE END USART1_MspDeInit 1 */
}
}
8002658: 46c0 nop ; (mov r8, r8)
800265a: 46bd mov sp, r7
800265c: b002 add sp, #8
800265e: bd80 pop {r7, pc}
8002660: 40013800 .word 0x40013800
8002664: 40021000 .word 0x40021000
8002668: ffffbfff .word 0xffffbfff
0800266c <USART1_IRQHandler>:
/* USER CODE BEGIN 1 */
void USART1_IRQHandler(void)
{
800266c: b580 push {r7, lr}
800266e: af00 add r7, sp, #0
if((__HAL_UART_GET_IT_SOURCE(&huart1, UART_IT_RXNE)) && (__HAL_UART_GET_FLAG(&huart1, UART_FLAG_RXNE)))
8002670: 4b22 ldr r3, [pc, #136] ; (80026fc <USART1_IRQHandler+0x90>)
8002672: 681b ldr r3, [r3, #0]
8002674: 681b ldr r3, [r3, #0]
8002676: 2220 movs r2, #32
8002678: 4013 ands r3, r2
800267a: d00b beq.n 8002694 <USART1_IRQHandler+0x28>
800267c: 4b1f ldr r3, [pc, #124] ; (80026fc <USART1_IRQHandler+0x90>)
800267e: 681b ldr r3, [r3, #0]
8002680: 69db ldr r3, [r3, #28]
8002682: 2220 movs r2, #32
8002684: 4013 ands r3, r2
8002686: 2b20 cmp r3, #32
8002688: d104 bne.n 8002694 <USART1_IRQHandler+0x28>
{
HAL_UART_RxCpltCallback(&huart1);
800268a: 4b1c ldr r3, [pc, #112] ; (80026fc <USART1_IRQHandler+0x90>)
800268c: 0018 movs r0, r3
800268e: f000 f929 bl 80028e4 <HAL_UART_RxCpltCallback>
8002692: e003 b.n 800269c <USART1_IRQHandler+0x30>
}
else
{
HAL_UART_IRQHandler(&huart1);
8002694: 4b19 ldr r3, [pc, #100] ; (80026fc <USART1_IRQHandler+0x90>)
8002696: 0018 movs r0, r3
8002698: f003 fd26 bl 80060e8 <HAL_UART_IRQHandler>
}
if(__HAL_UART_GET_FLAG(&huart1, UART_FLAG_ORE))
800269c: 4b17 ldr r3, [pc, #92] ; (80026fc <USART1_IRQHandler+0x90>)
800269e: 681b ldr r3, [r3, #0]
80026a0: 69db ldr r3, [r3, #28]
80026a2: 2208 movs r2, #8
80026a4: 4013 ands r3, r2
80026a6: 2b08 cmp r3, #8
80026a8: d103 bne.n 80026b2 <USART1_IRQHandler+0x46>
__HAL_UART_CLEAR_FLAG(&huart1, UART_FLAG_ORE);
80026aa: 4b14 ldr r3, [pc, #80] ; (80026fc <USART1_IRQHandler+0x90>)
80026ac: 681b ldr r3, [r3, #0]
80026ae: 2208 movs r2, #8
80026b0: 621a str r2, [r3, #32]
if(__HAL_UART_GET_FLAG(&huart1, UART_FLAG_PE))
80026b2: 4b12 ldr r3, [pc, #72] ; (80026fc <USART1_IRQHandler+0x90>)
80026b4: 681b ldr r3, [r3, #0]
80026b6: 69db ldr r3, [r3, #28]
80026b8: 2201 movs r2, #1
80026ba: 4013 ands r3, r2
80026bc: 2b01 cmp r3, #1
80026be: d103 bne.n 80026c8 <USART1_IRQHandler+0x5c>
__HAL_UART_CLEAR_FLAG(&huart1, UART_FLAG_PE);
80026c0: 4b0e ldr r3, [pc, #56] ; (80026fc <USART1_IRQHandler+0x90>)
80026c2: 681b ldr r3, [r3, #0]
80026c4: 2201 movs r2, #1
80026c6: 621a str r2, [r3, #32]
if(__HAL_UART_GET_FLAG(&huart1, UART_FLAG_FE))
80026c8: 4b0c ldr r3, [pc, #48] ; (80026fc <USART1_IRQHandler+0x90>)
80026ca: 681b ldr r3, [r3, #0]
80026cc: 69db ldr r3, [r3, #28]
80026ce: 2202 movs r2, #2
80026d0: 4013 ands r3, r2
80026d2: 2b02 cmp r3, #2
80026d4: d103 bne.n 80026de <USART1_IRQHandler+0x72>
__HAL_UART_CLEAR_FLAG(&huart1, UART_FLAG_FE);
80026d6: 4b09 ldr r3, [pc, #36] ; (80026fc <USART1_IRQHandler+0x90>)
80026d8: 681b ldr r3, [r3, #0]
80026da: 2202 movs r2, #2
80026dc: 621a str r2, [r3, #32]
if(__HAL_UART_GET_FLAG(&huart1, UART_FLAG_NE))
80026de: 4b07 ldr r3, [pc, #28] ; (80026fc <USART1_IRQHandler+0x90>)
80026e0: 681b ldr r3, [r3, #0]
80026e2: 69db ldr r3, [r3, #28]
80026e4: 2204 movs r2, #4
80026e6: 4013 ands r3, r2
80026e8: 2b04 cmp r3, #4
80026ea: d103 bne.n 80026f4 <USART1_IRQHandler+0x88>
__HAL_UART_CLEAR_FLAG(&huart1, UART_FLAG_NE);
80026ec: 4b03 ldr r3, [pc, #12] ; (80026fc <USART1_IRQHandler+0x90>)
80026ee: 681b ldr r3, [r3, #0]
80026f0: 2204 movs r2, #4
80026f2: 621a str r2, [r3, #32]
}
80026f4: 46c0 nop ; (mov r8, r8)
80026f6: 46bd mov sp, r7
80026f8: bd80 pop {r7, pc}
80026fa: 46c0 nop ; (mov r8, r8)
80026fc: 2000010c .word 0x2000010c
08002700 <strtOut>:
/* USER CODE END 1 */
void strtOut(uint16_t n)
{
8002700: b590 push {r4, r7, lr}
8002702: b085 sub sp, #20
8002704: af00 add r7, sp, #0
8002706: 0002 movs r2, r0
8002708: 1dbb adds r3, r7, #6
800270a: 801a strh r2, [r3, #0]
uint16_t crc;
if(tx[0])
800270c: 4b1d ldr r3, [pc, #116] ; (8002784 <strtOut+0x84>)
800270e: 781b ldrb r3, [r3, #0]
8002710: 2b00 cmp r3, #0
8002712: d02f beq.n 8002774 <strtOut+0x74>
{
lastbyte = n + 2; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
8002714: 1dbb adds r3, r7, #6
8002716: 881b ldrh r3, [r3, #0]
8002718: 3302 adds r3, #2
800271a: b29a uxth r2, r3
800271c: 4b1a ldr r3, [pc, #104] ; (8002788 <strtOut+0x88>)
800271e: 801a strh r2, [r3, #0]
crc = Crc16_TX(n); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> CRC16
8002720: 230e movs r3, #14
8002722: 18fc adds r4, r7, r3
8002724: 1dbb adds r3, r7, #6
8002726: 881b ldrh r3, [r3, #0]
8002728: 0018 movs r0, r3
800272a: f000 f875 bl 8002818 <Crc16_TX>
800272e: 0003 movs r3, r0
8002730: 8023 strh r3, [r4, #0]
tx[n] = lo(crc); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> CRC16
8002732: 1dbb adds r3, r7, #6
8002734: 881b ldrh r3, [r3, #0]
8002736: 220e movs r2, #14
8002738: 18ba adds r2, r7, r2
800273a: 8812 ldrh r2, [r2, #0]
800273c: b2d1 uxtb r1, r2
800273e: 4a11 ldr r2, [pc, #68] ; (8002784 <strtOut+0x84>)
8002740: 54d1 strb r1, [r2, r3]
tx[n + 1] = hi(crc); // <20> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 2 <20><><EFBFBD><EFBFBD><EFBFBD>
8002742: 1dbb adds r3, r7, #6
8002744: 881b ldrh r3, [r3, #0]
8002746: 3301 adds r3, #1
8002748: 220e movs r2, #14
800274a: 18ba adds r2, r7, r2
800274c: 8812 ldrh r2, [r2, #0]
800274e: 0a12 lsrs r2, r2, #8
8002750: b292 uxth r2, r2
8002752: b2d1 uxtb r1, r2
8002754: 4a0b ldr r2, [pc, #44] ; (8002784 <strtOut+0x84>)
8002756: 54d1 strb r1, [r2, r3]
HAL_GPIO_WritePin(RE_GPIO_Port, RE_Pin, GPIO_PIN_SET); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> RS485 <20><> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
8002758: 2380 movs r3, #128 ; 0x80
800275a: 0059 lsls r1, r3, #1
800275c: 23a0 movs r3, #160 ; 0xa0
800275e: 05db lsls r3, r3, #23
8002760: 2201 movs r2, #1
8002762: 0018 movs r0, r3
8002764: f002 f9f1 bl 8004b4a <HAL_GPIO_WritePin>
ioa = 1;
8002768: 4b08 ldr r3, [pc, #32] ; (800278c <strtOut+0x8c>)
800276a: 2201 movs r2, #1
800276c: 701a strb r2, [r3, #0]
sendreq = true;
800276e: 4b08 ldr r3, [pc, #32] ; (8002790 <strtOut+0x90>)
8002770: 2201 movs r2, #1
8002772: 701a strb r2, [r3, #0]
}
iolen = 0;
8002774: 4b07 ldr r3, [pc, #28] ; (8002794 <strtOut+0x94>)
8002776: 2200 movs r2, #0
8002778: 701a strb r2, [r3, #0]
}
800277a: 46c0 nop ; (mov r8, r8)
800277c: 46bd mov sp, r7
800277e: b005 add sp, #20
8002780: bd90 pop {r4, r7, pc}
8002782: 46c0 nop ; (mov r8, r8)
8002784: 20000190 .word 0x20000190
8002788: 20000292 .word 0x20000292
800278c: 20000108 .word 0x20000108
8002790: 2000003e .word 0x2000003e
8002794: 2000003d .word 0x2000003d
08002798 <Crc16>:
uint16_t Crc16(uint16_t len)
{
8002798: b580 push {r7, lr}
800279a: b084 sub sp, #16
800279c: af00 add r7, sp, #0
800279e: 0002 movs r2, r0
80027a0: 1dbb adds r3, r7, #6
80027a2: 801a strh r2, [r3, #0]
uint16_t i;
uint16_t crc = 0xFFFF;
80027a4: 230c movs r3, #12
80027a6: 18fb adds r3, r7, r3
80027a8: 2201 movs r2, #1
80027aa: 4252 negs r2, r2
80027ac: 801a strh r2, [r3, #0]
for(i = 0; i < len; i++) {
80027ae: 230e movs r3, #14
80027b0: 18fb adds r3, r7, r3
80027b2: 2200 movs r2, #0
80027b4: 801a strh r2, [r3, #0]
80027b6: e01d b.n 80027f4 <Crc16+0x5c>
crc = (crc >> 8) ^ Crc16Table[(crc & 0xFF) ^ iobuf[i]];
80027b8: 230c movs r3, #12
80027ba: 18fb adds r3, r7, r3
80027bc: 881b ldrh r3, [r3, #0]
80027be: 0a1b lsrs r3, r3, #8
80027c0: b299 uxth r1, r3
80027c2: 230c movs r3, #12
80027c4: 18fb adds r3, r7, r3
80027c6: 881b ldrh r3, [r3, #0]
80027c8: 22ff movs r2, #255 ; 0xff
80027ca: 4013 ands r3, r2
80027cc: 220e movs r2, #14
80027ce: 18ba adds r2, r7, r2
80027d0: 8812 ldrh r2, [r2, #0]
80027d2: 480f ldr r0, [pc, #60] ; (8002810 <Crc16+0x78>)
80027d4: 5c82 ldrb r2, [r0, r2]
80027d6: 405a eors r2, r3
80027d8: 4b0e ldr r3, [pc, #56] ; (8002814 <Crc16+0x7c>)
80027da: 0052 lsls r2, r2, #1
80027dc: 5ad2 ldrh r2, [r2, r3]
80027de: 230c movs r3, #12
80027e0: 18fb adds r3, r7, r3
80027e2: 404a eors r2, r1
80027e4: 801a strh r2, [r3, #0]
for(i = 0; i < len; i++) {
80027e6: 230e movs r3, #14
80027e8: 18fb adds r3, r7, r3
80027ea: 881a ldrh r2, [r3, #0]
80027ec: 230e movs r3, #14
80027ee: 18fb adds r3, r7, r3
80027f0: 3201 adds r2, #1
80027f2: 801a strh r2, [r3, #0]
80027f4: 230e movs r3, #14
80027f6: 18fa adds r2, r7, r3
80027f8: 1dbb adds r3, r7, #6
80027fa: 8812 ldrh r2, [r2, #0]
80027fc: 881b ldrh r3, [r3, #0]
80027fe: 429a cmp r2, r3
8002800: d3da bcc.n 80027b8 <Crc16+0x20>
}
return crc;
8002802: 230c movs r3, #12
8002804: 18fb adds r3, r7, r3
8002806: 881b ldrh r3, [r3, #0]
}
8002808: 0018 movs r0, r3
800280a: 46bd mov sp, r7
800280c: b004 add sp, #16
800280e: bd80 pop {r7, pc}
8002810: 20000294 .word 0x20000294
8002814: 08007230 .word 0x08007230
08002818 <Crc16_TX>:
uint16_t Crc16_TX(uint16_t len)
{
8002818: b580 push {r7, lr}
800281a: b084 sub sp, #16
800281c: af00 add r7, sp, #0
800281e: 0002 movs r2, r0
8002820: 1dbb adds r3, r7, #6
8002822: 801a strh r2, [r3, #0]
uint16_t i;
uint16_t crc = 0xFFFF;
8002824: 230c movs r3, #12
8002826: 18fb adds r3, r7, r3
8002828: 2201 movs r2, #1
800282a: 4252 negs r2, r2
800282c: 801a strh r2, [r3, #0]
for(i = 0; i < len; i++) {
800282e: 230e movs r3, #14
8002830: 18fb adds r3, r7, r3
8002832: 2200 movs r2, #0
8002834: 801a strh r2, [r3, #0]
8002836: e01d b.n 8002874 <Crc16_TX+0x5c>
crc = (crc >> 8) ^ Crc16Table[(crc & 0xFF) ^ tx[i]];
8002838: 230c movs r3, #12
800283a: 18fb adds r3, r7, r3
800283c: 881b ldrh r3, [r3, #0]
800283e: 0a1b lsrs r3, r3, #8
8002840: b299 uxth r1, r3
8002842: 230c movs r3, #12
8002844: 18fb adds r3, r7, r3
8002846: 881b ldrh r3, [r3, #0]
8002848: 22ff movs r2, #255 ; 0xff
800284a: 4013 ands r3, r2
800284c: 220e movs r2, #14
800284e: 18ba adds r2, r7, r2
8002850: 8812 ldrh r2, [r2, #0]
8002852: 480f ldr r0, [pc, #60] ; (8002890 <Crc16_TX+0x78>)
8002854: 5c82 ldrb r2, [r0, r2]
8002856: 405a eors r2, r3
8002858: 4b0e ldr r3, [pc, #56] ; (8002894 <Crc16_TX+0x7c>)
800285a: 0052 lsls r2, r2, #1
800285c: 5ad2 ldrh r2, [r2, r3]
800285e: 230c movs r3, #12
8002860: 18fb adds r3, r7, r3
8002862: 404a eors r2, r1
8002864: 801a strh r2, [r3, #0]
for(i = 0; i < len; i++) {
8002866: 230e movs r3, #14
8002868: 18fb adds r3, r7, r3
800286a: 881a ldrh r2, [r3, #0]
800286c: 230e movs r3, #14
800286e: 18fb adds r3, r7, r3
8002870: 3201 adds r2, #1
8002872: 801a strh r2, [r3, #0]
8002874: 230e movs r3, #14
8002876: 18fa adds r2, r7, r3
8002878: 1dbb adds r3, r7, #6
800287a: 8812 ldrh r2, [r2, #0]
800287c: 881b ldrh r3, [r3, #0]
800287e: 429a cmp r2, r3
8002880: d3da bcc.n 8002838 <Crc16_TX+0x20>
}
return crc;
8002882: 230c movs r3, #12
8002884: 18fb adds r3, r7, r3
8002886: 881b ldrh r3, [r3, #0]
}
8002888: 0018 movs r0, r3
800288a: 46bd mov sp, r7
800288c: b004 add sp, #16
800288e: bd80 pop {r7, pc}
8002890: 20000190 .word 0x20000190
8002894: 08007230 .word 0x08007230
08002898 <SetBaudRate>:
void SetBaudRate()
{
8002898: b580 push {r7, lr}
800289a: af00 add r7, sp, #0
timeout = time35[pardata.BAUD];
800289c: 4b0c ldr r3, [pc, #48] ; (80028d0 <SetBaudRate+0x38>)
800289e: 885b ldrh r3, [r3, #2]
80028a0: b29b uxth r3, r3
80028a2: 001a movs r2, r3
80028a4: 4b0b ldr r3, [pc, #44] ; (80028d4 <SetBaudRate+0x3c>)
80028a6: 0052 lsls r2, r2, #1
80028a8: 5ad3 ldrh r3, [r2, r3]
80028aa: b2da uxtb r2, r3
80028ac: 4b0a ldr r3, [pc, #40] ; (80028d8 <SetBaudRate+0x40>)
80028ae: 701a strb r2, [r3, #0]
delayREDE = sendtime[pardata.BAUD];
80028b0: 4b07 ldr r3, [pc, #28] ; (80028d0 <SetBaudRate+0x38>)
80028b2: 885b ldrh r3, [r3, #2]
80028b4: b29b uxth r3, r3
80028b6: 001a movs r2, r3
80028b8: 4b08 ldr r3, [pc, #32] ; (80028dc <SetBaudRate+0x44>)
80028ba: 0052 lsls r2, r2, #1
80028bc: 5ad2 ldrh r2, [r2, r3]
80028be: 4b08 ldr r3, [pc, #32] ; (80028e0 <SetBaudRate+0x48>)
80028c0: 801a strh r2, [r3, #0]
MX_USART1_UART_DeInit();
80028c2: f7ff fe4b bl 800255c <MX_USART1_UART_DeInit>
MX_USART1_UART_Init();
80028c6: f7ff fda9 bl 800241c <MX_USART1_UART_Init>
}
80028ca: 46c0 nop ; (mov r8, r8)
80028cc: 46bd mov sp, r7
80028ce: bd80 pop {r7, pc}
80028d0: 200000a0 .word 0x200000a0
80028d4: 08007444 .word 0x08007444
80028d8: 20000290 .word 0x20000290
80028dc: 08007430 .word 0x08007430
80028e0: 2000010a .word 0x2000010a
080028e4 <HAL_UART_RxCpltCallback>:
void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart)
{
80028e4: b5b0 push {r4, r5, r7, lr}
80028e6: b088 sub sp, #32
80028e8: af00 add r7, sp, #0
80028ea: 6078 str r0, [r7, #4]
usfloat f;
uint8_t tmp, tmp1;
uint16_t tmp16;
float tmpf;
timeout = time35[pardata.BAUD];
80028ec: 4bd5 ldr r3, [pc, #852] ; (8002c44 <HAL_UART_RxCpltCallback+0x360>)
80028ee: 885b ldrh r3, [r3, #2]
80028f0: b29b uxth r3, r3
80028f2: 001a movs r2, r3
80028f4: 4bd4 ldr r3, [pc, #848] ; (8002c48 <HAL_UART_RxCpltCallback+0x364>)
80028f6: 0052 lsls r2, r2, #1
80028f8: 5ad3 ldrh r3, [r2, r3]
80028fa: b2da uxtb r2, r3
80028fc: 4bd3 ldr r3, [pc, #844] ; (8002c4c <HAL_UART_RxCpltCallback+0x368>)
80028fe: 701a strb r2, [r3, #0]
iobuf[iolen++] = (uint8_t) (USART1->RDR & 0xFF);
8002900: 4bd3 ldr r3, [pc, #844] ; (8002c50 <HAL_UART_RxCpltCallback+0x36c>)
8002902: 781b ldrb r3, [r3, #0]
8002904: 1c5a adds r2, r3, #1
8002906: b2d1 uxtb r1, r2
8002908: 4ad1 ldr r2, [pc, #836] ; (8002c50 <HAL_UART_RxCpltCallback+0x36c>)
800290a: 7011 strb r1, [r2, #0]
800290c: 001a movs r2, r3
800290e: 4bd1 ldr r3, [pc, #836] ; (8002c54 <HAL_UART_RxCpltCallback+0x370>)
8002910: 6a5b ldr r3, [r3, #36] ; 0x24
8002912: b2d9 uxtb r1, r3
8002914: 4bd0 ldr r3, [pc, #832] ; (8002c58 <HAL_UART_RxCpltCallback+0x374>)
8002916: 5499 strb r1, [r3, r2]
if((iobuf[0] == pardata.OWN) || (!iobuf[0]))
8002918: 4bcf ldr r3, [pc, #828] ; (8002c58 <HAL_UART_RxCpltCallback+0x374>)
800291a: 781b ldrb r3, [r3, #0]
800291c: b29a uxth r2, r3
800291e: 4bc9 ldr r3, [pc, #804] ; (8002c44 <HAL_UART_RxCpltCallback+0x360>)
8002920: 881b ldrh r3, [r3, #0]
8002922: b29b uxth r3, r3
8002924: 429a cmp r2, r3
8002926: d005 beq.n 8002934 <HAL_UART_RxCpltCallback+0x50>
8002928: 4bcb ldr r3, [pc, #812] ; (8002c58 <HAL_UART_RxCpltCallback+0x374>)
800292a: 781b ldrb r3, [r3, #0]
800292c: 2b00 cmp r3, #0
800292e: d001 beq.n 8002934 <HAL_UART_RxCpltCallback+0x50>
8002930: f001 f9a6 bl 8003c80 <HAL_UART_RxCpltCallback+0x139c>
{
if(iolen > 1)
8002934: 4bc6 ldr r3, [pc, #792] ; (8002c50 <HAL_UART_RxCpltCallback+0x36c>)
8002936: 781b ldrb r3, [r3, #0]
8002938: 2b01 cmp r3, #1
800293a: d801 bhi.n 8002940 <HAL_UART_RxCpltCallback+0x5c>
800293c: f001 f9a0 bl 8003c80 <HAL_UART_RxCpltCallback+0x139c>
{
if(iolen == 2)
8002940: 4bc3 ldr r3, [pc, #780] ; (8002c50 <HAL_UART_RxCpltCallback+0x36c>)
8002942: 781b ldrb r3, [r3, #0]
8002944: 2b02 cmp r3, #2
8002946: d124 bne.n 8002992 <HAL_UART_RxCpltCallback+0xae>
{
switch(iobuf[1])
8002948: 4bc3 ldr r3, [pc, #780] ; (8002c58 <HAL_UART_RxCpltCallback+0x374>)
800294a: 785b ldrb r3, [r3, #1]
800294c: 2b03 cmp r3, #3
800294e: d002 beq.n 8002956 <HAL_UART_RxCpltCallback+0x72>
8002950: 2b10 cmp r3, #16
8002952: d004 beq.n 800295e <HAL_UART_RxCpltCallback+0x7a>
8002954: e007 b.n 8002966 <HAL_UART_RxCpltCallback+0x82>
{
case 0x03:
lastbyte = 7;
8002956: 4bc1 ldr r3, [pc, #772] ; (8002c5c <HAL_UART_RxCpltCallback+0x378>)
8002958: 2207 movs r2, #7
800295a: 801a strh r2, [r3, #0]
break;
800295c: e019 b.n 8002992 <HAL_UART_RxCpltCallback+0xae>
case 0x10:
lastbyte = 6;
800295e: 4bbf ldr r3, [pc, #764] ; (8002c5c <HAL_UART_RxCpltCallback+0x378>)
8002960: 2206 movs r2, #6
8002962: 801a strh r2, [r3, #0]
break;
8002964: e015 b.n 8002992 <HAL_UART_RxCpltCallback+0xae>
default:
lastbyte = 3;
8002966: 4bbd ldr r3, [pc, #756] ; (8002c5c <HAL_UART_RxCpltCallback+0x378>)
8002968: 2203 movs r2, #3
800296a: 801a strh r2, [r3, #0]
tx[0] = iobuf[0];
800296c: 4bba ldr r3, [pc, #744] ; (8002c58 <HAL_UART_RxCpltCallback+0x374>)
800296e: 781a ldrb r2, [r3, #0]
8002970: 4bbb ldr r3, [pc, #748] ; (8002c60 <HAL_UART_RxCpltCallback+0x37c>)
8002972: 701a strb r2, [r3, #0]
tx[1] = (iobuf[1] | 0x80);
8002974: 4bb8 ldr r3, [pc, #736] ; (8002c58 <HAL_UART_RxCpltCallback+0x374>)
8002976: 785b ldrb r3, [r3, #1]
8002978: 2280 movs r2, #128 ; 0x80
800297a: 4252 negs r2, r2
800297c: 4313 orrs r3, r2
800297e: b2da uxtb r2, r3
8002980: 4bb7 ldr r3, [pc, #732] ; (8002c60 <HAL_UART_RxCpltCallback+0x37c>)
8002982: 705a strb r2, [r3, #1]
tx[2] = 0x03;
8002984: 4bb6 ldr r3, [pc, #728] ; (8002c60 <HAL_UART_RxCpltCallback+0x37c>)
8002986: 2203 movs r2, #3
8002988: 709a strb r2, [r3, #2]
strtOut(3);
800298a: 2003 movs r0, #3
800298c: f7ff feb8 bl 8002700 <strtOut>
break;
8002990: 46c0 nop ; (mov r8, r8)
}
}
if(iolen > lastbyte)
8002992: 4baf ldr r3, [pc, #700] ; (8002c50 <HAL_UART_RxCpltCallback+0x36c>)
8002994: 781b ldrb r3, [r3, #0]
8002996: b29a uxth r2, r3
8002998: 4bb0 ldr r3, [pc, #704] ; (8002c5c <HAL_UART_RxCpltCallback+0x378>)
800299a: 881b ldrh r3, [r3, #0]
800299c: 429a cmp r2, r3
800299e: d801 bhi.n 80029a4 <HAL_UART_RxCpltCallback+0xc0>
80029a0: f001 f96e bl 8003c80 <HAL_UART_RxCpltCallback+0x139c>
{
switch(iobuf[1])
80029a4: 4bac ldr r3, [pc, #688] ; (8002c58 <HAL_UART_RxCpltCallback+0x374>)
80029a6: 785b ldrb r3, [r3, #1]
80029a8: 2b03 cmp r3, #3
80029aa: d004 beq.n 80029b6 <HAL_UART_RxCpltCallback+0xd2>
80029ac: 2b10 cmp r3, #16
80029ae: d100 bne.n 80029b2 <HAL_UART_RxCpltCallback+0xce>
80029b0: e267 b.n 8002e82 <HAL_UART_RxCpltCallback+0x59e>
}
}
}
//iolen++;
}
80029b2: f001 f965 bl 8003c80 <HAL_UART_RxCpltCallback+0x139c>
iolen = 0;
80029b6: 4ba6 ldr r3, [pc, #664] ; (8002c50 <HAL_UART_RxCpltCallback+0x36c>)
80029b8: 2200 movs r2, #0
80029ba: 701a strb r2, [r3, #0]
crc.ch[0] = iobuf[6];
80029bc: 4ba6 ldr r3, [pc, #664] ; (8002c58 <HAL_UART_RxCpltCallback+0x374>)
80029be: 799a ldrb r2, [r3, #6]
80029c0: 2314 movs r3, #20
80029c2: 18fb adds r3, r7, r3
80029c4: 701a strb r2, [r3, #0]
crc.ch[1] = iobuf[7];
80029c6: 4ba4 ldr r3, [pc, #656] ; (8002c58 <HAL_UART_RxCpltCallback+0x374>)
80029c8: 79da ldrb r2, [r3, #7]
80029ca: 2314 movs r3, #20
80029cc: 18fb adds r3, r7, r3
80029ce: 705a strb r2, [r3, #1]
if(crc.sh == Crc16(6)) // ïðè êîððåêòíîì çíà÷åíèè CRC
80029d0: 2314 movs r3, #20
80029d2: 18fb adds r3, r7, r3
80029d4: 881c ldrh r4, [r3, #0]
80029d6: 2006 movs r0, #6
80029d8: f7ff fede bl 8002798 <Crc16>
80029dc: 0003 movs r3, r0
80029de: 429c cmp r4, r3
80029e0: d001 beq.n 80029e6 <HAL_UART_RxCpltCallback+0x102>
80029e2: f001 f94c bl 8003c7e <HAL_UART_RxCpltCallback+0x139a>
addr.ch[1] = iobuf[2]; //ñò áàéò àäðåñà ðåãèñòðà
80029e6: 4b9c ldr r3, [pc, #624] ; (8002c58 <HAL_UART_RxCpltCallback+0x374>)
80029e8: 789a ldrb r2, [r3, #2]
80029ea: 2310 movs r3, #16
80029ec: 18fb adds r3, r7, r3
80029ee: 705a strb r2, [r3, #1]
addr.ch[0] = iobuf[3]; // ìë áàéò àäðåñà ðåãèñòðà
80029f0: 4b99 ldr r3, [pc, #612] ; (8002c58 <HAL_UART_RxCpltCallback+0x374>)
80029f2: 78da ldrb r2, [r3, #3]
80029f4: 2310 movs r3, #16
80029f6: 18fb adds r3, r7, r3
80029f8: 701a strb r2, [r3, #0]
regs.ch[1] = iobuf[4]; // ñò áàéò êîë-âà ðåãèñòðîâ (ñëîâ)
80029fa: 4b97 ldr r3, [pc, #604] ; (8002c58 <HAL_UART_RxCpltCallback+0x374>)
80029fc: 791a ldrb r2, [r3, #4]
80029fe: 230c movs r3, #12
8002a00: 18fb adds r3, r7, r3
8002a02: 705a strb r2, [r3, #1]
regs.ch[0] = iobuf[5]; // ìë áàéò êîë-âî ðåãèñòðîâ (ñëîâ)
8002a04: 4b94 ldr r3, [pc, #592] ; (8002c58 <HAL_UART_RxCpltCallback+0x374>)
8002a06: 795a ldrb r2, [r3, #5]
8002a08: 230c movs r3, #12
8002a0a: 18fb adds r3, r7, r3
8002a0c: 701a strb r2, [r3, #0]
if(addr.sh == 1000) // ×òåíèå áàéòà ÏÅÐÅÃÐÓÇÊÈ
8002a0e: 2310 movs r3, #16
8002a10: 18fb adds r3, r7, r3
8002a12: 881a ldrh r2, [r3, #0]
8002a14: 23fa movs r3, #250 ; 0xfa
8002a16: 009b lsls r3, r3, #2
8002a18: 429a cmp r2, r3
8002a1a: d142 bne.n 8002aa2 <HAL_UART_RxCpltCallback+0x1be>
if(regs.ch[0] != 1) // åñëè çàïðîøåí íå ÎÄÈÍ ðåãèñòð
8002a1c: 230c movs r3, #12
8002a1e: 18fb adds r3, r7, r3
8002a20: 781b ldrb r3, [r3, #0]
8002a22: 2b01 cmp r3, #1
8002a24: d013 beq.n 8002a4e <HAL_UART_RxCpltCallback+0x16a>
tx[0] = iobuf[0];
8002a26: 4b8c ldr r3, [pc, #560] ; (8002c58 <HAL_UART_RxCpltCallback+0x374>)
8002a28: 781a ldrb r2, [r3, #0]
8002a2a: 4b8d ldr r3, [pc, #564] ; (8002c60 <HAL_UART_RxCpltCallback+0x37c>)
8002a2c: 701a strb r2, [r3, #0]
tx[1] = (iobuf[1] | 0x80);
8002a2e: 4b8a ldr r3, [pc, #552] ; (8002c58 <HAL_UART_RxCpltCallback+0x374>)
8002a30: 785b ldrb r3, [r3, #1]
8002a32: 2280 movs r2, #128 ; 0x80
8002a34: 4252 negs r2, r2
8002a36: 4313 orrs r3, r2
8002a38: b2da uxtb r2, r3
8002a3a: 4b89 ldr r3, [pc, #548] ; (8002c60 <HAL_UART_RxCpltCallback+0x37c>)
8002a3c: 705a strb r2, [r3, #1]
tx[2] = 0x03;
8002a3e: 4b88 ldr r3, [pc, #544] ; (8002c60 <HAL_UART_RxCpltCallback+0x37c>)
8002a40: 2203 movs r2, #3
8002a42: 709a strb r2, [r3, #2]
strtOut(3);
8002a44: 2003 movs r0, #3
8002a46: f7ff fe5b bl 8002700 <strtOut>
break;
8002a4a: f001 f918 bl 8003c7e <HAL_UART_RxCpltCallback+0x139a>
tx[0] = iobuf[0];
8002a4e: 4b82 ldr r3, [pc, #520] ; (8002c58 <HAL_UART_RxCpltCallback+0x374>)
8002a50: 781a ldrb r2, [r3, #0]
8002a52: 4b83 ldr r3, [pc, #524] ; (8002c60 <HAL_UART_RxCpltCallback+0x37c>)
8002a54: 701a strb r2, [r3, #0]
tx[1] = iobuf[1];
8002a56: 4b80 ldr r3, [pc, #512] ; (8002c58 <HAL_UART_RxCpltCallback+0x374>)
8002a58: 785a ldrb r2, [r3, #1]
8002a5a: 4b81 ldr r3, [pc, #516] ; (8002c60 <HAL_UART_RxCpltCallback+0x37c>)
8002a5c: 705a strb r2, [r3, #1]
tx[2] = regs.ch[0] << 1; // êîë-âî áàéò
8002a5e: 230c movs r3, #12
8002a60: 18fb adds r3, r7, r3
8002a62: 781b ldrb r3, [r3, #0]
8002a64: 18db adds r3, r3, r3
8002a66: b2da uxtb r2, r3
8002a68: 4b7d ldr r3, [pc, #500] ; (8002c60 <HAL_UART_RxCpltCallback+0x37c>)
8002a6a: 709a strb r2, [r3, #2]
tx[3] = 0;
8002a6c: 4b7c ldr r3, [pc, #496] ; (8002c60 <HAL_UART_RxCpltCallback+0x37c>)
8002a6e: 2200 movs r2, #0
8002a70: 70da strb r2, [r3, #3]
tx[4] = lo(AMP_STATUS);
8002a72: 4b7c ldr r3, [pc, #496] ; (8002c64 <HAL_UART_RxCpltCallback+0x380>)
8002a74: 881b ldrh r3, [r3, #0]
8002a76: b29b uxth r3, r3
8002a78: b2da uxtb r2, r3
8002a7a: 4b79 ldr r3, [pc, #484] ; (8002c60 <HAL_UART_RxCpltCallback+0x37c>)
8002a7c: 711a strb r2, [r3, #4]
tx[5] = hi(AMP_STATUS);
8002a7e: 4b79 ldr r3, [pc, #484] ; (8002c64 <HAL_UART_RxCpltCallback+0x380>)
8002a80: 881b ldrh r3, [r3, #0]
8002a82: b29b uxth r3, r3
8002a84: 0a1b lsrs r3, r3, #8
8002a86: b29b uxth r3, r3
8002a88: b2da uxtb r2, r3
8002a8a: 4b75 ldr r3, [pc, #468] ; (8002c60 <HAL_UART_RxCpltCallback+0x37c>)
8002a8c: 715a strb r2, [r3, #5]
strtOut(3 + tx[2]);
8002a8e: 4b74 ldr r3, [pc, #464] ; (8002c60 <HAL_UART_RxCpltCallback+0x37c>)
8002a90: 789b ldrb r3, [r3, #2]
8002a92: b29b uxth r3, r3
8002a94: 3303 adds r3, #3
8002a96: b29b uxth r3, r3
8002a98: 0018 movs r0, r3
8002a9a: f7ff fe31 bl 8002700 <strtOut>
break;
8002a9e: f001 f8ee bl 8003c7e <HAL_UART_RxCpltCallback+0x139a>
switch(addr.sh)
8002aa2: 2310 movs r3, #16
8002aa4: 18fb adds r3, r7, r3
8002aa6: 881b ldrh r3, [r3, #0]
8002aa8: 4a6f ldr r2, [pc, #444] ; (8002c68 <HAL_UART_RxCpltCallback+0x384>)
8002aaa: 4293 cmp r3, r2
8002aac: d100 bne.n 8002ab0 <HAL_UART_RxCpltCallback+0x1cc>
8002aae: e111 b.n 8002cd4 <HAL_UART_RxCpltCallback+0x3f0>
8002ab0: 4a6d ldr r2, [pc, #436] ; (8002c68 <HAL_UART_RxCpltCallback+0x384>)
8002ab2: 4293 cmp r3, r2
8002ab4: dc0b bgt.n 8002ace <HAL_UART_RxCpltCallback+0x1ea>
8002ab6: 4a6d ldr r2, [pc, #436] ; (8002c6c <HAL_UART_RxCpltCallback+0x388>)
8002ab8: 4293 cmp r3, r2
8002aba: da00 bge.n 8002abe <HAL_UART_RxCpltCallback+0x1da>
8002abc: e1cc b.n 8002e58 <HAL_UART_RxCpltCallback+0x574>
8002abe: 4a6c ldr r2, [pc, #432] ; (8002c70 <HAL_UART_RxCpltCallback+0x38c>)
8002ac0: 4293 cmp r3, r2
8002ac2: dd19 ble.n 8002af8 <HAL_UART_RxCpltCallback+0x214>
8002ac4: 4a6b ldr r2, [pc, #428] ; (8002c74 <HAL_UART_RxCpltCallback+0x390>)
8002ac6: 4293 cmp r3, r2
8002ac8: d100 bne.n 8002acc <HAL_UART_RxCpltCallback+0x1e8>
8002aca: e07a b.n 8002bc2 <HAL_UART_RxCpltCallback+0x2de>
8002acc: e1c4 b.n 8002e58 <HAL_UART_RxCpltCallback+0x574>
8002ace: 4a6a ldr r2, [pc, #424] ; (8002c78 <HAL_UART_RxCpltCallback+0x394>)
8002ad0: 4293 cmp r3, r2
8002ad2: d100 bne.n 8002ad6 <HAL_UART_RxCpltCallback+0x1f2>
8002ad4: e075 b.n 8002bc2 <HAL_UART_RxCpltCallback+0x2de>
8002ad6: 4a68 ldr r2, [pc, #416] ; (8002c78 <HAL_UART_RxCpltCallback+0x394>)
8002ad8: 4293 cmp r3, r2
8002ada: dc04 bgt.n 8002ae6 <HAL_UART_RxCpltCallback+0x202>
8002adc: 4a67 ldr r2, [pc, #412] ; (8002c7c <HAL_UART_RxCpltCallback+0x398>)
8002ade: 4293 cmp r3, r2
8002ae0: d100 bne.n 8002ae4 <HAL_UART_RxCpltCallback+0x200>
8002ae2: e158 b.n 8002d96 <HAL_UART_RxCpltCallback+0x4b2>
8002ae4: e1b8 b.n 8002e58 <HAL_UART_RxCpltCallback+0x574>
8002ae6: 4a66 ldr r2, [pc, #408] ; (8002c80 <HAL_UART_RxCpltCallback+0x39c>)
8002ae8: 4293 cmp r3, r2
8002aea: d100 bne.n 8002aee <HAL_UART_RxCpltCallback+0x20a>
8002aec: e0f2 b.n 8002cd4 <HAL_UART_RxCpltCallback+0x3f0>
8002aee: 4a65 ldr r2, [pc, #404] ; (8002c84 <HAL_UART_RxCpltCallback+0x3a0>)
8002af0: 4293 cmp r3, r2
8002af2: d100 bne.n 8002af6 <HAL_UART_RxCpltCallback+0x212>
8002af4: e14f b.n 8002d96 <HAL_UART_RxCpltCallback+0x4b2>
8002af6: e1af b.n 8002e58 <HAL_UART_RxCpltCallback+0x574>
if(regs.ch[0] > (5011 - addr.sh))
8002af8: 230c movs r3, #12
8002afa: 18fb adds r3, r7, r3
8002afc: 781b ldrb r3, [r3, #0]
8002afe: 001a movs r2, r3
8002b00: 2310 movs r3, #16
8002b02: 18fb adds r3, r7, r3
8002b04: 881b ldrh r3, [r3, #0]
8002b06: 0019 movs r1, r3
8002b08: 4b5f ldr r3, [pc, #380] ; (8002c88 <HAL_UART_RxCpltCallback+0x3a4>)
8002b0a: 1a5b subs r3, r3, r1
8002b0c: 429a cmp r2, r3
8002b0e: dd12 ble.n 8002b36 <HAL_UART_RxCpltCallback+0x252>
tx[0] = iobuf[0];
8002b10: 4b51 ldr r3, [pc, #324] ; (8002c58 <HAL_UART_RxCpltCallback+0x374>)
8002b12: 781a ldrb r2, [r3, #0]
8002b14: 4b52 ldr r3, [pc, #328] ; (8002c60 <HAL_UART_RxCpltCallback+0x37c>)
8002b16: 701a strb r2, [r3, #0]
tx[1] = (iobuf[1] | 0x80);
8002b18: 4b4f ldr r3, [pc, #316] ; (8002c58 <HAL_UART_RxCpltCallback+0x374>)
8002b1a: 785b ldrb r3, [r3, #1]
8002b1c: 2280 movs r2, #128 ; 0x80
8002b1e: 4252 negs r2, r2
8002b20: 4313 orrs r3, r2
8002b22: b2da uxtb r2, r3
8002b24: 4b4e ldr r3, [pc, #312] ; (8002c60 <HAL_UART_RxCpltCallback+0x37c>)
8002b26: 705a strb r2, [r3, #1]
tx[2] = 0x03;
8002b28: 4b4d ldr r3, [pc, #308] ; (8002c60 <HAL_UART_RxCpltCallback+0x37c>)
8002b2a: 2203 movs r2, #3
8002b2c: 709a strb r2, [r3, #2]
strtOut(3);
8002b2e: 2003 movs r0, #3
8002b30: f7ff fde6 bl 8002700 <strtOut>
break;
8002b34: e1a3 b.n 8002e7e <HAL_UART_RxCpltCallback+0x59a>
tx[0] = iobuf[0];
8002b36: 4b48 ldr r3, [pc, #288] ; (8002c58 <HAL_UART_RxCpltCallback+0x374>)
8002b38: 781a ldrb r2, [r3, #0]
8002b3a: 4b49 ldr r3, [pc, #292] ; (8002c60 <HAL_UART_RxCpltCallback+0x37c>)
8002b3c: 701a strb r2, [r3, #0]
tx[1] = iobuf[1];
8002b3e: 4b46 ldr r3, [pc, #280] ; (8002c58 <HAL_UART_RxCpltCallback+0x374>)
8002b40: 785a ldrb r2, [r3, #1]
8002b42: 4b47 ldr r3, [pc, #284] ; (8002c60 <HAL_UART_RxCpltCallback+0x37c>)
8002b44: 705a strb r2, [r3, #1]
tx[2] = regs.ch[0] << 1;
8002b46: 230c movs r3, #12
8002b48: 18fb adds r3, r7, r3
8002b4a: 781b ldrb r3, [r3, #0]
8002b4c: 18db adds r3, r3, r3
8002b4e: b2da uxtb r2, r3
8002b50: 4b43 ldr r3, [pc, #268] ; (8002c60 <HAL_UART_RxCpltCallback+0x37c>)
8002b52: 709a strb r2, [r3, #2]
pch = (uint8_t *) &pardata.IIN + ((addr.sh - 5001) << 1);
8002b54: 2310 movs r3, #16
8002b56: 18fb adds r3, r7, r3
8002b58: 881b ldrh r3, [r3, #0]
8002b5a: 4a4c ldr r2, [pc, #304] ; (8002c8c <HAL_UART_RxCpltCallback+0x3a8>)
8002b5c: 4694 mov ip, r2
8002b5e: 4463 add r3, ip
8002b60: 005b lsls r3, r3, #1
8002b62: 001a movs r2, r3
8002b64: 4b4a ldr r3, [pc, #296] ; (8002c90 <HAL_UART_RxCpltCallback+0x3ac>)
8002b66: 18d3 adds r3, r2, r3
8002b68: 61bb str r3, [r7, #24]
for(j = 0; j < tx[2]; j++)
8002b6a: 231f movs r3, #31
8002b6c: 18fb adds r3, r7, r3
8002b6e: 2200 movs r2, #0
8002b70: 701a strb r2, [r3, #0]
8002b72: e016 b.n 8002ba2 <HAL_UART_RxCpltCallback+0x2be>
tx[j + 3] = *(pch + (j ^ 1));
8002b74: 231f movs r3, #31
8002b76: 18fb adds r3, r7, r3
8002b78: 781b ldrb r3, [r3, #0]
8002b7a: 3303 adds r3, #3
8002b7c: 221f movs r2, #31
8002b7e: 18ba adds r2, r7, r2
8002b80: 7812 ldrb r2, [r2, #0]
8002b82: 2101 movs r1, #1
8002b84: 404a eors r2, r1
8002b86: b2d2 uxtb r2, r2
8002b88: 0011 movs r1, r2
8002b8a: 69ba ldr r2, [r7, #24]
8002b8c: 1852 adds r2, r2, r1
8002b8e: 7811 ldrb r1, [r2, #0]
8002b90: 4a33 ldr r2, [pc, #204] ; (8002c60 <HAL_UART_RxCpltCallback+0x37c>)
8002b92: 54d1 strb r1, [r2, r3]
for(j = 0; j < tx[2]; j++)
8002b94: 231f movs r3, #31
8002b96: 18fb adds r3, r7, r3
8002b98: 781a ldrb r2, [r3, #0]
8002b9a: 231f movs r3, #31
8002b9c: 18fb adds r3, r7, r3
8002b9e: 3201 adds r2, #1
8002ba0: 701a strb r2, [r3, #0]
8002ba2: 4b2f ldr r3, [pc, #188] ; (8002c60 <HAL_UART_RxCpltCallback+0x37c>)
8002ba4: 789b ldrb r3, [r3, #2]
8002ba6: 221f movs r2, #31
8002ba8: 18ba adds r2, r7, r2
8002baa: 7812 ldrb r2, [r2, #0]
8002bac: 429a cmp r2, r3
8002bae: d3e1 bcc.n 8002b74 <HAL_UART_RxCpltCallback+0x290>
strtOut(3 + tx[2]);
8002bb0: 4b2b ldr r3, [pc, #172] ; (8002c60 <HAL_UART_RxCpltCallback+0x37c>)
8002bb2: 789b ldrb r3, [r3, #2]
8002bb4: b29b uxth r3, r3
8002bb6: 3303 adds r3, #3
8002bb8: b29b uxth r3, r3
8002bba: 0018 movs r0, r3
8002bbc: f7ff fda0 bl 8002700 <strtOut>
break;
8002bc0: e15d b.n 8002e7e <HAL_UART_RxCpltCallback+0x59a>
tmp = 3;
8002bc2: 231e movs r3, #30
8002bc4: 18fb adds r3, r7, r3
8002bc6: 2203 movs r2, #3
8002bc8: 701a strb r2, [r3, #0]
tx[0] = iobuf[0];
8002bca: 4b23 ldr r3, [pc, #140] ; (8002c58 <HAL_UART_RxCpltCallback+0x374>)
8002bcc: 781a ldrb r2, [r3, #0]
8002bce: 4b24 ldr r3, [pc, #144] ; (8002c60 <HAL_UART_RxCpltCallback+0x37c>)
8002bd0: 701a strb r2, [r3, #0]
tx[1] = iobuf[1];
8002bd2: 4b21 ldr r3, [pc, #132] ; (8002c58 <HAL_UART_RxCpltCallback+0x374>)
8002bd4: 785a ldrb r2, [r3, #1]
8002bd6: 4b22 ldr r3, [pc, #136] ; (8002c60 <HAL_UART_RxCpltCallback+0x37c>)
8002bd8: 705a strb r2, [r3, #1]
tx[2] = regs.ch[0] << 2; // êîë-âî áàéò äàííûõ
8002bda: 230c movs r3, #12
8002bdc: 18fb adds r3, r7, r3
8002bde: 781b ldrb r3, [r3, #0]
8002be0: 009b lsls r3, r3, #2
8002be2: b2da uxtb r2, r3
8002be4: 4b1e ldr r3, [pc, #120] ; (8002c60 <HAL_UART_RxCpltCallback+0x37c>)
8002be6: 709a strb r2, [r3, #2]
if(addr.sh == 7002)
8002be8: 2310 movs r3, #16
8002bea: 18fb adds r3, r7, r3
8002bec: 881b ldrh r3, [r3, #0]
8002bee: 4a21 ldr r2, [pc, #132] ; (8002c74 <HAL_UART_RxCpltCallback+0x390>)
8002bf0: 4293 cmp r3, r2
8002bf2: d10c bne.n 8002c0e <HAL_UART_RxCpltCallback+0x32a>
tmp <<= 1; //tmp=6
8002bf4: 231e movs r3, #30
8002bf6: 18fa adds r2, r7, r3
8002bf8: 231e movs r3, #30
8002bfa: 18fb adds r3, r7, r3
8002bfc: 781b ldrb r3, [r3, #0]
8002bfe: 18db adds r3, r3, r3
8002c00: 7013 strb r3, [r2, #0]
tx[2] >>= 1; //êîë-âî ñëîâ äàííûõ
8002c02: 4b17 ldr r3, [pc, #92] ; (8002c60 <HAL_UART_RxCpltCallback+0x37c>)
8002c04: 789b ldrb r3, [r3, #2]
8002c06: 085b lsrs r3, r3, #1
8002c08: b2da uxtb r2, r3
8002c0a: 4b15 ldr r3, [pc, #84] ; (8002c60 <HAL_UART_RxCpltCallback+0x37c>)
8002c0c: 709a strb r2, [r3, #2]
if(regs.ch[0] > tmp)
8002c0e: 230c movs r3, #12
8002c10: 18fb adds r3, r7, r3
8002c12: 781b ldrb r3, [r3, #0]
8002c14: 221e movs r2, #30
8002c16: 18ba adds r2, r7, r2
8002c18: 7812 ldrb r2, [r2, #0]
8002c1a: 429a cmp r2, r3
8002c1c: d23a bcs.n 8002c94 <HAL_UART_RxCpltCallback+0x3b0>
tx[0] = iobuf[0];
8002c1e: 4b0e ldr r3, [pc, #56] ; (8002c58 <HAL_UART_RxCpltCallback+0x374>)
8002c20: 781a ldrb r2, [r3, #0]
8002c22: 4b0f ldr r3, [pc, #60] ; (8002c60 <HAL_UART_RxCpltCallback+0x37c>)
8002c24: 701a strb r2, [r3, #0]
tx[1] = (iobuf[1] | 0x80);
8002c26: 4b0c ldr r3, [pc, #48] ; (8002c58 <HAL_UART_RxCpltCallback+0x374>)
8002c28: 785b ldrb r3, [r3, #1]
8002c2a: 2280 movs r2, #128 ; 0x80
8002c2c: 4252 negs r2, r2
8002c2e: 4313 orrs r3, r2
8002c30: b2da uxtb r2, r3
8002c32: 4b0b ldr r3, [pc, #44] ; (8002c60 <HAL_UART_RxCpltCallback+0x37c>)
8002c34: 705a strb r2, [r3, #1]
tx[2] = 0x03;
8002c36: 4b0a ldr r3, [pc, #40] ; (8002c60 <HAL_UART_RxCpltCallback+0x37c>)
8002c38: 2203 movs r2, #3
8002c3a: 709a strb r2, [r3, #2]
strtOut(3);
8002c3c: 2003 movs r0, #3
8002c3e: f7ff fd5f bl 8002700 <strtOut>
break;
8002c42: e11c b.n 8002e7e <HAL_UART_RxCpltCallback+0x59a>
8002c44: 200000a0 .word 0x200000a0
8002c48: 08007444 .word 0x08007444
8002c4c: 20000290 .word 0x20000290
8002c50: 2000003d .word 0x2000003d
8002c54: 40013800 .word 0x40013800
8002c58: 20000294 .word 0x20000294
8002c5c: 20000292 .word 0x20000292
8002c60: 20000190 .word 0x20000190
8002c64: 2000002c .word 0x2000002c
8002c68: 00001b5c .word 0x00001b5c
8002c6c: 00001389 .word 0x00001389
8002c70: 00001392 .word 0x00001392
8002c74: 00001b5a .word 0x00001b5a
8002c78: 00001d4d .word 0x00001d4d
8002c7c: 00001b5e .word 0x00001b5e
8002c80: 00001d4e .word 0x00001d4e
8002c84: 00001d4f .word 0x00001d4f
8002c88: 00001393 .word 0x00001393
8002c8c: ffffec77 .word 0xffffec77
8002c90: 200000a6 .word 0x200000a6
f.fl = pardata.KCOND;
8002c94: 4be9 ldr r3, [pc, #932] ; (800303c <HAL_UART_RxCpltCallback+0x758>)
8002c96: 69db ldr r3, [r3, #28]
8002c98: 60bb str r3, [r7, #8]
tx[3] = f.ch[3];
8002c9a: 2308 movs r3, #8
8002c9c: 18fb adds r3, r7, r3
8002c9e: 78da ldrb r2, [r3, #3]
8002ca0: 4be7 ldr r3, [pc, #924] ; (8003040 <HAL_UART_RxCpltCallback+0x75c>)
8002ca2: 70da strb r2, [r3, #3]
tx[4] = f.ch[2];
8002ca4: 2308 movs r3, #8
8002ca6: 18fb adds r3, r7, r3
8002ca8: 789a ldrb r2, [r3, #2]
8002caa: 4be5 ldr r3, [pc, #916] ; (8003040 <HAL_UART_RxCpltCallback+0x75c>)
8002cac: 711a strb r2, [r3, #4]
tx[5] = f.ch[1];
8002cae: 2308 movs r3, #8
8002cb0: 18fb adds r3, r7, r3
8002cb2: 785a ldrb r2, [r3, #1]
8002cb4: 4be2 ldr r3, [pc, #904] ; (8003040 <HAL_UART_RxCpltCallback+0x75c>)
8002cb6: 715a strb r2, [r3, #5]
tx[6] = f.ch[0];
8002cb8: 2308 movs r3, #8
8002cba: 18fb adds r3, r7, r3
8002cbc: 781a ldrb r2, [r3, #0]
8002cbe: 4be0 ldr r3, [pc, #896] ; (8003040 <HAL_UART_RxCpltCallback+0x75c>)
8002cc0: 719a strb r2, [r3, #6]
strtOut(3 + tx[2]);
8002cc2: 4bdf ldr r3, [pc, #892] ; (8003040 <HAL_UART_RxCpltCallback+0x75c>)
8002cc4: 789b ldrb r3, [r3, #2]
8002cc6: b29b uxth r3, r3
8002cc8: 3303 adds r3, #3
8002cca: b29b uxth r3, r3
8002ccc: 0018 movs r0, r3
8002cce: f7ff fd17 bl 8002700 <strtOut>
break;
8002cd2: e0d4 b.n 8002e7e <HAL_UART_RxCpltCallback+0x59a>
tmp = 2;
8002cd4: 231e movs r3, #30
8002cd6: 18fb adds r3, r7, r3
8002cd8: 2202 movs r2, #2
8002cda: 701a strb r2, [r3, #0]
tx[0] = iobuf[0];
8002cdc: 4bd9 ldr r3, [pc, #868] ; (8003044 <HAL_UART_RxCpltCallback+0x760>)
8002cde: 781a ldrb r2, [r3, #0]
8002ce0: 4bd7 ldr r3, [pc, #860] ; (8003040 <HAL_UART_RxCpltCallback+0x75c>)
8002ce2: 701a strb r2, [r3, #0]
tx[1] = iobuf[1];
8002ce4: 4bd7 ldr r3, [pc, #860] ; (8003044 <HAL_UART_RxCpltCallback+0x760>)
8002ce6: 785a ldrb r2, [r3, #1]
8002ce8: 4bd5 ldr r3, [pc, #852] ; (8003040 <HAL_UART_RxCpltCallback+0x75c>)
8002cea: 705a strb r2, [r3, #1]
tx[2] = regs.ch[0] << 2;
8002cec: 230c movs r3, #12
8002cee: 18fb adds r3, r7, r3
8002cf0: 781b ldrb r3, [r3, #0]
8002cf2: 009b lsls r3, r3, #2
8002cf4: b2da uxtb r2, r3
8002cf6: 4bd2 ldr r3, [pc, #840] ; (8003040 <HAL_UART_RxCpltCallback+0x75c>)
8002cf8: 709a strb r2, [r3, #2]
if(addr.sh == 7004)
8002cfa: 2310 movs r3, #16
8002cfc: 18fb adds r3, r7, r3
8002cfe: 881b ldrh r3, [r3, #0]
8002d00: 4ad1 ldr r2, [pc, #836] ; (8003048 <HAL_UART_RxCpltCallback+0x764>)
8002d02: 4293 cmp r3, r2
8002d04: d10c bne.n 8002d20 <HAL_UART_RxCpltCallback+0x43c>
tmp <<= 1;
8002d06: 231e movs r3, #30
8002d08: 18fa adds r2, r7, r3
8002d0a: 231e movs r3, #30
8002d0c: 18fb adds r3, r7, r3
8002d0e: 781b ldrb r3, [r3, #0]
8002d10: 18db adds r3, r3, r3
8002d12: 7013 strb r3, [r2, #0]
tx[2] >>= 1;
8002d14: 4bca ldr r3, [pc, #808] ; (8003040 <HAL_UART_RxCpltCallback+0x75c>)
8002d16: 789b ldrb r3, [r3, #2]
8002d18: 085b lsrs r3, r3, #1
8002d1a: b2da uxtb r2, r3
8002d1c: 4bc8 ldr r3, [pc, #800] ; (8003040 <HAL_UART_RxCpltCallback+0x75c>)
8002d1e: 709a strb r2, [r3, #2]
if(regs.ch[0] > tmp)
8002d20: 230c movs r3, #12
8002d22: 18fb adds r3, r7, r3
8002d24: 781b ldrb r3, [r3, #0]
8002d26: 221e movs r2, #30
8002d28: 18ba adds r2, r7, r2
8002d2a: 7812 ldrb r2, [r2, #0]
8002d2c: 429a cmp r2, r3
8002d2e: d212 bcs.n 8002d56 <HAL_UART_RxCpltCallback+0x472>
tx[0] = iobuf[0];
8002d30: 4bc4 ldr r3, [pc, #784] ; (8003044 <HAL_UART_RxCpltCallback+0x760>)
8002d32: 781a ldrb r2, [r3, #0]
8002d34: 4bc2 ldr r3, [pc, #776] ; (8003040 <HAL_UART_RxCpltCallback+0x75c>)
8002d36: 701a strb r2, [r3, #0]
tx[1] = (iobuf[1] | 0x80);
8002d38: 4bc2 ldr r3, [pc, #776] ; (8003044 <HAL_UART_RxCpltCallback+0x760>)
8002d3a: 785b ldrb r3, [r3, #1]
8002d3c: 2280 movs r2, #128 ; 0x80
8002d3e: 4252 negs r2, r2
8002d40: 4313 orrs r3, r2
8002d42: b2da uxtb r2, r3
8002d44: 4bbe ldr r3, [pc, #760] ; (8003040 <HAL_UART_RxCpltCallback+0x75c>)
8002d46: 705a strb r2, [r3, #1]
tx[2] = 0x03;
8002d48: 4bbd ldr r3, [pc, #756] ; (8003040 <HAL_UART_RxCpltCallback+0x75c>)
8002d4a: 2203 movs r2, #3
8002d4c: 709a strb r2, [r3, #2]
strtOut(3);
8002d4e: 2003 movs r0, #3
8002d50: f7ff fcd6 bl 8002700 <strtOut>
break;
8002d54: e093 b.n 8002e7e <HAL_UART_RxCpltCallback+0x59a>
f.fl = pardata.SENS;
8002d56: 4bb9 ldr r3, [pc, #740] ; (800303c <HAL_UART_RxCpltCallback+0x758>)
8002d58: 6a1b ldr r3, [r3, #32]
8002d5a: 60bb str r3, [r7, #8]
tx[3] = f.ch[3];
8002d5c: 2308 movs r3, #8
8002d5e: 18fb adds r3, r7, r3
8002d60: 78da ldrb r2, [r3, #3]
8002d62: 4bb7 ldr r3, [pc, #732] ; (8003040 <HAL_UART_RxCpltCallback+0x75c>)
8002d64: 70da strb r2, [r3, #3]
tx[4] = f.ch[2];
8002d66: 2308 movs r3, #8
8002d68: 18fb adds r3, r7, r3
8002d6a: 789a ldrb r2, [r3, #2]
8002d6c: 4bb4 ldr r3, [pc, #720] ; (8003040 <HAL_UART_RxCpltCallback+0x75c>)
8002d6e: 711a strb r2, [r3, #4]
tx[5] = f.ch[1];
8002d70: 2308 movs r3, #8
8002d72: 18fb adds r3, r7, r3
8002d74: 785a ldrb r2, [r3, #1]
8002d76: 4bb2 ldr r3, [pc, #712] ; (8003040 <HAL_UART_RxCpltCallback+0x75c>)
8002d78: 715a strb r2, [r3, #5]
tx[6] = f.ch[0];
8002d7a: 2308 movs r3, #8
8002d7c: 18fb adds r3, r7, r3
8002d7e: 781a ldrb r2, [r3, #0]
8002d80: 4baf ldr r3, [pc, #700] ; (8003040 <HAL_UART_RxCpltCallback+0x75c>)
8002d82: 719a strb r2, [r3, #6]
strtOut(3 + tx[2]);
8002d84: 4bae ldr r3, [pc, #696] ; (8003040 <HAL_UART_RxCpltCallback+0x75c>)
8002d86: 789b ldrb r3, [r3, #2]
8002d88: b29b uxth r3, r3
8002d8a: 3303 adds r3, #3
8002d8c: b29b uxth r3, r3
8002d8e: 0018 movs r0, r3
8002d90: f7ff fcb6 bl 8002700 <strtOut>
break;
8002d94: e073 b.n 8002e7e <HAL_UART_RxCpltCallback+0x59a>
tmp = 1;
8002d96: 231e movs r3, #30
8002d98: 18fb adds r3, r7, r3
8002d9a: 2201 movs r2, #1
8002d9c: 701a strb r2, [r3, #0]
tx[0] = iobuf[0];
8002d9e: 4ba9 ldr r3, [pc, #676] ; (8003044 <HAL_UART_RxCpltCallback+0x760>)
8002da0: 781a ldrb r2, [r3, #0]
8002da2: 4ba7 ldr r3, [pc, #668] ; (8003040 <HAL_UART_RxCpltCallback+0x75c>)
8002da4: 701a strb r2, [r3, #0]
tx[1] = iobuf[1];
8002da6: 4ba7 ldr r3, [pc, #668] ; (8003044 <HAL_UART_RxCpltCallback+0x760>)
8002da8: 785a ldrb r2, [r3, #1]
8002daa: 4ba5 ldr r3, [pc, #660] ; (8003040 <HAL_UART_RxCpltCallback+0x75c>)
8002dac: 705a strb r2, [r3, #1]
tx[2] = regs.ch[0] << 2;
8002dae: 230c movs r3, #12
8002db0: 18fb adds r3, r7, r3
8002db2: 781b ldrb r3, [r3, #0]
8002db4: 009b lsls r3, r3, #2
8002db6: b2da uxtb r2, r3
8002db8: 4ba1 ldr r3, [pc, #644] ; (8003040 <HAL_UART_RxCpltCallback+0x75c>)
8002dba: 709a strb r2, [r3, #2]
if(addr.sh == 7006)
8002dbc: 2310 movs r3, #16
8002dbe: 18fb adds r3, r7, r3
8002dc0: 881b ldrh r3, [r3, #0]
8002dc2: 4aa2 ldr r2, [pc, #648] ; (800304c <HAL_UART_RxCpltCallback+0x768>)
8002dc4: 4293 cmp r3, r2
8002dc6: d10c bne.n 8002de2 <HAL_UART_RxCpltCallback+0x4fe>
tmp <<= 1;
8002dc8: 231e movs r3, #30
8002dca: 18fa adds r2, r7, r3
8002dcc: 231e movs r3, #30
8002dce: 18fb adds r3, r7, r3
8002dd0: 781b ldrb r3, [r3, #0]
8002dd2: 18db adds r3, r3, r3
8002dd4: 7013 strb r3, [r2, #0]
tx[2] >>= 1;
8002dd6: 4b9a ldr r3, [pc, #616] ; (8003040 <HAL_UART_RxCpltCallback+0x75c>)
8002dd8: 789b ldrb r3, [r3, #2]
8002dda: 085b lsrs r3, r3, #1
8002ddc: b2da uxtb r2, r3
8002dde: 4b98 ldr r3, [pc, #608] ; (8003040 <HAL_UART_RxCpltCallback+0x75c>)
8002de0: 709a strb r2, [r3, #2]
if(regs.ch[0] > tmp)
8002de2: 230c movs r3, #12
8002de4: 18fb adds r3, r7, r3
8002de6: 781b ldrb r3, [r3, #0]
8002de8: 221e movs r2, #30
8002dea: 18ba adds r2, r7, r2
8002dec: 7812 ldrb r2, [r2, #0]
8002dee: 429a cmp r2, r3
8002df0: d212 bcs.n 8002e18 <HAL_UART_RxCpltCallback+0x534>
tx[0] = iobuf[0];
8002df2: 4b94 ldr r3, [pc, #592] ; (8003044 <HAL_UART_RxCpltCallback+0x760>)
8002df4: 781a ldrb r2, [r3, #0]
8002df6: 4b92 ldr r3, [pc, #584] ; (8003040 <HAL_UART_RxCpltCallback+0x75c>)
8002df8: 701a strb r2, [r3, #0]
tx[1] = (iobuf[1] | 0x80);
8002dfa: 4b92 ldr r3, [pc, #584] ; (8003044 <HAL_UART_RxCpltCallback+0x760>)
8002dfc: 785b ldrb r3, [r3, #1]
8002dfe: 2280 movs r2, #128 ; 0x80
8002e00: 4252 negs r2, r2
8002e02: 4313 orrs r3, r2
8002e04: b2da uxtb r2, r3
8002e06: 4b8e ldr r3, [pc, #568] ; (8003040 <HAL_UART_RxCpltCallback+0x75c>)
8002e08: 705a strb r2, [r3, #1]
tx[2] = 0x03;
8002e0a: 4b8d ldr r3, [pc, #564] ; (8003040 <HAL_UART_RxCpltCallback+0x75c>)
8002e0c: 2203 movs r2, #3
8002e0e: 709a strb r2, [r3, #2]
strtOut(3);
8002e10: 2003 movs r0, #3
8002e12: f7ff fc75 bl 8002700 <strtOut>
break;
8002e16: e032 b.n 8002e7e <HAL_UART_RxCpltCallback+0x59a>
f.fl = pardata.ACCEL;
8002e18: 4b88 ldr r3, [pc, #544] ; (800303c <HAL_UART_RxCpltCallback+0x758>)
8002e1a: 6a5b ldr r3, [r3, #36] ; 0x24
8002e1c: 60bb str r3, [r7, #8]
tx[3] = f.ch[3];
8002e1e: 2308 movs r3, #8
8002e20: 18fb adds r3, r7, r3
8002e22: 78da ldrb r2, [r3, #3]
8002e24: 4b86 ldr r3, [pc, #536] ; (8003040 <HAL_UART_RxCpltCallback+0x75c>)
8002e26: 70da strb r2, [r3, #3]
tx[4] = f.ch[2];
8002e28: 2308 movs r3, #8
8002e2a: 18fb adds r3, r7, r3
8002e2c: 789a ldrb r2, [r3, #2]
8002e2e: 4b84 ldr r3, [pc, #528] ; (8003040 <HAL_UART_RxCpltCallback+0x75c>)
8002e30: 711a strb r2, [r3, #4]
tx[5] = f.ch[1];
8002e32: 2308 movs r3, #8
8002e34: 18fb adds r3, r7, r3
8002e36: 785a ldrb r2, [r3, #1]
8002e38: 4b81 ldr r3, [pc, #516] ; (8003040 <HAL_UART_RxCpltCallback+0x75c>)
8002e3a: 715a strb r2, [r3, #5]
tx[6] = f.ch[0];
8002e3c: 2308 movs r3, #8
8002e3e: 18fb adds r3, r7, r3
8002e40: 781a ldrb r2, [r3, #0]
8002e42: 4b7f ldr r3, [pc, #508] ; (8003040 <HAL_UART_RxCpltCallback+0x75c>)
8002e44: 719a strb r2, [r3, #6]
strtOut(3 + tx[2]);
8002e46: 4b7e ldr r3, [pc, #504] ; (8003040 <HAL_UART_RxCpltCallback+0x75c>)
8002e48: 789b ldrb r3, [r3, #2]
8002e4a: b29b uxth r3, r3
8002e4c: 3303 adds r3, #3
8002e4e: b29b uxth r3, r3
8002e50: 0018 movs r0, r3
8002e52: f7ff fc55 bl 8002700 <strtOut>
break;
8002e56: e012 b.n 8002e7e <HAL_UART_RxCpltCallback+0x59a>
tx[0] = iobuf[0];
8002e58: 4b7a ldr r3, [pc, #488] ; (8003044 <HAL_UART_RxCpltCallback+0x760>)
8002e5a: 781a ldrb r2, [r3, #0]
8002e5c: 4b78 ldr r3, [pc, #480] ; (8003040 <HAL_UART_RxCpltCallback+0x75c>)
8002e5e: 701a strb r2, [r3, #0]
tx[1] = (iobuf[1] | 0x80);
8002e60: 4b78 ldr r3, [pc, #480] ; (8003044 <HAL_UART_RxCpltCallback+0x760>)
8002e62: 785b ldrb r3, [r3, #1]
8002e64: 2280 movs r2, #128 ; 0x80
8002e66: 4252 negs r2, r2
8002e68: 4313 orrs r3, r2
8002e6a: b2da uxtb r2, r3
8002e6c: 4b74 ldr r3, [pc, #464] ; (8003040 <HAL_UART_RxCpltCallback+0x75c>)
8002e6e: 705a strb r2, [r3, #1]
tx[2] = 0x02;
8002e70: 4b73 ldr r3, [pc, #460] ; (8003040 <HAL_UART_RxCpltCallback+0x75c>)
8002e72: 2202 movs r2, #2
8002e74: 709a strb r2, [r3, #2]
strtOut(3);
8002e76: 2003 movs r0, #3
8002e78: f7ff fc42 bl 8002700 <strtOut>
break;
8002e7c: 46c0 nop ; (mov r8, r8)
break;
8002e7e: f000 fefe bl 8003c7e <HAL_UART_RxCpltCallback+0x139a>
addr.ch[1] = iobuf[2];
8002e82: 4b70 ldr r3, [pc, #448] ; (8003044 <HAL_UART_RxCpltCallback+0x760>)
8002e84: 789a ldrb r2, [r3, #2]
8002e86: 2310 movs r3, #16
8002e88: 18fb adds r3, r7, r3
8002e8a: 705a strb r2, [r3, #1]
addr.ch[0] = iobuf[3];
8002e8c: 4b6d ldr r3, [pc, #436] ; (8003044 <HAL_UART_RxCpltCallback+0x760>)
8002e8e: 78da ldrb r2, [r3, #3]
8002e90: 2310 movs r3, #16
8002e92: 18fb adds r3, r7, r3
8002e94: 701a strb r2, [r3, #0]
regs.ch[1] = iobuf[4];
8002e96: 4b6b ldr r3, [pc, #428] ; (8003044 <HAL_UART_RxCpltCallback+0x760>)
8002e98: 791a ldrb r2, [r3, #4]
8002e9a: 230c movs r3, #12
8002e9c: 18fb adds r3, r7, r3
8002e9e: 705a strb r2, [r3, #1]
regs.ch[0] = iobuf[5];
8002ea0: 4b68 ldr r3, [pc, #416] ; (8003044 <HAL_UART_RxCpltCallback+0x760>)
8002ea2: 795a ldrb r2, [r3, #5]
8002ea4: 230c movs r3, #12
8002ea6: 18fb adds r3, r7, r3
8002ea8: 701a strb r2, [r3, #0]
switch(addr.sh) // Запись pardata
8002eaa: 2310 movs r3, #16
8002eac: 18fb adds r3, r7, r3
8002eae: 881b ldrh r3, [r3, #0]
8002eb0: 4a67 ldr r2, [pc, #412] ; (8003050 <HAL_UART_RxCpltCallback+0x76c>)
8002eb2: 4293 cmp r3, r2
8002eb4: d101 bne.n 8002eba <HAL_UART_RxCpltCallback+0x5d6>
8002eb6: f000 fba4 bl 8003602 <HAL_UART_RxCpltCallback+0xd1e>
8002eba: 4a65 ldr r2, [pc, #404] ; (8003050 <HAL_UART_RxCpltCallback+0x76c>)
8002ebc: 4293 cmp r3, r2
8002ebe: dc13 bgt.n 8002ee8 <HAL_UART_RxCpltCallback+0x604>
8002ec0: 4a64 ldr r2, [pc, #400] ; (8003054 <HAL_UART_RxCpltCallback+0x770>)
8002ec2: 4293 cmp r3, r2
8002ec4: dc08 bgt.n 8002ed8 <HAL_UART_RxCpltCallback+0x5f4>
8002ec6: 4a64 ldr r2, [pc, #400] ; (8003058 <HAL_UART_RxCpltCallback+0x774>)
8002ec8: 4293 cmp r3, r2
8002eca: db00 blt.n 8002ece <HAL_UART_RxCpltCallback+0x5ea>
8002ecc: e0d8 b.n 8003080 <HAL_UART_RxCpltCallback+0x79c>
8002ece: 4a63 ldr r2, [pc, #396] ; (800305c <HAL_UART_RxCpltCallback+0x778>)
8002ed0: 4293 cmp r3, r2
8002ed2: d029 beq.n 8002f28 <HAL_UART_RxCpltCallback+0x644>
8002ed4: f000 feb4 bl 8003c40 <HAL_UART_RxCpltCallback+0x135c>
8002ed8: 4a61 ldr r2, [pc, #388] ; (8003060 <HAL_UART_RxCpltCallback+0x77c>)
8002eda: 4694 mov ip, r2
8002edc: 4463 add r3, ip
8002ede: 2b09 cmp r3, #9
8002ee0: d901 bls.n 8002ee6 <HAL_UART_RxCpltCallback+0x602>
8002ee2: f000 fead bl 8003c40 <HAL_UART_RxCpltCallback+0x135c>
8002ee6: e2ac b.n 8003442 <HAL_UART_RxCpltCallback+0xb5e>
8002ee8: 4a5e ldr r2, [pc, #376] ; (8003064 <HAL_UART_RxCpltCallback+0x780>)
8002eea: 4293 cmp r3, r2
8002eec: d101 bne.n 8002ef2 <HAL_UART_RxCpltCallback+0x60e>
8002eee: f000 fb88 bl 8003602 <HAL_UART_RxCpltCallback+0xd1e>
8002ef2: 4a5c ldr r2, [pc, #368] ; (8003064 <HAL_UART_RxCpltCallback+0x780>)
8002ef4: 4293 cmp r3, r2
8002ef6: dc0b bgt.n 8002f10 <HAL_UART_RxCpltCallback+0x62c>
8002ef8: 4a53 ldr r2, [pc, #332] ; (8003048 <HAL_UART_RxCpltCallback+0x764>)
8002efa: 4293 cmp r3, r2
8002efc: d101 bne.n 8002f02 <HAL_UART_RxCpltCallback+0x61e>
8002efe: f000 fd03 bl 8003908 <HAL_UART_RxCpltCallback+0x1024>
8002f02: 4a52 ldr r2, [pc, #328] ; (800304c <HAL_UART_RxCpltCallback+0x768>)
8002f04: 4293 cmp r3, r2
8002f06: d101 bne.n 8002f0c <HAL_UART_RxCpltCallback+0x628>
8002f08: f000 fddc bl 8003ac4 <HAL_UART_RxCpltCallback+0x11e0>
8002f0c: f000 fe98 bl 8003c40 <HAL_UART_RxCpltCallback+0x135c>
8002f10: 4a55 ldr r2, [pc, #340] ; (8003068 <HAL_UART_RxCpltCallback+0x784>)
8002f12: 4293 cmp r3, r2
8002f14: d101 bne.n 8002f1a <HAL_UART_RxCpltCallback+0x636>
8002f16: f000 fcf7 bl 8003908 <HAL_UART_RxCpltCallback+0x1024>
8002f1a: 4a54 ldr r2, [pc, #336] ; (800306c <HAL_UART_RxCpltCallback+0x788>)
8002f1c: 4293 cmp r3, r2
8002f1e: d101 bne.n 8002f24 <HAL_UART_RxCpltCallback+0x640>
8002f20: f000 fdd0 bl 8003ac4 <HAL_UART_RxCpltCallback+0x11e0>
8002f24: f000 fe8c bl 8003c40 <HAL_UART_RxCpltCallback+0x135c>
if((regs.ch[0] > 1) || (iobuf[6] != (regs.ch[0] << 1)))
8002f28: 230c movs r3, #12
8002f2a: 18fb adds r3, r7, r3
8002f2c: 781b ldrb r3, [r3, #0]
8002f2e: 2b01 cmp r3, #1
8002f30: d808 bhi.n 8002f44 <HAL_UART_RxCpltCallback+0x660>
8002f32: 4b44 ldr r3, [pc, #272] ; (8003044 <HAL_UART_RxCpltCallback+0x760>)
8002f34: 799b ldrb r3, [r3, #6]
8002f36: 001a movs r2, r3
8002f38: 230c movs r3, #12
8002f3a: 18fb adds r3, r7, r3
8002f3c: 781b ldrb r3, [r3, #0]
8002f3e: 005b lsls r3, r3, #1
8002f40: 429a cmp r2, r3
8002f42: d013 beq.n 8002f6c <HAL_UART_RxCpltCallback+0x688>
tx[0] = iobuf[0];
8002f44: 4b3f ldr r3, [pc, #252] ; (8003044 <HAL_UART_RxCpltCallback+0x760>)
8002f46: 781a ldrb r2, [r3, #0]
8002f48: 4b3d ldr r3, [pc, #244] ; (8003040 <HAL_UART_RxCpltCallback+0x75c>)
8002f4a: 701a strb r2, [r3, #0]
tx[1] = (iobuf[1] | 0x80);
8002f4c: 4b3d ldr r3, [pc, #244] ; (8003044 <HAL_UART_RxCpltCallback+0x760>)
8002f4e: 785b ldrb r3, [r3, #1]
8002f50: 2280 movs r2, #128 ; 0x80
8002f52: 4252 negs r2, r2
8002f54: 4313 orrs r3, r2
8002f56: b2da uxtb r2, r3
8002f58: 4b39 ldr r3, [pc, #228] ; (8003040 <HAL_UART_RxCpltCallback+0x75c>)
8002f5a: 705a strb r2, [r3, #1]
tx[2] = 0x03;
8002f5c: 4b38 ldr r3, [pc, #224] ; (8003040 <HAL_UART_RxCpltCallback+0x75c>)
8002f5e: 2203 movs r2, #3
8002f60: 709a strb r2, [r3, #2]
strtOut(3);
8002f62: 2003 movs r0, #3
8002f64: f7ff fbcc bl 8002700 <strtOut>
break;
8002f68: f000 fe7d bl 8003c66 <HAL_UART_RxCpltCallback+0x1382>
j = 8 + iobuf[6];
8002f6c: 4b35 ldr r3, [pc, #212] ; (8003044 <HAL_UART_RxCpltCallback+0x760>)
8002f6e: 799a ldrb r2, [r3, #6]
8002f70: 231f movs r3, #31
8002f72: 18fb adds r3, r7, r3
8002f74: 3208 adds r2, #8
8002f76: 701a strb r2, [r3, #0]
if(iolen > j)
8002f78: 4b3d ldr r3, [pc, #244] ; (8003070 <HAL_UART_RxCpltCallback+0x78c>)
8002f7a: 781b ldrb r3, [r3, #0]
8002f7c: 221f movs r2, #31
8002f7e: 18ba adds r2, r7, r2
8002f80: 7812 ldrb r2, [r2, #0]
8002f82: 429a cmp r2, r3
8002f84: d301 bcc.n 8002f8a <HAL_UART_RxCpltCallback+0x6a6>
8002f86: f000 fe6e bl 8003c66 <HAL_UART_RxCpltCallback+0x1382>
iolen = 0;
8002f8a: 4b39 ldr r3, [pc, #228] ; (8003070 <HAL_UART_RxCpltCallback+0x78c>)
8002f8c: 2200 movs r2, #0
8002f8e: 701a strb r2, [r3, #0]
crc.ch[0] = iobuf[j - 1];
8002f90: 231f movs r3, #31
8002f92: 18fb adds r3, r7, r3
8002f94: 781b ldrb r3, [r3, #0]
8002f96: 3b01 subs r3, #1
8002f98: 4a2a ldr r2, [pc, #168] ; (8003044 <HAL_UART_RxCpltCallback+0x760>)
8002f9a: 5cd2 ldrb r2, [r2, r3]
8002f9c: 2314 movs r3, #20
8002f9e: 18fb adds r3, r7, r3
8002fa0: 701a strb r2, [r3, #0]
crc.ch[1] = iobuf[j];
8002fa2: 231f movs r3, #31
8002fa4: 18fb adds r3, r7, r3
8002fa6: 781b ldrb r3, [r3, #0]
8002fa8: 4a26 ldr r2, [pc, #152] ; (8003044 <HAL_UART_RxCpltCallback+0x760>)
8002faa: 5cd2 ldrb r2, [r2, r3]
8002fac: 2314 movs r3, #20
8002fae: 18fb adds r3, r7, r3
8002fb0: 705a strb r2, [r3, #1]
if(crc.sh == Crc16(j - 1))
8002fb2: 2314 movs r3, #20
8002fb4: 18fb adds r3, r7, r3
8002fb6: 881c ldrh r4, [r3, #0]
8002fb8: 231f movs r3, #31
8002fba: 18fb adds r3, r7, r3
8002fbc: 781b ldrb r3, [r3, #0]
8002fbe: b29b uxth r3, r3
8002fc0: 3b01 subs r3, #1
8002fc2: b29b uxth r3, r3
8002fc4: 0018 movs r0, r3
8002fc6: f7ff fbe7 bl 8002798 <Crc16>
8002fca: 0003 movs r3, r0
8002fcc: 429c cmp r4, r3
8002fce: d001 beq.n 8002fd4 <HAL_UART_RxCpltCallback+0x6f0>
8002fd0: f000 fe49 bl 8003c66 <HAL_UART_RxCpltCallback+0x1382>
if(!iobuf[8])
8002fd4: 4b1b ldr r3, [pc, #108] ; (8003044 <HAL_UART_RxCpltCallback+0x760>)
8002fd6: 7a1b ldrb r3, [r3, #8]
8002fd8: 2b00 cmp r3, #0
8002fda: d106 bne.n 8002fea <HAL_UART_RxCpltCallback+0x706>
faseClbr = 0;
8002fdc: 4b25 ldr r3, [pc, #148] ; (8003074 <HAL_UART_RxCpltCallback+0x790>)
8002fde: 2200 movs r2, #0
8002fe0: 601a str r2, [r3, #0]
clbr = false;
8002fe2: 4b25 ldr r3, [pc, #148] ; (8003078 <HAL_UART_RxCpltCallback+0x794>)
8002fe4: 2200 movs r2, #0
8002fe6: 701a strb r2, [r3, #0]
8002fe8: e008 b.n 8002ffc <HAL_UART_RxCpltCallback+0x718>
needClbr = true;
8002fea: 4b24 ldr r3, [pc, #144] ; (800307c <HAL_UART_RxCpltCallback+0x798>)
8002fec: 2201 movs r2, #1
8002fee: 701a strb r2, [r3, #0]
faseClbr = iobuf[8] - 1;
8002ff0: 4b14 ldr r3, [pc, #80] ; (8003044 <HAL_UART_RxCpltCallback+0x760>)
8002ff2: 7a1b ldrb r3, [r3, #8]
8002ff4: 3b01 subs r3, #1
8002ff6: 001a movs r2, r3
8002ff8: 4b1e ldr r3, [pc, #120] ; (8003074 <HAL_UART_RxCpltCallback+0x790>)
8002ffa: 601a str r2, [r3, #0]
for(j = 0; j < 6; j++) {
8002ffc: 231f movs r3, #31
8002ffe: 18fb adds r3, r7, r3
8003000: 2200 movs r2, #0
8003002: 701a strb r2, [r3, #0]
8003004: e010 b.n 8003028 <HAL_UART_RxCpltCallback+0x744>
tx[j] = iobuf[j];
8003006: 231f movs r3, #31
8003008: 18fb adds r3, r7, r3
800300a: 781b ldrb r3, [r3, #0]
800300c: 221f movs r2, #31
800300e: 18ba adds r2, r7, r2
8003010: 7812 ldrb r2, [r2, #0]
8003012: 490c ldr r1, [pc, #48] ; (8003044 <HAL_UART_RxCpltCallback+0x760>)
8003014: 5c89 ldrb r1, [r1, r2]
8003016: 4a0a ldr r2, [pc, #40] ; (8003040 <HAL_UART_RxCpltCallback+0x75c>)
8003018: 54d1 strb r1, [r2, r3]
for(j = 0; j < 6; j++) {
800301a: 231f movs r3, #31
800301c: 18fb adds r3, r7, r3
800301e: 781a ldrb r2, [r3, #0]
8003020: 231f movs r3, #31
8003022: 18fb adds r3, r7, r3
8003024: 3201 adds r2, #1
8003026: 701a strb r2, [r3, #0]
8003028: 231f movs r3, #31
800302a: 18fb adds r3, r7, r3
800302c: 781b ldrb r3, [r3, #0]
800302e: 2b05 cmp r3, #5
8003030: d9e9 bls.n 8003006 <HAL_UART_RxCpltCallback+0x722>
strtOut(6);
8003032: 2006 movs r0, #6
8003034: f7ff fb64 bl 8002700 <strtOut>
break;
8003038: f000 fe15 bl 8003c66 <HAL_UART_RxCpltCallback+0x1382>
800303c: 200000a0 .word 0x200000a0
8003040: 20000190 .word 0x20000190
8003044: 20000294 .word 0x20000294
8003048: 00001b5c .word 0x00001b5c
800304c: 00001b5e .word 0x00001b5e
8003050: 00001b5a .word 0x00001b5a
8003054: 00000bcf .word 0x00000bcf
8003058: 00000bb9 .word 0x00000bb9
800305c: 00000bb8 .word 0x00000bb8
8003060: ffffec77 .word 0xffffec77
8003064: 00001d4d .word 0x00001d4d
8003068: 00001d4e .word 0x00001d4e
800306c: 00001d4f .word 0x00001d4f
8003070: 2000003d .word 0x2000003d
8003074: 20000038 .word 0x20000038
8003078: 2000003c .word 0x2000003c
800307c: 20000034 .word 0x20000034
if((regs.ch[0] > 1) || (iobuf[6] != (regs.ch[0] << 1)))
8003080: 230c movs r3, #12
8003082: 18fb adds r3, r7, r3
8003084: 781b ldrb r3, [r3, #0]
8003086: 2b01 cmp r3, #1
8003088: d808 bhi.n 800309c <HAL_UART_RxCpltCallback+0x7b8>
800308a: 4bd7 ldr r3, [pc, #860] ; (80033e8 <HAL_UART_RxCpltCallback+0xb04>)
800308c: 799b ldrb r3, [r3, #6]
800308e: 001a movs r2, r3
8003090: 230c movs r3, #12
8003092: 18fb adds r3, r7, r3
8003094: 781b ldrb r3, [r3, #0]
8003096: 005b lsls r3, r3, #1
8003098: 429a cmp r2, r3
800309a: d013 beq.n 80030c4 <HAL_UART_RxCpltCallback+0x7e0>
tx[0] = iobuf[0];
800309c: 4bd2 ldr r3, [pc, #840] ; (80033e8 <HAL_UART_RxCpltCallback+0xb04>)
800309e: 781a ldrb r2, [r3, #0]
80030a0: 4bd2 ldr r3, [pc, #840] ; (80033ec <HAL_UART_RxCpltCallback+0xb08>)
80030a2: 701a strb r2, [r3, #0]
tx[1] = (iobuf[1] | 0x80);
80030a4: 4bd0 ldr r3, [pc, #832] ; (80033e8 <HAL_UART_RxCpltCallback+0xb04>)
80030a6: 785b ldrb r3, [r3, #1]
80030a8: 2280 movs r2, #128 ; 0x80
80030aa: 4252 negs r2, r2
80030ac: 4313 orrs r3, r2
80030ae: b2da uxtb r2, r3
80030b0: 4bce ldr r3, [pc, #824] ; (80033ec <HAL_UART_RxCpltCallback+0xb08>)
80030b2: 705a strb r2, [r3, #1]
tx[2] = 0x03;
80030b4: 4bcd ldr r3, [pc, #820] ; (80033ec <HAL_UART_RxCpltCallback+0xb08>)
80030b6: 2203 movs r2, #3
80030b8: 709a strb r2, [r3, #2]
strtOut(3);
80030ba: 2003 movs r0, #3
80030bc: f7ff fb20 bl 8002700 <strtOut>
break;
80030c0: f000 fdd3 bl 8003c6a <HAL_UART_RxCpltCallback+0x1386>
j = 8 + iobuf[6];
80030c4: 4bc8 ldr r3, [pc, #800] ; (80033e8 <HAL_UART_RxCpltCallback+0xb04>)
80030c6: 799a ldrb r2, [r3, #6]
80030c8: 231f movs r3, #31
80030ca: 18fb adds r3, r7, r3
80030cc: 3208 adds r2, #8
80030ce: 701a strb r2, [r3, #0]
if(iolen > j)
80030d0: 4bc7 ldr r3, [pc, #796] ; (80033f0 <HAL_UART_RxCpltCallback+0xb0c>)
80030d2: 781b ldrb r3, [r3, #0]
80030d4: 221f movs r2, #31
80030d6: 18ba adds r2, r7, r2
80030d8: 7812 ldrb r2, [r2, #0]
80030da: 429a cmp r2, r3
80030dc: d301 bcc.n 80030e2 <HAL_UART_RxCpltCallback+0x7fe>
80030de: f000 fdc4 bl 8003c6a <HAL_UART_RxCpltCallback+0x1386>
iolen = 0;
80030e2: 4bc3 ldr r3, [pc, #780] ; (80033f0 <HAL_UART_RxCpltCallback+0xb0c>)
80030e4: 2200 movs r2, #0
80030e6: 701a strb r2, [r3, #0]
crc.ch[0] = iobuf[j - 1];
80030e8: 231f movs r3, #31
80030ea: 18fb adds r3, r7, r3
80030ec: 781b ldrb r3, [r3, #0]
80030ee: 3b01 subs r3, #1
80030f0: 4abd ldr r2, [pc, #756] ; (80033e8 <HAL_UART_RxCpltCallback+0xb04>)
80030f2: 5cd2 ldrb r2, [r2, r3]
80030f4: 2314 movs r3, #20
80030f6: 18fb adds r3, r7, r3
80030f8: 701a strb r2, [r3, #0]
crc.ch[1] = iobuf[j];
80030fa: 231f movs r3, #31
80030fc: 18fb adds r3, r7, r3
80030fe: 781b ldrb r3, [r3, #0]
8003100: 4ab9 ldr r2, [pc, #740] ; (80033e8 <HAL_UART_RxCpltCallback+0xb04>)
8003102: 5cd2 ldrb r2, [r2, r3]
8003104: 2314 movs r3, #20
8003106: 18fb adds r3, r7, r3
8003108: 705a strb r2, [r3, #1]
if(crc.sh == Crc16(j - 1))
800310a: 2314 movs r3, #20
800310c: 18fb adds r3, r7, r3
800310e: 881c ldrh r4, [r3, #0]
8003110: 231f movs r3, #31
8003112: 18fb adds r3, r7, r3
8003114: 781b ldrb r3, [r3, #0]
8003116: b29b uxth r3, r3
8003118: 3b01 subs r3, #1
800311a: b29b uxth r3, r3
800311c: 0018 movs r0, r3
800311e: f7ff fb3b bl 8002798 <Crc16>
8003122: 0003 movs r3, r0
8003124: 429c cmp r4, r3
8003126: d001 beq.n 800312c <HAL_UART_RxCpltCallback+0x848>
8003128: f000 fd9f bl 8003c6a <HAL_UART_RxCpltCallback+0x1386>
if(clbr)
800312c: 4bb1 ldr r3, [pc, #708] ; (80033f4 <HAL_UART_RxCpltCallback+0xb10>)
800312e: 781b ldrb r3, [r3, #0]
8003130: b2db uxtb r3, r3
8003132: 2b00 cmp r3, #0
8003134: d100 bne.n 8003138 <HAL_UART_RxCpltCallback+0x854>
8003136: e152 b.n 80033de <HAL_UART_RxCpltCallback+0xafa>
switch(iobuf[8])
8003138: 4bab ldr r3, [pc, #684] ; (80033e8 <HAL_UART_RxCpltCallback+0xb04>)
800313a: 7a1b ldrb r3, [r3, #8]
800313c: 2b64 cmp r3, #100 ; 0x64
800313e: d100 bne.n 8003142 <HAL_UART_RxCpltCallback+0x85e>
8003140: e0d9 b.n 80032f6 <HAL_UART_RxCpltCallback+0xa12>
8003142: dc05 bgt.n 8003150 <HAL_UART_RxCpltCallback+0x86c>
8003144: 2b01 cmp r3, #1
8003146: d00c beq.n 8003162 <HAL_UART_RxCpltCallback+0x87e>
8003148: 2b0a cmp r3, #10
800314a: d100 bne.n 800314e <HAL_UART_RxCpltCallback+0x86a>
800314c: e06c b.n 8003228 <HAL_UART_RxCpltCallback+0x944>
800314e: e142 b.n 80033d6 <HAL_UART_RxCpltCallback+0xaf2>
8003150: 2b8a cmp r3, #138 ; 0x8a
8003152: d100 bne.n 8003156 <HAL_UART_RxCpltCallback+0x872>
8003154: e09c b.n 8003290 <HAL_UART_RxCpltCallback+0x9ac>
8003156: 2be4 cmp r3, #228 ; 0xe4
8003158: d100 bne.n 800315c <HAL_UART_RxCpltCallback+0x878>
800315a: e0ff b.n 800335c <HAL_UART_RxCpltCallback+0xa78>
800315c: 2b81 cmp r3, #129 ; 0x81
800315e: d032 beq.n 80031c6 <HAL_UART_RxCpltCallback+0x8e2>
8003160: e139 b.n 80033d6 <HAL_UART_RxCpltCallback+0xaf2>
if(CorrWord[pardata.IIN][pardata.IKU] < 4095)
8003162: 4ba5 ldr r3, [pc, #660] ; (80033f8 <HAL_UART_RxCpltCallback+0xb14>)
8003164: 88db ldrh r3, [r3, #6]
8003166: b29b uxth r3, r3
8003168: 0019 movs r1, r3
800316a: 4ba3 ldr r3, [pc, #652] ; (80033f8 <HAL_UART_RxCpltCallback+0xb14>)
800316c: 899b ldrh r3, [r3, #12]
800316e: b29b uxth r3, r3
8003170: 0018 movs r0, r3
8003172: 4aa2 ldr r2, [pc, #648] ; (80033fc <HAL_UART_RxCpltCallback+0xb18>)
8003174: 000b movs r3, r1
8003176: 009b lsls r3, r3, #2
8003178: 185b adds r3, r3, r1
800317a: 009b lsls r3, r3, #2
800317c: 181b adds r3, r3, r0
800317e: 005b lsls r3, r3, #1
8003180: 5a9b ldrh r3, [r3, r2]
8003182: b29b uxth r3, r3
8003184: 4a9e ldr r2, [pc, #632] ; (8003400 <HAL_UART_RxCpltCallback+0xb1c>)
8003186: 4293 cmp r3, r2
8003188: d900 bls.n 800318c <HAL_UART_RxCpltCallback+0x8a8>
800318a: e119 b.n 80033c0 <HAL_UART_RxCpltCallback+0xadc>
CorrWord[pardata.IIN][pardata.IKU]++;
800318c: 4b9a ldr r3, [pc, #616] ; (80033f8 <HAL_UART_RxCpltCallback+0xb14>)
800318e: 88db ldrh r3, [r3, #6]
8003190: b29b uxth r3, r3
8003192: 001a movs r2, r3
8003194: 4b98 ldr r3, [pc, #608] ; (80033f8 <HAL_UART_RxCpltCallback+0xb14>)
8003196: 899b ldrh r3, [r3, #12]
8003198: b29b uxth r3, r3
800319a: 0019 movs r1, r3
800319c: 4897 ldr r0, [pc, #604] ; (80033fc <HAL_UART_RxCpltCallback+0xb18>)
800319e: 0013 movs r3, r2
80031a0: 009b lsls r3, r3, #2
80031a2: 189b adds r3, r3, r2
80031a4: 009b lsls r3, r3, #2
80031a6: 185b adds r3, r3, r1
80031a8: 005b lsls r3, r3, #1
80031aa: 5a1b ldrh r3, [r3, r0]
80031ac: b29b uxth r3, r3
80031ae: 3301 adds r3, #1
80031b0: b29c uxth r4, r3
80031b2: 4892 ldr r0, [pc, #584] ; (80033fc <HAL_UART_RxCpltCallback+0xb18>)
80031b4: 0013 movs r3, r2
80031b6: 009b lsls r3, r3, #2
80031b8: 189b adds r3, r3, r2
80031ba: 009b lsls r3, r3, #2
80031bc: 185b adds r3, r3, r1
80031be: 005b lsls r3, r3, #1
80031c0: 1c22 adds r2, r4, #0
80031c2: 521a strh r2, [r3, r0]
break;
80031c4: e0fc b.n 80033c0 <HAL_UART_RxCpltCallback+0xadc>
if(CorrWord[pardata.IIN][pardata.IKU] > 0)
80031c6: 4b8c ldr r3, [pc, #560] ; (80033f8 <HAL_UART_RxCpltCallback+0xb14>)
80031c8: 88db ldrh r3, [r3, #6]
80031ca: b29b uxth r3, r3
80031cc: 0019 movs r1, r3
80031ce: 4b8a ldr r3, [pc, #552] ; (80033f8 <HAL_UART_RxCpltCallback+0xb14>)
80031d0: 899b ldrh r3, [r3, #12]
80031d2: b29b uxth r3, r3
80031d4: 0018 movs r0, r3
80031d6: 4a89 ldr r2, [pc, #548] ; (80033fc <HAL_UART_RxCpltCallback+0xb18>)
80031d8: 000b movs r3, r1
80031da: 009b lsls r3, r3, #2
80031dc: 185b adds r3, r3, r1
80031de: 009b lsls r3, r3, #2
80031e0: 181b adds r3, r3, r0
80031e2: 005b lsls r3, r3, #1
80031e4: 5a9b ldrh r3, [r3, r2]
80031e6: b29b uxth r3, r3
80031e8: 2b00 cmp r3, #0
80031ea: d100 bne.n 80031ee <HAL_UART_RxCpltCallback+0x90a>
80031ec: e0ea b.n 80033c4 <HAL_UART_RxCpltCallback+0xae0>
CorrWord[pardata.IIN][pardata.IKU]--;
80031ee: 4b82 ldr r3, [pc, #520] ; (80033f8 <HAL_UART_RxCpltCallback+0xb14>)
80031f0: 88db ldrh r3, [r3, #6]
80031f2: b29b uxth r3, r3
80031f4: 001a movs r2, r3
80031f6: 4b80 ldr r3, [pc, #512] ; (80033f8 <HAL_UART_RxCpltCallback+0xb14>)
80031f8: 899b ldrh r3, [r3, #12]
80031fa: b29b uxth r3, r3
80031fc: 0019 movs r1, r3
80031fe: 487f ldr r0, [pc, #508] ; (80033fc <HAL_UART_RxCpltCallback+0xb18>)
8003200: 0013 movs r3, r2
8003202: 009b lsls r3, r3, #2
8003204: 189b adds r3, r3, r2
8003206: 009b lsls r3, r3, #2
8003208: 185b adds r3, r3, r1
800320a: 005b lsls r3, r3, #1
800320c: 5a1b ldrh r3, [r3, r0]
800320e: b29b uxth r3, r3
8003210: 3b01 subs r3, #1
8003212: b29c uxth r4, r3
8003214: 4879 ldr r0, [pc, #484] ; (80033fc <HAL_UART_RxCpltCallback+0xb18>)
8003216: 0013 movs r3, r2
8003218: 009b lsls r3, r3, #2
800321a: 189b adds r3, r3, r2
800321c: 009b lsls r3, r3, #2
800321e: 185b adds r3, r3, r1
8003220: 005b lsls r3, r3, #1
8003222: 1c22 adds r2, r4, #0
8003224: 521a strh r2, [r3, r0]
break;
8003226: e0cd b.n 80033c4 <HAL_UART_RxCpltCallback+0xae0>
if(CorrWord[pardata.IIN][pardata.IKU] < 4085)
8003228: 4b73 ldr r3, [pc, #460] ; (80033f8 <HAL_UART_RxCpltCallback+0xb14>)
800322a: 88db ldrh r3, [r3, #6]
800322c: b29b uxth r3, r3
800322e: 0019 movs r1, r3
8003230: 4b71 ldr r3, [pc, #452] ; (80033f8 <HAL_UART_RxCpltCallback+0xb14>)
8003232: 899b ldrh r3, [r3, #12]
8003234: b29b uxth r3, r3
8003236: 0018 movs r0, r3
8003238: 4a70 ldr r2, [pc, #448] ; (80033fc <HAL_UART_RxCpltCallback+0xb18>)
800323a: 000b movs r3, r1
800323c: 009b lsls r3, r3, #2
800323e: 185b adds r3, r3, r1
8003240: 009b lsls r3, r3, #2
8003242: 181b adds r3, r3, r0
8003244: 005b lsls r3, r3, #1
8003246: 5a9b ldrh r3, [r3, r2]
8003248: b29b uxth r3, r3
800324a: 4a6e ldr r2, [pc, #440] ; (8003404 <HAL_UART_RxCpltCallback+0xb20>)
800324c: 4293 cmp r3, r2
800324e: d900 bls.n 8003252 <HAL_UART_RxCpltCallback+0x96e>
8003250: e0ba b.n 80033c8 <HAL_UART_RxCpltCallback+0xae4>
CorrWord[pardata.IIN][pardata.IKU] += 10;
8003252: 4b69 ldr r3, [pc, #420] ; (80033f8 <HAL_UART_RxCpltCallback+0xb14>)
8003254: 88db ldrh r3, [r3, #6]
8003256: b29a uxth r2, r3
8003258: 0011 movs r1, r2
800325a: 4b67 ldr r3, [pc, #412] ; (80033f8 <HAL_UART_RxCpltCallback+0xb14>)
800325c: 899b ldrh r3, [r3, #12]
800325e: b29b uxth r3, r3
8003260: 001c movs r4, r3
8003262: 0010 movs r0, r2
8003264: 001d movs r5, r3
8003266: 4a65 ldr r2, [pc, #404] ; (80033fc <HAL_UART_RxCpltCallback+0xb18>)
8003268: 0003 movs r3, r0
800326a: 009b lsls r3, r3, #2
800326c: 181b adds r3, r3, r0
800326e: 009b lsls r3, r3, #2
8003270: 195b adds r3, r3, r5
8003272: 005b lsls r3, r3, #1
8003274: 5a9b ldrh r3, [r3, r2]
8003276: b29b uxth r3, r3
8003278: 330a adds r3, #10
800327a: b298 uxth r0, r3
800327c: 4a5f ldr r2, [pc, #380] ; (80033fc <HAL_UART_RxCpltCallback+0xb18>)
800327e: 000b movs r3, r1
8003280: 009b lsls r3, r3, #2
8003282: 185b adds r3, r3, r1
8003284: 009b lsls r3, r3, #2
8003286: 191b adds r3, r3, r4
8003288: 005b lsls r3, r3, #1
800328a: 1c01 adds r1, r0, #0
800328c: 5299 strh r1, [r3, r2]
break;
800328e: e09b b.n 80033c8 <HAL_UART_RxCpltCallback+0xae4>
if(CorrWord[pardata.IIN][pardata.IKU] > 10)
8003290: 4b59 ldr r3, [pc, #356] ; (80033f8 <HAL_UART_RxCpltCallback+0xb14>)
8003292: 88db ldrh r3, [r3, #6]
8003294: b29b uxth r3, r3
8003296: 0019 movs r1, r3
8003298: 4b57 ldr r3, [pc, #348] ; (80033f8 <HAL_UART_RxCpltCallback+0xb14>)
800329a: 899b ldrh r3, [r3, #12]
800329c: b29b uxth r3, r3
800329e: 0018 movs r0, r3
80032a0: 4a56 ldr r2, [pc, #344] ; (80033fc <HAL_UART_RxCpltCallback+0xb18>)
80032a2: 000b movs r3, r1
80032a4: 009b lsls r3, r3, #2
80032a6: 185b adds r3, r3, r1
80032a8: 009b lsls r3, r3, #2
80032aa: 181b adds r3, r3, r0
80032ac: 005b lsls r3, r3, #1
80032ae: 5a9b ldrh r3, [r3, r2]
80032b0: b29b uxth r3, r3
80032b2: 2b0a cmp r3, #10
80032b4: d800 bhi.n 80032b8 <HAL_UART_RxCpltCallback+0x9d4>
80032b6: e089 b.n 80033cc <HAL_UART_RxCpltCallback+0xae8>
CorrWord[pardata.IIN][pardata.IKU] -= 10;
80032b8: 4b4f ldr r3, [pc, #316] ; (80033f8 <HAL_UART_RxCpltCallback+0xb14>)
80032ba: 88db ldrh r3, [r3, #6]
80032bc: b29a uxth r2, r3
80032be: 0011 movs r1, r2
80032c0: 4b4d ldr r3, [pc, #308] ; (80033f8 <HAL_UART_RxCpltCallback+0xb14>)
80032c2: 899b ldrh r3, [r3, #12]
80032c4: b29b uxth r3, r3
80032c6: 001c movs r4, r3
80032c8: 0010 movs r0, r2
80032ca: 001d movs r5, r3
80032cc: 4a4b ldr r2, [pc, #300] ; (80033fc <HAL_UART_RxCpltCallback+0xb18>)
80032ce: 0003 movs r3, r0
80032d0: 009b lsls r3, r3, #2
80032d2: 181b adds r3, r3, r0
80032d4: 009b lsls r3, r3, #2
80032d6: 195b adds r3, r3, r5
80032d8: 005b lsls r3, r3, #1
80032da: 5a9b ldrh r3, [r3, r2]
80032dc: b29b uxth r3, r3
80032de: 3b0a subs r3, #10
80032e0: b298 uxth r0, r3
80032e2: 4a46 ldr r2, [pc, #280] ; (80033fc <HAL_UART_RxCpltCallback+0xb18>)
80032e4: 000b movs r3, r1
80032e6: 009b lsls r3, r3, #2
80032e8: 185b adds r3, r3, r1
80032ea: 009b lsls r3, r3, #2
80032ec: 191b adds r3, r3, r4
80032ee: 005b lsls r3, r3, #1
80032f0: 1c01 adds r1, r0, #0
80032f2: 5299 strh r1, [r3, r2]
break;
80032f4: e06a b.n 80033cc <HAL_UART_RxCpltCallback+0xae8>
if(CorrWord[pardata.IIN][pardata.IKU] < 3995)
80032f6: 4b40 ldr r3, [pc, #256] ; (80033f8 <HAL_UART_RxCpltCallback+0xb14>)
80032f8: 88db ldrh r3, [r3, #6]
80032fa: b29b uxth r3, r3
80032fc: 0019 movs r1, r3
80032fe: 4b3e ldr r3, [pc, #248] ; (80033f8 <HAL_UART_RxCpltCallback+0xb14>)
8003300: 899b ldrh r3, [r3, #12]
8003302: b29b uxth r3, r3
8003304: 0018 movs r0, r3
8003306: 4a3d ldr r2, [pc, #244] ; (80033fc <HAL_UART_RxCpltCallback+0xb18>)
8003308: 000b movs r3, r1
800330a: 009b lsls r3, r3, #2
800330c: 185b adds r3, r3, r1
800330e: 009b lsls r3, r3, #2
8003310: 181b adds r3, r3, r0
8003312: 005b lsls r3, r3, #1
8003314: 5a9b ldrh r3, [r3, r2]
8003316: b29b uxth r3, r3
8003318: 4a3b ldr r2, [pc, #236] ; (8003408 <HAL_UART_RxCpltCallback+0xb24>)
800331a: 4293 cmp r3, r2
800331c: d858 bhi.n 80033d0 <HAL_UART_RxCpltCallback+0xaec>
CorrWord[pardata.IIN][pardata.IKU] += 100;
800331e: 4b36 ldr r3, [pc, #216] ; (80033f8 <HAL_UART_RxCpltCallback+0xb14>)
8003320: 88db ldrh r3, [r3, #6]
8003322: b29a uxth r2, r3
8003324: 0011 movs r1, r2
8003326: 4b34 ldr r3, [pc, #208] ; (80033f8 <HAL_UART_RxCpltCallback+0xb14>)
8003328: 899b ldrh r3, [r3, #12]
800332a: b29b uxth r3, r3
800332c: 001c movs r4, r3
800332e: 0010 movs r0, r2
8003330: 001d movs r5, r3
8003332: 4a32 ldr r2, [pc, #200] ; (80033fc <HAL_UART_RxCpltCallback+0xb18>)
8003334: 0003 movs r3, r0
8003336: 009b lsls r3, r3, #2
8003338: 181b adds r3, r3, r0
800333a: 009b lsls r3, r3, #2
800333c: 195b adds r3, r3, r5
800333e: 005b lsls r3, r3, #1
8003340: 5a9b ldrh r3, [r3, r2]
8003342: b29b uxth r3, r3
8003344: 3364 adds r3, #100 ; 0x64
8003346: b298 uxth r0, r3
8003348: 4a2c ldr r2, [pc, #176] ; (80033fc <HAL_UART_RxCpltCallback+0xb18>)
800334a: 000b movs r3, r1
800334c: 009b lsls r3, r3, #2
800334e: 185b adds r3, r3, r1
8003350: 009b lsls r3, r3, #2
8003352: 191b adds r3, r3, r4
8003354: 005b lsls r3, r3, #1
8003356: 1c01 adds r1, r0, #0
8003358: 5299 strh r1, [r3, r2]
break;
800335a: e039 b.n 80033d0 <HAL_UART_RxCpltCallback+0xaec>
if(CorrWord[pardata.IIN][pardata.IKU] > 100)
800335c: 4b26 ldr r3, [pc, #152] ; (80033f8 <HAL_UART_RxCpltCallback+0xb14>)
800335e: 88db ldrh r3, [r3, #6]
8003360: b29b uxth r3, r3
8003362: 0019 movs r1, r3
8003364: 4b24 ldr r3, [pc, #144] ; (80033f8 <HAL_UART_RxCpltCallback+0xb14>)
8003366: 899b ldrh r3, [r3, #12]
8003368: b29b uxth r3, r3
800336a: 0018 movs r0, r3
800336c: 4a23 ldr r2, [pc, #140] ; (80033fc <HAL_UART_RxCpltCallback+0xb18>)
800336e: 000b movs r3, r1
8003370: 009b lsls r3, r3, #2
8003372: 185b adds r3, r3, r1
8003374: 009b lsls r3, r3, #2
8003376: 181b adds r3, r3, r0
8003378: 005b lsls r3, r3, #1
800337a: 5a9b ldrh r3, [r3, r2]
800337c: b29b uxth r3, r3
800337e: 2b64 cmp r3, #100 ; 0x64
8003380: d928 bls.n 80033d4 <HAL_UART_RxCpltCallback+0xaf0>
CorrWord[pardata.IIN][pardata.IKU] -= 100;
8003382: 4b1d ldr r3, [pc, #116] ; (80033f8 <HAL_UART_RxCpltCallback+0xb14>)
8003384: 88db ldrh r3, [r3, #6]
8003386: b29a uxth r2, r3
8003388: 0011 movs r1, r2
800338a: 4b1b ldr r3, [pc, #108] ; (80033f8 <HAL_UART_RxCpltCallback+0xb14>)
800338c: 899b ldrh r3, [r3, #12]
800338e: b29b uxth r3, r3
8003390: 001c movs r4, r3
8003392: 0010 movs r0, r2
8003394: 001d movs r5, r3
8003396: 4a19 ldr r2, [pc, #100] ; (80033fc <HAL_UART_RxCpltCallback+0xb18>)
8003398: 0003 movs r3, r0
800339a: 009b lsls r3, r3, #2
800339c: 181b adds r3, r3, r0
800339e: 009b lsls r3, r3, #2
80033a0: 195b adds r3, r3, r5
80033a2: 005b lsls r3, r3, #1
80033a4: 5a9b ldrh r3, [r3, r2]
80033a6: b29b uxth r3, r3
80033a8: 3b64 subs r3, #100 ; 0x64
80033aa: b298 uxth r0, r3
80033ac: 4a13 ldr r2, [pc, #76] ; (80033fc <HAL_UART_RxCpltCallback+0xb18>)
80033ae: 000b movs r3, r1
80033b0: 009b lsls r3, r3, #2
80033b2: 185b adds r3, r3, r1
80033b4: 009b lsls r3, r3, #2
80033b6: 191b adds r3, r3, r4
80033b8: 005b lsls r3, r3, #1
80033ba: 1c01 adds r1, r0, #0
80033bc: 5299 strh r1, [r3, r2]
break;
80033be: e009 b.n 80033d4 <HAL_UART_RxCpltCallback+0xaf0>
break;
80033c0: 46c0 nop ; (mov r8, r8)
80033c2: e008 b.n 80033d6 <HAL_UART_RxCpltCallback+0xaf2>
break;
80033c4: 46c0 nop ; (mov r8, r8)
80033c6: e006 b.n 80033d6 <HAL_UART_RxCpltCallback+0xaf2>
break;
80033c8: 46c0 nop ; (mov r8, r8)
80033ca: e004 b.n 80033d6 <HAL_UART_RxCpltCallback+0xaf2>
break;
80033cc: 46c0 nop ; (mov r8, r8)
80033ce: e002 b.n 80033d6 <HAL_UART_RxCpltCallback+0xaf2>
break;
80033d0: 46c0 nop ; (mov r8, r8)
80033d2: e000 b.n 80033d6 <HAL_UART_RxCpltCallback+0xaf2>
break;
80033d4: 46c0 nop ; (mov r8, r8)
SetAndCorrect();
80033d6: f7fd ff4b bl 8001270 <SetAndCorrect>
wrCorr();
80033da: f7fe fcc7 bl 8001d6c <wrCorr>
for(j = 0; j < 6; j++) {
80033de: 231f movs r3, #31
80033e0: 18fb adds r3, r7, r3
80033e2: 2200 movs r2, #0
80033e4: 701a strb r2, [r3, #0]
80033e6: e022 b.n 800342e <HAL_UART_RxCpltCallback+0xb4a>
80033e8: 20000294 .word 0x20000294
80033ec: 20000190 .word 0x20000190
80033f0: 2000003d .word 0x2000003d
80033f4: 2000003c .word 0x2000003c
80033f8: 200000a0 .word 0x200000a0
80033fc: 20000050 .word 0x20000050
8003400: 00000ffe .word 0x00000ffe
8003404: 00000ff4 .word 0x00000ff4
8003408: 00000f9a .word 0x00000f9a
tx[j] = iobuf[j];
800340c: 231f movs r3, #31
800340e: 18fb adds r3, r7, r3
8003410: 781b ldrb r3, [r3, #0]
8003412: 221f movs r2, #31
8003414: 18ba adds r2, r7, r2
8003416: 7812 ldrb r2, [r2, #0]
8003418: 49de ldr r1, [pc, #888] ; (8003794 <HAL_UART_RxCpltCallback+0xeb0>)
800341a: 5c89 ldrb r1, [r1, r2]
800341c: 4ade ldr r2, [pc, #888] ; (8003798 <HAL_UART_RxCpltCallback+0xeb4>)
800341e: 54d1 strb r1, [r2, r3]
for(j = 0; j < 6; j++) {
8003420: 231f movs r3, #31
8003422: 18fb adds r3, r7, r3
8003424: 781a ldrb r2, [r3, #0]
8003426: 231f movs r3, #31
8003428: 18fb adds r3, r7, r3
800342a: 3201 adds r2, #1
800342c: 701a strb r2, [r3, #0]
800342e: 231f movs r3, #31
8003430: 18fb adds r3, r7, r3
8003432: 781b ldrb r3, [r3, #0]
8003434: 2b05 cmp r3, #5
8003436: d9e9 bls.n 800340c <HAL_UART_RxCpltCallback+0xb28>
strtOut(6);
8003438: 2006 movs r0, #6
800343a: f7ff f961 bl 8002700 <strtOut>
break;
800343e: f000 fc14 bl 8003c6a <HAL_UART_RxCpltCallback+0x1386>
if((regs.ch[0] > (5011 - addr.sh)) || (iobuf[6] != (regs.ch[0] << 1)))
8003442: 230c movs r3, #12
8003444: 18fb adds r3, r7, r3
8003446: 781b ldrb r3, [r3, #0]
8003448: 001a movs r2, r3
800344a: 2310 movs r3, #16
800344c: 18fb adds r3, r7, r3
800344e: 881b ldrh r3, [r3, #0]
8003450: 0019 movs r1, r3
8003452: 4bd2 ldr r3, [pc, #840] ; (800379c <HAL_UART_RxCpltCallback+0xeb8>)
8003454: 1a5b subs r3, r3, r1
8003456: 429a cmp r2, r3
8003458: dc08 bgt.n 800346c <HAL_UART_RxCpltCallback+0xb88>
800345a: 4bce ldr r3, [pc, #824] ; (8003794 <HAL_UART_RxCpltCallback+0xeb0>)
800345c: 799b ldrb r3, [r3, #6]
800345e: 001a movs r2, r3
8003460: 230c movs r3, #12
8003462: 18fb adds r3, r7, r3
8003464: 781b ldrb r3, [r3, #0]
8003466: 005b lsls r3, r3, #1
8003468: 429a cmp r2, r3
800346a: d012 beq.n 8003492 <HAL_UART_RxCpltCallback+0xbae>
tx[0] = iobuf[0];
800346c: 4bc9 ldr r3, [pc, #804] ; (8003794 <HAL_UART_RxCpltCallback+0xeb0>)
800346e: 781a ldrb r2, [r3, #0]
8003470: 4bc9 ldr r3, [pc, #804] ; (8003798 <HAL_UART_RxCpltCallback+0xeb4>)
8003472: 701a strb r2, [r3, #0]
tx[1] = (iobuf[1] | 0x80);
8003474: 4bc7 ldr r3, [pc, #796] ; (8003794 <HAL_UART_RxCpltCallback+0xeb0>)
8003476: 785b ldrb r3, [r3, #1]
8003478: 2280 movs r2, #128 ; 0x80
800347a: 4252 negs r2, r2
800347c: 4313 orrs r3, r2
800347e: b2da uxtb r2, r3
8003480: 4bc5 ldr r3, [pc, #788] ; (8003798 <HAL_UART_RxCpltCallback+0xeb4>)
8003482: 705a strb r2, [r3, #1]
tx[2] = 0x03;
8003484: 4bc4 ldr r3, [pc, #784] ; (8003798 <HAL_UART_RxCpltCallback+0xeb4>)
8003486: 2203 movs r2, #3
8003488: 709a strb r2, [r3, #2]
strtOut(3);
800348a: 2003 movs r0, #3
800348c: f7ff f938 bl 8002700 <strtOut>
8003490: e0b6 b.n 8003600 <HAL_UART_RxCpltCallback+0xd1c>
j = 8 + iobuf[6];
8003492: 4bc0 ldr r3, [pc, #768] ; (8003794 <HAL_UART_RxCpltCallback+0xeb0>)
8003494: 799a ldrb r2, [r3, #6]
8003496: 231f movs r3, #31
8003498: 18fb adds r3, r7, r3
800349a: 3208 adds r2, #8
800349c: 701a strb r2, [r3, #0]
if(iolen > j)
800349e: 4bc0 ldr r3, [pc, #768] ; (80037a0 <HAL_UART_RxCpltCallback+0xebc>)
80034a0: 781b ldrb r3, [r3, #0]
80034a2: 221f movs r2, #31
80034a4: 18ba adds r2, r7, r2
80034a6: 7812 ldrb r2, [r2, #0]
80034a8: 429a cmp r2, r3
80034aa: d301 bcc.n 80034b0 <HAL_UART_RxCpltCallback+0xbcc>
80034ac: f000 fbdf bl 8003c6e <HAL_UART_RxCpltCallback+0x138a>
iolen = 0;
80034b0: 4bbb ldr r3, [pc, #748] ; (80037a0 <HAL_UART_RxCpltCallback+0xebc>)
80034b2: 2200 movs r2, #0
80034b4: 701a strb r2, [r3, #0]
crc.ch[0] = iobuf[j - 1];
80034b6: 231f movs r3, #31
80034b8: 18fb adds r3, r7, r3
80034ba: 781b ldrb r3, [r3, #0]
80034bc: 3b01 subs r3, #1
80034be: 4ab5 ldr r2, [pc, #724] ; (8003794 <HAL_UART_RxCpltCallback+0xeb0>)
80034c0: 5cd2 ldrb r2, [r2, r3]
80034c2: 2314 movs r3, #20
80034c4: 18fb adds r3, r7, r3
80034c6: 701a strb r2, [r3, #0]
crc.ch[1] = iobuf[j];
80034c8: 231f movs r3, #31
80034ca: 18fb adds r3, r7, r3
80034cc: 781b ldrb r3, [r3, #0]
80034ce: 4ab1 ldr r2, [pc, #708] ; (8003794 <HAL_UART_RxCpltCallback+0xeb0>)
80034d0: 5cd2 ldrb r2, [r2, r3]
80034d2: 2314 movs r3, #20
80034d4: 18fb adds r3, r7, r3
80034d6: 705a strb r2, [r3, #1]
if(crc.sh == Crc16(j - 1))
80034d8: 2314 movs r3, #20
80034da: 18fb adds r3, r7, r3
80034dc: 881c ldrh r4, [r3, #0]
80034de: 231f movs r3, #31
80034e0: 18fb adds r3, r7, r3
80034e2: 781b ldrb r3, [r3, #0]
80034e4: b29b uxth r3, r3
80034e6: 3b01 subs r3, #1
80034e8: b29b uxth r3, r3
80034ea: 0018 movs r0, r3
80034ec: f7ff f954 bl 8002798 <Crc16>
80034f0: 0003 movs r3, r0
80034f2: 429c cmp r4, r3
80034f4: d001 beq.n 80034fa <HAL_UART_RxCpltCallback+0xc16>
80034f6: f000 fbba bl 8003c6e <HAL_UART_RxCpltCallback+0x138a>
pch = (uint8_t *) &pardata.IIN + ((addr.sh - 5001) << 1);
80034fa: 2310 movs r3, #16
80034fc: 18fb adds r3, r7, r3
80034fe: 881b ldrh r3, [r3, #0]
8003500: 4aa8 ldr r2, [pc, #672] ; (80037a4 <HAL_UART_RxCpltCallback+0xec0>)
8003502: 4694 mov ip, r2
8003504: 4463 add r3, ip
8003506: 005b lsls r3, r3, #1
8003508: 001a movs r2, r3
800350a: 4ba7 ldr r3, [pc, #668] ; (80037a8 <HAL_UART_RxCpltCallback+0xec4>)
800350c: 18d3 adds r3, r2, r3
800350e: 61bb str r3, [r7, #24]
for(j = 0; j < iobuf[6]; j++)
8003510: 231f movs r3, #31
8003512: 18fb adds r3, r7, r3
8003514: 2200 movs r2, #0
8003516: 701a strb r2, [r3, #0]
8003518: e016 b.n 8003548 <HAL_UART_RxCpltCallback+0xc64>
*(pch + (j ^ 1)) = iobuf[j + 7];
800351a: 231f movs r3, #31
800351c: 18fb adds r3, r7, r3
800351e: 781b ldrb r3, [r3, #0]
8003520: 2201 movs r2, #1
8003522: 4053 eors r3, r2
8003524: b2db uxtb r3, r3
8003526: 001a movs r2, r3
8003528: 69bb ldr r3, [r7, #24]
800352a: 189b adds r3, r3, r2
800352c: 221f movs r2, #31
800352e: 18ba adds r2, r7, r2
8003530: 7812 ldrb r2, [r2, #0]
8003532: 3207 adds r2, #7
8003534: 4997 ldr r1, [pc, #604] ; (8003794 <HAL_UART_RxCpltCallback+0xeb0>)
8003536: 5c8a ldrb r2, [r1, r2]
8003538: 701a strb r2, [r3, #0]
for(j = 0; j < iobuf[6]; j++)
800353a: 231f movs r3, #31
800353c: 18fb adds r3, r7, r3
800353e: 781a ldrb r2, [r3, #0]
8003540: 231f movs r3, #31
8003542: 18fb adds r3, r7, r3
8003544: 3201 adds r2, #1
8003546: 701a strb r2, [r3, #0]
8003548: 4b92 ldr r3, [pc, #584] ; (8003794 <HAL_UART_RxCpltCallback+0xeb0>)
800354a: 799b ldrb r3, [r3, #6]
800354c: 221f movs r2, #31
800354e: 18ba adds r2, r7, r2
8003550: 7812 ldrb r2, [r2, #0]
8003552: 429a cmp r2, r3
8003554: d3e1 bcc.n 800351a <HAL_UART_RxCpltCallback+0xc36>
if((pardata.IIN > ICP) || (pardata.IKU > Ku1000) || (pardata.IFV > Hp10) || (pardata.IFN > Lp100000) || (pardata.VAL > mV))
8003556: 4b95 ldr r3, [pc, #596] ; (80037ac <HAL_UART_RxCpltCallback+0xec8>)
8003558: 88db ldrh r3, [r3, #6]
800355a: b29b uxth r3, r3
800355c: 2b01 cmp r3, #1
800355e: d813 bhi.n 8003588 <HAL_UART_RxCpltCallback+0xca4>
8003560: 4b92 ldr r3, [pc, #584] ; (80037ac <HAL_UART_RxCpltCallback+0xec8>)
8003562: 899b ldrh r3, [r3, #12]
8003564: b29b uxth r3, r3
8003566: 2b0c cmp r3, #12
8003568: d80e bhi.n 8003588 <HAL_UART_RxCpltCallback+0xca4>
800356a: 4b90 ldr r3, [pc, #576] ; (80037ac <HAL_UART_RxCpltCallback+0xec8>)
800356c: 891b ldrh r3, [r3, #8]
800356e: b29b uxth r3, r3
8003570: 2b04 cmp r3, #4
8003572: d809 bhi.n 8003588 <HAL_UART_RxCpltCallback+0xca4>
8003574: 4b8d ldr r3, [pc, #564] ; (80037ac <HAL_UART_RxCpltCallback+0xec8>)
8003576: 895b ldrh r3, [r3, #10]
8003578: b29b uxth r3, r3
800357a: 2b07 cmp r3, #7
800357c: d804 bhi.n 8003588 <HAL_UART_RxCpltCallback+0xca4>
800357e: 4b8b ldr r3, [pc, #556] ; (80037ac <HAL_UART_RxCpltCallback+0xec8>)
8003580: 8b1b ldrh r3, [r3, #24]
8003582: b29b uxth r3, r3
8003584: 2b08 cmp r3, #8
8003586: d914 bls.n 80035b2 <HAL_UART_RxCpltCallback+0xcce>
rdCorr();
8003588: f7fe fc4e bl 8001e28 <rdCorr>
tx[0] = iobuf[0];
800358c: 4b81 ldr r3, [pc, #516] ; (8003794 <HAL_UART_RxCpltCallback+0xeb0>)
800358e: 781a ldrb r2, [r3, #0]
8003590: 4b81 ldr r3, [pc, #516] ; (8003798 <HAL_UART_RxCpltCallback+0xeb4>)
8003592: 701a strb r2, [r3, #0]
tx[1] = (iobuf[1] | 0x80);
8003594: 4b7f ldr r3, [pc, #508] ; (8003794 <HAL_UART_RxCpltCallback+0xeb0>)
8003596: 785b ldrb r3, [r3, #1]
8003598: 2280 movs r2, #128 ; 0x80
800359a: 4252 negs r2, r2
800359c: 4313 orrs r3, r2
800359e: b2da uxtb r2, r3
80035a0: 4b7d ldr r3, [pc, #500] ; (8003798 <HAL_UART_RxCpltCallback+0xeb4>)
80035a2: 705a strb r2, [r3, #1]
tx[2] = 0x03;
80035a4: 4b7c ldr r3, [pc, #496] ; (8003798 <HAL_UART_RxCpltCallback+0xeb4>)
80035a6: 2203 movs r2, #3
80035a8: 709a strb r2, [r3, #2]
strtOut(3);
80035aa: 2003 movs r0, #3
80035ac: f7ff f8a8 bl 8002700 <strtOut>
80035b0: e026 b.n 8003600 <HAL_UART_RxCpltCallback+0xd1c>
needSave = true;
80035b2: 4b7f ldr r3, [pc, #508] ; (80037b0 <HAL_UART_RxCpltCallback+0xecc>)
80035b4: 2201 movs r2, #1
80035b6: 701a strb r2, [r3, #0]
if(iobuf[0])
80035b8: 4b76 ldr r3, [pc, #472] ; (8003794 <HAL_UART_RxCpltCallback+0xeb0>)
80035ba: 781b ldrb r3, [r3, #0]
80035bc: 2b00 cmp r3, #0
80035be: d100 bne.n 80035c2 <HAL_UART_RxCpltCallback+0xcde>
80035c0: e355 b.n 8003c6e <HAL_UART_RxCpltCallback+0x138a>
for(j = 0; j < 6; j++) {
80035c2: 231f movs r3, #31
80035c4: 18fb adds r3, r7, r3
80035c6: 2200 movs r2, #0
80035c8: 701a strb r2, [r3, #0]
80035ca: e010 b.n 80035ee <HAL_UART_RxCpltCallback+0xd0a>
tx[j] = iobuf[j];
80035cc: 231f movs r3, #31
80035ce: 18fb adds r3, r7, r3
80035d0: 781b ldrb r3, [r3, #0]
80035d2: 221f movs r2, #31
80035d4: 18ba adds r2, r7, r2
80035d6: 7812 ldrb r2, [r2, #0]
80035d8: 496e ldr r1, [pc, #440] ; (8003794 <HAL_UART_RxCpltCallback+0xeb0>)
80035da: 5c89 ldrb r1, [r1, r2]
80035dc: 4a6e ldr r2, [pc, #440] ; (8003798 <HAL_UART_RxCpltCallback+0xeb4>)
80035de: 54d1 strb r1, [r2, r3]
for(j = 0; j < 6; j++) {
80035e0: 231f movs r3, #31
80035e2: 18fb adds r3, r7, r3
80035e4: 781a ldrb r2, [r3, #0]
80035e6: 231f movs r3, #31
80035e8: 18fb adds r3, r7, r3
80035ea: 3201 adds r2, #1
80035ec: 701a strb r2, [r3, #0]
80035ee: 231f movs r3, #31
80035f0: 18fb adds r3, r7, r3
80035f2: 781b ldrb r3, [r3, #0]
80035f4: 2b05 cmp r3, #5
80035f6: d9e9 bls.n 80035cc <HAL_UART_RxCpltCallback+0xce8>
strtOut(6);
80035f8: 2006 movs r0, #6
80035fa: f7ff f881 bl 8002700 <strtOut>
break;
80035fe: e336 b.n 8003c6e <HAL_UART_RxCpltCallback+0x138a>
8003600: e335 b.n 8003c6e <HAL_UART_RxCpltCallback+0x138a>
tmp = 3;
8003602: 231e movs r3, #30
8003604: 18fb adds r3, r7, r3
8003606: 2203 movs r2, #3
8003608: 701a strb r2, [r3, #0]
tmp1 = 2;
800360a: 231d movs r3, #29
800360c: 18fb adds r3, r7, r3
800360e: 2202 movs r2, #2
8003610: 701a strb r2, [r3, #0]
if(addr.sh == 7002)
8003612: 2310 movs r3, #16
8003614: 18fb adds r3, r7, r3
8003616: 881b ldrh r3, [r3, #0]
8003618: 4a66 ldr r2, [pc, #408] ; (80037b4 <HAL_UART_RxCpltCallback+0xed0>)
800361a: 4293 cmp r3, r2
800361c: d10a bne.n 8003634 <HAL_UART_RxCpltCallback+0xd50>
tmp <<= 1;
800361e: 231e movs r3, #30
8003620: 18fa adds r2, r7, r3
8003622: 231e movs r3, #30
8003624: 18fb adds r3, r7, r3
8003626: 781b ldrb r3, [r3, #0]
8003628: 18db adds r3, r3, r3
800362a: 7013 strb r3, [r2, #0]
tmp1 = 1;
800362c: 231d movs r3, #29
800362e: 18fb adds r3, r7, r3
8003630: 2201 movs r2, #1
8003632: 701a strb r2, [r3, #0]
if((regs.ch[0] > tmp) || (iobuf[6] != (regs.ch[0] << tmp1)))
8003634: 230c movs r3, #12
8003636: 18fb adds r3, r7, r3
8003638: 781b ldrb r3, [r3, #0]
800363a: 221e movs r2, #30
800363c: 18ba adds r2, r7, r2
800363e: 7812 ldrb r2, [r2, #0]
8003640: 429a cmp r2, r3
8003642: d30d bcc.n 8003660 <HAL_UART_RxCpltCallback+0xd7c>
8003644: 4b53 ldr r3, [pc, #332] ; (8003794 <HAL_UART_RxCpltCallback+0xeb0>)
8003646: 799b ldrb r3, [r3, #6]
8003648: 001a movs r2, r3
800364a: 230c movs r3, #12
800364c: 18fb adds r3, r7, r3
800364e: 781b ldrb r3, [r3, #0]
8003650: 0019 movs r1, r3
8003652: 231d movs r3, #29
8003654: 18fb adds r3, r7, r3
8003656: 781b ldrb r3, [r3, #0]
8003658: 4099 lsls r1, r3
800365a: 000b movs r3, r1
800365c: 429a cmp r2, r3
800365e: d012 beq.n 8003686 <HAL_UART_RxCpltCallback+0xda2>
tx[0] = iobuf[0];
8003660: 4b4c ldr r3, [pc, #304] ; (8003794 <HAL_UART_RxCpltCallback+0xeb0>)
8003662: 781a ldrb r2, [r3, #0]
8003664: 4b4c ldr r3, [pc, #304] ; (8003798 <HAL_UART_RxCpltCallback+0xeb4>)
8003666: 701a strb r2, [r3, #0]
tx[1] |= 0x80; //модификация кода функции на ошибку
8003668: 4b4b ldr r3, [pc, #300] ; (8003798 <HAL_UART_RxCpltCallback+0xeb4>)
800366a: 785b ldrb r3, [r3, #1]
800366c: 2280 movs r2, #128 ; 0x80
800366e: 4252 negs r2, r2
8003670: 4313 orrs r3, r2
8003672: b2da uxtb r2, r3
8003674: 4b48 ldr r3, [pc, #288] ; (8003798 <HAL_UART_RxCpltCallback+0xeb4>)
8003676: 705a strb r2, [r3, #1]
tx[2] = 0x03; //Адрес данных указанный в запросе не доступен
8003678: 4b47 ldr r3, [pc, #284] ; (8003798 <HAL_UART_RxCpltCallback+0xeb4>)
800367a: 2203 movs r2, #3
800367c: 709a strb r2, [r3, #2]
strtOut(3);
800367e: 2003 movs r0, #3
8003680: f7ff f83e bl 8002700 <strtOut>
break;
8003684: e2f5 b.n 8003c72 <HAL_UART_RxCpltCallback+0x138e>
j = 8 + iobuf[6];
8003686: 4b43 ldr r3, [pc, #268] ; (8003794 <HAL_UART_RxCpltCallback+0xeb0>)
8003688: 799a ldrb r2, [r3, #6]
800368a: 231f movs r3, #31
800368c: 18fb adds r3, r7, r3
800368e: 3208 adds r2, #8
8003690: 701a strb r2, [r3, #0]
if(iolen > j)
8003692: 4b43 ldr r3, [pc, #268] ; (80037a0 <HAL_UART_RxCpltCallback+0xebc>)
8003694: 781b ldrb r3, [r3, #0]
8003696: 221f movs r2, #31
8003698: 18ba adds r2, r7, r2
800369a: 7812 ldrb r2, [r2, #0]
800369c: 429a cmp r2, r3
800369e: d300 bcc.n 80036a2 <HAL_UART_RxCpltCallback+0xdbe>
80036a0: e2e7 b.n 8003c72 <HAL_UART_RxCpltCallback+0x138e>
crc.ch[0] = iobuf[j - 1];
80036a2: 231f movs r3, #31
80036a4: 18fb adds r3, r7, r3
80036a6: 781b ldrb r3, [r3, #0]
80036a8: 3b01 subs r3, #1
80036aa: 4a3a ldr r2, [pc, #232] ; (8003794 <HAL_UART_RxCpltCallback+0xeb0>)
80036ac: 5cd2 ldrb r2, [r2, r3]
80036ae: 2314 movs r3, #20
80036b0: 18fb adds r3, r7, r3
80036b2: 701a strb r2, [r3, #0]
crc.ch[1] = iobuf[j];
80036b4: 231f movs r3, #31
80036b6: 18fb adds r3, r7, r3
80036b8: 781b ldrb r3, [r3, #0]
80036ba: 4a36 ldr r2, [pc, #216] ; (8003794 <HAL_UART_RxCpltCallback+0xeb0>)
80036bc: 5cd2 ldrb r2, [r2, r3]
80036be: 2314 movs r3, #20
80036c0: 18fb adds r3, r7, r3
80036c2: 705a strb r2, [r3, #1]
if(crc.sh == Crc16(j - 1))
80036c4: 2314 movs r3, #20
80036c6: 18fb adds r3, r7, r3
80036c8: 881c ldrh r4, [r3, #0]
80036ca: 231f movs r3, #31
80036cc: 18fb adds r3, r7, r3
80036ce: 781b ldrb r3, [r3, #0]
80036d0: b29b uxth r3, r3
80036d2: 3b01 subs r3, #1
80036d4: b29b uxth r3, r3
80036d6: 0018 movs r0, r3
80036d8: f7ff f85e bl 8002798 <Crc16>
80036dc: 0003 movs r3, r0
80036de: 429c cmp r4, r3
80036e0: d000 beq.n 80036e4 <HAL_UART_RxCpltCallback+0xe00>
80036e2: e2c6 b.n 8003c72 <HAL_UART_RxCpltCallback+0x138e>
if(iobuf[6] == 4)
80036e4: 4b2b ldr r3, [pc, #172] ; (8003794 <HAL_UART_RxCpltCallback+0xeb0>)
80036e6: 799b ldrb r3, [r3, #6]
80036e8: 2b04 cmp r3, #4
80036ea: d128 bne.n 800373e <HAL_UART_RxCpltCallback+0xe5a>
for(j = 0; j < 4; j++)
80036ec: 231f movs r3, #31
80036ee: 18fb adds r3, r7, r3
80036f0: 2200 movs r2, #0
80036f2: 701a strb r2, [r3, #0]
80036f4: e014 b.n 8003720 <HAL_UART_RxCpltCallback+0xe3c>
f.ch[3 - j] = iobuf[7 + j];
80036f6: 231f movs r3, #31
80036f8: 18fb adds r3, r7, r3
80036fa: 781b ldrb r3, [r3, #0]
80036fc: 2203 movs r2, #3
80036fe: 1ad3 subs r3, r2, r3
8003700: 221f movs r2, #31
8003702: 18ba adds r2, r7, r2
8003704: 7812 ldrb r2, [r2, #0]
8003706: 3207 adds r2, #7
8003708: 4922 ldr r1, [pc, #136] ; (8003794 <HAL_UART_RxCpltCallback+0xeb0>)
800370a: 5c89 ldrb r1, [r1, r2]
800370c: 2208 movs r2, #8
800370e: 18ba adds r2, r7, r2
8003710: 54d1 strb r1, [r2, r3]
for(j = 0; j < 4; j++)
8003712: 231f movs r3, #31
8003714: 18fb adds r3, r7, r3
8003716: 781a ldrb r2, [r3, #0]
8003718: 231f movs r3, #31
800371a: 18fb adds r3, r7, r3
800371c: 3201 adds r2, #1
800371e: 701a strb r2, [r3, #0]
8003720: 231f movs r3, #31
8003722: 18fb adds r3, r7, r3
8003724: 781b ldrb r3, [r3, #0]
8003726: 2b03 cmp r3, #3
8003728: d9e5 bls.n 80036f6 <HAL_UART_RxCpltCallback+0xe12>
pardata.KCOND = f.fl;
800372a: 68ba ldr r2, [r7, #8]
800372c: 4b1f ldr r3, [pc, #124] ; (80037ac <HAL_UART_RxCpltCallback+0xec8>)
800372e: 61da str r2, [r3, #28]
needSave = true;
8003730: 4b1f ldr r3, [pc, #124] ; (80037b0 <HAL_UART_RxCpltCallback+0xecc>)
8003732: 2201 movs r2, #1
8003734: 701a strb r2, [r3, #0]
strtOut(6);
8003736: 2006 movs r0, #6
8003738: f7fe ffe2 bl 8002700 <strtOut>
break;
800373c: e299 b.n 8003c72 <HAL_UART_RxCpltCallback+0x138e>
if(iobuf[6] == 8)
800373e: 4b15 ldr r3, [pc, #84] ; (8003794 <HAL_UART_RxCpltCallback+0xeb0>)
8003740: 799b ldrb r3, [r3, #6]
8003742: 2b08 cmp r3, #8
8003744: d15c bne.n 8003800 <HAL_UART_RxCpltCallback+0xf1c>
for(j = 0; j < 4; j++)
8003746: 231f movs r3, #31
8003748: 18fb adds r3, r7, r3
800374a: 2200 movs r2, #0
800374c: 701a strb r2, [r3, #0]
800374e: e014 b.n 800377a <HAL_UART_RxCpltCallback+0xe96>
f.ch[3 - j] = iobuf[7 + j];
8003750: 231f movs r3, #31
8003752: 18fb adds r3, r7, r3
8003754: 781b ldrb r3, [r3, #0]
8003756: 2203 movs r2, #3
8003758: 1ad3 subs r3, r2, r3
800375a: 221f movs r2, #31
800375c: 18ba adds r2, r7, r2
800375e: 7812 ldrb r2, [r2, #0]
8003760: 3207 adds r2, #7
8003762: 490c ldr r1, [pc, #48] ; (8003794 <HAL_UART_RxCpltCallback+0xeb0>)
8003764: 5c89 ldrb r1, [r1, r2]
8003766: 2208 movs r2, #8
8003768: 18ba adds r2, r7, r2
800376a: 54d1 strb r1, [r2, r3]
for(j = 0; j < 4; j++)
800376c: 231f movs r3, #31
800376e: 18fb adds r3, r7, r3
8003770: 781a ldrb r2, [r3, #0]
8003772: 231f movs r3, #31
8003774: 18fb adds r3, r7, r3
8003776: 3201 adds r2, #1
8003778: 701a strb r2, [r3, #0]
800377a: 231f movs r3, #31
800377c: 18fb adds r3, r7, r3
800377e: 781b ldrb r3, [r3, #0]
8003780: 2b03 cmp r3, #3
8003782: d9e5 bls.n 8003750 <HAL_UART_RxCpltCallback+0xe6c>
pardata.KCOND = f.fl;
8003784: 68ba ldr r2, [r7, #8]
8003786: 4b09 ldr r3, [pc, #36] ; (80037ac <HAL_UART_RxCpltCallback+0xec8>)
8003788: 61da str r2, [r3, #28]
for(j = 0; j < 4; j++)
800378a: 231f movs r3, #31
800378c: 18fb adds r3, r7, r3
800378e: 2200 movs r2, #0
8003790: 701a strb r2, [r3, #0]
8003792: e026 b.n 80037e2 <HAL_UART_RxCpltCallback+0xefe>
8003794: 20000294 .word 0x20000294
8003798: 20000190 .word 0x20000190
800379c: 00001393 .word 0x00001393
80037a0: 2000003d .word 0x2000003d
80037a4: ffffec77 .word 0xffffec77
80037a8: 200000a6 .word 0x200000a6
80037ac: 200000a0 .word 0x200000a0
80037b0: 2000003f .word 0x2000003f
80037b4: 00001b5a .word 0x00001b5a
f.ch[3 - j] = iobuf[11 + j];
80037b8: 231f movs r3, #31
80037ba: 18fb adds r3, r7, r3
80037bc: 781b ldrb r3, [r3, #0]
80037be: 2203 movs r2, #3
80037c0: 1ad3 subs r3, r2, r3
80037c2: 221f movs r2, #31
80037c4: 18ba adds r2, r7, r2
80037c6: 7812 ldrb r2, [r2, #0]
80037c8: 320b adds r2, #11
80037ca: 49df ldr r1, [pc, #892] ; (8003b48 <HAL_UART_RxCpltCallback+0x1264>)
80037cc: 5c89 ldrb r1, [r1, r2]
80037ce: 2208 movs r2, #8
80037d0: 18ba adds r2, r7, r2
80037d2: 54d1 strb r1, [r2, r3]
for(j = 0; j < 4; j++)
80037d4: 231f movs r3, #31
80037d6: 18fb adds r3, r7, r3
80037d8: 781a ldrb r2, [r3, #0]
80037da: 231f movs r3, #31
80037dc: 18fb adds r3, r7, r3
80037de: 3201 adds r2, #1
80037e0: 701a strb r2, [r3, #0]
80037e2: 231f movs r3, #31
80037e4: 18fb adds r3, r7, r3
80037e6: 781b ldrb r3, [r3, #0]
80037e8: 2b03 cmp r3, #3
80037ea: d9e5 bls.n 80037b8 <HAL_UART_RxCpltCallback+0xed4>
pardata.SENS = f.fl;
80037ec: 68ba ldr r2, [r7, #8]
80037ee: 4bd7 ldr r3, [pc, #860] ; (8003b4c <HAL_UART_RxCpltCallback+0x1268>)
80037f0: 621a str r2, [r3, #32]
needSave = true;
80037f2: 4bd7 ldr r3, [pc, #860] ; (8003b50 <HAL_UART_RxCpltCallback+0x126c>)
80037f4: 2201 movs r2, #1
80037f6: 701a strb r2, [r3, #0]
strtOut(6);
80037f8: 2006 movs r0, #6
80037fa: f7fe ff81 bl 8002700 <strtOut>
break;
80037fe: e238 b.n 8003c72 <HAL_UART_RxCpltCallback+0x138e>
if(iobuf[6] == 12)
8003800: 4bd1 ldr r3, [pc, #836] ; (8003b48 <HAL_UART_RxCpltCallback+0x1264>)
8003802: 799b ldrb r3, [r3, #6]
8003804: 2b0c cmp r3, #12
8003806: d16c bne.n 80038e2 <HAL_UART_RxCpltCallback+0xffe>
for(j = 0; j < 4; j++)
8003808: 231f movs r3, #31
800380a: 18fb adds r3, r7, r3
800380c: 2200 movs r2, #0
800380e: 701a strb r2, [r3, #0]
8003810: e014 b.n 800383c <HAL_UART_RxCpltCallback+0xf58>
f.ch[3 - j] = iobuf[7 + j];
8003812: 231f movs r3, #31
8003814: 18fb adds r3, r7, r3
8003816: 781b ldrb r3, [r3, #0]
8003818: 2203 movs r2, #3
800381a: 1ad3 subs r3, r2, r3
800381c: 221f movs r2, #31
800381e: 18ba adds r2, r7, r2
8003820: 7812 ldrb r2, [r2, #0]
8003822: 3207 adds r2, #7
8003824: 49c8 ldr r1, [pc, #800] ; (8003b48 <HAL_UART_RxCpltCallback+0x1264>)
8003826: 5c89 ldrb r1, [r1, r2]
8003828: 2208 movs r2, #8
800382a: 18ba adds r2, r7, r2
800382c: 54d1 strb r1, [r2, r3]
for(j = 0; j < 4; j++)
800382e: 231f movs r3, #31
8003830: 18fb adds r3, r7, r3
8003832: 781a ldrb r2, [r3, #0]
8003834: 231f movs r3, #31
8003836: 18fb adds r3, r7, r3
8003838: 3201 adds r2, #1
800383a: 701a strb r2, [r3, #0]
800383c: 231f movs r3, #31
800383e: 18fb adds r3, r7, r3
8003840: 781b ldrb r3, [r3, #0]
8003842: 2b03 cmp r3, #3
8003844: d9e5 bls.n 8003812 <HAL_UART_RxCpltCallback+0xf2e>
pardata.KCOND = f.fl;
8003846: 68ba ldr r2, [r7, #8]
8003848: 4bc0 ldr r3, [pc, #768] ; (8003b4c <HAL_UART_RxCpltCallback+0x1268>)
800384a: 61da str r2, [r3, #28]
for(j = 0; j < 4; j++)
800384c: 231f movs r3, #31
800384e: 18fb adds r3, r7, r3
8003850: 2200 movs r2, #0
8003852: 701a strb r2, [r3, #0]
8003854: e014 b.n 8003880 <HAL_UART_RxCpltCallback+0xf9c>
f.ch[3 - j] = iobuf[11 + j];
8003856: 231f movs r3, #31
8003858: 18fb adds r3, r7, r3
800385a: 781b ldrb r3, [r3, #0]
800385c: 2203 movs r2, #3
800385e: 1ad3 subs r3, r2, r3
8003860: 221f movs r2, #31
8003862: 18ba adds r2, r7, r2
8003864: 7812 ldrb r2, [r2, #0]
8003866: 320b adds r2, #11
8003868: 49b7 ldr r1, [pc, #732] ; (8003b48 <HAL_UART_RxCpltCallback+0x1264>)
800386a: 5c89 ldrb r1, [r1, r2]
800386c: 2208 movs r2, #8
800386e: 18ba adds r2, r7, r2
8003870: 54d1 strb r1, [r2, r3]
for(j = 0; j < 4; j++)
8003872: 231f movs r3, #31
8003874: 18fb adds r3, r7, r3
8003876: 781a ldrb r2, [r3, #0]
8003878: 231f movs r3, #31
800387a: 18fb adds r3, r7, r3
800387c: 3201 adds r2, #1
800387e: 701a strb r2, [r3, #0]
8003880: 231f movs r3, #31
8003882: 18fb adds r3, r7, r3
8003884: 781b ldrb r3, [r3, #0]
8003886: 2b03 cmp r3, #3
8003888: d9e5 bls.n 8003856 <HAL_UART_RxCpltCallback+0xf72>
pardata.SENS = f.fl;
800388a: 68ba ldr r2, [r7, #8]
800388c: 4baf ldr r3, [pc, #700] ; (8003b4c <HAL_UART_RxCpltCallback+0x1268>)
800388e: 621a str r2, [r3, #32]
for(j = 0; j < 4; j++)
8003890: 231f movs r3, #31
8003892: 18fb adds r3, r7, r3
8003894: 2200 movs r2, #0
8003896: 701a strb r2, [r3, #0]
8003898: e014 b.n 80038c4 <HAL_UART_RxCpltCallback+0xfe0>
f.ch[3 - j] = iobuf[15 + j];
800389a: 231f movs r3, #31
800389c: 18fb adds r3, r7, r3
800389e: 781b ldrb r3, [r3, #0]
80038a0: 2203 movs r2, #3
80038a2: 1ad3 subs r3, r2, r3
80038a4: 221f movs r2, #31
80038a6: 18ba adds r2, r7, r2
80038a8: 7812 ldrb r2, [r2, #0]
80038aa: 320f adds r2, #15
80038ac: 49a6 ldr r1, [pc, #664] ; (8003b48 <HAL_UART_RxCpltCallback+0x1264>)
80038ae: 5c89 ldrb r1, [r1, r2]
80038b0: 2208 movs r2, #8
80038b2: 18ba adds r2, r7, r2
80038b4: 54d1 strb r1, [r2, r3]
for(j = 0; j < 4; j++)
80038b6: 231f movs r3, #31
80038b8: 18fb adds r3, r7, r3
80038ba: 781a ldrb r2, [r3, #0]
80038bc: 231f movs r3, #31
80038be: 18fb adds r3, r7, r3
80038c0: 3201 adds r2, #1
80038c2: 701a strb r2, [r3, #0]
80038c4: 231f movs r3, #31
80038c6: 18fb adds r3, r7, r3
80038c8: 781b ldrb r3, [r3, #0]
80038ca: 2b03 cmp r3, #3
80038cc: d9e5 bls.n 800389a <HAL_UART_RxCpltCallback+0xfb6>
pardata.ACCEL = f.fl;
80038ce: 68ba ldr r2, [r7, #8]
80038d0: 4b9e ldr r3, [pc, #632] ; (8003b4c <HAL_UART_RxCpltCallback+0x1268>)
80038d2: 625a str r2, [r3, #36] ; 0x24
needSave = true;
80038d4: 4b9e ldr r3, [pc, #632] ; (8003b50 <HAL_UART_RxCpltCallback+0x126c>)
80038d6: 2201 movs r2, #1
80038d8: 701a strb r2, [r3, #0]
strtOut(6);
80038da: 2006 movs r0, #6
80038dc: f7fe ff10 bl 8002700 <strtOut>
break;
80038e0: e1c7 b.n 8003c72 <HAL_UART_RxCpltCallback+0x138e>
tx[0] = iobuf[0];
80038e2: 4b99 ldr r3, [pc, #612] ; (8003b48 <HAL_UART_RxCpltCallback+0x1264>)
80038e4: 781a ldrb r2, [r3, #0]
80038e6: 4b9b ldr r3, [pc, #620] ; (8003b54 <HAL_UART_RxCpltCallback+0x1270>)
80038e8: 701a strb r2, [r3, #0]
tx[1] |= 0x80; //модификация кода функции на ошибку
80038ea: 4b9a ldr r3, [pc, #616] ; (8003b54 <HAL_UART_RxCpltCallback+0x1270>)
80038ec: 785b ldrb r3, [r3, #1]
80038ee: 2280 movs r2, #128 ; 0x80
80038f0: 4252 negs r2, r2
80038f2: 4313 orrs r3, r2
80038f4: b2da uxtb r2, r3
80038f6: 4b97 ldr r3, [pc, #604] ; (8003b54 <HAL_UART_RxCpltCallback+0x1270>)
80038f8: 705a strb r2, [r3, #1]
tx[2] = 0x03; //Адрес данных указанный в запросе не доступен
80038fa: 4b96 ldr r3, [pc, #600] ; (8003b54 <HAL_UART_RxCpltCallback+0x1270>)
80038fc: 2203 movs r2, #3
80038fe: 709a strb r2, [r3, #2]
strtOut(3);
8003900: 2003 movs r0, #3
8003902: f7fe fefd bl 8002700 <strtOut>
break;
8003906: e1b4 b.n 8003c72 <HAL_UART_RxCpltCallback+0x138e>
tmp = 2;
8003908: 231e movs r3, #30
800390a: 18fb adds r3, r7, r3
800390c: 2202 movs r2, #2
800390e: 701a strb r2, [r3, #0]
tmp1 = 2;
8003910: 231d movs r3, #29
8003912: 18fb adds r3, r7, r3
8003914: 2202 movs r2, #2
8003916: 701a strb r2, [r3, #0]
if(addr.sh == 7004)
8003918: 2310 movs r3, #16
800391a: 18fb adds r3, r7, r3
800391c: 881b ldrh r3, [r3, #0]
800391e: 4a8e ldr r2, [pc, #568] ; (8003b58 <HAL_UART_RxCpltCallback+0x1274>)
8003920: 4293 cmp r3, r2
8003922: d10a bne.n 800393a <HAL_UART_RxCpltCallback+0x1056>
tmp <<= 1;
8003924: 231e movs r3, #30
8003926: 18fa adds r2, r7, r3
8003928: 231e movs r3, #30
800392a: 18fb adds r3, r7, r3
800392c: 781b ldrb r3, [r3, #0]
800392e: 18db adds r3, r3, r3
8003930: 7013 strb r3, [r2, #0]
tmp1 = 1;
8003932: 231d movs r3, #29
8003934: 18fb adds r3, r7, r3
8003936: 2201 movs r2, #1
8003938: 701a strb r2, [r3, #0]
if((regs.ch[0] > tmp) || (iobuf[6] != (regs.ch[0] << tmp1)))
800393a: 230c movs r3, #12
800393c: 18fb adds r3, r7, r3
800393e: 781b ldrb r3, [r3, #0]
8003940: 221e movs r2, #30
8003942: 18ba adds r2, r7, r2
8003944: 7812 ldrb r2, [r2, #0]
8003946: 429a cmp r2, r3
8003948: d30d bcc.n 8003966 <HAL_UART_RxCpltCallback+0x1082>
800394a: 4b7f ldr r3, [pc, #508] ; (8003b48 <HAL_UART_RxCpltCallback+0x1264>)
800394c: 799b ldrb r3, [r3, #6]
800394e: 001a movs r2, r3
8003950: 230c movs r3, #12
8003952: 18fb adds r3, r7, r3
8003954: 781b ldrb r3, [r3, #0]
8003956: 0019 movs r1, r3
8003958: 231d movs r3, #29
800395a: 18fb adds r3, r7, r3
800395c: 781b ldrb r3, [r3, #0]
800395e: 4099 lsls r1, r3
8003960: 000b movs r3, r1
8003962: 429a cmp r2, r3
8003964: d012 beq.n 800398c <HAL_UART_RxCpltCallback+0x10a8>
tx[0] = iobuf[0];
8003966: 4b78 ldr r3, [pc, #480] ; (8003b48 <HAL_UART_RxCpltCallback+0x1264>)
8003968: 781a ldrb r2, [r3, #0]
800396a: 4b7a ldr r3, [pc, #488] ; (8003b54 <HAL_UART_RxCpltCallback+0x1270>)
800396c: 701a strb r2, [r3, #0]
tx[1] |= 0x80; //модификация кода функции на ошибку
800396e: 4b79 ldr r3, [pc, #484] ; (8003b54 <HAL_UART_RxCpltCallback+0x1270>)
8003970: 785b ldrb r3, [r3, #1]
8003972: 2280 movs r2, #128 ; 0x80
8003974: 4252 negs r2, r2
8003976: 4313 orrs r3, r2
8003978: b2da uxtb r2, r3
800397a: 4b76 ldr r3, [pc, #472] ; (8003b54 <HAL_UART_RxCpltCallback+0x1270>)
800397c: 705a strb r2, [r3, #1]
tx[2] = 0x03; //Адрес данных указанный в запросе не доступен
800397e: 4b75 ldr r3, [pc, #468] ; (8003b54 <HAL_UART_RxCpltCallback+0x1270>)
8003980: 2203 movs r2, #3
8003982: 709a strb r2, [r3, #2]
strtOut(3);
8003984: 2003 movs r0, #3
8003986: f7fe febb bl 8002700 <strtOut>
break;
800398a: e174 b.n 8003c76 <HAL_UART_RxCpltCallback+0x1392>
j = 8 + iobuf[6];
800398c: 4b6e ldr r3, [pc, #440] ; (8003b48 <HAL_UART_RxCpltCallback+0x1264>)
800398e: 799a ldrb r2, [r3, #6]
8003990: 231f movs r3, #31
8003992: 18fb adds r3, r7, r3
8003994: 3208 adds r2, #8
8003996: 701a strb r2, [r3, #0]
if(iolen > j)
8003998: 4b70 ldr r3, [pc, #448] ; (8003b5c <HAL_UART_RxCpltCallback+0x1278>)
800399a: 781b ldrb r3, [r3, #0]
800399c: 221f movs r2, #31
800399e: 18ba adds r2, r7, r2
80039a0: 7812 ldrb r2, [r2, #0]
80039a2: 429a cmp r2, r3
80039a4: d300 bcc.n 80039a8 <HAL_UART_RxCpltCallback+0x10c4>
80039a6: e166 b.n 8003c76 <HAL_UART_RxCpltCallback+0x1392>
crc.ch[0] = iobuf[j - 1];
80039a8: 231f movs r3, #31
80039aa: 18fb adds r3, r7, r3
80039ac: 781b ldrb r3, [r3, #0]
80039ae: 3b01 subs r3, #1
80039b0: 4a65 ldr r2, [pc, #404] ; (8003b48 <HAL_UART_RxCpltCallback+0x1264>)
80039b2: 5cd2 ldrb r2, [r2, r3]
80039b4: 2314 movs r3, #20
80039b6: 18fb adds r3, r7, r3
80039b8: 701a strb r2, [r3, #0]
crc.ch[1] = iobuf[j];
80039ba: 231f movs r3, #31
80039bc: 18fb adds r3, r7, r3
80039be: 781b ldrb r3, [r3, #0]
80039c0: 4a61 ldr r2, [pc, #388] ; (8003b48 <HAL_UART_RxCpltCallback+0x1264>)
80039c2: 5cd2 ldrb r2, [r2, r3]
80039c4: 2314 movs r3, #20
80039c6: 18fb adds r3, r7, r3
80039c8: 705a strb r2, [r3, #1]
if(crc.sh == Crc16(j - 1))
80039ca: 2314 movs r3, #20
80039cc: 18fb adds r3, r7, r3
80039ce: 881c ldrh r4, [r3, #0]
80039d0: 231f movs r3, #31
80039d2: 18fb adds r3, r7, r3
80039d4: 781b ldrb r3, [r3, #0]
80039d6: b29b uxth r3, r3
80039d8: 3b01 subs r3, #1
80039da: b29b uxth r3, r3
80039dc: 0018 movs r0, r3
80039de: f7fe fedb bl 8002798 <Crc16>
80039e2: 0003 movs r3, r0
80039e4: 429c cmp r4, r3
80039e6: d000 beq.n 80039ea <HAL_UART_RxCpltCallback+0x1106>
80039e8: e145 b.n 8003c76 <HAL_UART_RxCpltCallback+0x1392>
if(iobuf[6] == 4)
80039ea: 4b57 ldr r3, [pc, #348] ; (8003b48 <HAL_UART_RxCpltCallback+0x1264>)
80039ec: 799b ldrb r3, [r3, #6]
80039ee: 2b04 cmp r3, #4
80039f0: d128 bne.n 8003a44 <HAL_UART_RxCpltCallback+0x1160>
for(j = 0; j < 4; j++)
80039f2: 231f movs r3, #31
80039f4: 18fb adds r3, r7, r3
80039f6: 2200 movs r2, #0
80039f8: 701a strb r2, [r3, #0]
80039fa: e014 b.n 8003a26 <HAL_UART_RxCpltCallback+0x1142>
f.ch[3 - j] = iobuf[7 + j];
80039fc: 231f movs r3, #31
80039fe: 18fb adds r3, r7, r3
8003a00: 781b ldrb r3, [r3, #0]
8003a02: 2203 movs r2, #3
8003a04: 1ad3 subs r3, r2, r3
8003a06: 221f movs r2, #31
8003a08: 18ba adds r2, r7, r2
8003a0a: 7812 ldrb r2, [r2, #0]
8003a0c: 3207 adds r2, #7
8003a0e: 494e ldr r1, [pc, #312] ; (8003b48 <HAL_UART_RxCpltCallback+0x1264>)
8003a10: 5c89 ldrb r1, [r1, r2]
8003a12: 2208 movs r2, #8
8003a14: 18ba adds r2, r7, r2
8003a16: 54d1 strb r1, [r2, r3]
for(j = 0; j < 4; j++)
8003a18: 231f movs r3, #31
8003a1a: 18fb adds r3, r7, r3
8003a1c: 781a ldrb r2, [r3, #0]
8003a1e: 231f movs r3, #31
8003a20: 18fb adds r3, r7, r3
8003a22: 3201 adds r2, #1
8003a24: 701a strb r2, [r3, #0]
8003a26: 231f movs r3, #31
8003a28: 18fb adds r3, r7, r3
8003a2a: 781b ldrb r3, [r3, #0]
8003a2c: 2b03 cmp r3, #3
8003a2e: d9e5 bls.n 80039fc <HAL_UART_RxCpltCallback+0x1118>
pardata.SENS = f.fl;
8003a30: 68ba ldr r2, [r7, #8]
8003a32: 4b46 ldr r3, [pc, #280] ; (8003b4c <HAL_UART_RxCpltCallback+0x1268>)
8003a34: 621a str r2, [r3, #32]
needSave = true;
8003a36: 4b46 ldr r3, [pc, #280] ; (8003b50 <HAL_UART_RxCpltCallback+0x126c>)
8003a38: 2201 movs r2, #1
8003a3a: 701a strb r2, [r3, #0]
strtOut(6);
8003a3c: 2006 movs r0, #6
8003a3e: f7fe fe5f bl 8002700 <strtOut>
break;
8003a42: e118 b.n 8003c76 <HAL_UART_RxCpltCallback+0x1392>
if(iobuf[6] == 8)
8003a44: 4b40 ldr r3, [pc, #256] ; (8003b48 <HAL_UART_RxCpltCallback+0x1264>)
8003a46: 799b ldrb r3, [r3, #6]
8003a48: 2b08 cmp r3, #8
8003a4a: d128 bne.n 8003a9e <HAL_UART_RxCpltCallback+0x11ba>
for(j = 0; j < 4; j++)
8003a4c: 231f movs r3, #31
8003a4e: 18fb adds r3, r7, r3
8003a50: 2200 movs r2, #0
8003a52: 701a strb r2, [r3, #0]
8003a54: e014 b.n 8003a80 <HAL_UART_RxCpltCallback+0x119c>
f.ch[3 - j] = iobuf[7 + j];
8003a56: 231f movs r3, #31
8003a58: 18fb adds r3, r7, r3
8003a5a: 781b ldrb r3, [r3, #0]
8003a5c: 2203 movs r2, #3
8003a5e: 1ad3 subs r3, r2, r3
8003a60: 221f movs r2, #31
8003a62: 18ba adds r2, r7, r2
8003a64: 7812 ldrb r2, [r2, #0]
8003a66: 3207 adds r2, #7
8003a68: 4937 ldr r1, [pc, #220] ; (8003b48 <HAL_UART_RxCpltCallback+0x1264>)
8003a6a: 5c89 ldrb r1, [r1, r2]
8003a6c: 2208 movs r2, #8
8003a6e: 18ba adds r2, r7, r2
8003a70: 54d1 strb r1, [r2, r3]
for(j = 0; j < 4; j++)
8003a72: 231f movs r3, #31
8003a74: 18fb adds r3, r7, r3
8003a76: 781a ldrb r2, [r3, #0]
8003a78: 231f movs r3, #31
8003a7a: 18fb adds r3, r7, r3
8003a7c: 3201 adds r2, #1
8003a7e: 701a strb r2, [r3, #0]
8003a80: 231f movs r3, #31
8003a82: 18fb adds r3, r7, r3
8003a84: 781b ldrb r3, [r3, #0]
8003a86: 2b03 cmp r3, #3
8003a88: d9e5 bls.n 8003a56 <HAL_UART_RxCpltCallback+0x1172>
pardata.ACCEL = f.fl;
8003a8a: 68ba ldr r2, [r7, #8]
8003a8c: 4b2f ldr r3, [pc, #188] ; (8003b4c <HAL_UART_RxCpltCallback+0x1268>)
8003a8e: 625a str r2, [r3, #36] ; 0x24
needSave = true;
8003a90: 4b2f ldr r3, [pc, #188] ; (8003b50 <HAL_UART_RxCpltCallback+0x126c>)
8003a92: 2201 movs r2, #1
8003a94: 701a strb r2, [r3, #0]
strtOut(6);
8003a96: 2006 movs r0, #6
8003a98: f7fe fe32 bl 8002700 <strtOut>
break;
8003a9c: e0eb b.n 8003c76 <HAL_UART_RxCpltCallback+0x1392>
tx[0] = iobuf[0];
8003a9e: 4b2a ldr r3, [pc, #168] ; (8003b48 <HAL_UART_RxCpltCallback+0x1264>)
8003aa0: 781a ldrb r2, [r3, #0]
8003aa2: 4b2c ldr r3, [pc, #176] ; (8003b54 <HAL_UART_RxCpltCallback+0x1270>)
8003aa4: 701a strb r2, [r3, #0]
tx[1] |= 0x80; //модификация кода функции на ошибку
8003aa6: 4b2b ldr r3, [pc, #172] ; (8003b54 <HAL_UART_RxCpltCallback+0x1270>)
8003aa8: 785b ldrb r3, [r3, #1]
8003aaa: 2280 movs r2, #128 ; 0x80
8003aac: 4252 negs r2, r2
8003aae: 4313 orrs r3, r2
8003ab0: b2da uxtb r2, r3
8003ab2: 4b28 ldr r3, [pc, #160] ; (8003b54 <HAL_UART_RxCpltCallback+0x1270>)
8003ab4: 705a strb r2, [r3, #1]
tx[2] = 0x03; //Адрес данных указанный в запросе не доступен
8003ab6: 4b27 ldr r3, [pc, #156] ; (8003b54 <HAL_UART_RxCpltCallback+0x1270>)
8003ab8: 2203 movs r2, #3
8003aba: 709a strb r2, [r3, #2]
strtOut(3);
8003abc: 2003 movs r0, #3
8003abe: f7fe fe1f bl 8002700 <strtOut>
break;
8003ac2: e0d8 b.n 8003c76 <HAL_UART_RxCpltCallback+0x1392>
tmp = 1;
8003ac4: 231e movs r3, #30
8003ac6: 18fb adds r3, r7, r3
8003ac8: 2201 movs r2, #1
8003aca: 701a strb r2, [r3, #0]
tmp1 = 2;
8003acc: 231d movs r3, #29
8003ace: 18fb adds r3, r7, r3
8003ad0: 2202 movs r2, #2
8003ad2: 701a strb r2, [r3, #0]
if(addr.sh == 7006)
8003ad4: 2310 movs r3, #16
8003ad6: 18fb adds r3, r7, r3
8003ad8: 881b ldrh r3, [r3, #0]
8003ada: 4a21 ldr r2, [pc, #132] ; (8003b60 <HAL_UART_RxCpltCallback+0x127c>)
8003adc: 4293 cmp r3, r2
8003ade: d10a bne.n 8003af6 <HAL_UART_RxCpltCallback+0x1212>
tmp <<= 1;
8003ae0: 231e movs r3, #30
8003ae2: 18fa adds r2, r7, r3
8003ae4: 231e movs r3, #30
8003ae6: 18fb adds r3, r7, r3
8003ae8: 781b ldrb r3, [r3, #0]
8003aea: 18db adds r3, r3, r3
8003aec: 7013 strb r3, [r2, #0]
tmp1 = 1;
8003aee: 231d movs r3, #29
8003af0: 18fb adds r3, r7, r3
8003af2: 2201 movs r2, #1
8003af4: 701a strb r2, [r3, #0]
if((regs.ch[0] > tmp) || (iobuf[6] != (regs.ch[0] << tmp1)))
8003af6: 230c movs r3, #12
8003af8: 18fb adds r3, r7, r3
8003afa: 781b ldrb r3, [r3, #0]
8003afc: 221e movs r2, #30
8003afe: 18ba adds r2, r7, r2
8003b00: 7812 ldrb r2, [r2, #0]
8003b02: 429a cmp r2, r3
8003b04: d30d bcc.n 8003b22 <HAL_UART_RxCpltCallback+0x123e>
8003b06: 4b10 ldr r3, [pc, #64] ; (8003b48 <HAL_UART_RxCpltCallback+0x1264>)
8003b08: 799b ldrb r3, [r3, #6]
8003b0a: 001a movs r2, r3
8003b0c: 230c movs r3, #12
8003b0e: 18fb adds r3, r7, r3
8003b10: 781b ldrb r3, [r3, #0]
8003b12: 0019 movs r1, r3
8003b14: 231d movs r3, #29
8003b16: 18fb adds r3, r7, r3
8003b18: 781b ldrb r3, [r3, #0]
8003b1a: 4099 lsls r1, r3
8003b1c: 000b movs r3, r1
8003b1e: 429a cmp r2, r3
8003b20: d020 beq.n 8003b64 <HAL_UART_RxCpltCallback+0x1280>
tx[0] = iobuf[0];
8003b22: 4b09 ldr r3, [pc, #36] ; (8003b48 <HAL_UART_RxCpltCallback+0x1264>)
8003b24: 781a ldrb r2, [r3, #0]
8003b26: 4b0b ldr r3, [pc, #44] ; (8003b54 <HAL_UART_RxCpltCallback+0x1270>)
8003b28: 701a strb r2, [r3, #0]
tx[1] |= 0x80; //модификация кода функции на ошибку
8003b2a: 4b0a ldr r3, [pc, #40] ; (8003b54 <HAL_UART_RxCpltCallback+0x1270>)
8003b2c: 785b ldrb r3, [r3, #1]
8003b2e: 2280 movs r2, #128 ; 0x80
8003b30: 4252 negs r2, r2
8003b32: 4313 orrs r3, r2
8003b34: b2da uxtb r2, r3
8003b36: 4b07 ldr r3, [pc, #28] ; (8003b54 <HAL_UART_RxCpltCallback+0x1270>)
8003b38: 705a strb r2, [r3, #1]
tx[2] = 0x03; //Адрес данных указанный в запросе не доступен
8003b3a: 4b06 ldr r3, [pc, #24] ; (8003b54 <HAL_UART_RxCpltCallback+0x1270>)
8003b3c: 2203 movs r2, #3
8003b3e: 709a strb r2, [r3, #2]
strtOut(3);
8003b40: 2003 movs r0, #3
8003b42: f7fe fddd bl 8002700 <strtOut>
break;
8003b46: e098 b.n 8003c7a <HAL_UART_RxCpltCallback+0x1396>
8003b48: 20000294 .word 0x20000294
8003b4c: 200000a0 .word 0x200000a0
8003b50: 2000003f .word 0x2000003f
8003b54: 20000190 .word 0x20000190
8003b58: 00001b5c .word 0x00001b5c
8003b5c: 2000003d .word 0x2000003d
8003b60: 00001b5e .word 0x00001b5e
j = 8 + iobuf[6];
8003b64: 4b48 ldr r3, [pc, #288] ; (8003c88 <HAL_UART_RxCpltCallback+0x13a4>)
8003b66: 799a ldrb r2, [r3, #6]
8003b68: 231f movs r3, #31
8003b6a: 18fb adds r3, r7, r3
8003b6c: 3208 adds r2, #8
8003b6e: 701a strb r2, [r3, #0]
if(iolen > j)
8003b70: 4b46 ldr r3, [pc, #280] ; (8003c8c <HAL_UART_RxCpltCallback+0x13a8>)
8003b72: 781b ldrb r3, [r3, #0]
8003b74: 221f movs r2, #31
8003b76: 18ba adds r2, r7, r2
8003b78: 7812 ldrb r2, [r2, #0]
8003b7a: 429a cmp r2, r3
8003b7c: d300 bcc.n 8003b80 <HAL_UART_RxCpltCallback+0x129c>
8003b7e: e07c b.n 8003c7a <HAL_UART_RxCpltCallback+0x1396>
crc.ch[0] = iobuf[j - 1];
8003b80: 231f movs r3, #31
8003b82: 18fb adds r3, r7, r3
8003b84: 781b ldrb r3, [r3, #0]
8003b86: 3b01 subs r3, #1
8003b88: 4a3f ldr r2, [pc, #252] ; (8003c88 <HAL_UART_RxCpltCallback+0x13a4>)
8003b8a: 5cd2 ldrb r2, [r2, r3]
8003b8c: 2314 movs r3, #20
8003b8e: 18fb adds r3, r7, r3
8003b90: 701a strb r2, [r3, #0]
crc.ch[1] = iobuf[j];
8003b92: 231f movs r3, #31
8003b94: 18fb adds r3, r7, r3
8003b96: 781b ldrb r3, [r3, #0]
8003b98: 4a3b ldr r2, [pc, #236] ; (8003c88 <HAL_UART_RxCpltCallback+0x13a4>)
8003b9a: 5cd2 ldrb r2, [r2, r3]
8003b9c: 2314 movs r3, #20
8003b9e: 18fb adds r3, r7, r3
8003ba0: 705a strb r2, [r3, #1]
if(crc.sh == Crc16(j - 1))
8003ba2: 2314 movs r3, #20
8003ba4: 18fb adds r3, r7, r3
8003ba6: 881c ldrh r4, [r3, #0]
8003ba8: 231f movs r3, #31
8003baa: 18fb adds r3, r7, r3
8003bac: 781b ldrb r3, [r3, #0]
8003bae: b29b uxth r3, r3
8003bb0: 3b01 subs r3, #1
8003bb2: b29b uxth r3, r3
8003bb4: 0018 movs r0, r3
8003bb6: f7fe fdef bl 8002798 <Crc16>
8003bba: 0003 movs r3, r0
8003bbc: 429c cmp r4, r3
8003bbe: d15c bne.n 8003c7a <HAL_UART_RxCpltCallback+0x1396>
if(iobuf[6] == 4)
8003bc0: 4b31 ldr r3, [pc, #196] ; (8003c88 <HAL_UART_RxCpltCallback+0x13a4>)
8003bc2: 799b ldrb r3, [r3, #6]
8003bc4: 2b04 cmp r3, #4
8003bc6: d128 bne.n 8003c1a <HAL_UART_RxCpltCallback+0x1336>
for(j = 0; j < 4; j++)
8003bc8: 231f movs r3, #31
8003bca: 18fb adds r3, r7, r3
8003bcc: 2200 movs r2, #0
8003bce: 701a strb r2, [r3, #0]
8003bd0: e014 b.n 8003bfc <HAL_UART_RxCpltCallback+0x1318>
f.ch[3 - j] = iobuf[3 + j];
8003bd2: 231f movs r3, #31
8003bd4: 18fb adds r3, r7, r3
8003bd6: 781b ldrb r3, [r3, #0]
8003bd8: 2203 movs r2, #3
8003bda: 1ad3 subs r3, r2, r3
8003bdc: 221f movs r2, #31
8003bde: 18ba adds r2, r7, r2
8003be0: 7812 ldrb r2, [r2, #0]
8003be2: 3203 adds r2, #3
8003be4: 4928 ldr r1, [pc, #160] ; (8003c88 <HAL_UART_RxCpltCallback+0x13a4>)
8003be6: 5c89 ldrb r1, [r1, r2]
8003be8: 2208 movs r2, #8
8003bea: 18ba adds r2, r7, r2
8003bec: 54d1 strb r1, [r2, r3]
for(j = 0; j < 4; j++)
8003bee: 231f movs r3, #31
8003bf0: 18fb adds r3, r7, r3
8003bf2: 781a ldrb r2, [r3, #0]
8003bf4: 231f movs r3, #31
8003bf6: 18fb adds r3, r7, r3
8003bf8: 3201 adds r2, #1
8003bfa: 701a strb r2, [r3, #0]
8003bfc: 231f movs r3, #31
8003bfe: 18fb adds r3, r7, r3
8003c00: 781b ldrb r3, [r3, #0]
8003c02: 2b03 cmp r3, #3
8003c04: d9e5 bls.n 8003bd2 <HAL_UART_RxCpltCallback+0x12ee>
pardata.ACCEL = f.fl;
8003c06: 68ba ldr r2, [r7, #8]
8003c08: 4b21 ldr r3, [pc, #132] ; (8003c90 <HAL_UART_RxCpltCallback+0x13ac>)
8003c0a: 625a str r2, [r3, #36] ; 0x24
needSave = true;
8003c0c: 4b21 ldr r3, [pc, #132] ; (8003c94 <HAL_UART_RxCpltCallback+0x13b0>)
8003c0e: 2201 movs r2, #1
8003c10: 701a strb r2, [r3, #0]
strtOut(6);
8003c12: 2006 movs r0, #6
8003c14: f7fe fd74 bl 8002700 <strtOut>
break;
8003c18: e02f b.n 8003c7a <HAL_UART_RxCpltCallback+0x1396>
tx[0] = iobuf[0];
8003c1a: 4b1b ldr r3, [pc, #108] ; (8003c88 <HAL_UART_RxCpltCallback+0x13a4>)
8003c1c: 781a ldrb r2, [r3, #0]
8003c1e: 4b1e ldr r3, [pc, #120] ; (8003c98 <HAL_UART_RxCpltCallback+0x13b4>)
8003c20: 701a strb r2, [r3, #0]
tx[1] |= 0x80; //модификация кода функции на ошибку
8003c22: 4b1d ldr r3, [pc, #116] ; (8003c98 <HAL_UART_RxCpltCallback+0x13b4>)
8003c24: 785b ldrb r3, [r3, #1]
8003c26: 2280 movs r2, #128 ; 0x80
8003c28: 4252 negs r2, r2
8003c2a: 4313 orrs r3, r2
8003c2c: b2da uxtb r2, r3
8003c2e: 4b1a ldr r3, [pc, #104] ; (8003c98 <HAL_UART_RxCpltCallback+0x13b4>)
8003c30: 705a strb r2, [r3, #1]
tx[2] = 0x03; //Адрес данных указанный в запросе не доступен
8003c32: 4b19 ldr r3, [pc, #100] ; (8003c98 <HAL_UART_RxCpltCallback+0x13b4>)
8003c34: 2203 movs r2, #3
8003c36: 709a strb r2, [r3, #2]
strtOut(3);
8003c38: 2003 movs r0, #3
8003c3a: f7fe fd61 bl 8002700 <strtOut>
break;
8003c3e: e01c b.n 8003c7a <HAL_UART_RxCpltCallback+0x1396>
tx[0] = iobuf[0];
8003c40: 4b11 ldr r3, [pc, #68] ; (8003c88 <HAL_UART_RxCpltCallback+0x13a4>)
8003c42: 781a ldrb r2, [r3, #0]
8003c44: 4b14 ldr r3, [pc, #80] ; (8003c98 <HAL_UART_RxCpltCallback+0x13b4>)
8003c46: 701a strb r2, [r3, #0]
tx[1] |= 0x80; //модификация кода функции на ошибку
8003c48: 4b13 ldr r3, [pc, #76] ; (8003c98 <HAL_UART_RxCpltCallback+0x13b4>)
8003c4a: 785b ldrb r3, [r3, #1]
8003c4c: 2280 movs r2, #128 ; 0x80
8003c4e: 4252 negs r2, r2
8003c50: 4313 orrs r3, r2
8003c52: b2da uxtb r2, r3
8003c54: 4b10 ldr r3, [pc, #64] ; (8003c98 <HAL_UART_RxCpltCallback+0x13b4>)
8003c56: 705a strb r2, [r3, #1]
tx[2] = 0x02; //Адрес данных указанный в запросе не доступен
8003c58: 4b0f ldr r3, [pc, #60] ; (8003c98 <HAL_UART_RxCpltCallback+0x13b4>)
8003c5a: 2202 movs r2, #2
8003c5c: 709a strb r2, [r3, #2]
strtOut(3);
8003c5e: 2003 movs r0, #3
8003c60: f7fe fd4e bl 8002700 <strtOut>
break;
8003c64: e00a b.n 8003c7c <HAL_UART_RxCpltCallback+0x1398>
break;
8003c66: 46c0 nop ; (mov r8, r8)
8003c68: e00a b.n 8003c80 <HAL_UART_RxCpltCallback+0x139c>
break;
8003c6a: 46c0 nop ; (mov r8, r8)
8003c6c: e008 b.n 8003c80 <HAL_UART_RxCpltCallback+0x139c>
break;
8003c6e: 46c0 nop ; (mov r8, r8)
8003c70: e006 b.n 8003c80 <HAL_UART_RxCpltCallback+0x139c>
break;
8003c72: 46c0 nop ; (mov r8, r8)
8003c74: e004 b.n 8003c80 <HAL_UART_RxCpltCallback+0x139c>
break;
8003c76: 46c0 nop ; (mov r8, r8)
8003c78: e002 b.n 8003c80 <HAL_UART_RxCpltCallback+0x139c>
break;
8003c7a: 46c0 nop ; (mov r8, r8)
break;
8003c7c: e000 b.n 8003c80 <HAL_UART_RxCpltCallback+0x139c>
break;
8003c7e: 46c0 nop ; (mov r8, r8)
}
8003c80: 46c0 nop ; (mov r8, r8)
8003c82: 46bd mov sp, r7
8003c84: b008 add sp, #32
8003c86: bdb0 pop {r4, r5, r7, pc}
8003c88: 20000294 .word 0x20000294
8003c8c: 2000003d .word 0x2000003d
8003c90: 200000a0 .word 0x200000a0
8003c94: 2000003f .word 0x2000003f
8003c98: 20000190 .word 0x20000190
08003c9c <HAL_UART_TxCpltCallback>:
void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart)
{
8003c9c: b580 push {r7, lr}
8003c9e: b084 sub sp, #16
8003ca0: af00 add r7, sp, #0
8003ca2: 6078 str r0, [r7, #4]
__IO uint16_t a;
a = delayREDE;
8003ca4: 4b2a ldr r3, [pc, #168] ; (8003d50 <HAL_UART_TxCpltCallback+0xb4>)
8003ca6: 881b ldrh r3, [r3, #0]
8003ca8: b29a uxth r2, r3
8003caa: 230e movs r3, #14
8003cac: 18fb adds r3, r7, r3
8003cae: 801a strh r2, [r3, #0]
while(a)
8003cb0: e02c b.n 8003d0c <HAL_UART_TxCpltCallback+0x70>
{
a--; a++; a--; a++; a--;
8003cb2: 230e movs r3, #14
8003cb4: 18fb adds r3, r7, r3
8003cb6: 881b ldrh r3, [r3, #0]
8003cb8: b29b uxth r3, r3
8003cba: 3b01 subs r3, #1
8003cbc: b29a uxth r2, r3
8003cbe: 230e movs r3, #14
8003cc0: 18fb adds r3, r7, r3
8003cc2: 801a strh r2, [r3, #0]
8003cc4: 230e movs r3, #14
8003cc6: 18fb adds r3, r7, r3
8003cc8: 881b ldrh r3, [r3, #0]
8003cca: b29b uxth r3, r3
8003ccc: 3301 adds r3, #1
8003cce: b29a uxth r2, r3
8003cd0: 230e movs r3, #14
8003cd2: 18fb adds r3, r7, r3
8003cd4: 801a strh r2, [r3, #0]
8003cd6: 230e movs r3, #14
8003cd8: 18fb adds r3, r7, r3
8003cda: 881b ldrh r3, [r3, #0]
8003cdc: b29b uxth r3, r3
8003cde: 3b01 subs r3, #1
8003ce0: b29a uxth r2, r3
8003ce2: 230e movs r3, #14
8003ce4: 18fb adds r3, r7, r3
8003ce6: 801a strh r2, [r3, #0]
8003ce8: 230e movs r3, #14
8003cea: 18fb adds r3, r7, r3
8003cec: 881b ldrh r3, [r3, #0]
8003cee: b29b uxth r3, r3
8003cf0: 3301 adds r3, #1
8003cf2: b29a uxth r2, r3
8003cf4: 230e movs r3, #14
8003cf6: 18fb adds r3, r7, r3
8003cf8: 801a strh r2, [r3, #0]
8003cfa: 230e movs r3, #14
8003cfc: 18fb adds r3, r7, r3
8003cfe: 881b ldrh r3, [r3, #0]
8003d00: b29b uxth r3, r3
8003d02: 3b01 subs r3, #1
8003d04: b29a uxth r2, r3
8003d06: 230e movs r3, #14
8003d08: 18fb adds r3, r7, r3
8003d0a: 801a strh r2, [r3, #0]
while(a)
8003d0c: 230e movs r3, #14
8003d0e: 18fb adds r3, r7, r3
8003d10: 881b ldrh r3, [r3, #0]
8003d12: b29b uxth r3, r3
8003d14: 2b00 cmp r3, #0
8003d16: d1cc bne.n 8003cb2 <HAL_UART_TxCpltCallback+0x16>
}
if(setbaud)
8003d18: 4b0e ldr r3, [pc, #56] ; (8003d54 <HAL_UART_TxCpltCallback+0xb8>)
8003d1a: 781b ldrb r3, [r3, #0]
8003d1c: 2b00 cmp r3, #0
8003d1e: d007 beq.n 8003d30 <HAL_UART_TxCpltCallback+0x94>
{
setbaud = false;
8003d20: 4b0c ldr r3, [pc, #48] ; (8003d54 <HAL_UART_TxCpltCallback+0xb8>)
8003d22: 2200 movs r2, #0
8003d24: 701a strb r2, [r3, #0]
needSave = true;
8003d26: 4b0c ldr r3, [pc, #48] ; (8003d58 <HAL_UART_TxCpltCallback+0xbc>)
8003d28: 2201 movs r2, #1
8003d2a: 701a strb r2, [r3, #0]
SetBaudRate();
8003d2c: f7fe fdb4 bl 8002898 <SetBaudRate>
}
__HAL_UART_CLEAR_FLAG(&huart1, UART_FLAG_TC);
8003d30: 4b0a ldr r3, [pc, #40] ; (8003d5c <HAL_UART_TxCpltCallback+0xc0>)
8003d32: 681b ldr r3, [r3, #0]
8003d34: 2240 movs r2, #64 ; 0x40
8003d36: 621a str r2, [r3, #32]
HAL_GPIO_WritePin(RE_GPIO_Port, RE_Pin, GPIO_PIN_RESET);
8003d38: 2380 movs r3, #128 ; 0x80
8003d3a: 0059 lsls r1, r3, #1
8003d3c: 23a0 movs r3, #160 ; 0xa0
8003d3e: 05db lsls r3, r3, #23
8003d40: 2200 movs r2, #0
8003d42: 0018 movs r0, r3
8003d44: f000 ff01 bl 8004b4a <HAL_GPIO_WritePin>
}
8003d48: 46c0 nop ; (mov r8, r8)
8003d4a: 46bd mov sp, r7
8003d4c: b004 add sp, #16
8003d4e: bd80 pop {r7, pc}
8003d50: 2000010a .word 0x2000010a
8003d54: 20000004 .word 0x20000004
8003d58: 2000003f .word 0x2000003f
8003d5c: 2000010c .word 0x2000010c
08003d60 <StartTransfer>:
void StartTransfer(void)
{
8003d60: b580 push {r7, lr}
8003d62: b082 sub sp, #8
8003d64: af00 add r7, sp, #0
while(a)
{
a--; a++; a--; a++; a--;
}*/
HAL_UART_Transmit_IT(&huart1, tx, lastbyte);
8003d66: 4b05 ldr r3, [pc, #20] ; (8003d7c <StartTransfer+0x1c>)
8003d68: 881a ldrh r2, [r3, #0]
8003d6a: 4905 ldr r1, [pc, #20] ; (8003d80 <StartTransfer+0x20>)
8003d6c: 4b05 ldr r3, [pc, #20] ; (8003d84 <StartTransfer+0x24>)
8003d6e: 0018 movs r0, r3
8003d70: f002 f94c bl 800600c <HAL_UART_Transmit_IT>
}
8003d74: 46c0 nop ; (mov r8, r8)
8003d76: 46bd mov sp, r7
8003d78: b002 add sp, #8
8003d7a: bd80 pop {r7, pc}
8003d7c: 20000292 .word 0x20000292
8003d80: 20000190 .word 0x20000190
8003d84: 2000010c .word 0x2000010c
08003d88 <HAL_GPIO_EXTI_Callback>:
void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin)
{
8003d88: b580 push {r7, lr}
8003d8a: b082 sub sp, #8
8003d8c: af00 add r7, sp, #0
8003d8e: 0002 movs r2, r0
8003d90: 1dbb adds r3, r7, #6
8003d92: 801a strh r2, [r3, #0]
// if(GPIO_Pin == UPER_Pin) // Overdrive
{
// __HAL_GPIO_EXTI_CLEAR_FLAG(UPER_Pin);
if(HAL_GPIO_ReadPin(GPIOA, UPER_Pin) == GPIO_PIN_SET)
8003d94: 23a0 movs r3, #160 ; 0xa0
8003d96: 05db lsls r3, r3, #23
8003d98: 2101 movs r1, #1
8003d9a: 0018 movs r0, r3
8003d9c: f000 feb8 bl 8004b10 <HAL_GPIO_ReadPin>
8003da0: 0003 movs r3, r0
8003da2: 2b01 cmp r3, #1
8003da4: d113 bne.n 8003dce <HAL_GPIO_EXTI_Callback+0x46>
{
timerUPER = 1000;
8003da6: 4b39 ldr r3, [pc, #228] ; (8003e8c <HAL_GPIO_EXTI_Callback+0x104>)
8003da8: 22fa movs r2, #250 ; 0xfa
8003daa: 0092 lsls r2, r2, #2
8003dac: 801a strh r2, [r3, #0]
HAL_GPIO_WritePin(GPIOA, PER_Pin, GPIO_PIN_SET);
8003dae: 23a0 movs r3, #160 ; 0xa0
8003db0: 05db lsls r3, r3, #23
8003db2: 2201 movs r2, #1
8003db4: 2110 movs r1, #16
8003db6: 0018 movs r0, r3
8003db8: f000 fec7 bl 8004b4a <HAL_GPIO_WritePin>
AMP_STATUS |= UPER_Pin;
8003dbc: 4b34 ldr r3, [pc, #208] ; (8003e90 <HAL_GPIO_EXTI_Callback+0x108>)
8003dbe: 881b ldrh r3, [r3, #0]
8003dc0: b29b uxth r3, r3
8003dc2: 2201 movs r2, #1
8003dc4: 4313 orrs r3, r2
8003dc6: b29a uxth r2, r3
8003dc8: 4b31 ldr r3, [pc, #196] ; (8003e90 <HAL_GPIO_EXTI_Callback+0x108>)
8003dca: 801a strh r2, [r3, #0]
8003dcc: e013 b.n 8003df6 <HAL_GPIO_EXTI_Callback+0x6e>
}
else
{
if(timerUPER==0){
8003dce: 4b2f ldr r3, [pc, #188] ; (8003e8c <HAL_GPIO_EXTI_Callback+0x104>)
8003dd0: 881b ldrh r3, [r3, #0]
8003dd2: b29b uxth r3, r3
8003dd4: 2b00 cmp r3, #0
8003dd6: d10e bne.n 8003df6 <HAL_GPIO_EXTI_Callback+0x6e>
AMP_STATUS &= ~UPER_Pin;
8003dd8: 4b2d ldr r3, [pc, #180] ; (8003e90 <HAL_GPIO_EXTI_Callback+0x108>)
8003dda: 881b ldrh r3, [r3, #0]
8003ddc: b29b uxth r3, r3
8003dde: 2201 movs r2, #1
8003de0: 4393 bics r3, r2
8003de2: b29a uxth r2, r3
8003de4: 4b2a ldr r3, [pc, #168] ; (8003e90 <HAL_GPIO_EXTI_Callback+0x108>)
8003de6: 801a strh r2, [r3, #0]
HAL_GPIO_WritePin(GPIOA, PER_Pin, GPIO_PIN_RESET);
8003de8: 23a0 movs r3, #160 ; 0xa0
8003dea: 05db lsls r3, r3, #23
8003dec: 2200 movs r2, #0
8003dee: 2110 movs r1, #16
8003df0: 0018 movs r0, r3
8003df2: f000 feaa bl 8004b4a <HAL_GPIO_WritePin>
// if(GPIO_Pin == OP_Pin) // OP
{
// __HAL_GPIO_EXTI_CLEAR_FLAG(OP_Pin);
if(HAL_GPIO_ReadPin(GPIOA, OP_Pin) == GPIO_PIN_SET)
8003df6: 23a0 movs r3, #160 ; 0xa0
8003df8: 05db lsls r3, r3, #23
8003dfa: 2102 movs r1, #2
8003dfc: 0018 movs r0, r3
8003dfe: f000 fe87 bl 8004b10 <HAL_GPIO_ReadPin>
8003e02: 0003 movs r3, r0
8003e04: 2b01 cmp r3, #1
8003e06: d10c bne.n 8003e22 <HAL_GPIO_EXTI_Callback+0x9a>
{
timerOP = 1000;
8003e08: 4b22 ldr r3, [pc, #136] ; (8003e94 <HAL_GPIO_EXTI_Callback+0x10c>)
8003e0a: 22fa movs r2, #250 ; 0xfa
8003e0c: 0092 lsls r2, r2, #2
8003e0e: 801a strh r2, [r3, #0]
AMP_STATUS |= OP_Pin;
8003e10: 4b1f ldr r3, [pc, #124] ; (8003e90 <HAL_GPIO_EXTI_Callback+0x108>)
8003e12: 881b ldrh r3, [r3, #0]
8003e14: b29b uxth r3, r3
8003e16: 2202 movs r2, #2
8003e18: 4313 orrs r3, r2
8003e1a: b29a uxth r2, r3
8003e1c: 4b1c ldr r3, [pc, #112] ; (8003e90 <HAL_GPIO_EXTI_Callback+0x108>)
8003e1e: 801a strh r2, [r3, #0]
8003e20: e00c b.n 8003e3c <HAL_GPIO_EXTI_Callback+0xb4>
}
else
{
if(timerOP==0){
8003e22: 4b1c ldr r3, [pc, #112] ; (8003e94 <HAL_GPIO_EXTI_Callback+0x10c>)
8003e24: 881b ldrh r3, [r3, #0]
8003e26: b29b uxth r3, r3
8003e28: 2b00 cmp r3, #0
8003e2a: d107 bne.n 8003e3c <HAL_GPIO_EXTI_Callback+0xb4>
AMP_STATUS &= ~OP_Pin;
8003e2c: 4b18 ldr r3, [pc, #96] ; (8003e90 <HAL_GPIO_EXTI_Callback+0x108>)
8003e2e: 881b ldrh r3, [r3, #0]
8003e30: b29b uxth r3, r3
8003e32: 2202 movs r2, #2
8003e34: 4393 bics r3, r2
8003e36: b29a uxth r2, r3
8003e38: 4b15 ldr r3, [pc, #84] ; (8003e90 <HAL_GPIO_EXTI_Callback+0x108>)
8003e3a: 801a strh r2, [r3, #0]
// if(GPIO_Pin == KZ_Pin) // KZ
{
// __HAL_GPIO_EXTI_CLEAR_FLAG(KZ_Pin);
if(HAL_GPIO_ReadPin(GPIOA, KZ_Pin) == GPIO_PIN_SET)
8003e3c: 23a0 movs r3, #160 ; 0xa0
8003e3e: 05db lsls r3, r3, #23
8003e40: 2104 movs r1, #4
8003e42: 0018 movs r0, r3
8003e44: f000 fe64 bl 8004b10 <HAL_GPIO_ReadPin>
8003e48: 0003 movs r3, r0
8003e4a: 2b01 cmp r3, #1
8003e4c: d10c bne.n 8003e68 <HAL_GPIO_EXTI_Callback+0xe0>
{
timerKZ = 1000;
8003e4e: 4b12 ldr r3, [pc, #72] ; (8003e98 <HAL_GPIO_EXTI_Callback+0x110>)
8003e50: 22fa movs r2, #250 ; 0xfa
8003e52: 0092 lsls r2, r2, #2
8003e54: 801a strh r2, [r3, #0]
AMP_STATUS |= KZ_Pin;
8003e56: 4b0e ldr r3, [pc, #56] ; (8003e90 <HAL_GPIO_EXTI_Callback+0x108>)
8003e58: 881b ldrh r3, [r3, #0]
8003e5a: b29b uxth r3, r3
8003e5c: 2204 movs r2, #4
8003e5e: 4313 orrs r3, r2
8003e60: b29a uxth r2, r3
8003e62: 4b0b ldr r3, [pc, #44] ; (8003e90 <HAL_GPIO_EXTI_Callback+0x108>)
8003e64: 801a strh r2, [r3, #0]
if(timerKZ==0){
AMP_STATUS &= ~KZ_Pin;
}
}
}
}
8003e66: e00c b.n 8003e82 <HAL_GPIO_EXTI_Callback+0xfa>
if(timerKZ==0){
8003e68: 4b0b ldr r3, [pc, #44] ; (8003e98 <HAL_GPIO_EXTI_Callback+0x110>)
8003e6a: 881b ldrh r3, [r3, #0]
8003e6c: b29b uxth r3, r3
8003e6e: 2b00 cmp r3, #0
8003e70: d107 bne.n 8003e82 <HAL_GPIO_EXTI_Callback+0xfa>
AMP_STATUS &= ~KZ_Pin;
8003e72: 4b07 ldr r3, [pc, #28] ; (8003e90 <HAL_GPIO_EXTI_Callback+0x108>)
8003e74: 881b ldrh r3, [r3, #0]
8003e76: b29b uxth r3, r3
8003e78: 2204 movs r2, #4
8003e7a: 4393 bics r3, r2
8003e7c: b29a uxth r2, r3
8003e7e: 4b04 ldr r3, [pc, #16] ; (8003e90 <HAL_GPIO_EXTI_Callback+0x108>)
8003e80: 801a strh r2, [r3, #0]
}
8003e82: 46c0 nop ; (mov r8, r8)
8003e84: 46bd mov sp, r7
8003e86: b002 add sp, #8
8003e88: bd80 pop {r7, pc}
8003e8a: 46c0 nop ; (mov r8, r8)
8003e8c: 2000002e .word 0x2000002e
8003e90: 2000002c .word 0x2000002c
8003e94: 20000030 .word 0x20000030
8003e98: 20000032 .word 0x20000032
08003e9c <HAL_Init>:
* In the default implementation,Systick is used as source of time base.
* the tick variable is incremented each 1ms in its ISR.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_Init(void)
{
8003e9c: b580 push {r7, lr}
8003e9e: b082 sub sp, #8
8003ea0: af00 add r7, sp, #0
HAL_StatusTypeDef status = HAL_OK;
8003ea2: 1dfb adds r3, r7, #7
8003ea4: 2200 movs r2, #0
8003ea6: 701a strb r2, [r3, #0]
#if (BUFFER_CACHE_DISABLE != 0)
__HAL_FLASH_BUFFER_CACHE_DISABLE();
#endif /* BUFFER_CACHE_DISABLE */
#if (PREREAD_ENABLE != 0)
__HAL_FLASH_PREREAD_BUFFER_ENABLE();
8003ea8: 4b0b ldr r3, [pc, #44] ; (8003ed8 <HAL_Init+0x3c>)
8003eaa: 4a0b ldr r2, [pc, #44] ; (8003ed8 <HAL_Init+0x3c>)
8003eac: 6812 ldr r2, [r2, #0]
8003eae: 2140 movs r1, #64 ; 0x40
8003eb0: 430a orrs r2, r1
8003eb2: 601a str r2, [r3, #0]
#if (PREFETCH_ENABLE != 0)
__HAL_FLASH_PREFETCH_BUFFER_ENABLE();
#endif /* PREFETCH_ENABLE */
/* Use SysTick as time base source and configure 1ms tick (default clock after Reset is MSI) */
if (HAL_InitTick(TICK_INT_PRIORITY) != HAL_OK)
8003eb4: 2000 movs r0, #0
8003eb6: f000 f811 bl 8003edc <HAL_InitTick>
8003eba: 1e03 subs r3, r0, #0
8003ebc: d003 beq.n 8003ec6 <HAL_Init+0x2a>
{
status = HAL_ERROR;
8003ebe: 1dfb adds r3, r7, #7
8003ec0: 2201 movs r2, #1
8003ec2: 701a strb r2, [r3, #0]
8003ec4: e001 b.n 8003eca <HAL_Init+0x2e>
}
else
{
/* Init the low level hardware */
HAL_MspInit();
8003ec6: f7fe f985 bl 80021d4 <HAL_MspInit>
}
/* Return function status */
return status;
8003eca: 1dfb adds r3, r7, #7
8003ecc: 781b ldrb r3, [r3, #0]
}
8003ece: 0018 movs r0, r3
8003ed0: 46bd mov sp, r7
8003ed2: b002 add sp, #8
8003ed4: bd80 pop {r7, pc}
8003ed6: 46c0 nop ; (mov r8, r8)
8003ed8: 40022000 .word 0x40022000
08003edc <HAL_InitTick>:
* implementation in user file.
* @param TickPriority Tick interrupt priority.
* @retval HAL status
*/
__weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
{
8003edc: b590 push {r4, r7, lr}
8003ede: b083 sub sp, #12
8003ee0: af00 add r7, sp, #0
8003ee2: 6078 str r0, [r7, #4]
/* Configure the SysTick to have interrupt in 1ms time basis*/
if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U)
8003ee4: 4b14 ldr r3, [pc, #80] ; (8003f38 <HAL_InitTick+0x5c>)
8003ee6: 681c ldr r4, [r3, #0]
8003ee8: 4b14 ldr r3, [pc, #80] ; (8003f3c <HAL_InitTick+0x60>)
8003eea: 781b ldrb r3, [r3, #0]
8003eec: 0019 movs r1, r3
8003eee: 23fa movs r3, #250 ; 0xfa
8003ef0: 0098 lsls r0, r3, #2
8003ef2: f7fc f909 bl 8000108 <__udivsi3>
8003ef6: 0003 movs r3, r0
8003ef8: 0019 movs r1, r3
8003efa: 0020 movs r0, r4
8003efc: f7fc f904 bl 8000108 <__udivsi3>
8003f00: 0003 movs r3, r0
8003f02: 0018 movs r0, r3
8003f04: f000 f93c bl 8004180 <HAL_SYSTICK_Config>
8003f08: 1e03 subs r3, r0, #0
8003f0a: d001 beq.n 8003f10 <HAL_InitTick+0x34>
{
return HAL_ERROR;
8003f0c: 2301 movs r3, #1
8003f0e: e00f b.n 8003f30 <HAL_InitTick+0x54>
}
/* Configure the SysTick IRQ priority */
if (TickPriority < (1UL << __NVIC_PRIO_BITS))
8003f10: 687b ldr r3, [r7, #4]
8003f12: 2b03 cmp r3, #3
8003f14: d80b bhi.n 8003f2e <HAL_InitTick+0x52>
{
HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U);
8003f16: 6879 ldr r1, [r7, #4]
8003f18: 2301 movs r3, #1
8003f1a: 425b negs r3, r3
8003f1c: 2200 movs r2, #0
8003f1e: 0018 movs r0, r3
8003f20: f000 f8f8 bl 8004114 <HAL_NVIC_SetPriority>
uwTickPrio = TickPriority;
8003f24: 4b06 ldr r3, [pc, #24] ; (8003f40 <HAL_InitTick+0x64>)
8003f26: 687a ldr r2, [r7, #4]
8003f28: 601a str r2, [r3, #0]
{
return HAL_ERROR;
}
/* Return function status */
return HAL_OK;
8003f2a: 2300 movs r3, #0
8003f2c: e000 b.n 8003f30 <HAL_InitTick+0x54>
return HAL_ERROR;
8003f2e: 2301 movs r3, #1
}
8003f30: 0018 movs r0, r3
8003f32: 46bd mov sp, r7
8003f34: b003 add sp, #12
8003f36: bd90 pop {r4, r7, pc}
8003f38: 20000000 .word 0x20000000
8003f3c: 2000000c .word 0x2000000c
8003f40: 20000008 .word 0x20000008
08003f44 <HAL_IncTick>:
* @note This function is declared as __weak to be overwritten in case of other
* implementations in user file.
* @retval None
*/
__weak void HAL_IncTick(void)
{
8003f44: b580 push {r7, lr}
8003f46: af00 add r7, sp, #0
uwTick += uwTickFreq;
8003f48: 4b05 ldr r3, [pc, #20] ; (8003f60 <HAL_IncTick+0x1c>)
8003f4a: 781b ldrb r3, [r3, #0]
8003f4c: 001a movs r2, r3
8003f4e: 4b05 ldr r3, [pc, #20] ; (8003f64 <HAL_IncTick+0x20>)
8003f50: 681b ldr r3, [r3, #0]
8003f52: 18d2 adds r2, r2, r3
8003f54: 4b03 ldr r3, [pc, #12] ; (8003f64 <HAL_IncTick+0x20>)
8003f56: 601a str r2, [r3, #0]
}
8003f58: 46c0 nop ; (mov r8, r8)
8003f5a: 46bd mov sp, r7
8003f5c: bd80 pop {r7, pc}
8003f5e: 46c0 nop ; (mov r8, r8)
8003f60: 2000000c .word 0x2000000c
8003f64: 20000394 .word 0x20000394
08003f68 <HAL_GetTick>:
* @note This function is declared as __weak to be overwritten in case of other
* implementations in user file.
* @retval tick value
*/
__weak uint32_t HAL_GetTick(void)
{
8003f68: b580 push {r7, lr}
8003f6a: af00 add r7, sp, #0
return uwTick;
8003f6c: 4b02 ldr r3, [pc, #8] ; (8003f78 <HAL_GetTick+0x10>)
8003f6e: 681b ldr r3, [r3, #0]
}
8003f70: 0018 movs r0, r3
8003f72: 46bd mov sp, r7
8003f74: bd80 pop {r7, pc}
8003f76: 46c0 nop ; (mov r8, r8)
8003f78: 20000394 .word 0x20000394
08003f7c <__NVIC_EnableIRQ>:
\details Enables a device specific interrupt in the NVIC interrupt controller.
\param [in] IRQn Device specific interrupt number.
\note IRQn must not be negative.
*/
__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
{
8003f7c: b580 push {r7, lr}
8003f7e: b082 sub sp, #8
8003f80: af00 add r7, sp, #0
8003f82: 0002 movs r2, r0
8003f84: 1dfb adds r3, r7, #7
8003f86: 701a strb r2, [r3, #0]
if ((int32_t)(IRQn) >= 0)
8003f88: 1dfb adds r3, r7, #7
8003f8a: 781b ldrb r3, [r3, #0]
8003f8c: 2b7f cmp r3, #127 ; 0x7f
8003f8e: d809 bhi.n 8003fa4 <__NVIC_EnableIRQ+0x28>
{
NVIC->ISER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
8003f90: 4b06 ldr r3, [pc, #24] ; (8003fac <__NVIC_EnableIRQ+0x30>)
8003f92: 1dfa adds r2, r7, #7
8003f94: 7812 ldrb r2, [r2, #0]
8003f96: 0011 movs r1, r2
8003f98: 221f movs r2, #31
8003f9a: 400a ands r2, r1
8003f9c: 2101 movs r1, #1
8003f9e: 4091 lsls r1, r2
8003fa0: 000a movs r2, r1
8003fa2: 601a str r2, [r3, #0]
}
}
8003fa4: 46c0 nop ; (mov r8, r8)
8003fa6: 46bd mov sp, r7
8003fa8: b002 add sp, #8
8003faa: bd80 pop {r7, pc}
8003fac: e000e100 .word 0xe000e100
08003fb0 <__NVIC_DisableIRQ>:
\details Disables a device specific interrupt in the NVIC interrupt controller.
\param [in] IRQn Device specific interrupt number.
\note IRQn must not be negative.
*/
__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)
{
8003fb0: b580 push {r7, lr}
8003fb2: b082 sub sp, #8
8003fb4: af00 add r7, sp, #0
8003fb6: 0002 movs r2, r0
8003fb8: 1dfb adds r3, r7, #7
8003fba: 701a strb r2, [r3, #0]
if ((int32_t)(IRQn) >= 0)
8003fbc: 1dfb adds r3, r7, #7
8003fbe: 781b ldrb r3, [r3, #0]
8003fc0: 2b7f cmp r3, #127 ; 0x7f
8003fc2: d80e bhi.n 8003fe2 <__NVIC_DisableIRQ+0x32>
{
NVIC->ICER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
8003fc4: 4909 ldr r1, [pc, #36] ; (8003fec <__NVIC_DisableIRQ+0x3c>)
8003fc6: 1dfb adds r3, r7, #7
8003fc8: 781b ldrb r3, [r3, #0]
8003fca: 001a movs r2, r3
8003fcc: 231f movs r3, #31
8003fce: 4013 ands r3, r2
8003fd0: 2201 movs r2, #1
8003fd2: 409a lsls r2, r3
8003fd4: 0013 movs r3, r2
8003fd6: 2280 movs r2, #128 ; 0x80
8003fd8: 508b str r3, [r1, r2]
\details Acts as a special kind of Data Memory Barrier.
It completes when all explicit memory accesses before this instruction complete.
*/
__STATIC_FORCEINLINE void __DSB(void)
{
__ASM volatile ("dsb 0xF":::"memory");
8003fda: f3bf 8f4f dsb sy
__ASM volatile ("isb 0xF":::"memory");
8003fde: f3bf 8f6f isb sy
__DSB();
__ISB();
}
}
8003fe2: 46c0 nop ; (mov r8, r8)
8003fe4: 46bd mov sp, r7
8003fe6: b002 add sp, #8
8003fe8: bd80 pop {r7, pc}
8003fea: 46c0 nop ; (mov r8, r8)
8003fec: e000e100 .word 0xe000e100
08003ff0 <__NVIC_SetPriority>:
\param [in] IRQn Interrupt number.
\param [in] priority Priority to set.
\note The priority cannot be set for every processor exception.
*/
__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
{
8003ff0: b5b0 push {r4, r5, r7, lr}
8003ff2: b082 sub sp, #8
8003ff4: af00 add r7, sp, #0
8003ff6: 0002 movs r2, r0
8003ff8: 6039 str r1, [r7, #0]
8003ffa: 1dfb adds r3, r7, #7
8003ffc: 701a strb r2, [r3, #0]
if ((int32_t)(IRQn) >= 0)
8003ffe: 1dfb adds r3, r7, #7
8004000: 781b ldrb r3, [r3, #0]
8004002: 2b7f cmp r3, #127 ; 0x7f
8004004: d828 bhi.n 8004058 <__NVIC_SetPriority+0x68>
{
NVIC->IP[_IP_IDX(IRQn)] = ((uint32_t)(NVIC->IP[_IP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
8004006: 4c2f ldr r4, [pc, #188] ; (80040c4 <__NVIC_SetPriority+0xd4>)
8004008: 1dfb adds r3, r7, #7
800400a: 781b ldrb r3, [r3, #0]
800400c: b25b sxtb r3, r3
800400e: 089b lsrs r3, r3, #2
8004010: 492c ldr r1, [pc, #176] ; (80040c4 <__NVIC_SetPriority+0xd4>)
8004012: 1dfa adds r2, r7, #7
8004014: 7812 ldrb r2, [r2, #0]
8004016: b252 sxtb r2, r2
8004018: 0892 lsrs r2, r2, #2
800401a: 32c0 adds r2, #192 ; 0xc0
800401c: 0092 lsls r2, r2, #2
800401e: 5852 ldr r2, [r2, r1]
8004020: 1df9 adds r1, r7, #7
8004022: 7809 ldrb r1, [r1, #0]
8004024: 0008 movs r0, r1
8004026: 2103 movs r1, #3
8004028: 4001 ands r1, r0
800402a: 00c9 lsls r1, r1, #3
800402c: 20ff movs r0, #255 ; 0xff
800402e: 4088 lsls r0, r1
8004030: 0001 movs r1, r0
8004032: 43c9 mvns r1, r1
8004034: 4011 ands r1, r2
(((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
8004036: 683a ldr r2, [r7, #0]
8004038: 0192 lsls r2, r2, #6
800403a: 20ff movs r0, #255 ; 0xff
800403c: 4010 ands r0, r2
800403e: 1dfa adds r2, r7, #7
8004040: 7812 ldrb r2, [r2, #0]
8004042: 0015 movs r5, r2
8004044: 2203 movs r2, #3
8004046: 402a ands r2, r5
8004048: 00d2 lsls r2, r2, #3
800404a: 4090 lsls r0, r2
800404c: 0002 movs r2, r0
NVIC->IP[_IP_IDX(IRQn)] = ((uint32_t)(NVIC->IP[_IP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
800404e: 430a orrs r2, r1
8004050: 33c0 adds r3, #192 ; 0xc0
8004052: 009b lsls r3, r3, #2
8004054: 511a str r2, [r3, r4]
else
{
SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
(((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
}
}
8004056: e031 b.n 80040bc <__NVIC_SetPriority+0xcc>
SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
8004058: 4c1b ldr r4, [pc, #108] ; (80040c8 <__NVIC_SetPriority+0xd8>)
800405a: 1dfb adds r3, r7, #7
800405c: 781b ldrb r3, [r3, #0]
800405e: 001a movs r2, r3
8004060: 230f movs r3, #15
8004062: 4013 ands r3, r2
8004064: 3b08 subs r3, #8
8004066: 0899 lsrs r1, r3, #2
8004068: 4a17 ldr r2, [pc, #92] ; (80040c8 <__NVIC_SetPriority+0xd8>)
800406a: 1dfb adds r3, r7, #7
800406c: 781b ldrb r3, [r3, #0]
800406e: 0018 movs r0, r3
8004070: 230f movs r3, #15
8004072: 4003 ands r3, r0
8004074: 3b08 subs r3, #8
8004076: 089b lsrs r3, r3, #2
8004078: 3306 adds r3, #6
800407a: 009b lsls r3, r3, #2
800407c: 18d3 adds r3, r2, r3
800407e: 3304 adds r3, #4
8004080: 681b ldr r3, [r3, #0]
8004082: 1dfa adds r2, r7, #7
8004084: 7812 ldrb r2, [r2, #0]
8004086: 0010 movs r0, r2
8004088: 2203 movs r2, #3
800408a: 4002 ands r2, r0
800408c: 00d2 lsls r2, r2, #3
800408e: 20ff movs r0, #255 ; 0xff
8004090: 4090 lsls r0, r2
8004092: 0002 movs r2, r0
8004094: 43d2 mvns r2, r2
8004096: 401a ands r2, r3
(((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
8004098: 683b ldr r3, [r7, #0]
800409a: 019b lsls r3, r3, #6
800409c: 20ff movs r0, #255 ; 0xff
800409e: 4018 ands r0, r3
80040a0: 1dfb adds r3, r7, #7
80040a2: 781b ldrb r3, [r3, #0]
80040a4: 001d movs r5, r3
80040a6: 2303 movs r3, #3
80040a8: 402b ands r3, r5
80040aa: 00db lsls r3, r3, #3
80040ac: 4098 lsls r0, r3
80040ae: 0003 movs r3, r0
SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
80040b0: 431a orrs r2, r3
80040b2: 1d8b adds r3, r1, #6
80040b4: 009b lsls r3, r3, #2
80040b6: 18e3 adds r3, r4, r3
80040b8: 3304 adds r3, #4
80040ba: 601a str r2, [r3, #0]
}
80040bc: 46c0 nop ; (mov r8, r8)
80040be: 46bd mov sp, r7
80040c0: b002 add sp, #8
80040c2: bdb0 pop {r4, r5, r7, pc}
80040c4: e000e100 .word 0xe000e100
80040c8: e000ed00 .word 0xe000ed00
080040cc <SysTick_Config>:
\note When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
must contain a vendor-specific implementation of this function.
*/
__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
{
80040cc: b580 push {r7, lr}
80040ce: b082 sub sp, #8
80040d0: af00 add r7, sp, #0
80040d2: 6078 str r0, [r7, #4]
if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
80040d4: 687b ldr r3, [r7, #4]
80040d6: 3b01 subs r3, #1
80040d8: 4a0c ldr r2, [pc, #48] ; (800410c <SysTick_Config+0x40>)
80040da: 4293 cmp r3, r2
80040dc: d901 bls.n 80040e2 <SysTick_Config+0x16>
{
return (1UL); /* Reload value impossible */
80040de: 2301 movs r3, #1
80040e0: e010 b.n 8004104 <SysTick_Config+0x38>
}
SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */
80040e2: 4b0b ldr r3, [pc, #44] ; (8004110 <SysTick_Config+0x44>)
80040e4: 687a ldr r2, [r7, #4]
80040e6: 3a01 subs r2, #1
80040e8: 605a str r2, [r3, #4]
NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
80040ea: 2301 movs r3, #1
80040ec: 425b negs r3, r3
80040ee: 2103 movs r1, #3
80040f0: 0018 movs r0, r3
80040f2: f7ff ff7d bl 8003ff0 <__NVIC_SetPriority>
SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
80040f6: 4b06 ldr r3, [pc, #24] ; (8004110 <SysTick_Config+0x44>)
80040f8: 2200 movs r2, #0
80040fa: 609a str r2, [r3, #8]
SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
80040fc: 4b04 ldr r3, [pc, #16] ; (8004110 <SysTick_Config+0x44>)
80040fe: 2207 movs r2, #7
8004100: 601a str r2, [r3, #0]
SysTick_CTRL_TICKINT_Msk |
SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */
return (0UL); /* Function successful */
8004102: 2300 movs r3, #0
}
8004104: 0018 movs r0, r3
8004106: 46bd mov sp, r7
8004108: b002 add sp, #8
800410a: bd80 pop {r7, pc}
800410c: 00ffffff .word 0x00ffffff
8004110: e000e010 .word 0xe000e010
08004114 <HAL_NVIC_SetPriority>:
* with stm32l0xx devices, this parameter is a dummy value and it is ignored, because
* no subpriority supported in Cortex M0+ based products.
* @retval None
*/
void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority)
{
8004114: b580 push {r7, lr}
8004116: b084 sub sp, #16
8004118: af00 add r7, sp, #0
800411a: 60b9 str r1, [r7, #8]
800411c: 607a str r2, [r7, #4]
800411e: 230f movs r3, #15
8004120: 18fb adds r3, r7, r3
8004122: 1c02 adds r2, r0, #0
8004124: 701a strb r2, [r3, #0]
/* Check the parameters */
assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority));
NVIC_SetPriority(IRQn,PreemptPriority);
8004126: 68ba ldr r2, [r7, #8]
8004128: 230f movs r3, #15
800412a: 18fb adds r3, r7, r3
800412c: 781b ldrb r3, [r3, #0]
800412e: b25b sxtb r3, r3
8004130: 0011 movs r1, r2
8004132: 0018 movs r0, r3
8004134: f7ff ff5c bl 8003ff0 <__NVIC_SetPriority>
}
8004138: 46c0 nop ; (mov r8, r8)
800413a: 46bd mov sp, r7
800413c: b004 add sp, #16
800413e: bd80 pop {r7, pc}
08004140 <HAL_NVIC_EnableIRQ>:
* This parameter can be an enumerator of IRQn_Type enumeration
* (For the complete STM32 Devices IRQ Channels list, please refer to stm32l0xx.h file)
* @retval None
*/
void HAL_NVIC_EnableIRQ(IRQn_Type IRQn)
{
8004140: b580 push {r7, lr}
8004142: b082 sub sp, #8
8004144: af00 add r7, sp, #0
8004146: 0002 movs r2, r0
8004148: 1dfb adds r3, r7, #7
800414a: 701a strb r2, [r3, #0]
/* Check the parameters */
assert_param(IS_NVIC_DEVICE_IRQ(IRQn));
/* Enable interrupt */
NVIC_EnableIRQ(IRQn);
800414c: 1dfb adds r3, r7, #7
800414e: 781b ldrb r3, [r3, #0]
8004150: b25b sxtb r3, r3
8004152: 0018 movs r0, r3
8004154: f7ff ff12 bl 8003f7c <__NVIC_EnableIRQ>
}
8004158: 46c0 nop ; (mov r8, r8)
800415a: 46bd mov sp, r7
800415c: b002 add sp, #8
800415e: bd80 pop {r7, pc}
08004160 <HAL_NVIC_DisableIRQ>:
* This parameter can be an enumerator of IRQn_Type enumeration
* (For the complete STM32 Devices IRQ Channels list, please refer to stm32l0xx.h file)
* @retval None
*/
void HAL_NVIC_DisableIRQ(IRQn_Type IRQn)
{
8004160: b580 push {r7, lr}
8004162: b082 sub sp, #8
8004164: af00 add r7, sp, #0
8004166: 0002 movs r2, r0
8004168: 1dfb adds r3, r7, #7
800416a: 701a strb r2, [r3, #0]
/* Check the parameters */
assert_param(IS_NVIC_DEVICE_IRQ(IRQn));
/* Disable interrupt */
NVIC_DisableIRQ(IRQn);
800416c: 1dfb adds r3, r7, #7
800416e: 781b ldrb r3, [r3, #0]
8004170: b25b sxtb r3, r3
8004172: 0018 movs r0, r3
8004174: f7ff ff1c bl 8003fb0 <__NVIC_DisableIRQ>
}
8004178: 46c0 nop ; (mov r8, r8)
800417a: 46bd mov sp, r7
800417c: b002 add sp, #8
800417e: bd80 pop {r7, pc}
08004180 <HAL_SYSTICK_Config>:
* @param TicksNumb Specifies the ticks Number of ticks between two interrupts.
* @retval status: - 0 Function succeeded.
* - 1 Function failed.
*/
uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb)
{
8004180: b580 push {r7, lr}
8004182: b082 sub sp, #8
8004184: af00 add r7, sp, #0
8004186: 6078 str r0, [r7, #4]
return SysTick_Config(TicksNumb);
8004188: 687b ldr r3, [r7, #4]
800418a: 0018 movs r0, r3
800418c: f7ff ff9e bl 80040cc <SysTick_Config>
8004190: 0003 movs r3, r0
}
8004192: 0018 movs r0, r3
8004194: 46bd mov sp, r7
8004196: b002 add sp, #8
8004198: bd80 pop {r7, pc}
0800419a <HAL_DMA_Abort>:
* @param hdma pointer to a DMA_HandleTypeDef structure that contains
* the configuration information for the specified DMA Channel.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma)
{
800419a: b580 push {r7, lr}
800419c: b084 sub sp, #16
800419e: af00 add r7, sp, #0
80041a0: 6078 str r0, [r7, #4]
HAL_StatusTypeDef status = HAL_OK;
80041a2: 230f movs r3, #15
80041a4: 18fb adds r3, r7, r3
80041a6: 2200 movs r2, #0
80041a8: 701a strb r2, [r3, #0]
/* Check the DMA peripheral state */
if(hdma->State != HAL_DMA_STATE_BUSY)
80041aa: 687b ldr r3, [r7, #4]
80041ac: 2225 movs r2, #37 ; 0x25
80041ae: 5c9b ldrb r3, [r3, r2]
80041b0: b2db uxtb r3, r3
80041b2: 2b02 cmp r3, #2
80041b4: d008 beq.n 80041c8 <HAL_DMA_Abort+0x2e>
{
hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER;
80041b6: 687b ldr r3, [r7, #4]
80041b8: 2204 movs r2, #4
80041ba: 63da str r2, [r3, #60] ; 0x3c
/* Process Unlocked */
__HAL_UNLOCK(hdma);
80041bc: 687b ldr r3, [r7, #4]
80041be: 2224 movs r2, #36 ; 0x24
80041c0: 2100 movs r1, #0
80041c2: 5499 strb r1, [r3, r2]
return HAL_ERROR;
80041c4: 2301 movs r3, #1
80041c6: e024 b.n 8004212 <HAL_DMA_Abort+0x78>
}
else
{
/* Disable DMA IT */
__HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE));
80041c8: 687b ldr r3, [r7, #4]
80041ca: 681b ldr r3, [r3, #0]
80041cc: 687a ldr r2, [r7, #4]
80041ce: 6812 ldr r2, [r2, #0]
80041d0: 6812 ldr r2, [r2, #0]
80041d2: 210e movs r1, #14
80041d4: 438a bics r2, r1
80041d6: 601a str r2, [r3, #0]
/* Disable the channel */
__HAL_DMA_DISABLE(hdma);
80041d8: 687b ldr r3, [r7, #4]
80041da: 681b ldr r3, [r3, #0]
80041dc: 687a ldr r2, [r7, #4]
80041de: 6812 ldr r2, [r2, #0]
80041e0: 6812 ldr r2, [r2, #0]
80041e2: 2101 movs r1, #1
80041e4: 438a bics r2, r1
80041e6: 601a str r2, [r3, #0]
/* Clear all flags */
hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x1cU));
80041e8: 687b ldr r3, [r7, #4]
80041ea: 6c1b ldr r3, [r3, #64] ; 0x40
80041ec: 687a ldr r2, [r7, #4]
80041ee: 6c52 ldr r2, [r2, #68] ; 0x44
80041f0: 211c movs r1, #28
80041f2: 400a ands r2, r1
80041f4: 2101 movs r1, #1
80041f6: 4091 lsls r1, r2
80041f8: 000a movs r2, r1
80041fa: 605a str r2, [r3, #4]
/* Change the DMA state */
hdma->State = HAL_DMA_STATE_READY;
80041fc: 687b ldr r3, [r7, #4]
80041fe: 2225 movs r2, #37 ; 0x25
8004200: 2101 movs r1, #1
8004202: 5499 strb r1, [r3, r2]
/* Process Unlocked */
__HAL_UNLOCK(hdma);
8004204: 687b ldr r3, [r7, #4]
8004206: 2224 movs r2, #36 ; 0x24
8004208: 2100 movs r1, #0
800420a: 5499 strb r1, [r3, r2]
return status;
800420c: 230f movs r3, #15
800420e: 18fb adds r3, r7, r3
8004210: 781b ldrb r3, [r3, #0]
}
}
8004212: 0018 movs r0, r3
8004214: 46bd mov sp, r7
8004216: b004 add sp, #16
8004218: bd80 pop {r7, pc}
0800421a <HAL_DMA_Abort_IT>:
* @param hdma pointer to a DMA_HandleTypeDef structure that contains
* the configuration information for the specified DMA Channel.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma)
{
800421a: b580 push {r7, lr}
800421c: b084 sub sp, #16
800421e: af00 add r7, sp, #0
8004220: 6078 str r0, [r7, #4]
HAL_StatusTypeDef status = HAL_OK;
8004222: 230f movs r3, #15
8004224: 18fb adds r3, r7, r3
8004226: 2200 movs r2, #0
8004228: 701a strb r2, [r3, #0]
if(HAL_DMA_STATE_BUSY != hdma->State)
800422a: 687b ldr r3, [r7, #4]
800422c: 2225 movs r2, #37 ; 0x25
800422e: 5c9b ldrb r3, [r3, r2]
8004230: b2db uxtb r3, r3
8004232: 2b02 cmp r3, #2
8004234: d007 beq.n 8004246 <HAL_DMA_Abort_IT+0x2c>
{
/* no transfer ongoing */
hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER;
8004236: 687b ldr r3, [r7, #4]
8004238: 2204 movs r2, #4
800423a: 63da str r2, [r3, #60] ; 0x3c
status = HAL_ERROR;
800423c: 230f movs r3, #15
800423e: 18fb adds r3, r7, r3
8004240: 2201 movs r2, #1
8004242: 701a strb r2, [r3, #0]
8004244: e02a b.n 800429c <HAL_DMA_Abort_IT+0x82>
}
else
{
/* Disable DMA IT */
__HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE));
8004246: 687b ldr r3, [r7, #4]
8004248: 681b ldr r3, [r3, #0]
800424a: 687a ldr r2, [r7, #4]
800424c: 6812 ldr r2, [r2, #0]
800424e: 6812 ldr r2, [r2, #0]
8004250: 210e movs r1, #14
8004252: 438a bics r2, r1
8004254: 601a str r2, [r3, #0]
/* Disable the channel */
__HAL_DMA_DISABLE(hdma);
8004256: 687b ldr r3, [r7, #4]
8004258: 681b ldr r3, [r3, #0]
800425a: 687a ldr r2, [r7, #4]
800425c: 6812 ldr r2, [r2, #0]
800425e: 6812 ldr r2, [r2, #0]
8004260: 2101 movs r1, #1
8004262: 438a bics r2, r1
8004264: 601a str r2, [r3, #0]
/* Clear all flags */
hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x1cU));
8004266: 687b ldr r3, [r7, #4]
8004268: 6c1b ldr r3, [r3, #64] ; 0x40
800426a: 687a ldr r2, [r7, #4]
800426c: 6c52 ldr r2, [r2, #68] ; 0x44
800426e: 211c movs r1, #28
8004270: 400a ands r2, r1
8004272: 2101 movs r1, #1
8004274: 4091 lsls r1, r2
8004276: 000a movs r2, r1
8004278: 605a str r2, [r3, #4]
/* Change the DMA state */
hdma->State = HAL_DMA_STATE_READY;
800427a: 687b ldr r3, [r7, #4]
800427c: 2225 movs r2, #37 ; 0x25
800427e: 2101 movs r1, #1
8004280: 5499 strb r1, [r3, r2]
/* Process Unlocked */
__HAL_UNLOCK(hdma);
8004282: 687b ldr r3, [r7, #4]
8004284: 2224 movs r2, #36 ; 0x24
8004286: 2100 movs r1, #0
8004288: 5499 strb r1, [r3, r2]
/* Call User Abort callback */
if(hdma->XferAbortCallback != NULL)
800428a: 687b ldr r3, [r7, #4]
800428c: 6b9b ldr r3, [r3, #56] ; 0x38
800428e: 2b00 cmp r3, #0
8004290: d004 beq.n 800429c <HAL_DMA_Abort_IT+0x82>
{
hdma->XferAbortCallback(hdma);
8004292: 687b ldr r3, [r7, #4]
8004294: 6b9b ldr r3, [r3, #56] ; 0x38
8004296: 687a ldr r2, [r7, #4]
8004298: 0010 movs r0, r2
800429a: 4798 blx r3
}
}
return status;
800429c: 230f movs r3, #15
800429e: 18fb adds r3, r7, r3
80042a0: 781b ldrb r3, [r3, #0]
}
80042a2: 0018 movs r0, r3
80042a4: 46bd mov sp, r7
80042a6: b004 add sp, #16
80042a8: bd80 pop {r7, pc}
...
080042ac <HAL_FLASH_Program>:
* @param Data Specifie the data to be programmed
*
* @retval HAL_StatusTypeDef HAL Status
*/
HAL_StatusTypeDef HAL_FLASH_Program(uint32_t TypeProgram, uint32_t Address, uint32_t Data)
{
80042ac: b590 push {r4, r7, lr}
80042ae: b087 sub sp, #28
80042b0: af00 add r7, sp, #0
80042b2: 60f8 str r0, [r7, #12]
80042b4: 60b9 str r1, [r7, #8]
80042b6: 607a str r2, [r7, #4]
HAL_StatusTypeDef status = HAL_ERROR;
80042b8: 2317 movs r3, #23
80042ba: 18fb adds r3, r7, r3
80042bc: 2201 movs r2, #1
80042be: 701a strb r2, [r3, #0]
/* Process Locked */
__HAL_LOCK(&pFlash);
80042c0: 4b16 ldr r3, [pc, #88] ; (800431c <HAL_FLASH_Program+0x70>)
80042c2: 7c1b ldrb r3, [r3, #16]
80042c4: 2b01 cmp r3, #1
80042c6: d101 bne.n 80042cc <HAL_FLASH_Program+0x20>
80042c8: 2302 movs r3, #2
80042ca: e023 b.n 8004314 <HAL_FLASH_Program+0x68>
80042cc: 4b13 ldr r3, [pc, #76] ; (800431c <HAL_FLASH_Program+0x70>)
80042ce: 2201 movs r2, #1
80042d0: 741a strb r2, [r3, #16]
/* Check the parameters */
assert_param(IS_FLASH_TYPEPROGRAM(TypeProgram));
assert_param(IS_FLASH_PROGRAM_ADDRESS(Address));
/* Wait for last operation to be completed */
status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
80042d2: 2317 movs r3, #23
80042d4: 18fc adds r4, r7, r3
80042d6: 4b12 ldr r3, [pc, #72] ; (8004320 <HAL_FLASH_Program+0x74>)
80042d8: 0018 movs r0, r3
80042da: f000 f887 bl 80043ec <FLASH_WaitForLastOperation>
80042de: 0003 movs r3, r0
80042e0: 7023 strb r3, [r4, #0]
if(status == HAL_OK)
80042e2: 2317 movs r3, #23
80042e4: 18fb adds r3, r7, r3
80042e6: 781b ldrb r3, [r3, #0]
80042e8: 2b00 cmp r3, #0
80042ea: d10d bne.n 8004308 <HAL_FLASH_Program+0x5c>
{
/* Clean the error context */
pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
80042ec: 4b0b ldr r3, [pc, #44] ; (800431c <HAL_FLASH_Program+0x70>)
80042ee: 2200 movs r2, #0
80042f0: 615a str r2, [r3, #20]
/*Program word (32-bit) at a specified address.*/
*(__IO uint32_t *)Address = Data;
80042f2: 68bb ldr r3, [r7, #8]
80042f4: 687a ldr r2, [r7, #4]
80042f6: 601a str r2, [r3, #0]
/* Wait for last operation to be completed */
status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
80042f8: 2317 movs r3, #23
80042fa: 18fc adds r4, r7, r3
80042fc: 4b08 ldr r3, [pc, #32] ; (8004320 <HAL_FLASH_Program+0x74>)
80042fe: 0018 movs r0, r3
8004300: f000 f874 bl 80043ec <FLASH_WaitForLastOperation>
8004304: 0003 movs r3, r0
8004306: 7023 strb r3, [r4, #0]
}
/* Process Unlocked */
__HAL_UNLOCK(&pFlash);
8004308: 4b04 ldr r3, [pc, #16] ; (800431c <HAL_FLASH_Program+0x70>)
800430a: 2200 movs r2, #0
800430c: 741a strb r2, [r3, #16]
return status;
800430e: 2317 movs r3, #23
8004310: 18fb adds r3, r7, r3
8004312: 781b ldrb r3, [r3, #0]
}
8004314: 0018 movs r0, r3
8004316: 46bd mov sp, r7
8004318: b007 add sp, #28
800431a: bd90 pop {r4, r7, pc}
800431c: 20000398 .word 0x20000398
8004320: 0000c350 .word 0x0000c350
08004324 <HAL_FLASH_Unlock>:
/**
* @brief Unlock the FLASH control register access
* @retval HAL Status
*/
HAL_StatusTypeDef HAL_FLASH_Unlock(void)
{
8004324: b580 push {r7, lr}
8004326: b086 sub sp, #24
8004328: af00 add r7, sp, #0
uint32_t primask_bit;
/* Unlocking FLASH_PECR register access*/
if(HAL_IS_BIT_SET(FLASH->PECR, FLASH_PECR_PELOCK))
800432a: 4b21 ldr r3, [pc, #132] ; (80043b0 <HAL_FLASH_Unlock+0x8c>)
800432c: 685b ldr r3, [r3, #4]
800432e: 2201 movs r2, #1
8004330: 4013 ands r3, r2
8004332: 2b01 cmp r3, #1
8004334: d118 bne.n 8004368 <HAL_FLASH_Unlock+0x44>
__ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory");
8004336: f3ef 8310 mrs r3, PRIMASK
800433a: 60fb str r3, [r7, #12]
return(result);
800433c: 68fb ldr r3, [r7, #12]
{
/* Disable interrupts to avoid any interruption during unlock sequence */
primask_bit = __get_PRIMASK();
800433e: 617b str r3, [r7, #20]
__ASM volatile ("cpsid i" : : : "memory");
8004340: b672 cpsid i
__disable_irq();
WRITE_REG(FLASH->PEKEYR, FLASH_PEKEY1);
8004342: 4b1b ldr r3, [pc, #108] ; (80043b0 <HAL_FLASH_Unlock+0x8c>)
8004344: 4a1b ldr r2, [pc, #108] ; (80043b4 <HAL_FLASH_Unlock+0x90>)
8004346: 60da str r2, [r3, #12]
WRITE_REG(FLASH->PEKEYR, FLASH_PEKEY2);
8004348: 4b19 ldr r3, [pc, #100] ; (80043b0 <HAL_FLASH_Unlock+0x8c>)
800434a: 4a1b ldr r2, [pc, #108] ; (80043b8 <HAL_FLASH_Unlock+0x94>)
800434c: 60da str r2, [r3, #12]
800434e: 697b ldr r3, [r7, #20]
8004350: 613b str r3, [r7, #16]
__ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
8004352: 693b ldr r3, [r7, #16]
8004354: f383 8810 msr PRIMASK, r3
/* Re-enable the interrupts: restore previous priority mask */
__set_PRIMASK(primask_bit);
if(HAL_IS_BIT_SET(FLASH->PECR, FLASH_PECR_PELOCK))
8004358: 4b15 ldr r3, [pc, #84] ; (80043b0 <HAL_FLASH_Unlock+0x8c>)
800435a: 685b ldr r3, [r3, #4]
800435c: 2201 movs r2, #1
800435e: 4013 ands r3, r2
8004360: 2b01 cmp r3, #1
8004362: d101 bne.n 8004368 <HAL_FLASH_Unlock+0x44>
{
return HAL_ERROR;
8004364: 2301 movs r3, #1
8004366: e01f b.n 80043a8 <HAL_FLASH_Unlock+0x84>
}
}
if (HAL_IS_BIT_SET(FLASH->PECR, FLASH_PECR_PRGLOCK))
8004368: 4b11 ldr r3, [pc, #68] ; (80043b0 <HAL_FLASH_Unlock+0x8c>)
800436a: 685b ldr r3, [r3, #4]
800436c: 2202 movs r2, #2
800436e: 4013 ands r3, r2
8004370: 2b02 cmp r3, #2
8004372: d118 bne.n 80043a6 <HAL_FLASH_Unlock+0x82>
__ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory");
8004374: f3ef 8310 mrs r3, PRIMASK
8004378: 607b str r3, [r7, #4]
return(result);
800437a: 687b ldr r3, [r7, #4]
{
/* Disable interrupts to avoid any interruption during unlock sequence */
primask_bit = __get_PRIMASK();
800437c: 617b str r3, [r7, #20]
__ASM volatile ("cpsid i" : : : "memory");
800437e: b672 cpsid i
__disable_irq();
/* Unlocking the program memory access */
WRITE_REG(FLASH->PRGKEYR, FLASH_PRGKEY1);
8004380: 4b0b ldr r3, [pc, #44] ; (80043b0 <HAL_FLASH_Unlock+0x8c>)
8004382: 4a0e ldr r2, [pc, #56] ; (80043bc <HAL_FLASH_Unlock+0x98>)
8004384: 611a str r2, [r3, #16]
WRITE_REG(FLASH->PRGKEYR, FLASH_PRGKEY2);
8004386: 4b0a ldr r3, [pc, #40] ; (80043b0 <HAL_FLASH_Unlock+0x8c>)
8004388: 4a0d ldr r2, [pc, #52] ; (80043c0 <HAL_FLASH_Unlock+0x9c>)
800438a: 611a str r2, [r3, #16]
800438c: 697b ldr r3, [r7, #20]
800438e: 60bb str r3, [r7, #8]
__ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
8004390: 68bb ldr r3, [r7, #8]
8004392: f383 8810 msr PRIMASK, r3
/* Re-enable the interrupts: restore previous priority mask */
__set_PRIMASK(primask_bit);
if (HAL_IS_BIT_SET(FLASH->PECR, FLASH_PECR_PRGLOCK))
8004396: 4b06 ldr r3, [pc, #24] ; (80043b0 <HAL_FLASH_Unlock+0x8c>)
8004398: 685b ldr r3, [r3, #4]
800439a: 2202 movs r2, #2
800439c: 4013 ands r3, r2
800439e: 2b02 cmp r3, #2
80043a0: d101 bne.n 80043a6 <HAL_FLASH_Unlock+0x82>
{
return HAL_ERROR;
80043a2: 2301 movs r3, #1
80043a4: e000 b.n 80043a8 <HAL_FLASH_Unlock+0x84>
}
}
return HAL_OK;
80043a6: 2300 movs r3, #0
}
80043a8: 0018 movs r0, r3
80043aa: 46bd mov sp, r7
80043ac: b006 add sp, #24
80043ae: bd80 pop {r7, pc}
80043b0: 40022000 .word 0x40022000
80043b4: 89abcdef .word 0x89abcdef
80043b8: 02030405 .word 0x02030405
80043bc: 8c9daebf .word 0x8c9daebf
80043c0: 13141516 .word 0x13141516
080043c4 <HAL_FLASH_Lock>:
/**
* @brief Locks the FLASH control register access
* @retval HAL Status
*/
HAL_StatusTypeDef HAL_FLASH_Lock(void)
{
80043c4: b580 push {r7, lr}
80043c6: af00 add r7, sp, #0
/* Set the PRGLOCK Bit to lock the FLASH Registers access */
SET_BIT(FLASH->PECR, FLASH_PECR_PRGLOCK);
80043c8: 4b07 ldr r3, [pc, #28] ; (80043e8 <HAL_FLASH_Lock+0x24>)
80043ca: 4a07 ldr r2, [pc, #28] ; (80043e8 <HAL_FLASH_Lock+0x24>)
80043cc: 6852 ldr r2, [r2, #4]
80043ce: 2102 movs r1, #2
80043d0: 430a orrs r2, r1
80043d2: 605a str r2, [r3, #4]
/* Set the PELOCK Bit to lock the PECR Register access */
SET_BIT(FLASH->PECR, FLASH_PECR_PELOCK);
80043d4: 4b04 ldr r3, [pc, #16] ; (80043e8 <HAL_FLASH_Lock+0x24>)
80043d6: 4a04 ldr r2, [pc, #16] ; (80043e8 <HAL_FLASH_Lock+0x24>)
80043d8: 6852 ldr r2, [r2, #4]
80043da: 2101 movs r1, #1
80043dc: 430a orrs r2, r1
80043de: 605a str r2, [r3, #4]
return HAL_OK;
80043e0: 2300 movs r3, #0
}
80043e2: 0018 movs r0, r3
80043e4: 46bd mov sp, r7
80043e6: bd80 pop {r7, pc}
80043e8: 40022000 .word 0x40022000
080043ec <FLASH_WaitForLastOperation>:
* @brief Wait for a FLASH operation to complete.
* @param Timeout maximum flash operation timeout
* @retval HAL Status
*/
HAL_StatusTypeDef FLASH_WaitForLastOperation(uint32_t Timeout)
{
80043ec: b580 push {r7, lr}
80043ee: b084 sub sp, #16
80043f0: af00 add r7, sp, #0
80043f2: 6078 str r0, [r7, #4]
/* Wait for the FLASH operation to complete by polling on BUSY flag to be reset.
Even if the FLASH operation fails, the BUSY flag will be reset and an error
flag will be set */
uint32_t tickstart = HAL_GetTick();
80043f4: f7ff fdb8 bl 8003f68 <HAL_GetTick>
80043f8: 0003 movs r3, r0
80043fa: 60fb str r3, [r7, #12]
while(__HAL_FLASH_GET_FLAG(FLASH_FLAG_BSY))
80043fc: e00f b.n 800441e <FLASH_WaitForLastOperation+0x32>
{
if (Timeout != HAL_MAX_DELAY)
80043fe: 687b ldr r3, [r7, #4]
8004400: 3301 adds r3, #1
8004402: d00c beq.n 800441e <FLASH_WaitForLastOperation+0x32>
{
if((Timeout == 0U) || ((HAL_GetTick()-tickstart) > Timeout))
8004404: 687b ldr r3, [r7, #4]
8004406: 2b00 cmp r3, #0
8004408: d007 beq.n 800441a <FLASH_WaitForLastOperation+0x2e>
800440a: f7ff fdad bl 8003f68 <HAL_GetTick>
800440e: 0002 movs r2, r0
8004410: 68fb ldr r3, [r7, #12]
8004412: 1ad2 subs r2, r2, r3
8004414: 687b ldr r3, [r7, #4]
8004416: 429a cmp r2, r3
8004418: d901 bls.n 800441e <FLASH_WaitForLastOperation+0x32>
{
return HAL_TIMEOUT;
800441a: 2303 movs r3, #3
800441c: e052 b.n 80044c4 <FLASH_WaitForLastOperation+0xd8>
while(__HAL_FLASH_GET_FLAG(FLASH_FLAG_BSY))
800441e: 4b2b ldr r3, [pc, #172] ; (80044cc <FLASH_WaitForLastOperation+0xe0>)
8004420: 699b ldr r3, [r3, #24]
8004422: 2201 movs r2, #1
8004424: 4013 ands r3, r2
8004426: 2b01 cmp r3, #1
8004428: d0e9 beq.n 80043fe <FLASH_WaitForLastOperation+0x12>
}
}
}
/* Check FLASH End of Operation flag */
if (__HAL_FLASH_GET_FLAG(FLASH_FLAG_EOP))
800442a: 4b28 ldr r3, [pc, #160] ; (80044cc <FLASH_WaitForLastOperation+0xe0>)
800442c: 699b ldr r3, [r3, #24]
800442e: 2202 movs r2, #2
8004430: 4013 ands r3, r2
8004432: 2b02 cmp r3, #2
8004434: d102 bne.n 800443c <FLASH_WaitForLastOperation+0x50>
{
/* Clear FLASH End of Operation pending bit */
__HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP);
8004436: 4b25 ldr r3, [pc, #148] ; (80044cc <FLASH_WaitForLastOperation+0xe0>)
8004438: 2202 movs r2, #2
800443a: 619a str r2, [r3, #24]
}
if( __HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) ||
800443c: 4b23 ldr r3, [pc, #140] ; (80044cc <FLASH_WaitForLastOperation+0xe0>)
800443e: 699a ldr r2, [r3, #24]
8004440: 2380 movs r3, #128 ; 0x80
8004442: 005b lsls r3, r3, #1
8004444: 401a ands r2, r3
8004446: 2380 movs r3, #128 ; 0x80
8004448: 005b lsls r3, r3, #1
800444a: 429a cmp r2, r3
800444c: d035 beq.n 80044ba <FLASH_WaitForLastOperation+0xce>
__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGAERR) ||
800444e: 4b1f ldr r3, [pc, #124] ; (80044cc <FLASH_WaitForLastOperation+0xe0>)
8004450: 699a ldr r2, [r3, #24]
8004452: 2380 movs r3, #128 ; 0x80
8004454: 009b lsls r3, r3, #2
8004456: 401a ands r2, r3
if( __HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) ||
8004458: 2380 movs r3, #128 ; 0x80
800445a: 009b lsls r3, r3, #2
800445c: 429a cmp r2, r3
800445e: d02c beq.n 80044ba <FLASH_WaitForLastOperation+0xce>
__HAL_FLASH_GET_FLAG(FLASH_FLAG_SIZERR) ||
8004460: 4b1a ldr r3, [pc, #104] ; (80044cc <FLASH_WaitForLastOperation+0xe0>)
8004462: 699a ldr r2, [r3, #24]
8004464: 2380 movs r3, #128 ; 0x80
8004466: 00db lsls r3, r3, #3
8004468: 401a ands r2, r3
__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGAERR) ||
800446a: 2380 movs r3, #128 ; 0x80
800446c: 00db lsls r3, r3, #3
800446e: 429a cmp r2, r3
8004470: d023 beq.n 80044ba <FLASH_WaitForLastOperation+0xce>
__HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR) ||
8004472: 4b16 ldr r3, [pc, #88] ; (80044cc <FLASH_WaitForLastOperation+0xe0>)
8004474: 699a ldr r2, [r3, #24]
8004476: 2380 movs r3, #128 ; 0x80
8004478: 011b lsls r3, r3, #4
800447a: 401a ands r2, r3
__HAL_FLASH_GET_FLAG(FLASH_FLAG_SIZERR) ||
800447c: 2380 movs r3, #128 ; 0x80
800447e: 011b lsls r3, r3, #4
8004480: 429a cmp r2, r3
8004482: d01a beq.n 80044ba <FLASH_WaitForLastOperation+0xce>
__HAL_FLASH_GET_FLAG(FLASH_FLAG_RDERR) ||
8004484: 4b11 ldr r3, [pc, #68] ; (80044cc <FLASH_WaitForLastOperation+0xe0>)
8004486: 699a ldr r2, [r3, #24]
8004488: 2380 movs r3, #128 ; 0x80
800448a: 019b lsls r3, r3, #6
800448c: 401a ands r2, r3
__HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR) ||
800448e: 2380 movs r3, #128 ; 0x80
8004490: 019b lsls r3, r3, #6
8004492: 429a cmp r2, r3
8004494: d011 beq.n 80044ba <FLASH_WaitForLastOperation+0xce>
__HAL_FLASH_GET_FLAG(FLASH_FLAG_FWWERR) ||
8004496: 4b0d ldr r3, [pc, #52] ; (80044cc <FLASH_WaitForLastOperation+0xe0>)
8004498: 699a ldr r2, [r3, #24]
800449a: 2380 movs r3, #128 ; 0x80
800449c: 029b lsls r3, r3, #10
800449e: 401a ands r2, r3
__HAL_FLASH_GET_FLAG(FLASH_FLAG_RDERR) ||
80044a0: 2380 movs r3, #128 ; 0x80
80044a2: 029b lsls r3, r3, #10
80044a4: 429a cmp r2, r3
80044a6: d008 beq.n 80044ba <FLASH_WaitForLastOperation+0xce>
__HAL_FLASH_GET_FLAG(FLASH_FLAG_NOTZEROERR) )
80044a8: 4b08 ldr r3, [pc, #32] ; (80044cc <FLASH_WaitForLastOperation+0xe0>)
80044aa: 699a ldr r2, [r3, #24]
80044ac: 2380 movs r3, #128 ; 0x80
80044ae: 025b lsls r3, r3, #9
80044b0: 401a ands r2, r3
__HAL_FLASH_GET_FLAG(FLASH_FLAG_FWWERR) ||
80044b2: 2380 movs r3, #128 ; 0x80
80044b4: 025b lsls r3, r3, #9
80044b6: 429a cmp r2, r3
80044b8: d103 bne.n 80044c2 <FLASH_WaitForLastOperation+0xd6>
* cut of the STM32L031xx device or the first cut of the STM32L041xx
* device, this error should be ignored. The revId of the device
* can be retrieved via the HAL_GetREVID() function.
*
*/
FLASH_SetErrorCode();
80044ba: f000 f809 bl 80044d0 <FLASH_SetErrorCode>
return HAL_ERROR;
80044be: 2301 movs r3, #1
80044c0: e000 b.n 80044c4 <FLASH_WaitForLastOperation+0xd8>
}
/* There is no error flag set */
return HAL_OK;
80044c2: 2300 movs r3, #0
}
80044c4: 0018 movs r0, r3
80044c6: 46bd mov sp, r7
80044c8: b004 add sp, #16
80044ca: bd80 pop {r7, pc}
80044cc: 40022000 .word 0x40022000
080044d0 <FLASH_SetErrorCode>:
/**
* @brief Set the specific FLASH error flag.
* @retval None
*/
static void FLASH_SetErrorCode(void)
{
80044d0: b580 push {r7, lr}
80044d2: b082 sub sp, #8
80044d4: af00 add r7, sp, #0
uint32_t flags = 0;
80044d6: 2300 movs r3, #0
80044d8: 607b str r3, [r7, #4]
if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR))
80044da: 4b49 ldr r3, [pc, #292] ; (8004600 <FLASH_SetErrorCode+0x130>)
80044dc: 699a ldr r2, [r3, #24]
80044de: 2380 movs r3, #128 ; 0x80
80044e0: 005b lsls r3, r3, #1
80044e2: 401a ands r2, r3
80044e4: 2380 movs r3, #128 ; 0x80
80044e6: 005b lsls r3, r3, #1
80044e8: 429a cmp r2, r3
80044ea: d10a bne.n 8004502 <FLASH_SetErrorCode+0x32>
{
pFlash.ErrorCode |= HAL_FLASH_ERROR_WRP;
80044ec: 4b45 ldr r3, [pc, #276] ; (8004604 <FLASH_SetErrorCode+0x134>)
80044ee: 695b ldr r3, [r3, #20]
80044f0: 2202 movs r2, #2
80044f2: 431a orrs r2, r3
80044f4: 4b43 ldr r3, [pc, #268] ; (8004604 <FLASH_SetErrorCode+0x134>)
80044f6: 615a str r2, [r3, #20]
flags |= FLASH_FLAG_WRPERR;
80044f8: 687b ldr r3, [r7, #4]
80044fa: 2280 movs r2, #128 ; 0x80
80044fc: 0052 lsls r2, r2, #1
80044fe: 4313 orrs r3, r2
8004500: 607b str r3, [r7, #4]
}
if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGAERR))
8004502: 4b3f ldr r3, [pc, #252] ; (8004600 <FLASH_SetErrorCode+0x130>)
8004504: 699a ldr r2, [r3, #24]
8004506: 2380 movs r3, #128 ; 0x80
8004508: 009b lsls r3, r3, #2
800450a: 401a ands r2, r3
800450c: 2380 movs r3, #128 ; 0x80
800450e: 009b lsls r3, r3, #2
8004510: 429a cmp r2, r3
8004512: d10a bne.n 800452a <FLASH_SetErrorCode+0x5a>
{
pFlash.ErrorCode |= HAL_FLASH_ERROR_PGA;
8004514: 4b3b ldr r3, [pc, #236] ; (8004604 <FLASH_SetErrorCode+0x134>)
8004516: 695b ldr r3, [r3, #20]
8004518: 2201 movs r2, #1
800451a: 431a orrs r2, r3
800451c: 4b39 ldr r3, [pc, #228] ; (8004604 <FLASH_SetErrorCode+0x134>)
800451e: 615a str r2, [r3, #20]
flags |= FLASH_FLAG_PGAERR;
8004520: 687b ldr r3, [r7, #4]
8004522: 2280 movs r2, #128 ; 0x80
8004524: 0092 lsls r2, r2, #2
8004526: 4313 orrs r3, r2
8004528: 607b str r3, [r7, #4]
}
if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_SIZERR))
800452a: 4b35 ldr r3, [pc, #212] ; (8004600 <FLASH_SetErrorCode+0x130>)
800452c: 699a ldr r2, [r3, #24]
800452e: 2380 movs r3, #128 ; 0x80
8004530: 00db lsls r3, r3, #3
8004532: 401a ands r2, r3
8004534: 2380 movs r3, #128 ; 0x80
8004536: 00db lsls r3, r3, #3
8004538: 429a cmp r2, r3
800453a: d10a bne.n 8004552 <FLASH_SetErrorCode+0x82>
{
pFlash.ErrorCode |= HAL_FLASH_ERROR_SIZE;
800453c: 4b31 ldr r3, [pc, #196] ; (8004604 <FLASH_SetErrorCode+0x134>)
800453e: 695b ldr r3, [r3, #20]
8004540: 2208 movs r2, #8
8004542: 431a orrs r2, r3
8004544: 4b2f ldr r3, [pc, #188] ; (8004604 <FLASH_SetErrorCode+0x134>)
8004546: 615a str r2, [r3, #20]
flags |= FLASH_FLAG_SIZERR;
8004548: 687b ldr r3, [r7, #4]
800454a: 2280 movs r2, #128 ; 0x80
800454c: 00d2 lsls r2, r2, #3
800454e: 4313 orrs r3, r2
8004550: 607b str r3, [r7, #4]
}
if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR))
8004552: 4b2b ldr r3, [pc, #172] ; (8004600 <FLASH_SetErrorCode+0x130>)
8004554: 699a ldr r2, [r3, #24]
8004556: 2380 movs r3, #128 ; 0x80
8004558: 011b lsls r3, r3, #4
800455a: 401a ands r2, r3
800455c: 2380 movs r3, #128 ; 0x80
800455e: 011b lsls r3, r3, #4
8004560: 429a cmp r2, r3
8004562: d10a bne.n 800457a <FLASH_SetErrorCode+0xaa>
* cut of the STM32L031xx device or the first cut of the STM32L041xx
* device, this error should be ignored. The revId of the device
* can be retrieved via the HAL_GetREVID() function.
*
*/
pFlash.ErrorCode |= HAL_FLASH_ERROR_OPTV;
8004564: 4b27 ldr r3, [pc, #156] ; (8004604 <FLASH_SetErrorCode+0x134>)
8004566: 695b ldr r3, [r3, #20]
8004568: 2204 movs r2, #4
800456a: 431a orrs r2, r3
800456c: 4b25 ldr r3, [pc, #148] ; (8004604 <FLASH_SetErrorCode+0x134>)
800456e: 615a str r2, [r3, #20]
flags |= FLASH_FLAG_OPTVERR;
8004570: 687b ldr r3, [r7, #4]
8004572: 2280 movs r2, #128 ; 0x80
8004574: 0112 lsls r2, r2, #4
8004576: 4313 orrs r3, r2
8004578: 607b str r3, [r7, #4]
}
if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_RDERR))
800457a: 4b21 ldr r3, [pc, #132] ; (8004600 <FLASH_SetErrorCode+0x130>)
800457c: 699a ldr r2, [r3, #24]
800457e: 2380 movs r3, #128 ; 0x80
8004580: 019b lsls r3, r3, #6
8004582: 401a ands r2, r3
8004584: 2380 movs r3, #128 ; 0x80
8004586: 019b lsls r3, r3, #6
8004588: 429a cmp r2, r3
800458a: d10a bne.n 80045a2 <FLASH_SetErrorCode+0xd2>
{
pFlash.ErrorCode |= HAL_FLASH_ERROR_RD;
800458c: 4b1d ldr r3, [pc, #116] ; (8004604 <FLASH_SetErrorCode+0x134>)
800458e: 695b ldr r3, [r3, #20]
8004590: 2210 movs r2, #16
8004592: 431a orrs r2, r3
8004594: 4b1b ldr r3, [pc, #108] ; (8004604 <FLASH_SetErrorCode+0x134>)
8004596: 615a str r2, [r3, #20]
flags |= FLASH_FLAG_RDERR;
8004598: 687b ldr r3, [r7, #4]
800459a: 2280 movs r2, #128 ; 0x80
800459c: 0192 lsls r2, r2, #6
800459e: 4313 orrs r3, r2
80045a0: 607b str r3, [r7, #4]
}
if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_FWWERR))
80045a2: 4b17 ldr r3, [pc, #92] ; (8004600 <FLASH_SetErrorCode+0x130>)
80045a4: 699a ldr r2, [r3, #24]
80045a6: 2380 movs r3, #128 ; 0x80
80045a8: 029b lsls r3, r3, #10
80045aa: 401a ands r2, r3
80045ac: 2380 movs r3, #128 ; 0x80
80045ae: 029b lsls r3, r3, #10
80045b0: 429a cmp r2, r3
80045b2: d109 bne.n 80045c8 <FLASH_SetErrorCode+0xf8>
{
pFlash.ErrorCode |= HAL_FLASH_ERROR_FWWERR;
80045b4: 4b13 ldr r3, [pc, #76] ; (8004604 <FLASH_SetErrorCode+0x134>)
80045b6: 695b ldr r3, [r3, #20]
80045b8: 2220 movs r2, #32
80045ba: 431a orrs r2, r3
80045bc: 4b11 ldr r3, [pc, #68] ; (8004604 <FLASH_SetErrorCode+0x134>)
80045be: 615a str r2, [r3, #20]
flags |= HAL_FLASH_ERROR_FWWERR;
80045c0: 687b ldr r3, [r7, #4]
80045c2: 2220 movs r2, #32
80045c4: 4313 orrs r3, r2
80045c6: 607b str r3, [r7, #4]
}
if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_NOTZEROERR))
80045c8: 4b0d ldr r3, [pc, #52] ; (8004600 <FLASH_SetErrorCode+0x130>)
80045ca: 699a ldr r2, [r3, #24]
80045cc: 2380 movs r3, #128 ; 0x80
80045ce: 025b lsls r3, r3, #9
80045d0: 401a ands r2, r3
80045d2: 2380 movs r3, #128 ; 0x80
80045d4: 025b lsls r3, r3, #9
80045d6: 429a cmp r2, r3
80045d8: d10a bne.n 80045f0 <FLASH_SetErrorCode+0x120>
{
pFlash.ErrorCode |= HAL_FLASH_ERROR_NOTZERO;
80045da: 4b0a ldr r3, [pc, #40] ; (8004604 <FLASH_SetErrorCode+0x134>)
80045dc: 695b ldr r3, [r3, #20]
80045de: 2240 movs r2, #64 ; 0x40
80045e0: 431a orrs r2, r3
80045e2: 4b08 ldr r3, [pc, #32] ; (8004604 <FLASH_SetErrorCode+0x134>)
80045e4: 615a str r2, [r3, #20]
flags |= FLASH_FLAG_NOTZEROERR;
80045e6: 687b ldr r3, [r7, #4]
80045e8: 2280 movs r2, #128 ; 0x80
80045ea: 0252 lsls r2, r2, #9
80045ec: 4313 orrs r3, r2
80045ee: 607b str r3, [r7, #4]
}
/* Clear FLASH error pending bits */
__HAL_FLASH_CLEAR_FLAG(flags);
80045f0: 4b03 ldr r3, [pc, #12] ; (8004600 <FLASH_SetErrorCode+0x130>)
80045f2: 687a ldr r2, [r7, #4]
80045f4: 619a str r2, [r3, #24]
}
80045f6: 46c0 nop ; (mov r8, r8)
80045f8: 46bd mov sp, r7
80045fa: b002 add sp, #8
80045fc: bd80 pop {r7, pc}
80045fe: 46c0 nop ; (mov r8, r8)
8004600: 40022000 .word 0x40022000
8004604: 20000398 .word 0x20000398
08004608 <FLASH_PageErase>:
* @note A Page is erased in the Program memory only if the address to load
* is the start address of a page (multiple of @ref FLASH_PAGE_SIZE bytes).
* @retval None
*/
void FLASH_PageErase(uint32_t PageAddress)
{
8004608: b580 push {r7, lr}
800460a: b082 sub sp, #8
800460c: af00 add r7, sp, #0
800460e: 6078 str r0, [r7, #4]
/* Clean the error context */
pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
8004610: 4b0c ldr r3, [pc, #48] ; (8004644 <FLASH_PageErase+0x3c>)
8004612: 2200 movs r2, #0
8004614: 615a str r2, [r3, #20]
/* Set the ERASE bit */
SET_BIT(FLASH->PECR, FLASH_PECR_ERASE);
8004616: 4b0c ldr r3, [pc, #48] ; (8004648 <FLASH_PageErase+0x40>)
8004618: 4a0b ldr r2, [pc, #44] ; (8004648 <FLASH_PageErase+0x40>)
800461a: 6852 ldr r2, [r2, #4]
800461c: 2180 movs r1, #128 ; 0x80
800461e: 0089 lsls r1, r1, #2
8004620: 430a orrs r2, r1
8004622: 605a str r2, [r3, #4]
/* Set PROG bit */
SET_BIT(FLASH->PECR, FLASH_PECR_PROG);
8004624: 4b08 ldr r3, [pc, #32] ; (8004648 <FLASH_PageErase+0x40>)
8004626: 4a08 ldr r2, [pc, #32] ; (8004648 <FLASH_PageErase+0x40>)
8004628: 6852 ldr r2, [r2, #4]
800462a: 2108 movs r1, #8
800462c: 430a orrs r2, r1
800462e: 605a str r2, [r3, #4]
/* Write 00000000h to the first word of the program page to erase */
*(__IO uint32_t *)(uint32_t)(PageAddress & ~(FLASH_PAGE_SIZE - 1)) = 0x00000000;
8004630: 687b ldr r3, [r7, #4]
8004632: 227f movs r2, #127 ; 0x7f
8004634: 4393 bics r3, r2
8004636: 2200 movs r2, #0
8004638: 601a str r2, [r3, #0]
}
800463a: 46c0 nop ; (mov r8, r8)
800463c: 46bd mov sp, r7
800463e: b002 add sp, #8
8004640: bd80 pop {r7, pc}
8004642: 46c0 nop ; (mov r8, r8)
8004644: 20000398 .word 0x20000398
8004648: 40022000 .word 0x40022000
0800464c <HAL_GPIO_Init>:
* @param GPIO_Init pointer to a GPIO_InitTypeDef structure that contains
* the configuration information for the specified GPIO peripheral.
* @retval None
*/
void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init)
{
800464c: b580 push {r7, lr}
800464e: b086 sub sp, #24
8004650: af00 add r7, sp, #0
8004652: 6078 str r0, [r7, #4]
8004654: 6039 str r1, [r7, #0]
uint32_t position = 0x00U;
8004656: 2300 movs r3, #0
8004658: 617b str r3, [r7, #20]
uint32_t iocurrent = 0x00U;
800465a: 2300 movs r3, #0
800465c: 60fb str r3, [r7, #12]
uint32_t temp = 0x00U;
800465e: 2300 movs r3, #0
8004660: 613b str r3, [r7, #16]
assert_param(IS_GPIO_MODE(GPIO_Init->Mode));
assert_param(IS_GPIO_PULL(GPIO_Init->Pull));
assert_param(IS_GPIO_PIN_AVAILABLE(GPIOx, (GPIO_Init->Pin)));
/* Configure the port pins */
while (((GPIO_Init->Pin) >> position) != 0)
8004662: e155 b.n 8004910 <HAL_GPIO_Init+0x2c4>
{
/* Get the IO position */
iocurrent = (GPIO_Init->Pin) & (1U << position);
8004664: 683b ldr r3, [r7, #0]
8004666: 681b ldr r3, [r3, #0]
8004668: 2101 movs r1, #1
800466a: 697a ldr r2, [r7, #20]
800466c: 4091 lsls r1, r2
800466e: 000a movs r2, r1
8004670: 4013 ands r3, r2
8004672: 60fb str r3, [r7, #12]
if (iocurrent)
8004674: 68fb ldr r3, [r7, #12]
8004676: 2b00 cmp r3, #0
8004678: d100 bne.n 800467c <HAL_GPIO_Init+0x30>
800467a: e146 b.n 800490a <HAL_GPIO_Init+0x2be>
{
/*--------------------- GPIO Mode Configuration ------------------------*/
/* In case of Output or Alternate function mode selection */
if ((GPIO_Init->Mode == GPIO_MODE_OUTPUT_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_PP) ||
800467c: 683b ldr r3, [r7, #0]
800467e: 685b ldr r3, [r3, #4]
8004680: 2b01 cmp r3, #1
8004682: d00b beq.n 800469c <HAL_GPIO_Init+0x50>
8004684: 683b ldr r3, [r7, #0]
8004686: 685b ldr r3, [r3, #4]
8004688: 2b02 cmp r3, #2
800468a: d007 beq.n 800469c <HAL_GPIO_Init+0x50>
(GPIO_Init->Mode == GPIO_MODE_OUTPUT_OD) || (GPIO_Init->Mode == GPIO_MODE_AF_OD))
800468c: 683b ldr r3, [r7, #0]
800468e: 685b ldr r3, [r3, #4]
if ((GPIO_Init->Mode == GPIO_MODE_OUTPUT_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_PP) ||
8004690: 2b11 cmp r3, #17
8004692: d003 beq.n 800469c <HAL_GPIO_Init+0x50>
(GPIO_Init->Mode == GPIO_MODE_OUTPUT_OD) || (GPIO_Init->Mode == GPIO_MODE_AF_OD))
8004694: 683b ldr r3, [r7, #0]
8004696: 685b ldr r3, [r3, #4]
8004698: 2b12 cmp r3, #18
800469a: d130 bne.n 80046fe <HAL_GPIO_Init+0xb2>
{
/* Check the Speed parameter */
assert_param(IS_GPIO_SPEED(GPIO_Init->Speed));
/* Configure the IO Speed */
temp = GPIOx->OSPEEDR;
800469c: 687b ldr r3, [r7, #4]
800469e: 689b ldr r3, [r3, #8]
80046a0: 613b str r3, [r7, #16]
temp &= ~(GPIO_OSPEEDER_OSPEED0 << (position * 2U));
80046a2: 697b ldr r3, [r7, #20]
80046a4: 005b lsls r3, r3, #1
80046a6: 2203 movs r2, #3
80046a8: 409a lsls r2, r3
80046aa: 0013 movs r3, r2
80046ac: 43da mvns r2, r3
80046ae: 693b ldr r3, [r7, #16]
80046b0: 4013 ands r3, r2
80046b2: 613b str r3, [r7, #16]
temp |= (GPIO_Init->Speed << (position * 2U));
80046b4: 683b ldr r3, [r7, #0]
80046b6: 68da ldr r2, [r3, #12]
80046b8: 697b ldr r3, [r7, #20]
80046ba: 005b lsls r3, r3, #1
80046bc: 409a lsls r2, r3
80046be: 0013 movs r3, r2
80046c0: 693a ldr r2, [r7, #16]
80046c2: 4313 orrs r3, r2
80046c4: 613b str r3, [r7, #16]
GPIOx->OSPEEDR = temp;
80046c6: 687b ldr r3, [r7, #4]
80046c8: 693a ldr r2, [r7, #16]
80046ca: 609a str r2, [r3, #8]
/* Configure the IO Output Type */
temp = GPIOx->OTYPER;
80046cc: 687b ldr r3, [r7, #4]
80046ce: 685b ldr r3, [r3, #4]
80046d0: 613b str r3, [r7, #16]
temp &= ~(GPIO_OTYPER_OT_0 << position) ;
80046d2: 2201 movs r2, #1
80046d4: 697b ldr r3, [r7, #20]
80046d6: 409a lsls r2, r3
80046d8: 0013 movs r3, r2
80046da: 43da mvns r2, r3
80046dc: 693b ldr r3, [r7, #16]
80046de: 4013 ands r3, r2
80046e0: 613b str r3, [r7, #16]
temp |= (((GPIO_Init->Mode & GPIO_OUTPUT_TYPE) >> 4U) << position);
80046e2: 683b ldr r3, [r7, #0]
80046e4: 685b ldr r3, [r3, #4]
80046e6: 091b lsrs r3, r3, #4
80046e8: 2201 movs r2, #1
80046ea: 401a ands r2, r3
80046ec: 697b ldr r3, [r7, #20]
80046ee: 409a lsls r2, r3
80046f0: 0013 movs r3, r2
80046f2: 693a ldr r2, [r7, #16]
80046f4: 4313 orrs r3, r2
80046f6: 613b str r3, [r7, #16]
GPIOx->OTYPER = temp;
80046f8: 687b ldr r3, [r7, #4]
80046fa: 693a ldr r2, [r7, #16]
80046fc: 605a str r2, [r3, #4]
}
/* Activate the Pull-up or Pull down resistor for the current IO */
temp = GPIOx->PUPDR;
80046fe: 687b ldr r3, [r7, #4]
8004700: 68db ldr r3, [r3, #12]
8004702: 613b str r3, [r7, #16]
temp &= ~(GPIO_PUPDR_PUPD0 << (position * 2U));
8004704: 697b ldr r3, [r7, #20]
8004706: 005b lsls r3, r3, #1
8004708: 2203 movs r2, #3
800470a: 409a lsls r2, r3
800470c: 0013 movs r3, r2
800470e: 43da mvns r2, r3
8004710: 693b ldr r3, [r7, #16]
8004712: 4013 ands r3, r2
8004714: 613b str r3, [r7, #16]
temp |= ((GPIO_Init->Pull) << (position * 2U));
8004716: 683b ldr r3, [r7, #0]
8004718: 689a ldr r2, [r3, #8]
800471a: 697b ldr r3, [r7, #20]
800471c: 005b lsls r3, r3, #1
800471e: 409a lsls r2, r3
8004720: 0013 movs r3, r2
8004722: 693a ldr r2, [r7, #16]
8004724: 4313 orrs r3, r2
8004726: 613b str r3, [r7, #16]
GPIOx->PUPDR = temp;
8004728: 687b ldr r3, [r7, #4]
800472a: 693a ldr r2, [r7, #16]
800472c: 60da str r2, [r3, #12]
/* In case of Alternate function mode selection */
if ((GPIO_Init->Mode == GPIO_MODE_AF_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_OD))
800472e: 683b ldr r3, [r7, #0]
8004730: 685b ldr r3, [r3, #4]
8004732: 2b02 cmp r3, #2
8004734: d003 beq.n 800473e <HAL_GPIO_Init+0xf2>
8004736: 683b ldr r3, [r7, #0]
8004738: 685b ldr r3, [r3, #4]
800473a: 2b12 cmp r3, #18
800473c: d123 bne.n 8004786 <HAL_GPIO_Init+0x13a>
/* Check the Alternate function parameters */
assert_param(IS_GPIO_AF_INSTANCE(GPIOx));
assert_param(IS_GPIO_AF(GPIO_Init->Alternate));
/* Configure Alternate function mapped with the current IO */
temp = GPIOx->AFR[position >> 3U];
800473e: 697b ldr r3, [r7, #20]
8004740: 08da lsrs r2, r3, #3
8004742: 687b ldr r3, [r7, #4]
8004744: 3208 adds r2, #8
8004746: 0092 lsls r2, r2, #2
8004748: 58d3 ldr r3, [r2, r3]
800474a: 613b str r3, [r7, #16]
temp &= ~(0xFUL << ((uint32_t)(position & 0x07UL) * 4U));
800474c: 697b ldr r3, [r7, #20]
800474e: 2207 movs r2, #7
8004750: 4013 ands r3, r2
8004752: 009b lsls r3, r3, #2
8004754: 220f movs r2, #15
8004756: 409a lsls r2, r3
8004758: 0013 movs r3, r2
800475a: 43da mvns r2, r3
800475c: 693b ldr r3, [r7, #16]
800475e: 4013 ands r3, r2
8004760: 613b str r3, [r7, #16]
temp |= ((uint32_t)(GPIO_Init->Alternate) << (((uint32_t)position & (uint32_t)0x07U) * 4U));
8004762: 683b ldr r3, [r7, #0]
8004764: 691a ldr r2, [r3, #16]
8004766: 697b ldr r3, [r7, #20]
8004768: 2107 movs r1, #7
800476a: 400b ands r3, r1
800476c: 009b lsls r3, r3, #2
800476e: 409a lsls r2, r3
8004770: 0013 movs r3, r2
8004772: 693a ldr r2, [r7, #16]
8004774: 4313 orrs r3, r2
8004776: 613b str r3, [r7, #16]
GPIOx->AFR[position >> 3U] = temp;
8004778: 697b ldr r3, [r7, #20]
800477a: 08da lsrs r2, r3, #3
800477c: 687b ldr r3, [r7, #4]
800477e: 3208 adds r2, #8
8004780: 0092 lsls r2, r2, #2
8004782: 6939 ldr r1, [r7, #16]
8004784: 50d1 str r1, [r2, r3]
}
/* Configure IO Direction mode (Input, Output, Alternate or Analog) */
temp = GPIOx->MODER;
8004786: 687b ldr r3, [r7, #4]
8004788: 681b ldr r3, [r3, #0]
800478a: 613b str r3, [r7, #16]
temp &= ~(GPIO_MODER_MODE0 << (position * 2U));
800478c: 697b ldr r3, [r7, #20]
800478e: 005b lsls r3, r3, #1
8004790: 2203 movs r2, #3
8004792: 409a lsls r2, r3
8004794: 0013 movs r3, r2
8004796: 43da mvns r2, r3
8004798: 693b ldr r3, [r7, #16]
800479a: 4013 ands r3, r2
800479c: 613b str r3, [r7, #16]
temp |= ((GPIO_Init->Mode & GPIO_MODE) << (position * 2U));
800479e: 683b ldr r3, [r7, #0]
80047a0: 685b ldr r3, [r3, #4]
80047a2: 2203 movs r2, #3
80047a4: 401a ands r2, r3
80047a6: 697b ldr r3, [r7, #20]
80047a8: 005b lsls r3, r3, #1
80047aa: 409a lsls r2, r3
80047ac: 0013 movs r3, r2
80047ae: 693a ldr r2, [r7, #16]
80047b0: 4313 orrs r3, r2
80047b2: 613b str r3, [r7, #16]
GPIOx->MODER = temp;
80047b4: 687b ldr r3, [r7, #4]
80047b6: 693a ldr r2, [r7, #16]
80047b8: 601a str r2, [r3, #0]
/*--------------------- EXTI Mode Configuration ------------------------*/
/* Configure the External Interrupt or event for the current IO */
if ((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE)
80047ba: 683b ldr r3, [r7, #0]
80047bc: 685a ldr r2, [r3, #4]
80047be: 2380 movs r3, #128 ; 0x80
80047c0: 055b lsls r3, r3, #21
80047c2: 4013 ands r3, r2
80047c4: d100 bne.n 80047c8 <HAL_GPIO_Init+0x17c>
80047c6: e0a0 b.n 800490a <HAL_GPIO_Init+0x2be>
{
/* Enable SYSCFG Clock */
__HAL_RCC_SYSCFG_CLK_ENABLE();
80047c8: 4b57 ldr r3, [pc, #348] ; (8004928 <HAL_GPIO_Init+0x2dc>)
80047ca: 4a57 ldr r2, [pc, #348] ; (8004928 <HAL_GPIO_Init+0x2dc>)
80047cc: 6b52 ldr r2, [r2, #52] ; 0x34
80047ce: 2101 movs r1, #1
80047d0: 430a orrs r2, r1
80047d2: 635a str r2, [r3, #52] ; 0x34
temp = SYSCFG->EXTICR[position >> 2U];
80047d4: 4a55 ldr r2, [pc, #340] ; (800492c <HAL_GPIO_Init+0x2e0>)
80047d6: 697b ldr r3, [r7, #20]
80047d8: 089b lsrs r3, r3, #2
80047da: 3302 adds r3, #2
80047dc: 009b lsls r3, r3, #2
80047de: 589b ldr r3, [r3, r2]
80047e0: 613b str r3, [r7, #16]
CLEAR_BIT(temp, (0x0FUL) << (4U * (position & 0x03U)));
80047e2: 697b ldr r3, [r7, #20]
80047e4: 2203 movs r2, #3
80047e6: 4013 ands r3, r2
80047e8: 009b lsls r3, r3, #2
80047ea: 220f movs r2, #15
80047ec: 409a lsls r2, r3
80047ee: 0013 movs r3, r2
80047f0: 43da mvns r2, r3
80047f2: 693b ldr r3, [r7, #16]
80047f4: 4013 ands r3, r2
80047f6: 613b str r3, [r7, #16]
SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4 * (position & 0x03U)));
80047f8: 687a ldr r2, [r7, #4]
80047fa: 23a0 movs r3, #160 ; 0xa0
80047fc: 05db lsls r3, r3, #23
80047fe: 429a cmp r2, r3
8004800: d01f beq.n 8004842 <HAL_GPIO_Init+0x1f6>
8004802: 687b ldr r3, [r7, #4]
8004804: 4a4a ldr r2, [pc, #296] ; (8004930 <HAL_GPIO_Init+0x2e4>)
8004806: 4293 cmp r3, r2
8004808: d019 beq.n 800483e <HAL_GPIO_Init+0x1f2>
800480a: 687b ldr r3, [r7, #4]
800480c: 4a49 ldr r2, [pc, #292] ; (8004934 <HAL_GPIO_Init+0x2e8>)
800480e: 4293 cmp r3, r2
8004810: d013 beq.n 800483a <HAL_GPIO_Init+0x1ee>
8004812: 687b ldr r3, [r7, #4]
8004814: 4a48 ldr r2, [pc, #288] ; (8004938 <HAL_GPIO_Init+0x2ec>)
8004816: 4293 cmp r3, r2
8004818: d00d beq.n 8004836 <HAL_GPIO_Init+0x1ea>
800481a: 687b ldr r3, [r7, #4]
800481c: 4a47 ldr r2, [pc, #284] ; (800493c <HAL_GPIO_Init+0x2f0>)
800481e: 4293 cmp r3, r2
8004820: d007 beq.n 8004832 <HAL_GPIO_Init+0x1e6>
8004822: 687b ldr r3, [r7, #4]
8004824: 4a46 ldr r2, [pc, #280] ; (8004940 <HAL_GPIO_Init+0x2f4>)
8004826: 4293 cmp r3, r2
8004828: d101 bne.n 800482e <HAL_GPIO_Init+0x1e2>
800482a: 2305 movs r3, #5
800482c: e00a b.n 8004844 <HAL_GPIO_Init+0x1f8>
800482e: 2306 movs r3, #6
8004830: e008 b.n 8004844 <HAL_GPIO_Init+0x1f8>
8004832: 2304 movs r3, #4
8004834: e006 b.n 8004844 <HAL_GPIO_Init+0x1f8>
8004836: 2303 movs r3, #3
8004838: e004 b.n 8004844 <HAL_GPIO_Init+0x1f8>
800483a: 2302 movs r3, #2
800483c: e002 b.n 8004844 <HAL_GPIO_Init+0x1f8>
800483e: 2301 movs r3, #1
8004840: e000 b.n 8004844 <HAL_GPIO_Init+0x1f8>
8004842: 2300 movs r3, #0
8004844: 697a ldr r2, [r7, #20]
8004846: 2103 movs r1, #3
8004848: 400a ands r2, r1
800484a: 0092 lsls r2, r2, #2
800484c: 4093 lsls r3, r2
800484e: 693a ldr r2, [r7, #16]
8004850: 4313 orrs r3, r2
8004852: 613b str r3, [r7, #16]
SYSCFG->EXTICR[position >> 2U] = temp;
8004854: 4935 ldr r1, [pc, #212] ; (800492c <HAL_GPIO_Init+0x2e0>)
8004856: 697b ldr r3, [r7, #20]
8004858: 089b lsrs r3, r3, #2
800485a: 3302 adds r3, #2
800485c: 009b lsls r3, r3, #2
800485e: 693a ldr r2, [r7, #16]
8004860: 505a str r2, [r3, r1]
/* Clear EXTI line configuration */
temp = EXTI->IMR;
8004862: 4b38 ldr r3, [pc, #224] ; (8004944 <HAL_GPIO_Init+0x2f8>)
8004864: 681b ldr r3, [r3, #0]
8004866: 613b str r3, [r7, #16]
temp &= ~((uint32_t)iocurrent);
8004868: 68fb ldr r3, [r7, #12]
800486a: 43da mvns r2, r3
800486c: 693b ldr r3, [r7, #16]
800486e: 4013 ands r3, r2
8004870: 613b str r3, [r7, #16]
if ((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT)
8004872: 683b ldr r3, [r7, #0]
8004874: 685a ldr r2, [r3, #4]
8004876: 2380 movs r3, #128 ; 0x80
8004878: 025b lsls r3, r3, #9
800487a: 4013 ands r3, r2
800487c: d003 beq.n 8004886 <HAL_GPIO_Init+0x23a>
{
temp |= iocurrent;
800487e: 693a ldr r2, [r7, #16]
8004880: 68fb ldr r3, [r7, #12]
8004882: 4313 orrs r3, r2
8004884: 613b str r3, [r7, #16]
}
EXTI->IMR = temp;
8004886: 4b2f ldr r3, [pc, #188] ; (8004944 <HAL_GPIO_Init+0x2f8>)
8004888: 693a ldr r2, [r7, #16]
800488a: 601a str r2, [r3, #0]
temp = EXTI->EMR;
800488c: 4b2d ldr r3, [pc, #180] ; (8004944 <HAL_GPIO_Init+0x2f8>)
800488e: 685b ldr r3, [r3, #4]
8004890: 613b str r3, [r7, #16]
temp &= ~((uint32_t)iocurrent);
8004892: 68fb ldr r3, [r7, #12]
8004894: 43da mvns r2, r3
8004896: 693b ldr r3, [r7, #16]
8004898: 4013 ands r3, r2
800489a: 613b str r3, [r7, #16]
if ((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT)
800489c: 683b ldr r3, [r7, #0]
800489e: 685a ldr r2, [r3, #4]
80048a0: 2380 movs r3, #128 ; 0x80
80048a2: 029b lsls r3, r3, #10
80048a4: 4013 ands r3, r2
80048a6: d003 beq.n 80048b0 <HAL_GPIO_Init+0x264>
{
temp |= iocurrent;
80048a8: 693a ldr r2, [r7, #16]
80048aa: 68fb ldr r3, [r7, #12]
80048ac: 4313 orrs r3, r2
80048ae: 613b str r3, [r7, #16]
}
EXTI->EMR = temp;
80048b0: 4b24 ldr r3, [pc, #144] ; (8004944 <HAL_GPIO_Init+0x2f8>)
80048b2: 693a ldr r2, [r7, #16]
80048b4: 605a str r2, [r3, #4]
/* Clear Rising Falling edge configuration */
temp = EXTI->RTSR;
80048b6: 4b23 ldr r3, [pc, #140] ; (8004944 <HAL_GPIO_Init+0x2f8>)
80048b8: 689b ldr r3, [r3, #8]
80048ba: 613b str r3, [r7, #16]
temp &= ~((uint32_t)iocurrent);
80048bc: 68fb ldr r3, [r7, #12]
80048be: 43da mvns r2, r3
80048c0: 693b ldr r3, [r7, #16]
80048c2: 4013 ands r3, r2
80048c4: 613b str r3, [r7, #16]
if ((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE)
80048c6: 683b ldr r3, [r7, #0]
80048c8: 685a ldr r2, [r3, #4]
80048ca: 2380 movs r3, #128 ; 0x80
80048cc: 035b lsls r3, r3, #13
80048ce: 4013 ands r3, r2
80048d0: d003 beq.n 80048da <HAL_GPIO_Init+0x28e>
{
temp |= iocurrent;
80048d2: 693a ldr r2, [r7, #16]
80048d4: 68fb ldr r3, [r7, #12]
80048d6: 4313 orrs r3, r2
80048d8: 613b str r3, [r7, #16]
}
EXTI->RTSR = temp;
80048da: 4b1a ldr r3, [pc, #104] ; (8004944 <HAL_GPIO_Init+0x2f8>)
80048dc: 693a ldr r2, [r7, #16]
80048de: 609a str r2, [r3, #8]
temp = EXTI->FTSR;
80048e0: 4b18 ldr r3, [pc, #96] ; (8004944 <HAL_GPIO_Init+0x2f8>)
80048e2: 68db ldr r3, [r3, #12]
80048e4: 613b str r3, [r7, #16]
temp &= ~((uint32_t)iocurrent);
80048e6: 68fb ldr r3, [r7, #12]
80048e8: 43da mvns r2, r3
80048ea: 693b ldr r3, [r7, #16]
80048ec: 4013 ands r3, r2
80048ee: 613b str r3, [r7, #16]
if ((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE)
80048f0: 683b ldr r3, [r7, #0]
80048f2: 685a ldr r2, [r3, #4]
80048f4: 2380 movs r3, #128 ; 0x80
80048f6: 039b lsls r3, r3, #14
80048f8: 4013 ands r3, r2
80048fa: d003 beq.n 8004904 <HAL_GPIO_Init+0x2b8>
{
temp |= iocurrent;
80048fc: 693a ldr r2, [r7, #16]
80048fe: 68fb ldr r3, [r7, #12]
8004900: 4313 orrs r3, r2
8004902: 613b str r3, [r7, #16]
}
EXTI->FTSR = temp;
8004904: 4b0f ldr r3, [pc, #60] ; (8004944 <HAL_GPIO_Init+0x2f8>)
8004906: 693a ldr r2, [r7, #16]
8004908: 60da str r2, [r3, #12]
}
}
position++;
800490a: 697b ldr r3, [r7, #20]
800490c: 3301 adds r3, #1
800490e: 617b str r3, [r7, #20]
while (((GPIO_Init->Pin) >> position) != 0)
8004910: 683b ldr r3, [r7, #0]
8004912: 681a ldr r2, [r3, #0]
8004914: 697b ldr r3, [r7, #20]
8004916: 40da lsrs r2, r3
8004918: 1e13 subs r3, r2, #0
800491a: d000 beq.n 800491e <HAL_GPIO_Init+0x2d2>
800491c: e6a2 b.n 8004664 <HAL_GPIO_Init+0x18>
}
}
800491e: 46c0 nop ; (mov r8, r8)
8004920: 46bd mov sp, r7
8004922: b006 add sp, #24
8004924: bd80 pop {r7, pc}
8004926: 46c0 nop ; (mov r8, r8)
8004928: 40021000 .word 0x40021000
800492c: 40010000 .word 0x40010000
8004930: 50000400 .word 0x50000400
8004934: 50000800 .word 0x50000800
8004938: 50000c00 .word 0x50000c00
800493c: 50001000 .word 0x50001000
8004940: 50001c00 .word 0x50001c00
8004944: 40010400 .word 0x40010400
08004948 <HAL_GPIO_DeInit>:
* This parameter can be one of GPIO_PIN_x where x can be (0..15).
* All port bits are not necessarily available on all GPIOs.
* @retval None
*/
void HAL_GPIO_DeInit(GPIO_TypeDef *GPIOx, uint32_t GPIO_Pin)
{
8004948: b580 push {r7, lr}
800494a: b086 sub sp, #24
800494c: af00 add r7, sp, #0
800494e: 6078 str r0, [r7, #4]
8004950: 6039 str r1, [r7, #0]
uint32_t position = 0x00U;
8004952: 2300 movs r3, #0
8004954: 617b str r3, [r7, #20]
uint32_t iocurrent = 0x00U;
8004956: 2300 movs r3, #0
8004958: 613b str r3, [r7, #16]
uint32_t tmp = 0x00U;
800495a: 2300 movs r3, #0
800495c: 60fb str r3, [r7, #12]
/* Check the parameters */
assert_param(IS_GPIO_PIN_AVAILABLE(GPIOx, GPIO_Pin));
/* Configure the port pins */
while ((GPIO_Pin >> position) != 0)
800495e: e0be b.n 8004ade <HAL_GPIO_DeInit+0x196>
{
/* Get the IO position */
iocurrent = (GPIO_Pin) & (1U << position);
8004960: 2201 movs r2, #1
8004962: 697b ldr r3, [r7, #20]
8004964: 409a lsls r2, r3
8004966: 0013 movs r3, r2
8004968: 683a ldr r2, [r7, #0]
800496a: 4013 ands r3, r2
800496c: 613b str r3, [r7, #16]
if (iocurrent)
800496e: 693b ldr r3, [r7, #16]
8004970: 2b00 cmp r3, #0
8004972: d100 bne.n 8004976 <HAL_GPIO_DeInit+0x2e>
8004974: e0b0 b.n 8004ad8 <HAL_GPIO_DeInit+0x190>
{
/*------------------------- EXTI Mode Configuration --------------------*/
/* Clear the External Interrupt or Event for the current IO */
tmp = SYSCFG->EXTICR[position >> 2U];
8004976: 4a5f ldr r2, [pc, #380] ; (8004af4 <HAL_GPIO_DeInit+0x1ac>)
8004978: 697b ldr r3, [r7, #20]
800497a: 089b lsrs r3, r3, #2
800497c: 3302 adds r3, #2
800497e: 009b lsls r3, r3, #2
8004980: 589b ldr r3, [r3, r2]
8004982: 60fb str r3, [r7, #12]
tmp &= ((0x0FUL) << (4U * (position & 0x03U)));
8004984: 697b ldr r3, [r7, #20]
8004986: 2203 movs r2, #3
8004988: 4013 ands r3, r2
800498a: 009b lsls r3, r3, #2
800498c: 220f movs r2, #15
800498e: 409a lsls r2, r3
8004990: 68fb ldr r3, [r7, #12]
8004992: 4013 ands r3, r2
8004994: 60fb str r3, [r7, #12]
if (tmp == (GPIO_GET_INDEX(GPIOx) << (4U * (position & 0x03U))))
8004996: 687a ldr r2, [r7, #4]
8004998: 23a0 movs r3, #160 ; 0xa0
800499a: 05db lsls r3, r3, #23
800499c: 429a cmp r2, r3
800499e: d01f beq.n 80049e0 <HAL_GPIO_DeInit+0x98>
80049a0: 687b ldr r3, [r7, #4]
80049a2: 4a55 ldr r2, [pc, #340] ; (8004af8 <HAL_GPIO_DeInit+0x1b0>)
80049a4: 4293 cmp r3, r2
80049a6: d019 beq.n 80049dc <HAL_GPIO_DeInit+0x94>
80049a8: 687b ldr r3, [r7, #4]
80049aa: 4a54 ldr r2, [pc, #336] ; (8004afc <HAL_GPIO_DeInit+0x1b4>)
80049ac: 4293 cmp r3, r2
80049ae: d013 beq.n 80049d8 <HAL_GPIO_DeInit+0x90>
80049b0: 687b ldr r3, [r7, #4]
80049b2: 4a53 ldr r2, [pc, #332] ; (8004b00 <HAL_GPIO_DeInit+0x1b8>)
80049b4: 4293 cmp r3, r2
80049b6: d00d beq.n 80049d4 <HAL_GPIO_DeInit+0x8c>
80049b8: 687b ldr r3, [r7, #4]
80049ba: 4a52 ldr r2, [pc, #328] ; (8004b04 <HAL_GPIO_DeInit+0x1bc>)
80049bc: 4293 cmp r3, r2
80049be: d007 beq.n 80049d0 <HAL_GPIO_DeInit+0x88>
80049c0: 687b ldr r3, [r7, #4]
80049c2: 4a51 ldr r2, [pc, #324] ; (8004b08 <HAL_GPIO_DeInit+0x1c0>)
80049c4: 4293 cmp r3, r2
80049c6: d101 bne.n 80049cc <HAL_GPIO_DeInit+0x84>
80049c8: 2305 movs r3, #5
80049ca: e00a b.n 80049e2 <HAL_GPIO_DeInit+0x9a>
80049cc: 2306 movs r3, #6
80049ce: e008 b.n 80049e2 <HAL_GPIO_DeInit+0x9a>
80049d0: 2304 movs r3, #4
80049d2: e006 b.n 80049e2 <HAL_GPIO_DeInit+0x9a>
80049d4: 2303 movs r3, #3
80049d6: e004 b.n 80049e2 <HAL_GPIO_DeInit+0x9a>
80049d8: 2302 movs r3, #2
80049da: e002 b.n 80049e2 <HAL_GPIO_DeInit+0x9a>
80049dc: 2301 movs r3, #1
80049de: e000 b.n 80049e2 <HAL_GPIO_DeInit+0x9a>
80049e0: 2300 movs r3, #0
80049e2: 697a ldr r2, [r7, #20]
80049e4: 2103 movs r1, #3
80049e6: 400a ands r2, r1
80049e8: 0092 lsls r2, r2, #2
80049ea: 4093 lsls r3, r2
80049ec: 001a movs r2, r3
80049ee: 68fb ldr r3, [r7, #12]
80049f0: 429a cmp r2, r3
80049f2: d132 bne.n 8004a5a <HAL_GPIO_DeInit+0x112>
{
/* Clear EXTI line configuration */
EXTI->IMR &= ~((uint32_t)iocurrent);
80049f4: 4b45 ldr r3, [pc, #276] ; (8004b0c <HAL_GPIO_DeInit+0x1c4>)
80049f6: 4a45 ldr r2, [pc, #276] ; (8004b0c <HAL_GPIO_DeInit+0x1c4>)
80049f8: 6812 ldr r2, [r2, #0]
80049fa: 6939 ldr r1, [r7, #16]
80049fc: 43c9 mvns r1, r1
80049fe: 400a ands r2, r1
8004a00: 601a str r2, [r3, #0]
EXTI->EMR &= ~((uint32_t)iocurrent);
8004a02: 4b42 ldr r3, [pc, #264] ; (8004b0c <HAL_GPIO_DeInit+0x1c4>)
8004a04: 4a41 ldr r2, [pc, #260] ; (8004b0c <HAL_GPIO_DeInit+0x1c4>)
8004a06: 6852 ldr r2, [r2, #4]
8004a08: 6939 ldr r1, [r7, #16]
8004a0a: 43c9 mvns r1, r1
8004a0c: 400a ands r2, r1
8004a0e: 605a str r2, [r3, #4]
/* Clear Rising Falling edge configuration */
EXTI->RTSR &= ~((uint32_t)iocurrent);
8004a10: 4b3e ldr r3, [pc, #248] ; (8004b0c <HAL_GPIO_DeInit+0x1c4>)
8004a12: 4a3e ldr r2, [pc, #248] ; (8004b0c <HAL_GPIO_DeInit+0x1c4>)
8004a14: 6892 ldr r2, [r2, #8]
8004a16: 6939 ldr r1, [r7, #16]
8004a18: 43c9 mvns r1, r1
8004a1a: 400a ands r2, r1
8004a1c: 609a str r2, [r3, #8]
EXTI->FTSR &= ~((uint32_t)iocurrent);
8004a1e: 4b3b ldr r3, [pc, #236] ; (8004b0c <HAL_GPIO_DeInit+0x1c4>)
8004a20: 4a3a ldr r2, [pc, #232] ; (8004b0c <HAL_GPIO_DeInit+0x1c4>)
8004a22: 68d2 ldr r2, [r2, #12]
8004a24: 6939 ldr r1, [r7, #16]
8004a26: 43c9 mvns r1, r1
8004a28: 400a ands r2, r1
8004a2a: 60da str r2, [r3, #12]
tmp = (0x0FUL) << (4U * (position & 0x03U));
8004a2c: 697b ldr r3, [r7, #20]
8004a2e: 2203 movs r2, #3
8004a30: 4013 ands r3, r2
8004a32: 009b lsls r3, r3, #2
8004a34: 220f movs r2, #15
8004a36: 409a lsls r2, r3
8004a38: 0013 movs r3, r2
8004a3a: 60fb str r3, [r7, #12]
SYSCFG->EXTICR[position >> 2U] &= ~tmp;
8004a3c: 482d ldr r0, [pc, #180] ; (8004af4 <HAL_GPIO_DeInit+0x1ac>)
8004a3e: 697b ldr r3, [r7, #20]
8004a40: 089b lsrs r3, r3, #2
8004a42: 492c ldr r1, [pc, #176] ; (8004af4 <HAL_GPIO_DeInit+0x1ac>)
8004a44: 697a ldr r2, [r7, #20]
8004a46: 0892 lsrs r2, r2, #2
8004a48: 3202 adds r2, #2
8004a4a: 0092 lsls r2, r2, #2
8004a4c: 5852 ldr r2, [r2, r1]
8004a4e: 68f9 ldr r1, [r7, #12]
8004a50: 43c9 mvns r1, r1
8004a52: 400a ands r2, r1
8004a54: 3302 adds r3, #2
8004a56: 009b lsls r3, r3, #2
8004a58: 501a str r2, [r3, r0]
}
/*------------------------- GPIO Mode Configuration --------------------*/
/* Configure IO Direction in Input Floting Mode */
GPIOx->MODER |= (GPIO_MODER_MODE0 << (position * 2U));
8004a5a: 687b ldr r3, [r7, #4]
8004a5c: 681a ldr r2, [r3, #0]
8004a5e: 697b ldr r3, [r7, #20]
8004a60: 005b lsls r3, r3, #1
8004a62: 2103 movs r1, #3
8004a64: 4099 lsls r1, r3
8004a66: 000b movs r3, r1
8004a68: 431a orrs r2, r3
8004a6a: 687b ldr r3, [r7, #4]
8004a6c: 601a str r2, [r3, #0]
/* Configure the default Alternate Function in current IO */
GPIOx->AFR[position >> 3U] &= ~(0xFUL << ((uint32_t)(position & 0x07UL) * 4U));
8004a6e: 697b ldr r3, [r7, #20]
8004a70: 08da lsrs r2, r3, #3
8004a72: 697b ldr r3, [r7, #20]
8004a74: 08d9 lsrs r1, r3, #3
8004a76: 687b ldr r3, [r7, #4]
8004a78: 3108 adds r1, #8
8004a7a: 0089 lsls r1, r1, #2
8004a7c: 58cb ldr r3, [r1, r3]
8004a7e: 6979 ldr r1, [r7, #20]
8004a80: 2007 movs r0, #7
8004a82: 4001 ands r1, r0
8004a84: 0089 lsls r1, r1, #2
8004a86: 200f movs r0, #15
8004a88: 4088 lsls r0, r1
8004a8a: 0001 movs r1, r0
8004a8c: 43c9 mvns r1, r1
8004a8e: 4019 ands r1, r3
8004a90: 687b ldr r3, [r7, #4]
8004a92: 3208 adds r2, #8
8004a94: 0092 lsls r2, r2, #2
8004a96: 50d1 str r1, [r2, r3]
/* Deactivate the Pull-up oand Pull-down resistor for the current IO */
GPIOx->PUPDR &= ~(GPIO_PUPDR_PUPD0 << (position * 2U));
8004a98: 687b ldr r3, [r7, #4]
8004a9a: 68db ldr r3, [r3, #12]
8004a9c: 697a ldr r2, [r7, #20]
8004a9e: 0052 lsls r2, r2, #1
8004aa0: 2103 movs r1, #3
8004aa2: 4091 lsls r1, r2
8004aa4: 000a movs r2, r1
8004aa6: 43d2 mvns r2, r2
8004aa8: 401a ands r2, r3
8004aaa: 687b ldr r3, [r7, #4]
8004aac: 60da str r2, [r3, #12]
/* Configure the default value IO Output Type */
GPIOx->OTYPER &= ~(GPIO_OTYPER_OT_0 << position);
8004aae: 687b ldr r3, [r7, #4]
8004ab0: 685b ldr r3, [r3, #4]
8004ab2: 2101 movs r1, #1
8004ab4: 697a ldr r2, [r7, #20]
8004ab6: 4091 lsls r1, r2
8004ab8: 000a movs r2, r1
8004aba: 43d2 mvns r2, r2
8004abc: 401a ands r2, r3
8004abe: 687b ldr r3, [r7, #4]
8004ac0: 605a str r2, [r3, #4]
/* Configure the default value for IO Speed */
GPIOx->OSPEEDR &= ~(GPIO_OSPEEDER_OSPEED0 << (position * 2U));
8004ac2: 687b ldr r3, [r7, #4]
8004ac4: 689b ldr r3, [r3, #8]
8004ac6: 697a ldr r2, [r7, #20]
8004ac8: 0052 lsls r2, r2, #1
8004aca: 2103 movs r1, #3
8004acc: 4091 lsls r1, r2
8004ace: 000a movs r2, r1
8004ad0: 43d2 mvns r2, r2
8004ad2: 401a ands r2, r3
8004ad4: 687b ldr r3, [r7, #4]
8004ad6: 609a str r2, [r3, #8]
}
position++;
8004ad8: 697b ldr r3, [r7, #20]
8004ada: 3301 adds r3, #1
8004adc: 617b str r3, [r7, #20]
while ((GPIO_Pin >> position) != 0)
8004ade: 683a ldr r2, [r7, #0]
8004ae0: 697b ldr r3, [r7, #20]
8004ae2: 40da lsrs r2, r3
8004ae4: 1e13 subs r3, r2, #0
8004ae6: d000 beq.n 8004aea <HAL_GPIO_DeInit+0x1a2>
8004ae8: e73a b.n 8004960 <HAL_GPIO_DeInit+0x18>
}
}
8004aea: 46c0 nop ; (mov r8, r8)
8004aec: 46bd mov sp, r7
8004aee: b006 add sp, #24
8004af0: bd80 pop {r7, pc}
8004af2: 46c0 nop ; (mov r8, r8)
8004af4: 40010000 .word 0x40010000
8004af8: 50000400 .word 0x50000400
8004afc: 50000800 .word 0x50000800
8004b00: 50000c00 .word 0x50000c00
8004b04: 50001000 .word 0x50001000
8004b08: 50001c00 .word 0x50001c00
8004b0c: 40010400 .word 0x40010400
08004b10 <HAL_GPIO_ReadPin>:
* This parameter can be GPIO_PIN_x where x can be (0..15).
* All port bits are not necessarily available on all GPIOs.
* @retval The input port pin value.
*/
GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin)
{
8004b10: b580 push {r7, lr}
8004b12: b084 sub sp, #16
8004b14: af00 add r7, sp, #0
8004b16: 6078 str r0, [r7, #4]
8004b18: 000a movs r2, r1
8004b1a: 1cbb adds r3, r7, #2
8004b1c: 801a strh r2, [r3, #0]
GPIO_PinState bitstatus;
/* Check the parameters */
assert_param(IS_GPIO_PIN_AVAILABLE(GPIOx, GPIO_Pin));
if ((GPIOx->IDR & GPIO_Pin) != (uint32_t)GPIO_PIN_RESET)
8004b1e: 687b ldr r3, [r7, #4]
8004b20: 691b ldr r3, [r3, #16]
8004b22: 1cba adds r2, r7, #2
8004b24: 8812 ldrh r2, [r2, #0]
8004b26: 4013 ands r3, r2
8004b28: d004 beq.n 8004b34 <HAL_GPIO_ReadPin+0x24>
{
bitstatus = GPIO_PIN_SET;
8004b2a: 230f movs r3, #15
8004b2c: 18fb adds r3, r7, r3
8004b2e: 2201 movs r2, #1
8004b30: 701a strb r2, [r3, #0]
8004b32: e003 b.n 8004b3c <HAL_GPIO_ReadPin+0x2c>
}
else
{
bitstatus = GPIO_PIN_RESET;
8004b34: 230f movs r3, #15
8004b36: 18fb adds r3, r7, r3
8004b38: 2200 movs r2, #0
8004b3a: 701a strb r2, [r3, #0]
}
return bitstatus;
8004b3c: 230f movs r3, #15
8004b3e: 18fb adds r3, r7, r3
8004b40: 781b ldrb r3, [r3, #0]
}
8004b42: 0018 movs r0, r3
8004b44: 46bd mov sp, r7
8004b46: b004 add sp, #16
8004b48: bd80 pop {r7, pc}
08004b4a <HAL_GPIO_WritePin>:
* GPIO_PIN_RESET: to clear the port pin
* GPIO_PIN_SET: to set the port pin
* @retval None
*/
void HAL_GPIO_WritePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState)
{
8004b4a: b580 push {r7, lr}
8004b4c: b082 sub sp, #8
8004b4e: af00 add r7, sp, #0
8004b50: 6078 str r0, [r7, #4]
8004b52: 0008 movs r0, r1
8004b54: 0011 movs r1, r2
8004b56: 1cbb adds r3, r7, #2
8004b58: 1c02 adds r2, r0, #0
8004b5a: 801a strh r2, [r3, #0]
8004b5c: 1c7b adds r3, r7, #1
8004b5e: 1c0a adds r2, r1, #0
8004b60: 701a strb r2, [r3, #0]
/* Check the parameters */
assert_param(IS_GPIO_PIN_AVAILABLE(GPIOx, GPIO_Pin));
assert_param(IS_GPIO_PIN_ACTION(PinState));
if (PinState != GPIO_PIN_RESET)
8004b62: 1c7b adds r3, r7, #1
8004b64: 781b ldrb r3, [r3, #0]
8004b66: 2b00 cmp r3, #0
8004b68: d004 beq.n 8004b74 <HAL_GPIO_WritePin+0x2a>
{
GPIOx->BSRR = GPIO_Pin;
8004b6a: 1cbb adds r3, r7, #2
8004b6c: 881a ldrh r2, [r3, #0]
8004b6e: 687b ldr r3, [r7, #4]
8004b70: 619a str r2, [r3, #24]
}
else
{
GPIOx->BRR = GPIO_Pin ;
}
}
8004b72: e003 b.n 8004b7c <HAL_GPIO_WritePin+0x32>
GPIOx->BRR = GPIO_Pin ;
8004b74: 1cbb adds r3, r7, #2
8004b76: 881a ldrh r2, [r3, #0]
8004b78: 687b ldr r3, [r7, #4]
8004b7a: 629a str r2, [r3, #40] ; 0x28
}
8004b7c: 46c0 nop ; (mov r8, r8)
8004b7e: 46bd mov sp, r7
8004b80: b002 add sp, #8
8004b82: bd80 pop {r7, pc}
08004b84 <HAL_GPIO_EXTI_IRQHandler>:
* @brief This function handles EXTI interrupt request.
* @param GPIO_Pin Specifies the pins connected to the EXTI line.
* @retval None
*/
void HAL_GPIO_EXTI_IRQHandler(uint16_t GPIO_Pin)
{
8004b84: b580 push {r7, lr}
8004b86: b082 sub sp, #8
8004b88: af00 add r7, sp, #0
8004b8a: 0002 movs r2, r0
8004b8c: 1dbb adds r3, r7, #6
8004b8e: 801a strh r2, [r3, #0]
/* EXTI line interrupt detected */
if (__HAL_GPIO_EXTI_GET_IT(GPIO_Pin) != RESET)
8004b90: 4b09 ldr r3, [pc, #36] ; (8004bb8 <HAL_GPIO_EXTI_IRQHandler+0x34>)
8004b92: 695b ldr r3, [r3, #20]
8004b94: 1dba adds r2, r7, #6
8004b96: 8812 ldrh r2, [r2, #0]
8004b98: 4013 ands r3, r2
8004b9a: d008 beq.n 8004bae <HAL_GPIO_EXTI_IRQHandler+0x2a>
{
__HAL_GPIO_EXTI_CLEAR_IT(GPIO_Pin);
8004b9c: 4b06 ldr r3, [pc, #24] ; (8004bb8 <HAL_GPIO_EXTI_IRQHandler+0x34>)
8004b9e: 1dba adds r2, r7, #6
8004ba0: 8812 ldrh r2, [r2, #0]
8004ba2: 615a str r2, [r3, #20]
HAL_GPIO_EXTI_Callback(GPIO_Pin);
8004ba4: 1dbb adds r3, r7, #6
8004ba6: 881b ldrh r3, [r3, #0]
8004ba8: 0018 movs r0, r3
8004baa: f7ff f8ed bl 8003d88 <HAL_GPIO_EXTI_Callback>
}
}
8004bae: 46c0 nop ; (mov r8, r8)
8004bb0: 46bd mov sp, r7
8004bb2: b002 add sp, #8
8004bb4: bd80 pop {r7, pc}
8004bb6: 46c0 nop ; (mov r8, r8)
8004bb8: 40010400 .word 0x40010400
08004bbc <HAL_RCC_OscConfig>:
* supported by this macro. User should request a transition to HSE Off
* first and then HSE On or HSE Bypass.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct)
{
8004bbc: b590 push {r4, r7, lr}
8004bbe: b08b sub sp, #44 ; 0x2c
8004bc0: af00 add r7, sp, #0
8004bc2: 6078 str r0, [r7, #4]
uint32_t hsi_state;
HAL_StatusTypeDef status;
uint32_t sysclk_source, pll_config;
/* Check Null pointer */
if(RCC_OscInitStruct == NULL)
8004bc4: 687b ldr r3, [r7, #4]
8004bc6: 2b00 cmp r3, #0
8004bc8: d102 bne.n 8004bd0 <HAL_RCC_OscConfig+0x14>
{
return HAL_ERROR;
8004bca: 2301 movs r3, #1
8004bcc: f000 fbbe bl 800534c <HAL_RCC_OscConfig+0x790>
}
/* Check the parameters */
assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType));
sysclk_source = __HAL_RCC_GET_SYSCLK_SOURCE();
8004bd0: 4bc9 ldr r3, [pc, #804] ; (8004ef8 <HAL_RCC_OscConfig+0x33c>)
8004bd2: 68db ldr r3, [r3, #12]
8004bd4: 220c movs r2, #12
8004bd6: 4013 ands r3, r2
8004bd8: 61fb str r3, [r7, #28]
pll_config = __HAL_RCC_GET_PLL_OSCSOURCE();
8004bda: 4bc7 ldr r3, [pc, #796] ; (8004ef8 <HAL_RCC_OscConfig+0x33c>)
8004bdc: 68da ldr r2, [r3, #12]
8004bde: 2380 movs r3, #128 ; 0x80
8004be0: 025b lsls r3, r3, #9
8004be2: 4013 ands r3, r2
8004be4: 61bb str r3, [r7, #24]
/*------------------------------- HSE Configuration ------------------------*/
if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE)
8004be6: 687b ldr r3, [r7, #4]
8004be8: 681b ldr r3, [r3, #0]
8004bea: 2201 movs r2, #1
8004bec: 4013 ands r3, r2
8004bee: d100 bne.n 8004bf2 <HAL_RCC_OscConfig+0x36>
8004bf0: e07e b.n 8004cf0 <HAL_RCC_OscConfig+0x134>
{
/* Check the parameters */
assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState));
/* When the HSE is used as system clock or clock source for PLL in these cases it is not allowed to be disabled */
if((sysclk_source == RCC_SYSCLKSOURCE_STATUS_HSE)
8004bf2: 69fb ldr r3, [r7, #28]
8004bf4: 2b08 cmp r3, #8
8004bf6: d007 beq.n 8004c08 <HAL_RCC_OscConfig+0x4c>
|| ((sysclk_source == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (pll_config == RCC_PLLSOURCE_HSE)))
8004bf8: 69fb ldr r3, [r7, #28]
8004bfa: 2b0c cmp r3, #12
8004bfc: d112 bne.n 8004c24 <HAL_RCC_OscConfig+0x68>
8004bfe: 69ba ldr r2, [r7, #24]
8004c00: 2380 movs r3, #128 ; 0x80
8004c02: 025b lsls r3, r3, #9
8004c04: 429a cmp r2, r3
8004c06: d10d bne.n 8004c24 <HAL_RCC_OscConfig+0x68>
{
if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != 0U) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
8004c08: 4bbb ldr r3, [pc, #748] ; (8004ef8 <HAL_RCC_OscConfig+0x33c>)
8004c0a: 681a ldr r2, [r3, #0]
8004c0c: 2380 movs r3, #128 ; 0x80
8004c0e: 029b lsls r3, r3, #10
8004c10: 4013 ands r3, r2
8004c12: d100 bne.n 8004c16 <HAL_RCC_OscConfig+0x5a>
8004c14: e06b b.n 8004cee <HAL_RCC_OscConfig+0x132>
8004c16: 687b ldr r3, [r7, #4]
8004c18: 685b ldr r3, [r3, #4]
8004c1a: 2b00 cmp r3, #0
8004c1c: d167 bne.n 8004cee <HAL_RCC_OscConfig+0x132>
{
return HAL_ERROR;
8004c1e: 2301 movs r3, #1
8004c20: f000 fb94 bl 800534c <HAL_RCC_OscConfig+0x790>
}
}
else
{
/* Set the new HSE configuration ---------------------------------------*/
__HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
8004c24: 687b ldr r3, [r7, #4]
8004c26: 685a ldr r2, [r3, #4]
8004c28: 2380 movs r3, #128 ; 0x80
8004c2a: 025b lsls r3, r3, #9
8004c2c: 429a cmp r2, r3
8004c2e: d107 bne.n 8004c40 <HAL_RCC_OscConfig+0x84>
8004c30: 4bb1 ldr r3, [pc, #708] ; (8004ef8 <HAL_RCC_OscConfig+0x33c>)
8004c32: 4ab1 ldr r2, [pc, #708] ; (8004ef8 <HAL_RCC_OscConfig+0x33c>)
8004c34: 6812 ldr r2, [r2, #0]
8004c36: 2180 movs r1, #128 ; 0x80
8004c38: 0249 lsls r1, r1, #9
8004c3a: 430a orrs r2, r1
8004c3c: 601a str r2, [r3, #0]
8004c3e: e027 b.n 8004c90 <HAL_RCC_OscConfig+0xd4>
8004c40: 687b ldr r3, [r7, #4]
8004c42: 685a ldr r2, [r3, #4]
8004c44: 23a0 movs r3, #160 ; 0xa0
8004c46: 02db lsls r3, r3, #11
8004c48: 429a cmp r2, r3
8004c4a: d10e bne.n 8004c6a <HAL_RCC_OscConfig+0xae>
8004c4c: 4baa ldr r3, [pc, #680] ; (8004ef8 <HAL_RCC_OscConfig+0x33c>)
8004c4e: 4aaa ldr r2, [pc, #680] ; (8004ef8 <HAL_RCC_OscConfig+0x33c>)
8004c50: 6812 ldr r2, [r2, #0]
8004c52: 2180 movs r1, #128 ; 0x80
8004c54: 02c9 lsls r1, r1, #11
8004c56: 430a orrs r2, r1
8004c58: 601a str r2, [r3, #0]
8004c5a: 4ba7 ldr r3, [pc, #668] ; (8004ef8 <HAL_RCC_OscConfig+0x33c>)
8004c5c: 4aa6 ldr r2, [pc, #664] ; (8004ef8 <HAL_RCC_OscConfig+0x33c>)
8004c5e: 6812 ldr r2, [r2, #0]
8004c60: 2180 movs r1, #128 ; 0x80
8004c62: 0249 lsls r1, r1, #9
8004c64: 430a orrs r2, r1
8004c66: 601a str r2, [r3, #0]
8004c68: e012 b.n 8004c90 <HAL_RCC_OscConfig+0xd4>
8004c6a: 4ba3 ldr r3, [pc, #652] ; (8004ef8 <HAL_RCC_OscConfig+0x33c>)
8004c6c: 4aa2 ldr r2, [pc, #648] ; (8004ef8 <HAL_RCC_OscConfig+0x33c>)
8004c6e: 6812 ldr r2, [r2, #0]
8004c70: 49a2 ldr r1, [pc, #648] ; (8004efc <HAL_RCC_OscConfig+0x340>)
8004c72: 400a ands r2, r1
8004c74: 601a str r2, [r3, #0]
8004c76: 4ba0 ldr r3, [pc, #640] ; (8004ef8 <HAL_RCC_OscConfig+0x33c>)
8004c78: 681a ldr r2, [r3, #0]
8004c7a: 2380 movs r3, #128 ; 0x80
8004c7c: 025b lsls r3, r3, #9
8004c7e: 4013 ands r3, r2
8004c80: 60fb str r3, [r7, #12]
8004c82: 68fb ldr r3, [r7, #12]
8004c84: 4b9c ldr r3, [pc, #624] ; (8004ef8 <HAL_RCC_OscConfig+0x33c>)
8004c86: 4a9c ldr r2, [pc, #624] ; (8004ef8 <HAL_RCC_OscConfig+0x33c>)
8004c88: 6812 ldr r2, [r2, #0]
8004c8a: 499d ldr r1, [pc, #628] ; (8004f00 <HAL_RCC_OscConfig+0x344>)
8004c8c: 400a ands r2, r1
8004c8e: 601a str r2, [r3, #0]
/* Check the HSE State */
if(RCC_OscInitStruct->HSEState != RCC_HSE_OFF)
8004c90: 687b ldr r3, [r7, #4]
8004c92: 685b ldr r3, [r3, #4]
8004c94: 2b00 cmp r3, #0
8004c96: d015 beq.n 8004cc4 <HAL_RCC_OscConfig+0x108>
{
/* Get Start Tick */
tickstart = HAL_GetTick();
8004c98: f7ff f966 bl 8003f68 <HAL_GetTick>
8004c9c: 0003 movs r3, r0
8004c9e: 617b str r3, [r7, #20]
/* Wait till HSE is ready */
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == 0U)
8004ca0: e009 b.n 8004cb6 <HAL_RCC_OscConfig+0xfa>
{
if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE)
8004ca2: f7ff f961 bl 8003f68 <HAL_GetTick>
8004ca6: 0002 movs r2, r0
8004ca8: 697b ldr r3, [r7, #20]
8004caa: 1ad3 subs r3, r2, r3
8004cac: 2b64 cmp r3, #100 ; 0x64
8004cae: d902 bls.n 8004cb6 <HAL_RCC_OscConfig+0xfa>
{
return HAL_TIMEOUT;
8004cb0: 2303 movs r3, #3
8004cb2: f000 fb4b bl 800534c <HAL_RCC_OscConfig+0x790>
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == 0U)
8004cb6: 4b90 ldr r3, [pc, #576] ; (8004ef8 <HAL_RCC_OscConfig+0x33c>)
8004cb8: 681a ldr r2, [r3, #0]
8004cba: 2380 movs r3, #128 ; 0x80
8004cbc: 029b lsls r3, r3, #10
8004cbe: 4013 ands r3, r2
8004cc0: d0ef beq.n 8004ca2 <HAL_RCC_OscConfig+0xe6>
8004cc2: e015 b.n 8004cf0 <HAL_RCC_OscConfig+0x134>
}
}
else
{
/* Get Start Tick */
tickstart = HAL_GetTick();
8004cc4: f7ff f950 bl 8003f68 <HAL_GetTick>
8004cc8: 0003 movs r3, r0
8004cca: 617b str r3, [r7, #20]
/* Wait till HSE is disabled */
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != 0U)
8004ccc: e008 b.n 8004ce0 <HAL_RCC_OscConfig+0x124>
{
if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE)
8004cce: f7ff f94b bl 8003f68 <HAL_GetTick>
8004cd2: 0002 movs r2, r0
8004cd4: 697b ldr r3, [r7, #20]
8004cd6: 1ad3 subs r3, r2, r3
8004cd8: 2b64 cmp r3, #100 ; 0x64
8004cda: d901 bls.n 8004ce0 <HAL_RCC_OscConfig+0x124>
{
return HAL_TIMEOUT;
8004cdc: 2303 movs r3, #3
8004cde: e335 b.n 800534c <HAL_RCC_OscConfig+0x790>
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != 0U)
8004ce0: 4b85 ldr r3, [pc, #532] ; (8004ef8 <HAL_RCC_OscConfig+0x33c>)
8004ce2: 681a ldr r2, [r3, #0]
8004ce4: 2380 movs r3, #128 ; 0x80
8004ce6: 029b lsls r3, r3, #10
8004ce8: 4013 ands r3, r2
8004cea: d1f0 bne.n 8004cce <HAL_RCC_OscConfig+0x112>
8004cec: e000 b.n 8004cf0 <HAL_RCC_OscConfig+0x134>
if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != 0U) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
8004cee: 46c0 nop ; (mov r8, r8)
}
}
}
}
/*----------------------------- HSI Configuration --------------------------*/
if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI)
8004cf0: 687b ldr r3, [r7, #4]
8004cf2: 681b ldr r3, [r3, #0]
8004cf4: 2202 movs r2, #2
8004cf6: 4013 ands r3, r2
8004cf8: d100 bne.n 8004cfc <HAL_RCC_OscConfig+0x140>
8004cfa: e099 b.n 8004e30 <HAL_RCC_OscConfig+0x274>
{
/* Check the parameters */
assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState));
assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue));
hsi_state = RCC_OscInitStruct->HSIState;
8004cfc: 687b ldr r3, [r7, #4]
8004cfe: 68db ldr r3, [r3, #12]
8004d00: 627b str r3, [r7, #36] ; 0x24
#if defined(RCC_CR_HSIOUTEN)
if((hsi_state & RCC_HSI_OUTEN) != 0U)
8004d02: 6a7b ldr r3, [r7, #36] ; 0x24
8004d04: 2220 movs r2, #32
8004d06: 4013 ands r3, r2
8004d08: d009 beq.n 8004d1e <HAL_RCC_OscConfig+0x162>
{
/* HSI Output enable for timer requested */
SET_BIT(RCC->CR, RCC_CR_HSIOUTEN);
8004d0a: 4b7b ldr r3, [pc, #492] ; (8004ef8 <HAL_RCC_OscConfig+0x33c>)
8004d0c: 4a7a ldr r2, [pc, #488] ; (8004ef8 <HAL_RCC_OscConfig+0x33c>)
8004d0e: 6812 ldr r2, [r2, #0]
8004d10: 2120 movs r1, #32
8004d12: 430a orrs r2, r1
8004d14: 601a str r2, [r3, #0]
hsi_state &= ~RCC_CR_HSIOUTEN;
8004d16: 6a7b ldr r3, [r7, #36] ; 0x24
8004d18: 2220 movs r2, #32
8004d1a: 4393 bics r3, r2
8004d1c: 627b str r3, [r7, #36] ; 0x24
}
#endif
/* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock */
if((sysclk_source == RCC_SYSCLKSOURCE_STATUS_HSI)
8004d1e: 69fb ldr r3, [r7, #28]
8004d20: 2b04 cmp r3, #4
8004d22: d005 beq.n 8004d30 <HAL_RCC_OscConfig+0x174>
|| ((sysclk_source == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (pll_config == RCC_PLLSOURCE_HSI)))
8004d24: 69fb ldr r3, [r7, #28]
8004d26: 2b0c cmp r3, #12
8004d28: d13f bne.n 8004daa <HAL_RCC_OscConfig+0x1ee>
8004d2a: 69bb ldr r3, [r7, #24]
8004d2c: 2b00 cmp r3, #0
8004d2e: d13c bne.n 8004daa <HAL_RCC_OscConfig+0x1ee>
{
/* When HSI is used as system clock it will not disabled */
if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != 0U) && (hsi_state == RCC_HSI_OFF))
8004d30: 4b71 ldr r3, [pc, #452] ; (8004ef8 <HAL_RCC_OscConfig+0x33c>)
8004d32: 681b ldr r3, [r3, #0]
8004d34: 2204 movs r2, #4
8004d36: 4013 ands r3, r2
8004d38: d004 beq.n 8004d44 <HAL_RCC_OscConfig+0x188>
8004d3a: 6a7b ldr r3, [r7, #36] ; 0x24
8004d3c: 2b00 cmp r3, #0
8004d3e: d101 bne.n 8004d44 <HAL_RCC_OscConfig+0x188>
{
return HAL_ERROR;
8004d40: 2301 movs r3, #1
8004d42: e303 b.n 800534c <HAL_RCC_OscConfig+0x790>
}
/* Otherwise, just the calibration and HSI or HSIdiv4 are allowed */
else
{
/* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
__HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
8004d44: 4a6c ldr r2, [pc, #432] ; (8004ef8 <HAL_RCC_OscConfig+0x33c>)
8004d46: 4b6c ldr r3, [pc, #432] ; (8004ef8 <HAL_RCC_OscConfig+0x33c>)
8004d48: 685b ldr r3, [r3, #4]
8004d4a: 496e ldr r1, [pc, #440] ; (8004f04 <HAL_RCC_OscConfig+0x348>)
8004d4c: 4019 ands r1, r3
8004d4e: 687b ldr r3, [r7, #4]
8004d50: 691b ldr r3, [r3, #16]
8004d52: 021b lsls r3, r3, #8
8004d54: 430b orrs r3, r1
8004d56: 6053 str r3, [r2, #4]
/* Enable the Internal High Speed oscillator (HSI or HSIdiv4) */
__HAL_RCC_HSI_CONFIG(hsi_state);
8004d58: 4b67 ldr r3, [pc, #412] ; (8004ef8 <HAL_RCC_OscConfig+0x33c>)
8004d5a: 4a67 ldr r2, [pc, #412] ; (8004ef8 <HAL_RCC_OscConfig+0x33c>)
8004d5c: 6812 ldr r2, [r2, #0]
8004d5e: 2109 movs r1, #9
8004d60: 438a bics r2, r1
8004d62: 0011 movs r1, r2
8004d64: 6a7a ldr r2, [r7, #36] ; 0x24
8004d66: 430a orrs r2, r1
8004d68: 601a str r2, [r3, #0]
}
/* Update the SystemCoreClock global variable */
SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE)>> RCC_CFGR_HPRE_Pos];
8004d6a: f000 fc41 bl 80055f0 <HAL_RCC_GetSysClockFreq>
8004d6e: 0001 movs r1, r0
8004d70: 4b61 ldr r3, [pc, #388] ; (8004ef8 <HAL_RCC_OscConfig+0x33c>)
8004d72: 68db ldr r3, [r3, #12]
8004d74: 091b lsrs r3, r3, #4
8004d76: 220f movs r2, #15
8004d78: 4013 ands r3, r2
8004d7a: 4a63 ldr r2, [pc, #396] ; (8004f08 <HAL_RCC_OscConfig+0x34c>)
8004d7c: 5cd3 ldrb r3, [r2, r3]
8004d7e: 000a movs r2, r1
8004d80: 40da lsrs r2, r3
8004d82: 4b62 ldr r3, [pc, #392] ; (8004f0c <HAL_RCC_OscConfig+0x350>)
8004d84: 601a str r2, [r3, #0]
/* Configure the source of time base considering new system clocks settings*/
status = HAL_InitTick (uwTickPrio);
8004d86: 4b62 ldr r3, [pc, #392] ; (8004f10 <HAL_RCC_OscConfig+0x354>)
8004d88: 681b ldr r3, [r3, #0]
8004d8a: 2213 movs r2, #19
8004d8c: 18bc adds r4, r7, r2
8004d8e: 0018 movs r0, r3
8004d90: f7ff f8a4 bl 8003edc <HAL_InitTick>
8004d94: 0003 movs r3, r0
8004d96: 7023 strb r3, [r4, #0]
if(status != HAL_OK)
8004d98: 2313 movs r3, #19
8004d9a: 18fb adds r3, r7, r3
8004d9c: 781b ldrb r3, [r3, #0]
8004d9e: 2b00 cmp r3, #0
8004da0: d046 beq.n 8004e30 <HAL_RCC_OscConfig+0x274>
{
return status;
8004da2: 2313 movs r3, #19
8004da4: 18fb adds r3, r7, r3
8004da6: 781b ldrb r3, [r3, #0]
8004da8: e2d0 b.n 800534c <HAL_RCC_OscConfig+0x790>
}
}
else
{
/* Check the HSI State */
if(hsi_state != RCC_HSI_OFF)
8004daa: 6a7b ldr r3, [r7, #36] ; 0x24
8004dac: 2b00 cmp r3, #0
8004dae: d026 beq.n 8004dfe <HAL_RCC_OscConfig+0x242>
{
/* Enable the Internal High Speed oscillator (HSI or HSIdiv4) */
__HAL_RCC_HSI_CONFIG(hsi_state);
8004db0: 4b51 ldr r3, [pc, #324] ; (8004ef8 <HAL_RCC_OscConfig+0x33c>)
8004db2: 4a51 ldr r2, [pc, #324] ; (8004ef8 <HAL_RCC_OscConfig+0x33c>)
8004db4: 6812 ldr r2, [r2, #0]
8004db6: 2109 movs r1, #9
8004db8: 438a bics r2, r1
8004dba: 0011 movs r1, r2
8004dbc: 6a7a ldr r2, [r7, #36] ; 0x24
8004dbe: 430a orrs r2, r1
8004dc0: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
8004dc2: f7ff f8d1 bl 8003f68 <HAL_GetTick>
8004dc6: 0003 movs r3, r0
8004dc8: 617b str r3, [r7, #20]
/* Wait till HSI is ready */
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == 0U)
8004dca: e008 b.n 8004dde <HAL_RCC_OscConfig+0x222>
{
if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE)
8004dcc: f7ff f8cc bl 8003f68 <HAL_GetTick>
8004dd0: 0002 movs r2, r0
8004dd2: 697b ldr r3, [r7, #20]
8004dd4: 1ad3 subs r3, r2, r3
8004dd6: 2b02 cmp r3, #2
8004dd8: d901 bls.n 8004dde <HAL_RCC_OscConfig+0x222>
{
return HAL_TIMEOUT;
8004dda: 2303 movs r3, #3
8004ddc: e2b6 b.n 800534c <HAL_RCC_OscConfig+0x790>
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == 0U)
8004dde: 4b46 ldr r3, [pc, #280] ; (8004ef8 <HAL_RCC_OscConfig+0x33c>)
8004de0: 681b ldr r3, [r3, #0]
8004de2: 2204 movs r2, #4
8004de4: 4013 ands r3, r2
8004de6: d0f1 beq.n 8004dcc <HAL_RCC_OscConfig+0x210>
}
}
/* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
__HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
8004de8: 4a43 ldr r2, [pc, #268] ; (8004ef8 <HAL_RCC_OscConfig+0x33c>)
8004dea: 4b43 ldr r3, [pc, #268] ; (8004ef8 <HAL_RCC_OscConfig+0x33c>)
8004dec: 685b ldr r3, [r3, #4]
8004dee: 4945 ldr r1, [pc, #276] ; (8004f04 <HAL_RCC_OscConfig+0x348>)
8004df0: 4019 ands r1, r3
8004df2: 687b ldr r3, [r7, #4]
8004df4: 691b ldr r3, [r3, #16]
8004df6: 021b lsls r3, r3, #8
8004df8: 430b orrs r3, r1
8004dfa: 6053 str r3, [r2, #4]
8004dfc: e018 b.n 8004e30 <HAL_RCC_OscConfig+0x274>
}
else
{
/* Disable the Internal High Speed oscillator (HSI). */
__HAL_RCC_HSI_DISABLE();
8004dfe: 4b3e ldr r3, [pc, #248] ; (8004ef8 <HAL_RCC_OscConfig+0x33c>)
8004e00: 4a3d ldr r2, [pc, #244] ; (8004ef8 <HAL_RCC_OscConfig+0x33c>)
8004e02: 6812 ldr r2, [r2, #0]
8004e04: 2101 movs r1, #1
8004e06: 438a bics r2, r1
8004e08: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
8004e0a: f7ff f8ad bl 8003f68 <HAL_GetTick>
8004e0e: 0003 movs r3, r0
8004e10: 617b str r3, [r7, #20]
/* Wait till HSI is disabled */
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != 0U)
8004e12: e008 b.n 8004e26 <HAL_RCC_OscConfig+0x26a>
{
if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE)
8004e14: f7ff f8a8 bl 8003f68 <HAL_GetTick>
8004e18: 0002 movs r2, r0
8004e1a: 697b ldr r3, [r7, #20]
8004e1c: 1ad3 subs r3, r2, r3
8004e1e: 2b02 cmp r3, #2
8004e20: d901 bls.n 8004e26 <HAL_RCC_OscConfig+0x26a>
{
return HAL_TIMEOUT;
8004e22: 2303 movs r3, #3
8004e24: e292 b.n 800534c <HAL_RCC_OscConfig+0x790>
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != 0U)
8004e26: 4b34 ldr r3, [pc, #208] ; (8004ef8 <HAL_RCC_OscConfig+0x33c>)
8004e28: 681b ldr r3, [r3, #0]
8004e2a: 2204 movs r2, #4
8004e2c: 4013 ands r3, r2
8004e2e: d1f1 bne.n 8004e14 <HAL_RCC_OscConfig+0x258>
}
}
}
}
/*----------------------------- MSI Configuration --------------------------*/
if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_MSI) == RCC_OSCILLATORTYPE_MSI)
8004e30: 687b ldr r3, [r7, #4]
8004e32: 681b ldr r3, [r3, #0]
8004e34: 2210 movs r2, #16
8004e36: 4013 ands r3, r2
8004e38: d100 bne.n 8004e3c <HAL_RCC_OscConfig+0x280>
8004e3a: e0a1 b.n 8004f80 <HAL_RCC_OscConfig+0x3c4>
{
/* When the MSI is used as system clock it will not be disabled */
if(sysclk_source == RCC_CFGR_SWS_MSI)
8004e3c: 69fb ldr r3, [r7, #28]
8004e3e: 2b00 cmp r3, #0
8004e40: d141 bne.n 8004ec6 <HAL_RCC_OscConfig+0x30a>
{
if((__HAL_RCC_GET_FLAG(RCC_FLAG_MSIRDY) != 0U) && (RCC_OscInitStruct->MSIState == RCC_MSI_OFF))
8004e42: 4b2d ldr r3, [pc, #180] ; (8004ef8 <HAL_RCC_OscConfig+0x33c>)
8004e44: 681a ldr r2, [r3, #0]
8004e46: 2380 movs r3, #128 ; 0x80
8004e48: 009b lsls r3, r3, #2
8004e4a: 4013 ands r3, r2
8004e4c: d005 beq.n 8004e5a <HAL_RCC_OscConfig+0x29e>
8004e4e: 687b ldr r3, [r7, #4]
8004e50: 69db ldr r3, [r3, #28]
8004e52: 2b00 cmp r3, #0
8004e54: d101 bne.n 8004e5a <HAL_RCC_OscConfig+0x29e>
{
return HAL_ERROR;
8004e56: 2301 movs r3, #1
8004e58: e278 b.n 800534c <HAL_RCC_OscConfig+0x790>
/* Check MSICalibrationValue and MSIClockRange input parameters */
assert_param(IS_RCC_MSICALIBRATION_VALUE(RCC_OscInitStruct->MSICalibrationValue));
assert_param(IS_RCC_MSI_CLOCK_RANGE(RCC_OscInitStruct->MSIClockRange));
/* Selects the Multiple Speed oscillator (MSI) clock range .*/
__HAL_RCC_MSI_RANGE_CONFIG(RCC_OscInitStruct->MSIClockRange);
8004e5a: 4a27 ldr r2, [pc, #156] ; (8004ef8 <HAL_RCC_OscConfig+0x33c>)
8004e5c: 4b26 ldr r3, [pc, #152] ; (8004ef8 <HAL_RCC_OscConfig+0x33c>)
8004e5e: 685b ldr r3, [r3, #4]
8004e60: 492c ldr r1, [pc, #176] ; (8004f14 <HAL_RCC_OscConfig+0x358>)
8004e62: 4019 ands r1, r3
8004e64: 687b ldr r3, [r7, #4]
8004e66: 6a5b ldr r3, [r3, #36] ; 0x24
8004e68: 430b orrs r3, r1
8004e6a: 6053 str r3, [r2, #4]
/* Adjusts the Multiple Speed oscillator (MSI) calibration value.*/
__HAL_RCC_MSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->MSICalibrationValue);
8004e6c: 4a22 ldr r2, [pc, #136] ; (8004ef8 <HAL_RCC_OscConfig+0x33c>)
8004e6e: 4b22 ldr r3, [pc, #136] ; (8004ef8 <HAL_RCC_OscConfig+0x33c>)
8004e70: 685b ldr r3, [r3, #4]
8004e72: 021b lsls r3, r3, #8
8004e74: 0a19 lsrs r1, r3, #8
8004e76: 687b ldr r3, [r7, #4]
8004e78: 6a1b ldr r3, [r3, #32]
8004e7a: 061b lsls r3, r3, #24
8004e7c: 430b orrs r3, r1
8004e7e: 6053 str r3, [r2, #4]
/* Update the SystemCoreClock global variable */
SystemCoreClock = (32768U * (1UL << ((RCC_OscInitStruct->MSIClockRange >> RCC_ICSCR_MSIRANGE_Pos) + 1U)))
8004e80: 687b ldr r3, [r7, #4]
8004e82: 6a5b ldr r3, [r3, #36] ; 0x24
8004e84: 0b5b lsrs r3, r3, #13
8004e86: 3301 adds r3, #1
8004e88: 2280 movs r2, #128 ; 0x80
8004e8a: 0212 lsls r2, r2, #8
8004e8c: 409a lsls r2, r3
>> AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> RCC_CFGR_HPRE_Pos)];
8004e8e: 4b1a ldr r3, [pc, #104] ; (8004ef8 <HAL_RCC_OscConfig+0x33c>)
8004e90: 68db ldr r3, [r3, #12]
8004e92: 091b lsrs r3, r3, #4
8004e94: 210f movs r1, #15
8004e96: 400b ands r3, r1
8004e98: 491b ldr r1, [pc, #108] ; (8004f08 <HAL_RCC_OscConfig+0x34c>)
8004e9a: 5ccb ldrb r3, [r1, r3]
8004e9c: 40da lsrs r2, r3
SystemCoreClock = (32768U * (1UL << ((RCC_OscInitStruct->MSIClockRange >> RCC_ICSCR_MSIRANGE_Pos) + 1U)))
8004e9e: 4b1b ldr r3, [pc, #108] ; (8004f0c <HAL_RCC_OscConfig+0x350>)
8004ea0: 601a str r2, [r3, #0]
/* Configure the source of time base considering new system clocks settings*/
status = HAL_InitTick (uwTickPrio);
8004ea2: 4b1b ldr r3, [pc, #108] ; (8004f10 <HAL_RCC_OscConfig+0x354>)
8004ea4: 681b ldr r3, [r3, #0]
8004ea6: 2213 movs r2, #19
8004ea8: 18bc adds r4, r7, r2
8004eaa: 0018 movs r0, r3
8004eac: f7ff f816 bl 8003edc <HAL_InitTick>
8004eb0: 0003 movs r3, r0
8004eb2: 7023 strb r3, [r4, #0]
if(status != HAL_OK)
8004eb4: 2313 movs r3, #19
8004eb6: 18fb adds r3, r7, r3
8004eb8: 781b ldrb r3, [r3, #0]
8004eba: 2b00 cmp r3, #0
8004ebc: d060 beq.n 8004f80 <HAL_RCC_OscConfig+0x3c4>
{
return status;
8004ebe: 2313 movs r3, #19
8004ec0: 18fb adds r3, r7, r3
8004ec2: 781b ldrb r3, [r3, #0]
8004ec4: e242 b.n 800534c <HAL_RCC_OscConfig+0x790>
{
/* Check MSI State */
assert_param(IS_RCC_MSI(RCC_OscInitStruct->MSIState));
/* Check the MSI State */
if(RCC_OscInitStruct->MSIState != RCC_MSI_OFF)
8004ec6: 687b ldr r3, [r7, #4]
8004ec8: 69db ldr r3, [r3, #28]
8004eca: 2b00 cmp r3, #0
8004ecc: d03e beq.n 8004f4c <HAL_RCC_OscConfig+0x390>
{
/* Enable the Multi Speed oscillator (MSI). */
__HAL_RCC_MSI_ENABLE();
8004ece: 4b0a ldr r3, [pc, #40] ; (8004ef8 <HAL_RCC_OscConfig+0x33c>)
8004ed0: 4a09 ldr r2, [pc, #36] ; (8004ef8 <HAL_RCC_OscConfig+0x33c>)
8004ed2: 6812 ldr r2, [r2, #0]
8004ed4: 2180 movs r1, #128 ; 0x80
8004ed6: 0049 lsls r1, r1, #1
8004ed8: 430a orrs r2, r1
8004eda: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
8004edc: f7ff f844 bl 8003f68 <HAL_GetTick>
8004ee0: 0003 movs r3, r0
8004ee2: 617b str r3, [r7, #20]
/* Wait till MSI is ready */
while(__HAL_RCC_GET_FLAG(RCC_FLAG_MSIRDY) == 0U)
8004ee4: e018 b.n 8004f18 <HAL_RCC_OscConfig+0x35c>
{
if((HAL_GetTick() - tickstart) > MSI_TIMEOUT_VALUE)
8004ee6: f7ff f83f bl 8003f68 <HAL_GetTick>
8004eea: 0002 movs r2, r0
8004eec: 697b ldr r3, [r7, #20]
8004eee: 1ad3 subs r3, r2, r3
8004ef0: 2b02 cmp r3, #2
8004ef2: d911 bls.n 8004f18 <HAL_RCC_OscConfig+0x35c>
{
return HAL_TIMEOUT;
8004ef4: 2303 movs r3, #3
8004ef6: e229 b.n 800534c <HAL_RCC_OscConfig+0x790>
8004ef8: 40021000 .word 0x40021000
8004efc: fffeffff .word 0xfffeffff
8004f00: fffbffff .word 0xfffbffff
8004f04: ffffe0ff .word 0xffffe0ff
8004f08: 0800720c .word 0x0800720c
8004f0c: 20000000 .word 0x20000000
8004f10: 20000008 .word 0x20000008
8004f14: ffff1fff .word 0xffff1fff
while(__HAL_RCC_GET_FLAG(RCC_FLAG_MSIRDY) == 0U)
8004f18: 4bca ldr r3, [pc, #808] ; (8005244 <HAL_RCC_OscConfig+0x688>)
8004f1a: 681a ldr r2, [r3, #0]
8004f1c: 2380 movs r3, #128 ; 0x80
8004f1e: 009b lsls r3, r3, #2
8004f20: 4013 ands r3, r2
8004f22: d0e0 beq.n 8004ee6 <HAL_RCC_OscConfig+0x32a>
/* Check MSICalibrationValue and MSIClockRange input parameters */
assert_param(IS_RCC_MSICALIBRATION_VALUE(RCC_OscInitStruct->MSICalibrationValue));
assert_param(IS_RCC_MSI_CLOCK_RANGE(RCC_OscInitStruct->MSIClockRange));
/* Selects the Multiple Speed oscillator (MSI) clock range .*/
__HAL_RCC_MSI_RANGE_CONFIG(RCC_OscInitStruct->MSIClockRange);
8004f24: 4ac7 ldr r2, [pc, #796] ; (8005244 <HAL_RCC_OscConfig+0x688>)
8004f26: 4bc7 ldr r3, [pc, #796] ; (8005244 <HAL_RCC_OscConfig+0x688>)
8004f28: 685b ldr r3, [r3, #4]
8004f2a: 49c7 ldr r1, [pc, #796] ; (8005248 <HAL_RCC_OscConfig+0x68c>)
8004f2c: 4019 ands r1, r3
8004f2e: 687b ldr r3, [r7, #4]
8004f30: 6a5b ldr r3, [r3, #36] ; 0x24
8004f32: 430b orrs r3, r1
8004f34: 6053 str r3, [r2, #4]
/* Adjusts the Multiple Speed oscillator (MSI) calibration value.*/
__HAL_RCC_MSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->MSICalibrationValue);
8004f36: 4ac3 ldr r2, [pc, #780] ; (8005244 <HAL_RCC_OscConfig+0x688>)
8004f38: 4bc2 ldr r3, [pc, #776] ; (8005244 <HAL_RCC_OscConfig+0x688>)
8004f3a: 685b ldr r3, [r3, #4]
8004f3c: 021b lsls r3, r3, #8
8004f3e: 0a19 lsrs r1, r3, #8
8004f40: 687b ldr r3, [r7, #4]
8004f42: 6a1b ldr r3, [r3, #32]
8004f44: 061b lsls r3, r3, #24
8004f46: 430b orrs r3, r1
8004f48: 6053 str r3, [r2, #4]
8004f4a: e019 b.n 8004f80 <HAL_RCC_OscConfig+0x3c4>
}
else
{
/* Disable the Multi Speed oscillator (MSI). */
__HAL_RCC_MSI_DISABLE();
8004f4c: 4bbd ldr r3, [pc, #756] ; (8005244 <HAL_RCC_OscConfig+0x688>)
8004f4e: 4abd ldr r2, [pc, #756] ; (8005244 <HAL_RCC_OscConfig+0x688>)
8004f50: 6812 ldr r2, [r2, #0]
8004f52: 49be ldr r1, [pc, #760] ; (800524c <HAL_RCC_OscConfig+0x690>)
8004f54: 400a ands r2, r1
8004f56: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
8004f58: f7ff f806 bl 8003f68 <HAL_GetTick>
8004f5c: 0003 movs r3, r0
8004f5e: 617b str r3, [r7, #20]
/* Wait till MSI is ready */
while(__HAL_RCC_GET_FLAG(RCC_FLAG_MSIRDY) != 0U)
8004f60: e008 b.n 8004f74 <HAL_RCC_OscConfig+0x3b8>
{
if((HAL_GetTick() - tickstart) > MSI_TIMEOUT_VALUE)
8004f62: f7ff f801 bl 8003f68 <HAL_GetTick>
8004f66: 0002 movs r2, r0
8004f68: 697b ldr r3, [r7, #20]
8004f6a: 1ad3 subs r3, r2, r3
8004f6c: 2b02 cmp r3, #2
8004f6e: d901 bls.n 8004f74 <HAL_RCC_OscConfig+0x3b8>
{
return HAL_TIMEOUT;
8004f70: 2303 movs r3, #3
8004f72: e1eb b.n 800534c <HAL_RCC_OscConfig+0x790>
while(__HAL_RCC_GET_FLAG(RCC_FLAG_MSIRDY) != 0U)
8004f74: 4bb3 ldr r3, [pc, #716] ; (8005244 <HAL_RCC_OscConfig+0x688>)
8004f76: 681a ldr r2, [r3, #0]
8004f78: 2380 movs r3, #128 ; 0x80
8004f7a: 009b lsls r3, r3, #2
8004f7c: 4013 ands r3, r2
8004f7e: d1f0 bne.n 8004f62 <HAL_RCC_OscConfig+0x3a6>
}
}
}
}
/*------------------------------ LSI Configuration -------------------------*/
if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI)
8004f80: 687b ldr r3, [r7, #4]
8004f82: 681b ldr r3, [r3, #0]
8004f84: 2208 movs r2, #8
8004f86: 4013 ands r3, r2
8004f88: d036 beq.n 8004ff8 <HAL_RCC_OscConfig+0x43c>
{
/* Check the parameters */
assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState));
/* Check the LSI State */
if(RCC_OscInitStruct->LSIState != RCC_LSI_OFF)
8004f8a: 687b ldr r3, [r7, #4]
8004f8c: 695b ldr r3, [r3, #20]
8004f8e: 2b00 cmp r3, #0
8004f90: d019 beq.n 8004fc6 <HAL_RCC_OscConfig+0x40a>
{
/* Enable the Internal Low Speed oscillator (LSI). */
__HAL_RCC_LSI_ENABLE();
8004f92: 4bac ldr r3, [pc, #688] ; (8005244 <HAL_RCC_OscConfig+0x688>)
8004f94: 4aab ldr r2, [pc, #684] ; (8005244 <HAL_RCC_OscConfig+0x688>)
8004f96: 6d12 ldr r2, [r2, #80] ; 0x50
8004f98: 2101 movs r1, #1
8004f9a: 430a orrs r2, r1
8004f9c: 651a str r2, [r3, #80] ; 0x50
/* Get Start Tick */
tickstart = HAL_GetTick();
8004f9e: f7fe ffe3 bl 8003f68 <HAL_GetTick>
8004fa2: 0003 movs r3, r0
8004fa4: 617b str r3, [r7, #20]
/* Wait till LSI is ready */
while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == 0U)
8004fa6: e008 b.n 8004fba <HAL_RCC_OscConfig+0x3fe>
{
if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE)
8004fa8: f7fe ffde bl 8003f68 <HAL_GetTick>
8004fac: 0002 movs r2, r0
8004fae: 697b ldr r3, [r7, #20]
8004fb0: 1ad3 subs r3, r2, r3
8004fb2: 2b02 cmp r3, #2
8004fb4: d901 bls.n 8004fba <HAL_RCC_OscConfig+0x3fe>
{
return HAL_TIMEOUT;
8004fb6: 2303 movs r3, #3
8004fb8: e1c8 b.n 800534c <HAL_RCC_OscConfig+0x790>
while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == 0U)
8004fba: 4ba2 ldr r3, [pc, #648] ; (8005244 <HAL_RCC_OscConfig+0x688>)
8004fbc: 6d1b ldr r3, [r3, #80] ; 0x50
8004fbe: 2202 movs r2, #2
8004fc0: 4013 ands r3, r2
8004fc2: d0f1 beq.n 8004fa8 <HAL_RCC_OscConfig+0x3ec>
8004fc4: e018 b.n 8004ff8 <HAL_RCC_OscConfig+0x43c>
}
}
else
{
/* Disable the Internal Low Speed oscillator (LSI). */
__HAL_RCC_LSI_DISABLE();
8004fc6: 4b9f ldr r3, [pc, #636] ; (8005244 <HAL_RCC_OscConfig+0x688>)
8004fc8: 4a9e ldr r2, [pc, #632] ; (8005244 <HAL_RCC_OscConfig+0x688>)
8004fca: 6d12 ldr r2, [r2, #80] ; 0x50
8004fcc: 2101 movs r1, #1
8004fce: 438a bics r2, r1
8004fd0: 651a str r2, [r3, #80] ; 0x50
/* Get Start Tick */
tickstart = HAL_GetTick();
8004fd2: f7fe ffc9 bl 8003f68 <HAL_GetTick>
8004fd6: 0003 movs r3, r0
8004fd8: 617b str r3, [r7, #20]
/* Wait till LSI is disabled */
while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != 0U)
8004fda: e008 b.n 8004fee <HAL_RCC_OscConfig+0x432>
{
if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE)
8004fdc: f7fe ffc4 bl 8003f68 <HAL_GetTick>
8004fe0: 0002 movs r2, r0
8004fe2: 697b ldr r3, [r7, #20]
8004fe4: 1ad3 subs r3, r2, r3
8004fe6: 2b02 cmp r3, #2
8004fe8: d901 bls.n 8004fee <HAL_RCC_OscConfig+0x432>
{
return HAL_TIMEOUT;
8004fea: 2303 movs r3, #3
8004fec: e1ae b.n 800534c <HAL_RCC_OscConfig+0x790>
while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != 0U)
8004fee: 4b95 ldr r3, [pc, #596] ; (8005244 <HAL_RCC_OscConfig+0x688>)
8004ff0: 6d1b ldr r3, [r3, #80] ; 0x50
8004ff2: 2202 movs r2, #2
8004ff4: 4013 ands r3, r2
8004ff6: d1f1 bne.n 8004fdc <HAL_RCC_OscConfig+0x420>
}
}
}
}
/*------------------------------ LSE Configuration -------------------------*/
if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE)
8004ff8: 687b ldr r3, [r7, #4]
8004ffa: 681b ldr r3, [r3, #0]
8004ffc: 2204 movs r2, #4
8004ffe: 4013 ands r3, r2
8005000: d100 bne.n 8005004 <HAL_RCC_OscConfig+0x448>
8005002: e0af b.n 8005164 <HAL_RCC_OscConfig+0x5a8>
{
FlagStatus pwrclkchanged = RESET;
8005004: 2323 movs r3, #35 ; 0x23
8005006: 18fb adds r3, r7, r3
8005008: 2200 movs r2, #0
800500a: 701a strb r2, [r3, #0]
/* Check the parameters */
assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState));
/* Update LSE configuration in Backup Domain control register */
/* Requires to enable write access to Backup Domain of necessary */
if(__HAL_RCC_PWR_IS_CLK_DISABLED())
800500c: 4b8d ldr r3, [pc, #564] ; (8005244 <HAL_RCC_OscConfig+0x688>)
800500e: 6b9a ldr r2, [r3, #56] ; 0x38
8005010: 2380 movs r3, #128 ; 0x80
8005012: 055b lsls r3, r3, #21
8005014: 4013 ands r3, r2
8005016: d10a bne.n 800502e <HAL_RCC_OscConfig+0x472>
{
__HAL_RCC_PWR_CLK_ENABLE();
8005018: 4b8a ldr r3, [pc, #552] ; (8005244 <HAL_RCC_OscConfig+0x688>)
800501a: 4a8a ldr r2, [pc, #552] ; (8005244 <HAL_RCC_OscConfig+0x688>)
800501c: 6b92 ldr r2, [r2, #56] ; 0x38
800501e: 2180 movs r1, #128 ; 0x80
8005020: 0549 lsls r1, r1, #21
8005022: 430a orrs r2, r1
8005024: 639a str r2, [r3, #56] ; 0x38
pwrclkchanged = SET;
8005026: 2323 movs r3, #35 ; 0x23
8005028: 18fb adds r3, r7, r3
800502a: 2201 movs r2, #1
800502c: 701a strb r2, [r3, #0]
}
if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
800502e: 4b88 ldr r3, [pc, #544] ; (8005250 <HAL_RCC_OscConfig+0x694>)
8005030: 681a ldr r2, [r3, #0]
8005032: 2380 movs r3, #128 ; 0x80
8005034: 005b lsls r3, r3, #1
8005036: 4013 ands r3, r2
8005038: d11a bne.n 8005070 <HAL_RCC_OscConfig+0x4b4>
{
/* Enable write access to Backup domain */
SET_BIT(PWR->CR, PWR_CR_DBP);
800503a: 4b85 ldr r3, [pc, #532] ; (8005250 <HAL_RCC_OscConfig+0x694>)
800503c: 4a84 ldr r2, [pc, #528] ; (8005250 <HAL_RCC_OscConfig+0x694>)
800503e: 6812 ldr r2, [r2, #0]
8005040: 2180 movs r1, #128 ; 0x80
8005042: 0049 lsls r1, r1, #1
8005044: 430a orrs r2, r1
8005046: 601a str r2, [r3, #0]
/* Wait for Backup domain Write protection disable */
tickstart = HAL_GetTick();
8005048: f7fe ff8e bl 8003f68 <HAL_GetTick>
800504c: 0003 movs r3, r0
800504e: 617b str r3, [r7, #20]
while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
8005050: e008 b.n 8005064 <HAL_RCC_OscConfig+0x4a8>
{
if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
8005052: f7fe ff89 bl 8003f68 <HAL_GetTick>
8005056: 0002 movs r2, r0
8005058: 697b ldr r3, [r7, #20]
800505a: 1ad3 subs r3, r2, r3
800505c: 2b64 cmp r3, #100 ; 0x64
800505e: d901 bls.n 8005064 <HAL_RCC_OscConfig+0x4a8>
{
return HAL_TIMEOUT;
8005060: 2303 movs r3, #3
8005062: e173 b.n 800534c <HAL_RCC_OscConfig+0x790>
while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
8005064: 4b7a ldr r3, [pc, #488] ; (8005250 <HAL_RCC_OscConfig+0x694>)
8005066: 681a ldr r2, [r3, #0]
8005068: 2380 movs r3, #128 ; 0x80
800506a: 005b lsls r3, r3, #1
800506c: 4013 ands r3, r2
800506e: d0f0 beq.n 8005052 <HAL_RCC_OscConfig+0x496>
}
}
}
/* Set the new LSE configuration -----------------------------------------*/
__HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
8005070: 687b ldr r3, [r7, #4]
8005072: 689a ldr r2, [r3, #8]
8005074: 2380 movs r3, #128 ; 0x80
8005076: 005b lsls r3, r3, #1
8005078: 429a cmp r2, r3
800507a: d107 bne.n 800508c <HAL_RCC_OscConfig+0x4d0>
800507c: 4b71 ldr r3, [pc, #452] ; (8005244 <HAL_RCC_OscConfig+0x688>)
800507e: 4a71 ldr r2, [pc, #452] ; (8005244 <HAL_RCC_OscConfig+0x688>)
8005080: 6d12 ldr r2, [r2, #80] ; 0x50
8005082: 2180 movs r1, #128 ; 0x80
8005084: 0049 lsls r1, r1, #1
8005086: 430a orrs r2, r1
8005088: 651a str r2, [r3, #80] ; 0x50
800508a: e031 b.n 80050f0 <HAL_RCC_OscConfig+0x534>
800508c: 687b ldr r3, [r7, #4]
800508e: 689b ldr r3, [r3, #8]
8005090: 2b00 cmp r3, #0
8005092: d10c bne.n 80050ae <HAL_RCC_OscConfig+0x4f2>
8005094: 4b6b ldr r3, [pc, #428] ; (8005244 <HAL_RCC_OscConfig+0x688>)
8005096: 4a6b ldr r2, [pc, #428] ; (8005244 <HAL_RCC_OscConfig+0x688>)
8005098: 6d12 ldr r2, [r2, #80] ; 0x50
800509a: 496c ldr r1, [pc, #432] ; (800524c <HAL_RCC_OscConfig+0x690>)
800509c: 400a ands r2, r1
800509e: 651a str r2, [r3, #80] ; 0x50
80050a0: 4b68 ldr r3, [pc, #416] ; (8005244 <HAL_RCC_OscConfig+0x688>)
80050a2: 4a68 ldr r2, [pc, #416] ; (8005244 <HAL_RCC_OscConfig+0x688>)
80050a4: 6d12 ldr r2, [r2, #80] ; 0x50
80050a6: 496b ldr r1, [pc, #428] ; (8005254 <HAL_RCC_OscConfig+0x698>)
80050a8: 400a ands r2, r1
80050aa: 651a str r2, [r3, #80] ; 0x50
80050ac: e020 b.n 80050f0 <HAL_RCC_OscConfig+0x534>
80050ae: 687b ldr r3, [r7, #4]
80050b0: 689a ldr r2, [r3, #8]
80050b2: 23a0 movs r3, #160 ; 0xa0
80050b4: 00db lsls r3, r3, #3
80050b6: 429a cmp r2, r3
80050b8: d10e bne.n 80050d8 <HAL_RCC_OscConfig+0x51c>
80050ba: 4b62 ldr r3, [pc, #392] ; (8005244 <HAL_RCC_OscConfig+0x688>)
80050bc: 4a61 ldr r2, [pc, #388] ; (8005244 <HAL_RCC_OscConfig+0x688>)
80050be: 6d12 ldr r2, [r2, #80] ; 0x50
80050c0: 2180 movs r1, #128 ; 0x80
80050c2: 00c9 lsls r1, r1, #3
80050c4: 430a orrs r2, r1
80050c6: 651a str r2, [r3, #80] ; 0x50
80050c8: 4b5e ldr r3, [pc, #376] ; (8005244 <HAL_RCC_OscConfig+0x688>)
80050ca: 4a5e ldr r2, [pc, #376] ; (8005244 <HAL_RCC_OscConfig+0x688>)
80050cc: 6d12 ldr r2, [r2, #80] ; 0x50
80050ce: 2180 movs r1, #128 ; 0x80
80050d0: 0049 lsls r1, r1, #1
80050d2: 430a orrs r2, r1
80050d4: 651a str r2, [r3, #80] ; 0x50
80050d6: e00b b.n 80050f0 <HAL_RCC_OscConfig+0x534>
80050d8: 4b5a ldr r3, [pc, #360] ; (8005244 <HAL_RCC_OscConfig+0x688>)
80050da: 4a5a ldr r2, [pc, #360] ; (8005244 <HAL_RCC_OscConfig+0x688>)
80050dc: 6d12 ldr r2, [r2, #80] ; 0x50
80050de: 495b ldr r1, [pc, #364] ; (800524c <HAL_RCC_OscConfig+0x690>)
80050e0: 400a ands r2, r1
80050e2: 651a str r2, [r3, #80] ; 0x50
80050e4: 4b57 ldr r3, [pc, #348] ; (8005244 <HAL_RCC_OscConfig+0x688>)
80050e6: 4a57 ldr r2, [pc, #348] ; (8005244 <HAL_RCC_OscConfig+0x688>)
80050e8: 6d12 ldr r2, [r2, #80] ; 0x50
80050ea: 495a ldr r1, [pc, #360] ; (8005254 <HAL_RCC_OscConfig+0x698>)
80050ec: 400a ands r2, r1
80050ee: 651a str r2, [r3, #80] ; 0x50
/* Check the LSE State */
if(RCC_OscInitStruct->LSEState != RCC_LSE_OFF)
80050f0: 687b ldr r3, [r7, #4]
80050f2: 689b ldr r3, [r3, #8]
80050f4: 2b00 cmp r3, #0
80050f6: d015 beq.n 8005124 <HAL_RCC_OscConfig+0x568>
{
/* Get Start Tick */
tickstart = HAL_GetTick();
80050f8: f7fe ff36 bl 8003f68 <HAL_GetTick>
80050fc: 0003 movs r3, r0
80050fe: 617b str r3, [r7, #20]
/* Wait till LSE is ready */
while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == 0U)
8005100: e009 b.n 8005116 <HAL_RCC_OscConfig+0x55a>
{
if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
8005102: f7fe ff31 bl 8003f68 <HAL_GetTick>
8005106: 0002 movs r2, r0
8005108: 697b ldr r3, [r7, #20]
800510a: 1ad3 subs r3, r2, r3
800510c: 4a52 ldr r2, [pc, #328] ; (8005258 <HAL_RCC_OscConfig+0x69c>)
800510e: 4293 cmp r3, r2
8005110: d901 bls.n 8005116 <HAL_RCC_OscConfig+0x55a>
{
return HAL_TIMEOUT;
8005112: 2303 movs r3, #3
8005114: e11a b.n 800534c <HAL_RCC_OscConfig+0x790>
while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == 0U)
8005116: 4b4b ldr r3, [pc, #300] ; (8005244 <HAL_RCC_OscConfig+0x688>)
8005118: 6d1a ldr r2, [r3, #80] ; 0x50
800511a: 2380 movs r3, #128 ; 0x80
800511c: 009b lsls r3, r3, #2
800511e: 4013 ands r3, r2
8005120: d0ef beq.n 8005102 <HAL_RCC_OscConfig+0x546>
8005122: e014 b.n 800514e <HAL_RCC_OscConfig+0x592>
}
}
else
{
/* Get Start Tick */
tickstart = HAL_GetTick();
8005124: f7fe ff20 bl 8003f68 <HAL_GetTick>
8005128: 0003 movs r3, r0
800512a: 617b str r3, [r7, #20]
/* Wait till LSE is disabled */
while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != 0U)
800512c: e009 b.n 8005142 <HAL_RCC_OscConfig+0x586>
{
if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
800512e: f7fe ff1b bl 8003f68 <HAL_GetTick>
8005132: 0002 movs r2, r0
8005134: 697b ldr r3, [r7, #20]
8005136: 1ad3 subs r3, r2, r3
8005138: 4a47 ldr r2, [pc, #284] ; (8005258 <HAL_RCC_OscConfig+0x69c>)
800513a: 4293 cmp r3, r2
800513c: d901 bls.n 8005142 <HAL_RCC_OscConfig+0x586>
{
return HAL_TIMEOUT;
800513e: 2303 movs r3, #3
8005140: e104 b.n 800534c <HAL_RCC_OscConfig+0x790>
while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != 0U)
8005142: 4b40 ldr r3, [pc, #256] ; (8005244 <HAL_RCC_OscConfig+0x688>)
8005144: 6d1a ldr r2, [r3, #80] ; 0x50
8005146: 2380 movs r3, #128 ; 0x80
8005148: 009b lsls r3, r3, #2
800514a: 4013 ands r3, r2
800514c: d1ef bne.n 800512e <HAL_RCC_OscConfig+0x572>
}
}
}
/* Require to disable power clock if necessary */
if(pwrclkchanged == SET)
800514e: 2323 movs r3, #35 ; 0x23
8005150: 18fb adds r3, r7, r3
8005152: 781b ldrb r3, [r3, #0]
8005154: 2b01 cmp r3, #1
8005156: d105 bne.n 8005164 <HAL_RCC_OscConfig+0x5a8>
{
__HAL_RCC_PWR_CLK_DISABLE();
8005158: 4b3a ldr r3, [pc, #232] ; (8005244 <HAL_RCC_OscConfig+0x688>)
800515a: 4a3a ldr r2, [pc, #232] ; (8005244 <HAL_RCC_OscConfig+0x688>)
800515c: 6b92 ldr r2, [r2, #56] ; 0x38
800515e: 493f ldr r1, [pc, #252] ; (800525c <HAL_RCC_OscConfig+0x6a0>)
8005160: 400a ands r2, r1
8005162: 639a str r2, [r3, #56] ; 0x38
}
}
#if defined(RCC_HSI48_SUPPORT)
/*----------------------------- HSI48 Configuration --------------------------*/
if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI48) == RCC_OSCILLATORTYPE_HSI48)
8005164: 687b ldr r3, [r7, #4]
8005166: 681b ldr r3, [r3, #0]
8005168: 2220 movs r2, #32
800516a: 4013 ands r3, r2
800516c: d049 beq.n 8005202 <HAL_RCC_OscConfig+0x646>
{
/* Check the parameters */
assert_param(IS_RCC_HSI48(RCC_OscInitStruct->HSI48State));
/* Check the HSI48 State */
if(RCC_OscInitStruct->HSI48State != RCC_HSI48_OFF)
800516e: 687b ldr r3, [r7, #4]
8005170: 699b ldr r3, [r3, #24]
8005172: 2b00 cmp r3, #0
8005174: d026 beq.n 80051c4 <HAL_RCC_OscConfig+0x608>
{
/* Enable the Internal High Speed oscillator (HSI48). */
__HAL_RCC_HSI48_ENABLE();
8005176: 4b33 ldr r3, [pc, #204] ; (8005244 <HAL_RCC_OscConfig+0x688>)
8005178: 4a32 ldr r2, [pc, #200] ; (8005244 <HAL_RCC_OscConfig+0x688>)
800517a: 6892 ldr r2, [r2, #8]
800517c: 2101 movs r1, #1
800517e: 430a orrs r2, r1
8005180: 609a str r2, [r3, #8]
8005182: 4b30 ldr r3, [pc, #192] ; (8005244 <HAL_RCC_OscConfig+0x688>)
8005184: 4a2f ldr r2, [pc, #188] ; (8005244 <HAL_RCC_OscConfig+0x688>)
8005186: 6b52 ldr r2, [r2, #52] ; 0x34
8005188: 2101 movs r1, #1
800518a: 430a orrs r2, r1
800518c: 635a str r2, [r3, #52] ; 0x34
800518e: 4b34 ldr r3, [pc, #208] ; (8005260 <HAL_RCC_OscConfig+0x6a4>)
8005190: 4a33 ldr r2, [pc, #204] ; (8005260 <HAL_RCC_OscConfig+0x6a4>)
8005192: 6a12 ldr r2, [r2, #32]
8005194: 2180 movs r1, #128 ; 0x80
8005196: 0189 lsls r1, r1, #6
8005198: 430a orrs r2, r1
800519a: 621a str r2, [r3, #32]
/* Get Start Tick */
tickstart = HAL_GetTick();
800519c: f7fe fee4 bl 8003f68 <HAL_GetTick>
80051a0: 0003 movs r3, r0
80051a2: 617b str r3, [r7, #20]
/* Wait till HSI48 is ready */
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSI48RDY) == 0U)
80051a4: e008 b.n 80051b8 <HAL_RCC_OscConfig+0x5fc>
{
if((HAL_GetTick() - tickstart) > HSI48_TIMEOUT_VALUE)
80051a6: f7fe fedf bl 8003f68 <HAL_GetTick>
80051aa: 0002 movs r2, r0
80051ac: 697b ldr r3, [r7, #20]
80051ae: 1ad3 subs r3, r2, r3
80051b0: 2b02 cmp r3, #2
80051b2: d901 bls.n 80051b8 <HAL_RCC_OscConfig+0x5fc>
{
return HAL_TIMEOUT;
80051b4: 2303 movs r3, #3
80051b6: e0c9 b.n 800534c <HAL_RCC_OscConfig+0x790>
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSI48RDY) == 0U)
80051b8: 4b22 ldr r3, [pc, #136] ; (8005244 <HAL_RCC_OscConfig+0x688>)
80051ba: 689b ldr r3, [r3, #8]
80051bc: 2202 movs r2, #2
80051be: 4013 ands r3, r2
80051c0: d0f1 beq.n 80051a6 <HAL_RCC_OscConfig+0x5ea>
80051c2: e01e b.n 8005202 <HAL_RCC_OscConfig+0x646>
}
}
else
{
/* Disable the Internal High Speed oscillator (HSI48). */
__HAL_RCC_HSI48_DISABLE();
80051c4: 4b1f ldr r3, [pc, #124] ; (8005244 <HAL_RCC_OscConfig+0x688>)
80051c6: 4a1f ldr r2, [pc, #124] ; (8005244 <HAL_RCC_OscConfig+0x688>)
80051c8: 6892 ldr r2, [r2, #8]
80051ca: 2101 movs r1, #1
80051cc: 438a bics r2, r1
80051ce: 609a str r2, [r3, #8]
80051d0: 4b23 ldr r3, [pc, #140] ; (8005260 <HAL_RCC_OscConfig+0x6a4>)
80051d2: 4a23 ldr r2, [pc, #140] ; (8005260 <HAL_RCC_OscConfig+0x6a4>)
80051d4: 6a12 ldr r2, [r2, #32]
80051d6: 4923 ldr r1, [pc, #140] ; (8005264 <HAL_RCC_OscConfig+0x6a8>)
80051d8: 400a ands r2, r1
80051da: 621a str r2, [r3, #32]
/* Get Start Tick */
tickstart = HAL_GetTick();
80051dc: f7fe fec4 bl 8003f68 <HAL_GetTick>
80051e0: 0003 movs r3, r0
80051e2: 617b str r3, [r7, #20]
/* Wait till HSI48 is ready */
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSI48RDY) != 0U)
80051e4: e008 b.n 80051f8 <HAL_RCC_OscConfig+0x63c>
{
if((HAL_GetTick() - tickstart) > HSI48_TIMEOUT_VALUE)
80051e6: f7fe febf bl 8003f68 <HAL_GetTick>
80051ea: 0002 movs r2, r0
80051ec: 697b ldr r3, [r7, #20]
80051ee: 1ad3 subs r3, r2, r3
80051f0: 2b02 cmp r3, #2
80051f2: d901 bls.n 80051f8 <HAL_RCC_OscConfig+0x63c>
{
return HAL_TIMEOUT;
80051f4: 2303 movs r3, #3
80051f6: e0a9 b.n 800534c <HAL_RCC_OscConfig+0x790>
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSI48RDY) != 0U)
80051f8: 4b12 ldr r3, [pc, #72] ; (8005244 <HAL_RCC_OscConfig+0x688>)
80051fa: 689b ldr r3, [r3, #8]
80051fc: 2202 movs r2, #2
80051fe: 4013 ands r3, r2
8005200: d1f1 bne.n 80051e6 <HAL_RCC_OscConfig+0x62a>
#endif /* RCC_HSI48_SUPPORT */
/*-------------------------------- PLL Configuration -----------------------*/
/* Check the parameters */
assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState));
if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE)
8005202: 687b ldr r3, [r7, #4]
8005204: 6a9b ldr r3, [r3, #40] ; 0x28
8005206: 2b00 cmp r3, #0
8005208: d100 bne.n 800520c <HAL_RCC_OscConfig+0x650>
800520a: e09e b.n 800534a <HAL_RCC_OscConfig+0x78e>
{
/* Check if the PLL is used as system clock or not */
if(sysclk_source != RCC_SYSCLKSOURCE_STATUS_PLLCLK)
800520c: 69fb ldr r3, [r7, #28]
800520e: 2b0c cmp r3, #12
8005210: d100 bne.n 8005214 <HAL_RCC_OscConfig+0x658>
8005212: e077 b.n 8005304 <HAL_RCC_OscConfig+0x748>
{
if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON)
8005214: 687b ldr r3, [r7, #4]
8005216: 6a9b ldr r3, [r3, #40] ; 0x28
8005218: 2b02 cmp r3, #2
800521a: d158 bne.n 80052ce <HAL_RCC_OscConfig+0x712>
assert_param(IS_RCC_PLLSOURCE(RCC_OscInitStruct->PLL.PLLSource));
assert_param(IS_RCC_PLL_MUL(RCC_OscInitStruct->PLL.PLLMUL));
assert_param(IS_RCC_PLL_DIV(RCC_OscInitStruct->PLL.PLLDIV));
/* Disable the main PLL. */
__HAL_RCC_PLL_DISABLE();
800521c: 4b09 ldr r3, [pc, #36] ; (8005244 <HAL_RCC_OscConfig+0x688>)
800521e: 4a09 ldr r2, [pc, #36] ; (8005244 <HAL_RCC_OscConfig+0x688>)
8005220: 6812 ldr r2, [r2, #0]
8005222: 4911 ldr r1, [pc, #68] ; (8005268 <HAL_RCC_OscConfig+0x6ac>)
8005224: 400a ands r2, r1
8005226: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
8005228: f7fe fe9e bl 8003f68 <HAL_GetTick>
800522c: 0003 movs r3, r0
800522e: 617b str r3, [r7, #20]
/* Wait till PLL is ready */
while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != 0U)
8005230: e01c b.n 800526c <HAL_RCC_OscConfig+0x6b0>
{
if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
8005232: f7fe fe99 bl 8003f68 <HAL_GetTick>
8005236: 0002 movs r2, r0
8005238: 697b ldr r3, [r7, #20]
800523a: 1ad3 subs r3, r2, r3
800523c: 2b02 cmp r3, #2
800523e: d915 bls.n 800526c <HAL_RCC_OscConfig+0x6b0>
{
return HAL_TIMEOUT;
8005240: 2303 movs r3, #3
8005242: e083 b.n 800534c <HAL_RCC_OscConfig+0x790>
8005244: 40021000 .word 0x40021000
8005248: ffff1fff .word 0xffff1fff
800524c: fffffeff .word 0xfffffeff
8005250: 40007000 .word 0x40007000
8005254: fffffbff .word 0xfffffbff
8005258: 00001388 .word 0x00001388
800525c: efffffff .word 0xefffffff
8005260: 40010000 .word 0x40010000
8005264: ffffdfff .word 0xffffdfff
8005268: feffffff .word 0xfeffffff
while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != 0U)
800526c: 4b39 ldr r3, [pc, #228] ; (8005354 <HAL_RCC_OscConfig+0x798>)
800526e: 681a ldr r2, [r3, #0]
8005270: 2380 movs r3, #128 ; 0x80
8005272: 049b lsls r3, r3, #18
8005274: 4013 ands r3, r2
8005276: d1dc bne.n 8005232 <HAL_RCC_OscConfig+0x676>
}
}
/* Configure the main PLL clock source, multiplication and division factors. */
__HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource,
8005278: 4a36 ldr r2, [pc, #216] ; (8005354 <HAL_RCC_OscConfig+0x798>)
800527a: 4b36 ldr r3, [pc, #216] ; (8005354 <HAL_RCC_OscConfig+0x798>)
800527c: 68db ldr r3, [r3, #12]
800527e: 4936 ldr r1, [pc, #216] ; (8005358 <HAL_RCC_OscConfig+0x79c>)
8005280: 4019 ands r1, r3
8005282: 687b ldr r3, [r7, #4]
8005284: 6ad8 ldr r0, [r3, #44] ; 0x2c
8005286: 687b ldr r3, [r7, #4]
8005288: 6b1b ldr r3, [r3, #48] ; 0x30
800528a: 4318 orrs r0, r3
800528c: 687b ldr r3, [r7, #4]
800528e: 6b5b ldr r3, [r3, #52] ; 0x34
8005290: 4303 orrs r3, r0
8005292: 430b orrs r3, r1
8005294: 60d3 str r3, [r2, #12]
RCC_OscInitStruct->PLL.PLLMUL,
RCC_OscInitStruct->PLL.PLLDIV);
/* Enable the main PLL. */
__HAL_RCC_PLL_ENABLE();
8005296: 4b2f ldr r3, [pc, #188] ; (8005354 <HAL_RCC_OscConfig+0x798>)
8005298: 4a2e ldr r2, [pc, #184] ; (8005354 <HAL_RCC_OscConfig+0x798>)
800529a: 6812 ldr r2, [r2, #0]
800529c: 2180 movs r1, #128 ; 0x80
800529e: 0449 lsls r1, r1, #17
80052a0: 430a orrs r2, r1
80052a2: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
80052a4: f7fe fe60 bl 8003f68 <HAL_GetTick>
80052a8: 0003 movs r3, r0
80052aa: 617b str r3, [r7, #20]
/* Wait till PLL is ready */
while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == 0U)
80052ac: e008 b.n 80052c0 <HAL_RCC_OscConfig+0x704>
{
if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
80052ae: f7fe fe5b bl 8003f68 <HAL_GetTick>
80052b2: 0002 movs r2, r0
80052b4: 697b ldr r3, [r7, #20]
80052b6: 1ad3 subs r3, r2, r3
80052b8: 2b02 cmp r3, #2
80052ba: d901 bls.n 80052c0 <HAL_RCC_OscConfig+0x704>
{
return HAL_TIMEOUT;
80052bc: 2303 movs r3, #3
80052be: e045 b.n 800534c <HAL_RCC_OscConfig+0x790>
while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == 0U)
80052c0: 4b24 ldr r3, [pc, #144] ; (8005354 <HAL_RCC_OscConfig+0x798>)
80052c2: 681a ldr r2, [r3, #0]
80052c4: 2380 movs r3, #128 ; 0x80
80052c6: 049b lsls r3, r3, #18
80052c8: 4013 ands r3, r2
80052ca: d0f0 beq.n 80052ae <HAL_RCC_OscConfig+0x6f2>
80052cc: e03d b.n 800534a <HAL_RCC_OscConfig+0x78e>
}
}
else
{
/* Disable the main PLL. */
__HAL_RCC_PLL_DISABLE();
80052ce: 4b21 ldr r3, [pc, #132] ; (8005354 <HAL_RCC_OscConfig+0x798>)
80052d0: 4a20 ldr r2, [pc, #128] ; (8005354 <HAL_RCC_OscConfig+0x798>)
80052d2: 6812 ldr r2, [r2, #0]
80052d4: 4921 ldr r1, [pc, #132] ; (800535c <HAL_RCC_OscConfig+0x7a0>)
80052d6: 400a ands r2, r1
80052d8: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
80052da: f7fe fe45 bl 8003f68 <HAL_GetTick>
80052de: 0003 movs r3, r0
80052e0: 617b str r3, [r7, #20]
/* Wait till PLL is disabled */
while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != 0U)
80052e2: e008 b.n 80052f6 <HAL_RCC_OscConfig+0x73a>
{
if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
80052e4: f7fe fe40 bl 8003f68 <HAL_GetTick>
80052e8: 0002 movs r2, r0
80052ea: 697b ldr r3, [r7, #20]
80052ec: 1ad3 subs r3, r2, r3
80052ee: 2b02 cmp r3, #2
80052f0: d901 bls.n 80052f6 <HAL_RCC_OscConfig+0x73a>
{
return HAL_TIMEOUT;
80052f2: 2303 movs r3, #3
80052f4: e02a b.n 800534c <HAL_RCC_OscConfig+0x790>
while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != 0U)
80052f6: 4b17 ldr r3, [pc, #92] ; (8005354 <HAL_RCC_OscConfig+0x798>)
80052f8: 681a ldr r2, [r3, #0]
80052fa: 2380 movs r3, #128 ; 0x80
80052fc: 049b lsls r3, r3, #18
80052fe: 4013 ands r3, r2
8005300: d1f0 bne.n 80052e4 <HAL_RCC_OscConfig+0x728>
8005302: e022 b.n 800534a <HAL_RCC_OscConfig+0x78e>
}
}
else
{
/* Check if there is a request to disable the PLL used as System clock source */
if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF)
8005304: 687b ldr r3, [r7, #4]
8005306: 6a9b ldr r3, [r3, #40] ; 0x28
8005308: 2b01 cmp r3, #1
800530a: d101 bne.n 8005310 <HAL_RCC_OscConfig+0x754>
{
return HAL_ERROR;
800530c: 2301 movs r3, #1
800530e: e01d b.n 800534c <HAL_RCC_OscConfig+0x790>
}
else
{
/* Do not return HAL_ERROR if request repeats the current configuration */
pll_config = RCC->CFGR;
8005310: 4b10 ldr r3, [pc, #64] ; (8005354 <HAL_RCC_OscConfig+0x798>)
8005312: 68db ldr r3, [r3, #12]
8005314: 61bb str r3, [r7, #24]
if((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
8005316: 69ba ldr r2, [r7, #24]
8005318: 2380 movs r3, #128 ; 0x80
800531a: 025b lsls r3, r3, #9
800531c: 401a ands r2, r3
800531e: 687b ldr r3, [r7, #4]
8005320: 6adb ldr r3, [r3, #44] ; 0x2c
8005322: 429a cmp r2, r3
8005324: d10f bne.n 8005346 <HAL_RCC_OscConfig+0x78a>
(READ_BIT(pll_config, RCC_CFGR_PLLMUL) != RCC_OscInitStruct->PLL.PLLMUL) ||
8005326: 69ba ldr r2, [r7, #24]
8005328: 23f0 movs r3, #240 ; 0xf0
800532a: 039b lsls r3, r3, #14
800532c: 401a ands r2, r3
800532e: 687b ldr r3, [r7, #4]
8005330: 6b1b ldr r3, [r3, #48] ; 0x30
if((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
8005332: 429a cmp r2, r3
8005334: d107 bne.n 8005346 <HAL_RCC_OscConfig+0x78a>
(READ_BIT(pll_config, RCC_CFGR_PLLDIV) != RCC_OscInitStruct->PLL.PLLDIV))
8005336: 69ba ldr r2, [r7, #24]
8005338: 23c0 movs r3, #192 ; 0xc0
800533a: 041b lsls r3, r3, #16
800533c: 401a ands r2, r3
800533e: 687b ldr r3, [r7, #4]
8005340: 6b5b ldr r3, [r3, #52] ; 0x34
(READ_BIT(pll_config, RCC_CFGR_PLLMUL) != RCC_OscInitStruct->PLL.PLLMUL) ||
8005342: 429a cmp r2, r3
8005344: d001 beq.n 800534a <HAL_RCC_OscConfig+0x78e>
{
return HAL_ERROR;
8005346: 2301 movs r3, #1
8005348: e000 b.n 800534c <HAL_RCC_OscConfig+0x790>
}
}
}
}
return HAL_OK;
800534a: 2300 movs r3, #0
}
800534c: 0018 movs r0, r3
800534e: 46bd mov sp, r7
8005350: b00b add sp, #44 ; 0x2c
8005352: bd90 pop {r4, r7, pc}
8005354: 40021000 .word 0x40021000
8005358: ff02ffff .word 0xff02ffff
800535c: feffffff .word 0xfeffffff
08005360 <HAL_RCC_ClockConfig>:
* HPRE[3:0] bits to ensure that HCLK not exceed the maximum allowed frequency
* (for more details refer to section above "Initialization/de-initialization functions")
* @retval HAL status
*/
HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency)
{
8005360: b590 push {r4, r7, lr}
8005362: b085 sub sp, #20
8005364: af00 add r7, sp, #0
8005366: 6078 str r0, [r7, #4]
8005368: 6039 str r1, [r7, #0]
uint32_t tickstart;
HAL_StatusTypeDef status;
/* Check Null pointer */
if(RCC_ClkInitStruct == NULL)
800536a: 687b ldr r3, [r7, #4]
800536c: 2b00 cmp r3, #0
800536e: d101 bne.n 8005374 <HAL_RCC_ClockConfig+0x14>
{
return HAL_ERROR;
8005370: 2301 movs r3, #1
8005372: e128 b.n 80055c6 <HAL_RCC_ClockConfig+0x266>
/* To correctly read data from FLASH memory, the number of wait states (LATENCY)
must be correctly programmed according to the frequency of the CPU clock
(HCLK) and the supply voltage of the device. */
/* Increasing the number of wait states because of higher CPU frequency */
if(FLatency > __HAL_FLASH_GET_LATENCY())
8005374: 4b96 ldr r3, [pc, #600] ; (80055d0 <HAL_RCC_ClockConfig+0x270>)
8005376: 681b ldr r3, [r3, #0]
8005378: 2201 movs r2, #1
800537a: 401a ands r2, r3
800537c: 683b ldr r3, [r7, #0]
800537e: 429a cmp r2, r3
8005380: d21e bcs.n 80053c0 <HAL_RCC_ClockConfig+0x60>
{
/* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
__HAL_FLASH_SET_LATENCY(FLatency);
8005382: 4b93 ldr r3, [pc, #588] ; (80055d0 <HAL_RCC_ClockConfig+0x270>)
8005384: 4a92 ldr r2, [pc, #584] ; (80055d0 <HAL_RCC_ClockConfig+0x270>)
8005386: 6812 ldr r2, [r2, #0]
8005388: 2101 movs r1, #1
800538a: 438a bics r2, r1
800538c: 0011 movs r1, r2
800538e: 683a ldr r2, [r7, #0]
8005390: 430a orrs r2, r1
8005392: 601a str r2, [r3, #0]
/* Check that the new number of wait states is taken into account to access the Flash
memory by polling the FLASH_ACR register */
tickstart = HAL_GetTick();
8005394: f7fe fde8 bl 8003f68 <HAL_GetTick>
8005398: 0003 movs r3, r0
800539a: 60fb str r3, [r7, #12]
while (__HAL_FLASH_GET_LATENCY() != FLatency)
800539c: e009 b.n 80053b2 <HAL_RCC_ClockConfig+0x52>
{
if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE)
800539e: f7fe fde3 bl 8003f68 <HAL_GetTick>
80053a2: 0002 movs r2, r0
80053a4: 68fb ldr r3, [r7, #12]
80053a6: 1ad3 subs r3, r2, r3
80053a8: 4a8a ldr r2, [pc, #552] ; (80055d4 <HAL_RCC_ClockConfig+0x274>)
80053aa: 4293 cmp r3, r2
80053ac: d901 bls.n 80053b2 <HAL_RCC_ClockConfig+0x52>
{
return HAL_TIMEOUT;
80053ae: 2303 movs r3, #3
80053b0: e109 b.n 80055c6 <HAL_RCC_ClockConfig+0x266>
while (__HAL_FLASH_GET_LATENCY() != FLatency)
80053b2: 4b87 ldr r3, [pc, #540] ; (80055d0 <HAL_RCC_ClockConfig+0x270>)
80053b4: 681b ldr r3, [r3, #0]
80053b6: 2201 movs r2, #1
80053b8: 401a ands r2, r3
80053ba: 683b ldr r3, [r7, #0]
80053bc: 429a cmp r2, r3
80053be: d1ee bne.n 800539e <HAL_RCC_ClockConfig+0x3e>
}
}
}
/*-------------------------- HCLK Configuration --------------------------*/
if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK)
80053c0: 687b ldr r3, [r7, #4]
80053c2: 681b ldr r3, [r3, #0]
80053c4: 2202 movs r2, #2
80053c6: 4013 ands r3, r2
80053c8: d009 beq.n 80053de <HAL_RCC_ClockConfig+0x7e>
{
assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider));
MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider);
80053ca: 4a83 ldr r2, [pc, #524] ; (80055d8 <HAL_RCC_ClockConfig+0x278>)
80053cc: 4b82 ldr r3, [pc, #520] ; (80055d8 <HAL_RCC_ClockConfig+0x278>)
80053ce: 68db ldr r3, [r3, #12]
80053d0: 21f0 movs r1, #240 ; 0xf0
80053d2: 438b bics r3, r1
80053d4: 0019 movs r1, r3
80053d6: 687b ldr r3, [r7, #4]
80053d8: 689b ldr r3, [r3, #8]
80053da: 430b orrs r3, r1
80053dc: 60d3 str r3, [r2, #12]
}
/*------------------------- SYSCLK Configuration ---------------------------*/
if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK)
80053de: 687b ldr r3, [r7, #4]
80053e0: 681b ldr r3, [r3, #0]
80053e2: 2201 movs r2, #1
80053e4: 4013 ands r3, r2
80053e6: d100 bne.n 80053ea <HAL_RCC_ClockConfig+0x8a>
80053e8: e089 b.n 80054fe <HAL_RCC_ClockConfig+0x19e>
{
assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource));
/* HSE is selected as System Clock Source */
if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
80053ea: 687b ldr r3, [r7, #4]
80053ec: 685b ldr r3, [r3, #4]
80053ee: 2b02 cmp r3, #2
80053f0: d107 bne.n 8005402 <HAL_RCC_ClockConfig+0xa2>
{
/* Check the HSE ready flag */
if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == 0U)
80053f2: 4b79 ldr r3, [pc, #484] ; (80055d8 <HAL_RCC_ClockConfig+0x278>)
80053f4: 681a ldr r2, [r3, #0]
80053f6: 2380 movs r3, #128 ; 0x80
80053f8: 029b lsls r3, r3, #10
80053fa: 4013 ands r3, r2
80053fc: d120 bne.n 8005440 <HAL_RCC_ClockConfig+0xe0>
{
return HAL_ERROR;
80053fe: 2301 movs r3, #1
8005400: e0e1 b.n 80055c6 <HAL_RCC_ClockConfig+0x266>
}
}
/* PLL is selected as System Clock Source */
else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)
8005402: 687b ldr r3, [r7, #4]
8005404: 685b ldr r3, [r3, #4]
8005406: 2b03 cmp r3, #3
8005408: d107 bne.n 800541a <HAL_RCC_ClockConfig+0xba>
{
/* Check the PLL ready flag */
if(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == 0U)
800540a: 4b73 ldr r3, [pc, #460] ; (80055d8 <HAL_RCC_ClockConfig+0x278>)
800540c: 681a ldr r2, [r3, #0]
800540e: 2380 movs r3, #128 ; 0x80
8005410: 049b lsls r3, r3, #18
8005412: 4013 ands r3, r2
8005414: d114 bne.n 8005440 <HAL_RCC_ClockConfig+0xe0>
{
return HAL_ERROR;
8005416: 2301 movs r3, #1
8005418: e0d5 b.n 80055c6 <HAL_RCC_ClockConfig+0x266>
}
}
/* HSI is selected as System Clock Source */
else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSI)
800541a: 687b ldr r3, [r7, #4]
800541c: 685b ldr r3, [r3, #4]
800541e: 2b01 cmp r3, #1
8005420: d106 bne.n 8005430 <HAL_RCC_ClockConfig+0xd0>
{
/* Check the HSI ready flag */
if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == 0U)
8005422: 4b6d ldr r3, [pc, #436] ; (80055d8 <HAL_RCC_ClockConfig+0x278>)
8005424: 681b ldr r3, [r3, #0]
8005426: 2204 movs r2, #4
8005428: 4013 ands r3, r2
800542a: d109 bne.n 8005440 <HAL_RCC_ClockConfig+0xe0>
{
return HAL_ERROR;
800542c: 2301 movs r3, #1
800542e: e0ca b.n 80055c6 <HAL_RCC_ClockConfig+0x266>
}
/* MSI is selected as System Clock Source */
else
{
/* Check the MSI ready flag */
if(__HAL_RCC_GET_FLAG(RCC_FLAG_MSIRDY) == 0U)
8005430: 4b69 ldr r3, [pc, #420] ; (80055d8 <HAL_RCC_ClockConfig+0x278>)
8005432: 681a ldr r2, [r3, #0]
8005434: 2380 movs r3, #128 ; 0x80
8005436: 009b lsls r3, r3, #2
8005438: 4013 ands r3, r2
800543a: d101 bne.n 8005440 <HAL_RCC_ClockConfig+0xe0>
{
return HAL_ERROR;
800543c: 2301 movs r3, #1
800543e: e0c2 b.n 80055c6 <HAL_RCC_ClockConfig+0x266>
}
}
__HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource);
8005440: 4a65 ldr r2, [pc, #404] ; (80055d8 <HAL_RCC_ClockConfig+0x278>)
8005442: 4b65 ldr r3, [pc, #404] ; (80055d8 <HAL_RCC_ClockConfig+0x278>)
8005444: 68db ldr r3, [r3, #12]
8005446: 2103 movs r1, #3
8005448: 438b bics r3, r1
800544a: 0019 movs r1, r3
800544c: 687b ldr r3, [r7, #4]
800544e: 685b ldr r3, [r3, #4]
8005450: 430b orrs r3, r1
8005452: 60d3 str r3, [r2, #12]
/* Get Start Tick */
tickstart = HAL_GetTick();
8005454: f7fe fd88 bl 8003f68 <HAL_GetTick>
8005458: 0003 movs r3, r0
800545a: 60fb str r3, [r7, #12]
if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
800545c: 687b ldr r3, [r7, #4]
800545e: 685b ldr r3, [r3, #4]
8005460: 2b02 cmp r3, #2
8005462: d111 bne.n 8005488 <HAL_RCC_ClockConfig+0x128>
{
while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_HSE)
8005464: e009 b.n 800547a <HAL_RCC_ClockConfig+0x11a>
{
if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE)
8005466: f7fe fd7f bl 8003f68 <HAL_GetTick>
800546a: 0002 movs r2, r0
800546c: 68fb ldr r3, [r7, #12]
800546e: 1ad3 subs r3, r2, r3
8005470: 4a58 ldr r2, [pc, #352] ; (80055d4 <HAL_RCC_ClockConfig+0x274>)
8005472: 4293 cmp r3, r2
8005474: d901 bls.n 800547a <HAL_RCC_ClockConfig+0x11a>
{
return HAL_TIMEOUT;
8005476: 2303 movs r3, #3
8005478: e0a5 b.n 80055c6 <HAL_RCC_ClockConfig+0x266>
while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_HSE)
800547a: 4b57 ldr r3, [pc, #348] ; (80055d8 <HAL_RCC_ClockConfig+0x278>)
800547c: 68db ldr r3, [r3, #12]
800547e: 220c movs r2, #12
8005480: 4013 ands r3, r2
8005482: 2b08 cmp r3, #8
8005484: d1ef bne.n 8005466 <HAL_RCC_ClockConfig+0x106>
8005486: e03a b.n 80054fe <HAL_RCC_ClockConfig+0x19e>
}
}
}
else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)
8005488: 687b ldr r3, [r7, #4]
800548a: 685b ldr r3, [r3, #4]
800548c: 2b03 cmp r3, #3
800548e: d111 bne.n 80054b4 <HAL_RCC_ClockConfig+0x154>
{
while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK)
8005490: e009 b.n 80054a6 <HAL_RCC_ClockConfig+0x146>
{
if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE)
8005492: f7fe fd69 bl 8003f68 <HAL_GetTick>
8005496: 0002 movs r2, r0
8005498: 68fb ldr r3, [r7, #12]
800549a: 1ad3 subs r3, r2, r3
800549c: 4a4d ldr r2, [pc, #308] ; (80055d4 <HAL_RCC_ClockConfig+0x274>)
800549e: 4293 cmp r3, r2
80054a0: d901 bls.n 80054a6 <HAL_RCC_ClockConfig+0x146>
{
return HAL_TIMEOUT;
80054a2: 2303 movs r3, #3
80054a4: e08f b.n 80055c6 <HAL_RCC_ClockConfig+0x266>
while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK)
80054a6: 4b4c ldr r3, [pc, #304] ; (80055d8 <HAL_RCC_ClockConfig+0x278>)
80054a8: 68db ldr r3, [r3, #12]
80054aa: 220c movs r2, #12
80054ac: 4013 ands r3, r2
80054ae: 2b0c cmp r3, #12
80054b0: d1ef bne.n 8005492 <HAL_RCC_ClockConfig+0x132>
80054b2: e024 b.n 80054fe <HAL_RCC_ClockConfig+0x19e>
}
}
}
else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSI)
80054b4: 687b ldr r3, [r7, #4]
80054b6: 685b ldr r3, [r3, #4]
80054b8: 2b01 cmp r3, #1
80054ba: d11b bne.n 80054f4 <HAL_RCC_ClockConfig+0x194>
{
while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_HSI)
80054bc: e009 b.n 80054d2 <HAL_RCC_ClockConfig+0x172>
{
if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE)
80054be: f7fe fd53 bl 8003f68 <HAL_GetTick>
80054c2: 0002 movs r2, r0
80054c4: 68fb ldr r3, [r7, #12]
80054c6: 1ad3 subs r3, r2, r3
80054c8: 4a42 ldr r2, [pc, #264] ; (80055d4 <HAL_RCC_ClockConfig+0x274>)
80054ca: 4293 cmp r3, r2
80054cc: d901 bls.n 80054d2 <HAL_RCC_ClockConfig+0x172>
{
return HAL_TIMEOUT;
80054ce: 2303 movs r3, #3
80054d0: e079 b.n 80055c6 <HAL_RCC_ClockConfig+0x266>
while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_HSI)
80054d2: 4b41 ldr r3, [pc, #260] ; (80055d8 <HAL_RCC_ClockConfig+0x278>)
80054d4: 68db ldr r3, [r3, #12]
80054d6: 220c movs r2, #12
80054d8: 4013 ands r3, r2
80054da: 2b04 cmp r3, #4
80054dc: d1ef bne.n 80054be <HAL_RCC_ClockConfig+0x15e>
80054de: e00e b.n 80054fe <HAL_RCC_ClockConfig+0x19e>
}
else
{
while(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_MSI)
{
if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE)
80054e0: f7fe fd42 bl 8003f68 <HAL_GetTick>
80054e4: 0002 movs r2, r0
80054e6: 68fb ldr r3, [r7, #12]
80054e8: 1ad3 subs r3, r2, r3
80054ea: 4a3a ldr r2, [pc, #232] ; (80055d4 <HAL_RCC_ClockConfig+0x274>)
80054ec: 4293 cmp r3, r2
80054ee: d901 bls.n 80054f4 <HAL_RCC_ClockConfig+0x194>
{
return HAL_TIMEOUT;
80054f0: 2303 movs r3, #3
80054f2: e068 b.n 80055c6 <HAL_RCC_ClockConfig+0x266>
while(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_MSI)
80054f4: 4b38 ldr r3, [pc, #224] ; (80055d8 <HAL_RCC_ClockConfig+0x278>)
80054f6: 68db ldr r3, [r3, #12]
80054f8: 220c movs r2, #12
80054fa: 4013 ands r3, r2
80054fc: d1f0 bne.n 80054e0 <HAL_RCC_ClockConfig+0x180>
}
}
}
}
/* Decreasing the number of wait states because of lower CPU frequency */
if(FLatency < __HAL_FLASH_GET_LATENCY())
80054fe: 4b34 ldr r3, [pc, #208] ; (80055d0 <HAL_RCC_ClockConfig+0x270>)
8005500: 681b ldr r3, [r3, #0]
8005502: 2201 movs r2, #1
8005504: 401a ands r2, r3
8005506: 683b ldr r3, [r7, #0]
8005508: 429a cmp r2, r3
800550a: d91e bls.n 800554a <HAL_RCC_ClockConfig+0x1ea>
{
/* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
__HAL_FLASH_SET_LATENCY(FLatency);
800550c: 4b30 ldr r3, [pc, #192] ; (80055d0 <HAL_RCC_ClockConfig+0x270>)
800550e: 4a30 ldr r2, [pc, #192] ; (80055d0 <HAL_RCC_ClockConfig+0x270>)
8005510: 6812 ldr r2, [r2, #0]
8005512: 2101 movs r1, #1
8005514: 438a bics r2, r1
8005516: 0011 movs r1, r2
8005518: 683a ldr r2, [r7, #0]
800551a: 430a orrs r2, r1
800551c: 601a str r2, [r3, #0]
/* Check that the new number of wait states is taken into account to access the Flash
memory by polling the FLASH_ACR register */
tickstart = HAL_GetTick();
800551e: f7fe fd23 bl 8003f68 <HAL_GetTick>
8005522: 0003 movs r3, r0
8005524: 60fb str r3, [r7, #12]
while (__HAL_FLASH_GET_LATENCY() != FLatency)
8005526: e009 b.n 800553c <HAL_RCC_ClockConfig+0x1dc>
{
if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE)
8005528: f7fe fd1e bl 8003f68 <HAL_GetTick>
800552c: 0002 movs r2, r0
800552e: 68fb ldr r3, [r7, #12]
8005530: 1ad3 subs r3, r2, r3
8005532: 4a28 ldr r2, [pc, #160] ; (80055d4 <HAL_RCC_ClockConfig+0x274>)
8005534: 4293 cmp r3, r2
8005536: d901 bls.n 800553c <HAL_RCC_ClockConfig+0x1dc>
{
return HAL_TIMEOUT;
8005538: 2303 movs r3, #3
800553a: e044 b.n 80055c6 <HAL_RCC_ClockConfig+0x266>
while (__HAL_FLASH_GET_LATENCY() != FLatency)
800553c: 4b24 ldr r3, [pc, #144] ; (80055d0 <HAL_RCC_ClockConfig+0x270>)
800553e: 681b ldr r3, [r3, #0]
8005540: 2201 movs r2, #1
8005542: 401a ands r2, r3
8005544: 683b ldr r3, [r7, #0]
8005546: 429a cmp r2, r3
8005548: d1ee bne.n 8005528 <HAL_RCC_ClockConfig+0x1c8>
}
}
}
/*-------------------------- PCLK1 Configuration ---------------------------*/
if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
800554a: 687b ldr r3, [r7, #4]
800554c: 681b ldr r3, [r3, #0]
800554e: 2204 movs r2, #4
8005550: 4013 ands r3, r2
8005552: d008 beq.n 8005566 <HAL_RCC_ClockConfig+0x206>
{
assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider));
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider);
8005554: 4a20 ldr r2, [pc, #128] ; (80055d8 <HAL_RCC_ClockConfig+0x278>)
8005556: 4b20 ldr r3, [pc, #128] ; (80055d8 <HAL_RCC_ClockConfig+0x278>)
8005558: 68db ldr r3, [r3, #12]
800555a: 4920 ldr r1, [pc, #128] ; (80055dc <HAL_RCC_ClockConfig+0x27c>)
800555c: 4019 ands r1, r3
800555e: 687b ldr r3, [r7, #4]
8005560: 68db ldr r3, [r3, #12]
8005562: 430b orrs r3, r1
8005564: 60d3 str r3, [r2, #12]
}
/*-------------------------- PCLK2 Configuration ---------------------------*/
if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
8005566: 687b ldr r3, [r7, #4]
8005568: 681b ldr r3, [r3, #0]
800556a: 2208 movs r2, #8
800556c: 4013 ands r3, r2
800556e: d009 beq.n 8005584 <HAL_RCC_ClockConfig+0x224>
{
assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB2CLKDivider));
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3));
8005570: 4a19 ldr r2, [pc, #100] ; (80055d8 <HAL_RCC_ClockConfig+0x278>)
8005572: 4b19 ldr r3, [pc, #100] ; (80055d8 <HAL_RCC_ClockConfig+0x278>)
8005574: 68db ldr r3, [r3, #12]
8005576: 491a ldr r1, [pc, #104] ; (80055e0 <HAL_RCC_ClockConfig+0x280>)
8005578: 4019 ands r1, r3
800557a: 687b ldr r3, [r7, #4]
800557c: 691b ldr r3, [r3, #16]
800557e: 00db lsls r3, r3, #3
8005580: 430b orrs r3, r1
8005582: 60d3 str r3, [r2, #12]
}
/* Update the SystemCoreClock global variable */
SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE)>> RCC_CFGR_HPRE_Pos];
8005584: f000 f834 bl 80055f0 <HAL_RCC_GetSysClockFreq>
8005588: 0001 movs r1, r0
800558a: 4b13 ldr r3, [pc, #76] ; (80055d8 <HAL_RCC_ClockConfig+0x278>)
800558c: 68db ldr r3, [r3, #12]
800558e: 091b lsrs r3, r3, #4
8005590: 220f movs r2, #15
8005592: 4013 ands r3, r2
8005594: 4a13 ldr r2, [pc, #76] ; (80055e4 <HAL_RCC_ClockConfig+0x284>)
8005596: 5cd3 ldrb r3, [r2, r3]
8005598: 000a movs r2, r1
800559a: 40da lsrs r2, r3
800559c: 4b12 ldr r3, [pc, #72] ; (80055e8 <HAL_RCC_ClockConfig+0x288>)
800559e: 601a str r2, [r3, #0]
/* Configure the source of time base considering new system clocks settings*/
status = HAL_InitTick(uwTickPrio);
80055a0: 4b12 ldr r3, [pc, #72] ; (80055ec <HAL_RCC_ClockConfig+0x28c>)
80055a2: 681b ldr r3, [r3, #0]
80055a4: 220b movs r2, #11
80055a6: 18bc adds r4, r7, r2
80055a8: 0018 movs r0, r3
80055aa: f7fe fc97 bl 8003edc <HAL_InitTick>
80055ae: 0003 movs r3, r0
80055b0: 7023 strb r3, [r4, #0]
if(status != HAL_OK)
80055b2: 230b movs r3, #11
80055b4: 18fb adds r3, r7, r3
80055b6: 781b ldrb r3, [r3, #0]
80055b8: 2b00 cmp r3, #0
80055ba: d003 beq.n 80055c4 <HAL_RCC_ClockConfig+0x264>
{
return status;
80055bc: 230b movs r3, #11
80055be: 18fb adds r3, r7, r3
80055c0: 781b ldrb r3, [r3, #0]
80055c2: e000 b.n 80055c6 <HAL_RCC_ClockConfig+0x266>
}
return HAL_OK;
80055c4: 2300 movs r3, #0
}
80055c6: 0018 movs r0, r3
80055c8: 46bd mov sp, r7
80055ca: b005 add sp, #20
80055cc: bd90 pop {r4, r7, pc}
80055ce: 46c0 nop ; (mov r8, r8)
80055d0: 40022000 .word 0x40022000
80055d4: 00001388 .word 0x00001388
80055d8: 40021000 .word 0x40021000
80055dc: fffff8ff .word 0xfffff8ff
80055e0: ffffc7ff .word 0xffffc7ff
80055e4: 0800720c .word 0x0800720c
80055e8: 20000000 .word 0x20000000
80055ec: 20000008 .word 0x20000008
080055f0 <HAL_RCC_GetSysClockFreq>:
* right SYSCLK value. Otherwise, any configuration based on this function will be incorrect.
*
* @retval SYSCLK frequency
*/
uint32_t HAL_RCC_GetSysClockFreq(void)
{
80055f0: b5f0 push {r4, r5, r6, r7, lr}
80055f2: b08f sub sp, #60 ; 0x3c
80055f4: af00 add r7, sp, #0
uint32_t tmpreg, pllm, plld, pllvco, msiclkrange; /* no init needed */
uint32_t sysclockfreq;
tmpreg = RCC->CFGR;
80055f6: 4b4a ldr r3, [pc, #296] ; (8005720 <HAL_RCC_GetSysClockFreq+0x130>)
80055f8: 68db ldr r3, [r3, #12]
80055fa: 62fb str r3, [r7, #44] ; 0x2c
/* Get SYSCLK source -------------------------------------------------------*/
switch (tmpreg & RCC_CFGR_SWS)
80055fc: 6afa ldr r2, [r7, #44] ; 0x2c
80055fe: 230c movs r3, #12
8005600: 4013 ands r3, r2
8005602: 2b08 cmp r3, #8
8005604: d00f beq.n 8005626 <HAL_RCC_GetSysClockFreq+0x36>
8005606: 2b0c cmp r3, #12
8005608: d010 beq.n 800562c <HAL_RCC_GetSysClockFreq+0x3c>
800560a: 2b04 cmp r3, #4
800560c: d000 beq.n 8005610 <HAL_RCC_GetSysClockFreq+0x20>
800560e: e073 b.n 80056f8 <HAL_RCC_GetSysClockFreq+0x108>
{
case RCC_SYSCLKSOURCE_STATUS_HSI: /* HSI used as system clock source */
{
if ((RCC->CR & RCC_CR_HSIDIVF) != 0U)
8005610: 4b43 ldr r3, [pc, #268] ; (8005720 <HAL_RCC_GetSysClockFreq+0x130>)
8005612: 681b ldr r3, [r3, #0]
8005614: 2210 movs r2, #16
8005616: 4013 ands r3, r2
8005618: d002 beq.n 8005620 <HAL_RCC_GetSysClockFreq+0x30>
{
sysclockfreq = (HSI_VALUE >> 2);
800561a: 4b42 ldr r3, [pc, #264] ; (8005724 <HAL_RCC_GetSysClockFreq+0x134>)
800561c: 633b str r3, [r7, #48] ; 0x30
}
else
{
sysclockfreq = HSI_VALUE;
}
break;
800561e: e079 b.n 8005714 <HAL_RCC_GetSysClockFreq+0x124>
sysclockfreq = HSI_VALUE;
8005620: 4b41 ldr r3, [pc, #260] ; (8005728 <HAL_RCC_GetSysClockFreq+0x138>)
8005622: 633b str r3, [r7, #48] ; 0x30
break;
8005624: e076 b.n 8005714 <HAL_RCC_GetSysClockFreq+0x124>
}
case RCC_SYSCLKSOURCE_STATUS_HSE: /* HSE used as system clock */
{
sysclockfreq = HSE_VALUE;
8005626: 4b41 ldr r3, [pc, #260] ; (800572c <HAL_RCC_GetSysClockFreq+0x13c>)
8005628: 633b str r3, [r7, #48] ; 0x30
break;
800562a: e073 b.n 8005714 <HAL_RCC_GetSysClockFreq+0x124>
}
case RCC_SYSCLKSOURCE_STATUS_PLLCLK: /* PLL used as system clock */
{
pllm = PLLMulTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMUL) >> RCC_CFGR_PLLMUL_Pos];
800562c: 6afb ldr r3, [r7, #44] ; 0x2c
800562e: 0c9a lsrs r2, r3, #18
8005630: 230f movs r3, #15
8005632: 401a ands r2, r3
8005634: 4b3e ldr r3, [pc, #248] ; (8005730 <HAL_RCC_GetSysClockFreq+0x140>)
8005636: 5c9b ldrb r3, [r3, r2]
8005638: 62bb str r3, [r7, #40] ; 0x28
plld = ((uint32_t)(tmpreg & RCC_CFGR_PLLDIV) >> RCC_CFGR_PLLDIV_Pos) + 1U;
800563a: 6afb ldr r3, [r7, #44] ; 0x2c
800563c: 0d9a lsrs r2, r3, #22
800563e: 2303 movs r3, #3
8005640: 4013 ands r3, r2
8005642: 3301 adds r3, #1
8005644: 627b str r3, [r7, #36] ; 0x24
if (__HAL_RCC_GET_PLL_OSCSOURCE() != RCC_PLLSOURCE_HSI)
8005646: 4b36 ldr r3, [pc, #216] ; (8005720 <HAL_RCC_GetSysClockFreq+0x130>)
8005648: 68da ldr r2, [r3, #12]
800564a: 2380 movs r3, #128 ; 0x80
800564c: 025b lsls r3, r3, #9
800564e: 4013 ands r3, r2
8005650: d019 beq.n 8005686 <HAL_RCC_GetSysClockFreq+0x96>
{
/* HSE used as PLL clock source */
pllvco = (uint32_t)(((uint64_t)HSE_VALUE * (uint64_t)pllm) / (uint64_t)plld);
8005652: 6abb ldr r3, [r7, #40] ; 0x28
8005654: 61bb str r3, [r7, #24]
8005656: 2300 movs r3, #0
8005658: 61fb str r3, [r7, #28]
800565a: 4a34 ldr r2, [pc, #208] ; (800572c <HAL_RCC_GetSysClockFreq+0x13c>)
800565c: 2300 movs r3, #0
800565e: 69b8 ldr r0, [r7, #24]
8005660: 69f9 ldr r1, [r7, #28]
8005662: f7fa fe75 bl 8000350 <__aeabi_lmul>
8005666: 0003 movs r3, r0
8005668: 000c movs r4, r1
800566a: 0018 movs r0, r3
800566c: 0021 movs r1, r4
800566e: 6a7b ldr r3, [r7, #36] ; 0x24
8005670: 613b str r3, [r7, #16]
8005672: 2300 movs r3, #0
8005674: 617b str r3, [r7, #20]
8005676: 693a ldr r2, [r7, #16]
8005678: 697b ldr r3, [r7, #20]
800567a: f7fa fe49 bl 8000310 <__aeabi_uldivmod>
800567e: 0003 movs r3, r0
8005680: 000c movs r4, r1
8005682: 637b str r3, [r7, #52] ; 0x34
8005684: e035 b.n 80056f2 <HAL_RCC_GetSysClockFreq+0x102>
}
else
{
if ((RCC->CR & RCC_CR_HSIDIVF) != 0U)
8005686: 4b26 ldr r3, [pc, #152] ; (8005720 <HAL_RCC_GetSysClockFreq+0x130>)
8005688: 681b ldr r3, [r3, #0]
800568a: 2210 movs r2, #16
800568c: 4013 ands r3, r2
800568e: d019 beq.n 80056c4 <HAL_RCC_GetSysClockFreq+0xd4>
{
pllvco = (uint32_t)((((uint64_t)(HSI_VALUE >> 2)) * (uint64_t)pllm) / (uint64_t)plld);
8005690: 6abb ldr r3, [r7, #40] ; 0x28
8005692: 60bb str r3, [r7, #8]
8005694: 2300 movs r3, #0
8005696: 60fb str r3, [r7, #12]
8005698: 4a22 ldr r2, [pc, #136] ; (8005724 <HAL_RCC_GetSysClockFreq+0x134>)
800569a: 2300 movs r3, #0
800569c: 68b8 ldr r0, [r7, #8]
800569e: 68f9 ldr r1, [r7, #12]
80056a0: f7fa fe56 bl 8000350 <__aeabi_lmul>
80056a4: 0003 movs r3, r0
80056a6: 000c movs r4, r1
80056a8: 0018 movs r0, r3
80056aa: 0021 movs r1, r4
80056ac: 6a7b ldr r3, [r7, #36] ; 0x24
80056ae: 603b str r3, [r7, #0]
80056b0: 2300 movs r3, #0
80056b2: 607b str r3, [r7, #4]
80056b4: 683a ldr r2, [r7, #0]
80056b6: 687b ldr r3, [r7, #4]
80056b8: f7fa fe2a bl 8000310 <__aeabi_uldivmod>
80056bc: 0003 movs r3, r0
80056be: 000c movs r4, r1
80056c0: 637b str r3, [r7, #52] ; 0x34
80056c2: e016 b.n 80056f2 <HAL_RCC_GetSysClockFreq+0x102>
}
else
{
pllvco = (uint32_t)(((uint64_t)HSI_VALUE * (uint64_t)pllm) / (uint64_t)plld);
80056c4: 6abb ldr r3, [r7, #40] ; 0x28
80056c6: 0018 movs r0, r3
80056c8: 2300 movs r3, #0
80056ca: 0019 movs r1, r3
80056cc: 4a16 ldr r2, [pc, #88] ; (8005728 <HAL_RCC_GetSysClockFreq+0x138>)
80056ce: 2300 movs r3, #0
80056d0: f7fa fe3e bl 8000350 <__aeabi_lmul>
80056d4: 0003 movs r3, r0
80056d6: 000c movs r4, r1
80056d8: 0018 movs r0, r3
80056da: 0021 movs r1, r4
80056dc: 6a7b ldr r3, [r7, #36] ; 0x24
80056de: 001d movs r5, r3
80056e0: 2300 movs r3, #0
80056e2: 001e movs r6, r3
80056e4: 002a movs r2, r5
80056e6: 0033 movs r3, r6
80056e8: f7fa fe12 bl 8000310 <__aeabi_uldivmod>
80056ec: 0003 movs r3, r0
80056ee: 000c movs r4, r1
80056f0: 637b str r3, [r7, #52] ; 0x34
}
}
sysclockfreq = pllvco;
80056f2: 6b7b ldr r3, [r7, #52] ; 0x34
80056f4: 633b str r3, [r7, #48] ; 0x30
break;
80056f6: e00d b.n 8005714 <HAL_RCC_GetSysClockFreq+0x124>
}
case RCC_SYSCLKSOURCE_STATUS_MSI: /* MSI used as system clock source */
default: /* MSI used as system clock */
{
msiclkrange = (RCC->ICSCR & RCC_ICSCR_MSIRANGE ) >> RCC_ICSCR_MSIRANGE_Pos;
80056f8: 4b09 ldr r3, [pc, #36] ; (8005720 <HAL_RCC_GetSysClockFreq+0x130>)
80056fa: 685b ldr r3, [r3, #4]
80056fc: 0b5b lsrs r3, r3, #13
80056fe: 2207 movs r2, #7
8005700: 4013 ands r3, r2
8005702: 623b str r3, [r7, #32]
sysclockfreq = (32768U * (1UL << (msiclkrange + 1U)));
8005704: 6a3b ldr r3, [r7, #32]
8005706: 3301 adds r3, #1
8005708: 2280 movs r2, #128 ; 0x80
800570a: 0212 lsls r2, r2, #8
800570c: 409a lsls r2, r3
800570e: 0013 movs r3, r2
8005710: 633b str r3, [r7, #48] ; 0x30
break;
8005712: 46c0 nop ; (mov r8, r8)
}
}
return sysclockfreq;
8005714: 6b3b ldr r3, [r7, #48] ; 0x30
}
8005716: 0018 movs r0, r3
8005718: 46bd mov sp, r7
800571a: b00f add sp, #60 ; 0x3c
800571c: bdf0 pop {r4, r5, r6, r7, pc}
800571e: 46c0 nop ; (mov r8, r8)
8005720: 40021000 .word 0x40021000
8005724: 003d0900 .word 0x003d0900
8005728: 00f42400 .word 0x00f42400
800572c: 007a1200 .word 0x007a1200
8005730: 08007224 .word 0x08007224
08005734 <HAL_RCC_GetHCLKFreq>:
* @note The SystemCoreClock CMSIS variable is used to store System Clock Frequency
* and updated within this function
* @retval HCLK frequency
*/
uint32_t HAL_RCC_GetHCLKFreq(void)
{
8005734: b580 push {r7, lr}
8005736: af00 add r7, sp, #0
return SystemCoreClock;
8005738: 4b02 ldr r3, [pc, #8] ; (8005744 <HAL_RCC_GetHCLKFreq+0x10>)
800573a: 681b ldr r3, [r3, #0]
}
800573c: 0018 movs r0, r3
800573e: 46bd mov sp, r7
8005740: bd80 pop {r7, pc}
8005742: 46c0 nop ; (mov r8, r8)
8005744: 20000000 .word 0x20000000
08005748 <HAL_RCC_GetPCLK1Freq>:
* @note Each time PCLK1 changes, this function must be called to update the
* right PCLK1 value. Otherwise, any configuration based on this function will be incorrect.
* @retval PCLK1 frequency
*/
uint32_t HAL_RCC_GetPCLK1Freq(void)
{
8005748: b580 push {r7, lr}
800574a: af00 add r7, sp, #0
/* Get HCLK source and Compute PCLK1 frequency ---------------------------*/
return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1) >> RCC_CFGR_PPRE1_Pos]);
800574c: f7ff fff2 bl 8005734 <HAL_RCC_GetHCLKFreq>
8005750: 0001 movs r1, r0
8005752: 4b06 ldr r3, [pc, #24] ; (800576c <HAL_RCC_GetPCLK1Freq+0x24>)
8005754: 68db ldr r3, [r3, #12]
8005756: 0a1b lsrs r3, r3, #8
8005758: 2207 movs r2, #7
800575a: 4013 ands r3, r2
800575c: 4a04 ldr r2, [pc, #16] ; (8005770 <HAL_RCC_GetPCLK1Freq+0x28>)
800575e: 5cd3 ldrb r3, [r2, r3]
8005760: 40d9 lsrs r1, r3
8005762: 000b movs r3, r1
}
8005764: 0018 movs r0, r3
8005766: 46bd mov sp, r7
8005768: bd80 pop {r7, pc}
800576a: 46c0 nop ; (mov r8, r8)
800576c: 40021000 .word 0x40021000
8005770: 0800721c .word 0x0800721c
08005774 <HAL_RCC_GetPCLK2Freq>:
* @note Each time PCLK2 changes, this function must be called to update the
* right PCLK2 value. Otherwise, any configuration based on this function will be incorrect.
* @retval PCLK2 frequency
*/
uint32_t HAL_RCC_GetPCLK2Freq(void)
{
8005774: b580 push {r7, lr}
8005776: af00 add r7, sp, #0
/* Get HCLK source and Compute PCLK2 frequency ---------------------------*/
return (HAL_RCC_GetHCLKFreq()>> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE2) >> RCC_CFGR_PPRE2_Pos]);
8005778: f7ff ffdc bl 8005734 <HAL_RCC_GetHCLKFreq>
800577c: 0001 movs r1, r0
800577e: 4b06 ldr r3, [pc, #24] ; (8005798 <HAL_RCC_GetPCLK2Freq+0x24>)
8005780: 68db ldr r3, [r3, #12]
8005782: 0adb lsrs r3, r3, #11
8005784: 2207 movs r2, #7
8005786: 4013 ands r3, r2
8005788: 4a04 ldr r2, [pc, #16] ; (800579c <HAL_RCC_GetPCLK2Freq+0x28>)
800578a: 5cd3 ldrb r3, [r2, r3]
800578c: 40d9 lsrs r1, r3
800578e: 000b movs r3, r1
}
8005790: 0018 movs r0, r3
8005792: 46bd mov sp, r7
8005794: bd80 pop {r7, pc}
8005796: 46c0 nop ; (mov r8, r8)
8005798: 40021000 .word 0x40021000
800579c: 0800721c .word 0x0800721c
080057a0 <HAL_RCCEx_PeriphCLKConfig>:
* @retval HAL status
* @note If HAL_ERROR returned, first switch-OFF HSE clock oscillator with @ref HAL_RCC_OscConfig()
* to possibly update HSE divider.
*/
HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit)
{
80057a0: b580 push {r7, lr}
80057a2: b086 sub sp, #24
80057a4: af00 add r7, sp, #0
80057a6: 6078 str r0, [r7, #4]
uint32_t tickstart;
uint32_t temp_reg;
FlagStatus pwrclkchanged = RESET;
80057a8: 2317 movs r3, #23
80057aa: 18fb adds r3, r7, r3
80057ac: 2200 movs r2, #0
80057ae: 701a strb r2, [r3, #0]
/* Check the parameters */
assert_param(IS_RCC_PERIPHCLOCK(PeriphClkInit->PeriphClockSelection));
/*------------------------------- RTC/LCD Configuration ------------------------*/
if ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == RCC_PERIPHCLK_RTC)
80057b0: 687b ldr r3, [r7, #4]
80057b2: 681b ldr r3, [r3, #0]
80057b4: 2220 movs r2, #32
80057b6: 4013 ands r3, r2
80057b8: d100 bne.n 80057bc <HAL_RCCEx_PeriphCLKConfig+0x1c>
80057ba: e0c2 b.n 8005942 <HAL_RCCEx_PeriphCLKConfig+0x1a2>
#endif /* LCD */
/* As soon as function is called to change RTC clock source, activation of the
power domain is done. */
/* Requires to enable write access to Backup Domain of necessary */
if(__HAL_RCC_PWR_IS_CLK_DISABLED())
80057bc: 4b96 ldr r3, [pc, #600] ; (8005a18 <HAL_RCCEx_PeriphCLKConfig+0x278>)
80057be: 6b9a ldr r2, [r3, #56] ; 0x38
80057c0: 2380 movs r3, #128 ; 0x80
80057c2: 055b lsls r3, r3, #21
80057c4: 4013 ands r3, r2
80057c6: d10a bne.n 80057de <HAL_RCCEx_PeriphCLKConfig+0x3e>
{
__HAL_RCC_PWR_CLK_ENABLE();
80057c8: 4b93 ldr r3, [pc, #588] ; (8005a18 <HAL_RCCEx_PeriphCLKConfig+0x278>)
80057ca: 4a93 ldr r2, [pc, #588] ; (8005a18 <HAL_RCCEx_PeriphCLKConfig+0x278>)
80057cc: 6b92 ldr r2, [r2, #56] ; 0x38
80057ce: 2180 movs r1, #128 ; 0x80
80057d0: 0549 lsls r1, r1, #21
80057d2: 430a orrs r2, r1
80057d4: 639a str r2, [r3, #56] ; 0x38
pwrclkchanged = SET;
80057d6: 2317 movs r3, #23
80057d8: 18fb adds r3, r7, r3
80057da: 2201 movs r2, #1
80057dc: 701a strb r2, [r3, #0]
}
if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
80057de: 4b8f ldr r3, [pc, #572] ; (8005a1c <HAL_RCCEx_PeriphCLKConfig+0x27c>)
80057e0: 681a ldr r2, [r3, #0]
80057e2: 2380 movs r3, #128 ; 0x80
80057e4: 005b lsls r3, r3, #1
80057e6: 4013 ands r3, r2
80057e8: d11a bne.n 8005820 <HAL_RCCEx_PeriphCLKConfig+0x80>
{
/* Enable write access to Backup domain */
SET_BIT(PWR->CR, PWR_CR_DBP);
80057ea: 4b8c ldr r3, [pc, #560] ; (8005a1c <HAL_RCCEx_PeriphCLKConfig+0x27c>)
80057ec: 4a8b ldr r2, [pc, #556] ; (8005a1c <HAL_RCCEx_PeriphCLKConfig+0x27c>)
80057ee: 6812 ldr r2, [r2, #0]
80057f0: 2180 movs r1, #128 ; 0x80
80057f2: 0049 lsls r1, r1, #1
80057f4: 430a orrs r2, r1
80057f6: 601a str r2, [r3, #0]
/* Wait for Backup domain Write protection disable */
tickstart = HAL_GetTick();
80057f8: f7fe fbb6 bl 8003f68 <HAL_GetTick>
80057fc: 0003 movs r3, r0
80057fe: 613b str r3, [r7, #16]
while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
8005800: e008 b.n 8005814 <HAL_RCCEx_PeriphCLKConfig+0x74>
{
if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
8005802: f7fe fbb1 bl 8003f68 <HAL_GetTick>
8005806: 0002 movs r2, r0
8005808: 693b ldr r3, [r7, #16]
800580a: 1ad3 subs r3, r2, r3
800580c: 2b64 cmp r3, #100 ; 0x64
800580e: d901 bls.n 8005814 <HAL_RCCEx_PeriphCLKConfig+0x74>
{
return HAL_TIMEOUT;
8005810: 2303 movs r3, #3
8005812: e0fc b.n 8005a0e <HAL_RCCEx_PeriphCLKConfig+0x26e>
while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
8005814: 4b81 ldr r3, [pc, #516] ; (8005a1c <HAL_RCCEx_PeriphCLKConfig+0x27c>)
8005816: 681a ldr r2, [r3, #0]
8005818: 2380 movs r3, #128 ; 0x80
800581a: 005b lsls r3, r3, #1
800581c: 4013 ands r3, r2
800581e: d0f0 beq.n 8005802 <HAL_RCCEx_PeriphCLKConfig+0x62>
}
}
}
/* Check if user wants to change HSE RTC prescaler whereas HSE is enabled */
temp_reg = (RCC->CR & RCC_CR_RTCPRE);
8005820: 4b7d ldr r3, [pc, #500] ; (8005a18 <HAL_RCCEx_PeriphCLKConfig+0x278>)
8005822: 681a ldr r2, [r3, #0]
8005824: 23c0 movs r3, #192 ; 0xc0
8005826: 039b lsls r3, r3, #14
8005828: 4013 ands r3, r2
800582a: 60fb str r3, [r7, #12]
if ((temp_reg != (PeriphClkInit->RTCClockSelection & RCC_CR_RTCPRE))
800582c: 687b ldr r3, [r7, #4]
800582e: 685a ldr r2, [r3, #4]
8005830: 23c0 movs r3, #192 ; 0xc0
8005832: 039b lsls r3, r3, #14
8005834: 401a ands r2, r3
8005836: 68fb ldr r3, [r7, #12]
8005838: 429a cmp r2, r3
800583a: d013 beq.n 8005864 <HAL_RCCEx_PeriphCLKConfig+0xc4>
#if defined (LCD)
|| (temp_reg != (PeriphClkInit->LCDClockSelection & RCC_CR_RTCPRE))
#endif /* LCD */
)
{ /* Check HSE State */
if ((PeriphClkInit->RTCClockSelection & RCC_CSR_RTCSEL) == RCC_CSR_RTCSEL_HSE)
800583c: 687b ldr r3, [r7, #4]
800583e: 685a ldr r2, [r3, #4]
8005840: 23c0 movs r3, #192 ; 0xc0
8005842: 029b lsls r3, r3, #10
8005844: 401a ands r2, r3
8005846: 23c0 movs r3, #192 ; 0xc0
8005848: 029b lsls r3, r3, #10
800584a: 429a cmp r2, r3
800584c: d10a bne.n 8005864 <HAL_RCCEx_PeriphCLKConfig+0xc4>
{
if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSERDY))
800584e: 4b72 ldr r3, [pc, #456] ; (8005a18 <HAL_RCCEx_PeriphCLKConfig+0x278>)
8005850: 681a ldr r2, [r3, #0]
8005852: 2380 movs r3, #128 ; 0x80
8005854: 029b lsls r3, r3, #10
8005856: 401a ands r2, r3
8005858: 2380 movs r3, #128 ; 0x80
800585a: 029b lsls r3, r3, #10
800585c: 429a cmp r2, r3
800585e: d101 bne.n 8005864 <HAL_RCCEx_PeriphCLKConfig+0xc4>
{
/* To update HSE divider, first switch-OFF HSE clock oscillator*/
return HAL_ERROR;
8005860: 2301 movs r3, #1
8005862: e0d4 b.n 8005a0e <HAL_RCCEx_PeriphCLKConfig+0x26e>
}
}
}
/* Reset the Backup domain only if the RTC Clock source selection is modified from reset value */
temp_reg = (RCC->CSR & RCC_CSR_RTCSEL);
8005864: 4b6c ldr r3, [pc, #432] ; (8005a18 <HAL_RCCEx_PeriphCLKConfig+0x278>)
8005866: 6d1a ldr r2, [r3, #80] ; 0x50
8005868: 23c0 movs r3, #192 ; 0xc0
800586a: 029b lsls r3, r3, #10
800586c: 4013 ands r3, r2
800586e: 60fb str r3, [r7, #12]
if((temp_reg != 0x00000000U) && (((temp_reg != (PeriphClkInit->RTCClockSelection & RCC_CSR_RTCSEL)) \
8005870: 68fb ldr r3, [r7, #12]
8005872: 2b00 cmp r3, #0
8005874: d03b beq.n 80058ee <HAL_RCCEx_PeriphCLKConfig+0x14e>
8005876: 687b ldr r3, [r7, #4]
8005878: 685a ldr r2, [r3, #4]
800587a: 23c0 movs r3, #192 ; 0xc0
800587c: 029b lsls r3, r3, #10
800587e: 401a ands r2, r3
8005880: 68fb ldr r3, [r7, #12]
8005882: 429a cmp r2, r3
8005884: d033 beq.n 80058ee <HAL_RCCEx_PeriphCLKConfig+0x14e>
&& (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == RCC_PERIPHCLK_RTC))
8005886: 687b ldr r3, [r7, #4]
8005888: 681b ldr r3, [r3, #0]
800588a: 2220 movs r2, #32
800588c: 4013 ands r3, r2
800588e: d02e beq.n 80058ee <HAL_RCCEx_PeriphCLKConfig+0x14e>
&& (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_LCD) == RCC_PERIPHCLK_LCD))
#endif /* LCD */
))
{
/* Store the content of CSR register before the reset of Backup Domain */
temp_reg = (RCC->CSR & ~(RCC_CSR_RTCSEL));
8005890: 4b61 ldr r3, [pc, #388] ; (8005a18 <HAL_RCCEx_PeriphCLKConfig+0x278>)
8005892: 6d1b ldr r3, [r3, #80] ; 0x50
8005894: 4a62 ldr r2, [pc, #392] ; (8005a20 <HAL_RCCEx_PeriphCLKConfig+0x280>)
8005896: 4013 ands r3, r2
8005898: 60fb str r3, [r7, #12]
/* RTC Clock selection can be changed only if the Backup Domain is reset */
__HAL_RCC_BACKUPRESET_FORCE();
800589a: 4b5f ldr r3, [pc, #380] ; (8005a18 <HAL_RCCEx_PeriphCLKConfig+0x278>)
800589c: 4a5e ldr r2, [pc, #376] ; (8005a18 <HAL_RCCEx_PeriphCLKConfig+0x278>)
800589e: 6d12 ldr r2, [r2, #80] ; 0x50
80058a0: 2180 movs r1, #128 ; 0x80
80058a2: 0309 lsls r1, r1, #12
80058a4: 430a orrs r2, r1
80058a6: 651a str r2, [r3, #80] ; 0x50
__HAL_RCC_BACKUPRESET_RELEASE();
80058a8: 4b5b ldr r3, [pc, #364] ; (8005a18 <HAL_RCCEx_PeriphCLKConfig+0x278>)
80058aa: 4a5b ldr r2, [pc, #364] ; (8005a18 <HAL_RCCEx_PeriphCLKConfig+0x278>)
80058ac: 6d12 ldr r2, [r2, #80] ; 0x50
80058ae: 495d ldr r1, [pc, #372] ; (8005a24 <HAL_RCCEx_PeriphCLKConfig+0x284>)
80058b0: 400a ands r2, r1
80058b2: 651a str r2, [r3, #80] ; 0x50
/* Restore the Content of CSR register */
RCC->CSR = temp_reg;
80058b4: 4b58 ldr r3, [pc, #352] ; (8005a18 <HAL_RCCEx_PeriphCLKConfig+0x278>)
80058b6: 68fa ldr r2, [r7, #12]
80058b8: 651a str r2, [r3, #80] ; 0x50
/* Wait for LSERDY if LSE was enabled */
if (HAL_IS_BIT_SET(temp_reg, RCC_CSR_LSEON))
80058ba: 68fa ldr r2, [r7, #12]
80058bc: 2380 movs r3, #128 ; 0x80
80058be: 005b lsls r3, r3, #1
80058c0: 4013 ands r3, r2
80058c2: d014 beq.n 80058ee <HAL_RCCEx_PeriphCLKConfig+0x14e>
{
/* Get Start Tick */
tickstart = HAL_GetTick();
80058c4: f7fe fb50 bl 8003f68 <HAL_GetTick>
80058c8: 0003 movs r3, r0
80058ca: 613b str r3, [r7, #16]
/* Wait till LSE is ready */
while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == 0U)
80058cc: e009 b.n 80058e2 <HAL_RCCEx_PeriphCLKConfig+0x142>
{
if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
80058ce: f7fe fb4b bl 8003f68 <HAL_GetTick>
80058d2: 0002 movs r2, r0
80058d4: 693b ldr r3, [r7, #16]
80058d6: 1ad3 subs r3, r2, r3
80058d8: 4a53 ldr r2, [pc, #332] ; (8005a28 <HAL_RCCEx_PeriphCLKConfig+0x288>)
80058da: 4293 cmp r3, r2
80058dc: d901 bls.n 80058e2 <HAL_RCCEx_PeriphCLKConfig+0x142>
{
return HAL_TIMEOUT;
80058de: 2303 movs r3, #3
80058e0: e095 b.n 8005a0e <HAL_RCCEx_PeriphCLKConfig+0x26e>
while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == 0U)
80058e2: 4b4d ldr r3, [pc, #308] ; (8005a18 <HAL_RCCEx_PeriphCLKConfig+0x278>)
80058e4: 6d1a ldr r2, [r3, #80] ; 0x50
80058e6: 2380 movs r3, #128 ; 0x80
80058e8: 009b lsls r3, r3, #2
80058ea: 4013 ands r3, r2
80058ec: d0ef beq.n 80058ce <HAL_RCCEx_PeriphCLKConfig+0x12e>
}
}
}
}
__HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection);
80058ee: 687b ldr r3, [r7, #4]
80058f0: 685a ldr r2, [r3, #4]
80058f2: 23c0 movs r3, #192 ; 0xc0
80058f4: 029b lsls r3, r3, #10
80058f6: 401a ands r2, r3
80058f8: 23c0 movs r3, #192 ; 0xc0
80058fa: 029b lsls r3, r3, #10
80058fc: 429a cmp r2, r3
80058fe: d10b bne.n 8005918 <HAL_RCCEx_PeriphCLKConfig+0x178>
8005900: 4a45 ldr r2, [pc, #276] ; (8005a18 <HAL_RCCEx_PeriphCLKConfig+0x278>)
8005902: 4b45 ldr r3, [pc, #276] ; (8005a18 <HAL_RCCEx_PeriphCLKConfig+0x278>)
8005904: 681b ldr r3, [r3, #0]
8005906: 4949 ldr r1, [pc, #292] ; (8005a2c <HAL_RCCEx_PeriphCLKConfig+0x28c>)
8005908: 4019 ands r1, r3
800590a: 687b ldr r3, [r7, #4]
800590c: 6858 ldr r0, [r3, #4]
800590e: 23c0 movs r3, #192 ; 0xc0
8005910: 039b lsls r3, r3, #14
8005912: 4003 ands r3, r0
8005914: 430b orrs r3, r1
8005916: 6013 str r3, [r2, #0]
8005918: 4a3f ldr r2, [pc, #252] ; (8005a18 <HAL_RCCEx_PeriphCLKConfig+0x278>)
800591a: 4b3f ldr r3, [pc, #252] ; (8005a18 <HAL_RCCEx_PeriphCLKConfig+0x278>)
800591c: 6d19 ldr r1, [r3, #80] ; 0x50
800591e: 687b ldr r3, [r7, #4]
8005920: 6858 ldr r0, [r3, #4]
8005922: 23c0 movs r3, #192 ; 0xc0
8005924: 029b lsls r3, r3, #10
8005926: 4003 ands r3, r0
8005928: 430b orrs r3, r1
800592a: 6513 str r3, [r2, #80] ; 0x50
/* Require to disable power clock if necessary */
if(pwrclkchanged == SET)
800592c: 2317 movs r3, #23
800592e: 18fb adds r3, r7, r3
8005930: 781b ldrb r3, [r3, #0]
8005932: 2b01 cmp r3, #1
8005934: d105 bne.n 8005942 <HAL_RCCEx_PeriphCLKConfig+0x1a2>
{
__HAL_RCC_PWR_CLK_DISABLE();
8005936: 4b38 ldr r3, [pc, #224] ; (8005a18 <HAL_RCCEx_PeriphCLKConfig+0x278>)
8005938: 4a37 ldr r2, [pc, #220] ; (8005a18 <HAL_RCCEx_PeriphCLKConfig+0x278>)
800593a: 6b92 ldr r2, [r2, #56] ; 0x38
800593c: 493c ldr r1, [pc, #240] ; (8005a30 <HAL_RCCEx_PeriphCLKConfig+0x290>)
800593e: 400a ands r2, r1
8005940: 639a str r2, [r3, #56] ; 0x38
}
}
#if defined (RCC_CCIPR_USART1SEL)
/*------------------------------- USART1 Configuration ------------------------*/
if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART1) == RCC_PERIPHCLK_USART1)
8005942: 687b ldr r3, [r7, #4]
8005944: 681b ldr r3, [r3, #0]
8005946: 2201 movs r2, #1
8005948: 4013 ands r3, r2
800594a: d009 beq.n 8005960 <HAL_RCCEx_PeriphCLKConfig+0x1c0>
{
/* Check the parameters */
assert_param(IS_RCC_USART1CLKSOURCE(PeriphClkInit->Usart1ClockSelection));
/* Configure the USART1 clock source */
__HAL_RCC_USART1_CONFIG(PeriphClkInit->Usart1ClockSelection);
800594c: 4a32 ldr r2, [pc, #200] ; (8005a18 <HAL_RCCEx_PeriphCLKConfig+0x278>)
800594e: 4b32 ldr r3, [pc, #200] ; (8005a18 <HAL_RCCEx_PeriphCLKConfig+0x278>)
8005950: 6cdb ldr r3, [r3, #76] ; 0x4c
8005952: 2103 movs r1, #3
8005954: 438b bics r3, r1
8005956: 0019 movs r1, r3
8005958: 687b ldr r3, [r7, #4]
800595a: 689b ldr r3, [r3, #8]
800595c: 430b orrs r3, r1
800595e: 64d3 str r3, [r2, #76] ; 0x4c
}
#endif /* RCC_CCIPR_USART1SEL */
/*----------------------------- USART2 Configuration --------------------------*/
if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART2) == RCC_PERIPHCLK_USART2)
8005960: 687b ldr r3, [r7, #4]
8005962: 681b ldr r3, [r3, #0]
8005964: 2202 movs r2, #2
8005966: 4013 ands r3, r2
8005968: d009 beq.n 800597e <HAL_RCCEx_PeriphCLKConfig+0x1de>
{
/* Check the parameters */
assert_param(IS_RCC_USART2CLKSOURCE(PeriphClkInit->Usart2ClockSelection));
/* Configure the USART2 clock source */
__HAL_RCC_USART2_CONFIG(PeriphClkInit->Usart2ClockSelection);
800596a: 4a2b ldr r2, [pc, #172] ; (8005a18 <HAL_RCCEx_PeriphCLKConfig+0x278>)
800596c: 4b2a ldr r3, [pc, #168] ; (8005a18 <HAL_RCCEx_PeriphCLKConfig+0x278>)
800596e: 6cdb ldr r3, [r3, #76] ; 0x4c
8005970: 210c movs r1, #12
8005972: 438b bics r3, r1
8005974: 0019 movs r1, r3
8005976: 687b ldr r3, [r7, #4]
8005978: 68db ldr r3, [r3, #12]
800597a: 430b orrs r3, r1
800597c: 64d3 str r3, [r2, #76] ; 0x4c
}
/*------------------------------ LPUART1 Configuration ------------------------*/
if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_LPUART1) == RCC_PERIPHCLK_LPUART1)
800597e: 687b ldr r3, [r7, #4]
8005980: 681b ldr r3, [r3, #0]
8005982: 2204 movs r2, #4
8005984: 4013 ands r3, r2
8005986: d008 beq.n 800599a <HAL_RCCEx_PeriphCLKConfig+0x1fa>
{
/* Check the parameters */
assert_param(IS_RCC_LPUART1CLKSOURCE(PeriphClkInit->Lpuart1ClockSelection));
/* Configure the LPUAR1 clock source */
__HAL_RCC_LPUART1_CONFIG(PeriphClkInit->Lpuart1ClockSelection);
8005988: 4a23 ldr r2, [pc, #140] ; (8005a18 <HAL_RCCEx_PeriphCLKConfig+0x278>)
800598a: 4b23 ldr r3, [pc, #140] ; (8005a18 <HAL_RCCEx_PeriphCLKConfig+0x278>)
800598c: 6cdb ldr r3, [r3, #76] ; 0x4c
800598e: 4929 ldr r1, [pc, #164] ; (8005a34 <HAL_RCCEx_PeriphCLKConfig+0x294>)
8005990: 4019 ands r1, r3
8005992: 687b ldr r3, [r7, #4]
8005994: 691b ldr r3, [r3, #16]
8005996: 430b orrs r3, r1
8005998: 64d3 str r3, [r2, #76] ; 0x4c
}
/*------------------------------ I2C1 Configuration ------------------------*/
if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2C1) == RCC_PERIPHCLK_I2C1)
800599a: 687b ldr r3, [r7, #4]
800599c: 681b ldr r3, [r3, #0]
800599e: 2208 movs r2, #8
80059a0: 4013 ands r3, r2
80059a2: d008 beq.n 80059b6 <HAL_RCCEx_PeriphCLKConfig+0x216>
{
/* Check the parameters */
assert_param(IS_RCC_I2C1CLKSOURCE(PeriphClkInit->I2c1ClockSelection));
/* Configure the I2C1 clock source */
__HAL_RCC_I2C1_CONFIG(PeriphClkInit->I2c1ClockSelection);
80059a4: 4a1c ldr r2, [pc, #112] ; (8005a18 <HAL_RCCEx_PeriphCLKConfig+0x278>)
80059a6: 4b1c ldr r3, [pc, #112] ; (8005a18 <HAL_RCCEx_PeriphCLKConfig+0x278>)
80059a8: 6cdb ldr r3, [r3, #76] ; 0x4c
80059aa: 4923 ldr r1, [pc, #140] ; (8005a38 <HAL_RCCEx_PeriphCLKConfig+0x298>)
80059ac: 4019 ands r1, r3
80059ae: 687b ldr r3, [r7, #4]
80059b0: 695b ldr r3, [r3, #20]
80059b2: 430b orrs r3, r1
80059b4: 64d3 str r3, [r2, #76] ; 0x4c
}
#if defined (RCC_CCIPR_I2C3SEL)
/*------------------------------ I2C3 Configuration ------------------------*/
if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2C3) == RCC_PERIPHCLK_I2C3)
80059b6: 687b ldr r3, [r7, #4]
80059b8: 681a ldr r2, [r3, #0]
80059ba: 2380 movs r3, #128 ; 0x80
80059bc: 005b lsls r3, r3, #1
80059be: 4013 ands r3, r2
80059c0: d008 beq.n 80059d4 <HAL_RCCEx_PeriphCLKConfig+0x234>
{
/* Check the parameters */
assert_param(IS_RCC_I2C3CLKSOURCE(PeriphClkInit->I2c3ClockSelection));
/* Configure the I2C3 clock source */
__HAL_RCC_I2C3_CONFIG(PeriphClkInit->I2c3ClockSelection);
80059c2: 4a15 ldr r2, [pc, #84] ; (8005a18 <HAL_RCCEx_PeriphCLKConfig+0x278>)
80059c4: 4b14 ldr r3, [pc, #80] ; (8005a18 <HAL_RCCEx_PeriphCLKConfig+0x278>)
80059c6: 6cdb ldr r3, [r3, #76] ; 0x4c
80059c8: 4915 ldr r1, [pc, #84] ; (8005a20 <HAL_RCCEx_PeriphCLKConfig+0x280>)
80059ca: 4019 ands r1, r3
80059cc: 687b ldr r3, [r7, #4]
80059ce: 699b ldr r3, [r3, #24]
80059d0: 430b orrs r3, r1
80059d2: 64d3 str r3, [r2, #76] ; 0x4c
}
#endif /* RCC_CCIPR_I2C3SEL */
#if defined(USB)
/*---------------------------- USB and RNG configuration --------------------*/
if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USB) == (RCC_PERIPHCLK_USB))
80059d4: 687b ldr r3, [r7, #4]
80059d6: 681b ldr r3, [r3, #0]
80059d8: 2240 movs r2, #64 ; 0x40
80059da: 4013 ands r3, r2
80059dc: d008 beq.n 80059f0 <HAL_RCCEx_PeriphCLKConfig+0x250>
{
assert_param(IS_RCC_USBCLKSOURCE(PeriphClkInit->UsbClockSelection));
__HAL_RCC_USB_CONFIG(PeriphClkInit->UsbClockSelection);
80059de: 4a0e ldr r2, [pc, #56] ; (8005a18 <HAL_RCCEx_PeriphCLKConfig+0x278>)
80059e0: 4b0d ldr r3, [pc, #52] ; (8005a18 <HAL_RCCEx_PeriphCLKConfig+0x278>)
80059e2: 6cdb ldr r3, [r3, #76] ; 0x4c
80059e4: 4915 ldr r1, [pc, #84] ; (8005a3c <HAL_RCCEx_PeriphCLKConfig+0x29c>)
80059e6: 4019 ands r1, r3
80059e8: 687b ldr r3, [r7, #4]
80059ea: 6a1b ldr r3, [r3, #32]
80059ec: 430b orrs r3, r1
80059ee: 64d3 str r3, [r2, #76] ; 0x4c
}
#endif /* USB */
/*---------------------------- LPTIM1 configuration ------------------------*/
if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_LPTIM1) == (RCC_PERIPHCLK_LPTIM1))
80059f0: 687b ldr r3, [r7, #4]
80059f2: 681b ldr r3, [r3, #0]
80059f4: 2280 movs r2, #128 ; 0x80
80059f6: 4013 ands r3, r2
80059f8: d008 beq.n 8005a0c <HAL_RCCEx_PeriphCLKConfig+0x26c>
{
assert_param(IS_RCC_LPTIMCLK(PeriphClkInit->LptimClockSelection));
__HAL_RCC_LPTIM1_CONFIG(PeriphClkInit->LptimClockSelection);
80059fa: 4a07 ldr r2, [pc, #28] ; (8005a18 <HAL_RCCEx_PeriphCLKConfig+0x278>)
80059fc: 4b06 ldr r3, [pc, #24] ; (8005a18 <HAL_RCCEx_PeriphCLKConfig+0x278>)
80059fe: 6cdb ldr r3, [r3, #76] ; 0x4c
8005a00: 490f ldr r1, [pc, #60] ; (8005a40 <HAL_RCCEx_PeriphCLKConfig+0x2a0>)
8005a02: 4019 ands r1, r3
8005a04: 687b ldr r3, [r7, #4]
8005a06: 69db ldr r3, [r3, #28]
8005a08: 430b orrs r3, r1
8005a0a: 64d3 str r3, [r2, #76] ; 0x4c
}
return HAL_OK;
8005a0c: 2300 movs r3, #0
}
8005a0e: 0018 movs r0, r3
8005a10: 46bd mov sp, r7
8005a12: b006 add sp, #24
8005a14: bd80 pop {r7, pc}
8005a16: 46c0 nop ; (mov r8, r8)
8005a18: 40021000 .word 0x40021000
8005a1c: 40007000 .word 0x40007000
8005a20: fffcffff .word 0xfffcffff
8005a24: fff7ffff .word 0xfff7ffff
8005a28: 00001388 .word 0x00001388
8005a2c: ffcfffff .word 0xffcfffff
8005a30: efffffff .word 0xefffffff
8005a34: fffff3ff .word 0xfffff3ff
8005a38: ffffcfff .word 0xffffcfff
8005a3c: fbffffff .word 0xfbffffff
8005a40: fff3ffff .word 0xfff3ffff
08005a44 <HAL_TIM_Base_Init>:
* Ex: call @ref HAL_TIM_Base_DeInit() before HAL_TIM_Base_Init()
* @param htim TIM Base handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIM_Base_Init(TIM_HandleTypeDef *htim)
{
8005a44: b580 push {r7, lr}
8005a46: b082 sub sp, #8
8005a48: af00 add r7, sp, #0
8005a4a: 6078 str r0, [r7, #4]
/* Check the TIM handle allocation */
if (htim == NULL)
8005a4c: 687b ldr r3, [r7, #4]
8005a4e: 2b00 cmp r3, #0
8005a50: d101 bne.n 8005a56 <HAL_TIM_Base_Init+0x12>
{
return HAL_ERROR;
8005a52: 2301 movs r3, #1
8005a54: e032 b.n 8005abc <HAL_TIM_Base_Init+0x78>
assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
assert_param(IS_TIM_PERIOD(htim->Init.Period));
assert_param(IS_TIM_PRESCALER(htim->Init.Prescaler));
assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload));
if (htim->State == HAL_TIM_STATE_RESET)
8005a56: 687b ldr r3, [r7, #4]
8005a58: 2239 movs r2, #57 ; 0x39
8005a5a: 5c9b ldrb r3, [r3, r2]
8005a5c: b2db uxtb r3, r3
8005a5e: 2b00 cmp r3, #0
8005a60: d107 bne.n 8005a72 <HAL_TIM_Base_Init+0x2e>
{
/* Allocate lock resource and initialize it */
htim->Lock = HAL_UNLOCKED;
8005a62: 687b ldr r3, [r7, #4]
8005a64: 2238 movs r2, #56 ; 0x38
8005a66: 2100 movs r1, #0
8005a68: 5499 strb r1, [r3, r2]
}
/* Init the low level hardware : GPIO, CLOCK, NVIC */
htim->Base_MspInitCallback(htim);
#else
/* Init the low level hardware : GPIO, CLOCK, NVIC */
HAL_TIM_Base_MspInit(htim);
8005a6a: 687b ldr r3, [r7, #4]
8005a6c: 0018 movs r0, r3
8005a6e: f7fc fc9f bl 80023b0 <HAL_TIM_Base_MspInit>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
}
/* Set the TIM state */
htim->State = HAL_TIM_STATE_BUSY;
8005a72: 687b ldr r3, [r7, #4]
8005a74: 2239 movs r2, #57 ; 0x39
8005a76: 2102 movs r1, #2
8005a78: 5499 strb r1, [r3, r2]
/* Set the Time Base configuration */
TIM_Base_SetConfig(htim->Instance, &htim->Init);
8005a7a: 687b ldr r3, [r7, #4]
8005a7c: 681a ldr r2, [r3, #0]
8005a7e: 687b ldr r3, [r7, #4]
8005a80: 3304 adds r3, #4
8005a82: 0019 movs r1, r3
8005a84: 0010 movs r0, r2
8005a86: f000 f977 bl 8005d78 <TIM_Base_SetConfig>
/* Initialize the DMA burst operation state */
htim->DMABurstState = HAL_DMA_BURST_STATE_READY;
8005a8a: 687b ldr r3, [r7, #4]
8005a8c: 223e movs r2, #62 ; 0x3e
8005a8e: 2101 movs r1, #1
8005a90: 5499 strb r1, [r3, r2]
/* Initialize the TIM channels state */
TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY);
8005a92: 687b ldr r3, [r7, #4]
8005a94: 223a movs r2, #58 ; 0x3a
8005a96: 2101 movs r1, #1
8005a98: 5499 strb r1, [r3, r2]
8005a9a: 687b ldr r3, [r7, #4]
8005a9c: 223b movs r2, #59 ; 0x3b
8005a9e: 2101 movs r1, #1
8005aa0: 5499 strb r1, [r3, r2]
8005aa2: 687b ldr r3, [r7, #4]
8005aa4: 223c movs r2, #60 ; 0x3c
8005aa6: 2101 movs r1, #1
8005aa8: 5499 strb r1, [r3, r2]
8005aaa: 687b ldr r3, [r7, #4]
8005aac: 223d movs r2, #61 ; 0x3d
8005aae: 2101 movs r1, #1
8005ab0: 5499 strb r1, [r3, r2]
/* Initialize the TIM state*/
htim->State = HAL_TIM_STATE_READY;
8005ab2: 687b ldr r3, [r7, #4]
8005ab4: 2239 movs r2, #57 ; 0x39
8005ab6: 2101 movs r1, #1
8005ab8: 5499 strb r1, [r3, r2]
return HAL_OK;
8005aba: 2300 movs r3, #0
}
8005abc: 0018 movs r0, r3
8005abe: 46bd mov sp, r7
8005ac0: b002 add sp, #8
8005ac2: bd80 pop {r7, pc}
08005ac4 <HAL_TIM_Base_Start_IT>:
* @brief Starts the TIM Base generation in interrupt mode.
* @param htim TIM Base handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIM_Base_Start_IT(TIM_HandleTypeDef *htim)
{
8005ac4: b580 push {r7, lr}
8005ac6: b084 sub sp, #16
8005ac8: af00 add r7, sp, #0
8005aca: 6078 str r0, [r7, #4]
/* Check the parameters */
assert_param(IS_TIM_INSTANCE(htim->Instance));
/* Check the TIM state */
if (htim->State != HAL_TIM_STATE_READY)
8005acc: 687b ldr r3, [r7, #4]
8005ace: 2239 movs r2, #57 ; 0x39
8005ad0: 5c9b ldrb r3, [r3, r2]
8005ad2: b2db uxtb r3, r3
8005ad4: 2b01 cmp r3, #1
8005ad6: d001 beq.n 8005adc <HAL_TIM_Base_Start_IT+0x18>
{
return HAL_ERROR;
8005ad8: 2301 movs r3, #1
8005ada: e03b b.n 8005b54 <HAL_TIM_Base_Start_IT+0x90>
}
/* Set the TIM state */
htim->State = HAL_TIM_STATE_BUSY;
8005adc: 687b ldr r3, [r7, #4]
8005ade: 2239 movs r2, #57 ; 0x39
8005ae0: 2102 movs r1, #2
8005ae2: 5499 strb r1, [r3, r2]
/* Enable the TIM Update interrupt */
__HAL_TIM_ENABLE_IT(htim, TIM_IT_UPDATE);
8005ae4: 687b ldr r3, [r7, #4]
8005ae6: 681b ldr r3, [r3, #0]
8005ae8: 687a ldr r2, [r7, #4]
8005aea: 6812 ldr r2, [r2, #0]
8005aec: 68d2 ldr r2, [r2, #12]
8005aee: 2101 movs r1, #1
8005af0: 430a orrs r2, r1
8005af2: 60da str r2, [r3, #12]
/* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
8005af4: 687b ldr r3, [r7, #4]
8005af6: 681a ldr r2, [r3, #0]
8005af8: 2380 movs r3, #128 ; 0x80
8005afa: 05db lsls r3, r3, #23
8005afc: 429a cmp r2, r3
8005afe: d00e beq.n 8005b1e <HAL_TIM_Base_Start_IT+0x5a>
8005b00: 687b ldr r3, [r7, #4]
8005b02: 681b ldr r3, [r3, #0]
8005b04: 4a15 ldr r2, [pc, #84] ; (8005b5c <HAL_TIM_Base_Start_IT+0x98>)
8005b06: 4293 cmp r3, r2
8005b08: d009 beq.n 8005b1e <HAL_TIM_Base_Start_IT+0x5a>
8005b0a: 687b ldr r3, [r7, #4]
8005b0c: 681b ldr r3, [r3, #0]
8005b0e: 4a14 ldr r2, [pc, #80] ; (8005b60 <HAL_TIM_Base_Start_IT+0x9c>)
8005b10: 4293 cmp r3, r2
8005b12: d004 beq.n 8005b1e <HAL_TIM_Base_Start_IT+0x5a>
8005b14: 687b ldr r3, [r7, #4]
8005b16: 681b ldr r3, [r3, #0]
8005b18: 4a12 ldr r2, [pc, #72] ; (8005b64 <HAL_TIM_Base_Start_IT+0xa0>)
8005b1a: 4293 cmp r3, r2
8005b1c: d111 bne.n 8005b42 <HAL_TIM_Base_Start_IT+0x7e>
{
tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
8005b1e: 687b ldr r3, [r7, #4]
8005b20: 681b ldr r3, [r3, #0]
8005b22: 689b ldr r3, [r3, #8]
8005b24: 2207 movs r2, #7
8005b26: 4013 ands r3, r2
8005b28: 60fb str r3, [r7, #12]
if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
8005b2a: 68fb ldr r3, [r7, #12]
8005b2c: 2b06 cmp r3, #6
8005b2e: d010 beq.n 8005b52 <HAL_TIM_Base_Start_IT+0x8e>
{
__HAL_TIM_ENABLE(htim);
8005b30: 687b ldr r3, [r7, #4]
8005b32: 681b ldr r3, [r3, #0]
8005b34: 687a ldr r2, [r7, #4]
8005b36: 6812 ldr r2, [r2, #0]
8005b38: 6812 ldr r2, [r2, #0]
8005b3a: 2101 movs r1, #1
8005b3c: 430a orrs r2, r1
8005b3e: 601a str r2, [r3, #0]
if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
8005b40: e007 b.n 8005b52 <HAL_TIM_Base_Start_IT+0x8e>
}
}
else
{
__HAL_TIM_ENABLE(htim);
8005b42: 687b ldr r3, [r7, #4]
8005b44: 681b ldr r3, [r3, #0]
8005b46: 687a ldr r2, [r7, #4]
8005b48: 6812 ldr r2, [r2, #0]
8005b4a: 6812 ldr r2, [r2, #0]
8005b4c: 2101 movs r1, #1
8005b4e: 430a orrs r2, r1
8005b50: 601a str r2, [r3, #0]
}
/* Return function status */
return HAL_OK;
8005b52: 2300 movs r3, #0
}
8005b54: 0018 movs r0, r3
8005b56: 46bd mov sp, r7
8005b58: b004 add sp, #16
8005b5a: bd80 pop {r7, pc}
8005b5c: 40000400 .word 0x40000400
8005b60: 40010800 .word 0x40010800
8005b64: 40011400 .word 0x40011400
08005b68 <HAL_TIM_IRQHandler>:
* @brief This function handles TIM interrupts requests.
* @param htim TIM handle
* @retval None
*/
void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim)
{
8005b68: b580 push {r7, lr}
8005b6a: b082 sub sp, #8
8005b6c: af00 add r7, sp, #0
8005b6e: 6078 str r0, [r7, #4]
/* Capture compare 1 event */
if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET)
8005b70: 687b ldr r3, [r7, #4]
8005b72: 681b ldr r3, [r3, #0]
8005b74: 691b ldr r3, [r3, #16]
8005b76: 2202 movs r2, #2
8005b78: 4013 ands r3, r2
8005b7a: 2b02 cmp r3, #2
8005b7c: d124 bne.n 8005bc8 <HAL_TIM_IRQHandler+0x60>
{
if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC1) != RESET)
8005b7e: 687b ldr r3, [r7, #4]
8005b80: 681b ldr r3, [r3, #0]
8005b82: 68db ldr r3, [r3, #12]
8005b84: 2202 movs r2, #2
8005b86: 4013 ands r3, r2
8005b88: 2b02 cmp r3, #2
8005b8a: d11d bne.n 8005bc8 <HAL_TIM_IRQHandler+0x60>
{
{
__HAL_TIM_CLEAR_IT(htim, TIM_IT_CC1);
8005b8c: 687b ldr r3, [r7, #4]
8005b8e: 681b ldr r3, [r3, #0]
8005b90: 2203 movs r2, #3
8005b92: 4252 negs r2, r2
8005b94: 611a str r2, [r3, #16]
htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1;
8005b96: 687b ldr r3, [r7, #4]
8005b98: 2201 movs r2, #1
8005b9a: 761a strb r2, [r3, #24]
/* Input capture event */
if ((htim->Instance->CCMR1 & TIM_CCMR1_CC1S) != 0x00U)
8005b9c: 687b ldr r3, [r7, #4]
8005b9e: 681b ldr r3, [r3, #0]
8005ba0: 699b ldr r3, [r3, #24]
8005ba2: 2203 movs r2, #3
8005ba4: 4013 ands r3, r2
8005ba6: d004 beq.n 8005bb2 <HAL_TIM_IRQHandler+0x4a>
{
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
htim->IC_CaptureCallback(htim);
#else
HAL_TIM_IC_CaptureCallback(htim);
8005ba8: 687b ldr r3, [r7, #4]
8005baa: 0018 movs r0, r3
8005bac: f000 f8cc bl 8005d48 <HAL_TIM_IC_CaptureCallback>
8005bb0: e007 b.n 8005bc2 <HAL_TIM_IRQHandler+0x5a>
{
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
htim->OC_DelayElapsedCallback(htim);
htim->PWM_PulseFinishedCallback(htim);
#else
HAL_TIM_OC_DelayElapsedCallback(htim);
8005bb2: 687b ldr r3, [r7, #4]
8005bb4: 0018 movs r0, r3
8005bb6: f000 f8bf bl 8005d38 <HAL_TIM_OC_DelayElapsedCallback>
HAL_TIM_PWM_PulseFinishedCallback(htim);
8005bba: 687b ldr r3, [r7, #4]
8005bbc: 0018 movs r0, r3
8005bbe: f000 f8cb bl 8005d58 <HAL_TIM_PWM_PulseFinishedCallback>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
}
htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
8005bc2: 687b ldr r3, [r7, #4]
8005bc4: 2200 movs r2, #0
8005bc6: 761a strb r2, [r3, #24]
}
}
}
/* Capture compare 2 event */
if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC2) != RESET)
8005bc8: 687b ldr r3, [r7, #4]
8005bca: 681b ldr r3, [r3, #0]
8005bcc: 691b ldr r3, [r3, #16]
8005bce: 2204 movs r2, #4
8005bd0: 4013 ands r3, r2
8005bd2: 2b04 cmp r3, #4
8005bd4: d125 bne.n 8005c22 <HAL_TIM_IRQHandler+0xba>
{
if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC2) != RESET)
8005bd6: 687b ldr r3, [r7, #4]
8005bd8: 681b ldr r3, [r3, #0]
8005bda: 68db ldr r3, [r3, #12]
8005bdc: 2204 movs r2, #4
8005bde: 4013 ands r3, r2
8005be0: 2b04 cmp r3, #4
8005be2: d11e bne.n 8005c22 <HAL_TIM_IRQHandler+0xba>
{
__HAL_TIM_CLEAR_IT(htim, TIM_IT_CC2);
8005be4: 687b ldr r3, [r7, #4]
8005be6: 681b ldr r3, [r3, #0]
8005be8: 2205 movs r2, #5
8005bea: 4252 negs r2, r2
8005bec: 611a str r2, [r3, #16]
htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2;
8005bee: 687b ldr r3, [r7, #4]
8005bf0: 2202 movs r2, #2
8005bf2: 761a strb r2, [r3, #24]
/* Input capture event */
if ((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U)
8005bf4: 687b ldr r3, [r7, #4]
8005bf6: 681b ldr r3, [r3, #0]
8005bf8: 699a ldr r2, [r3, #24]
8005bfa: 23c0 movs r3, #192 ; 0xc0
8005bfc: 009b lsls r3, r3, #2
8005bfe: 4013 ands r3, r2
8005c00: d004 beq.n 8005c0c <HAL_TIM_IRQHandler+0xa4>
{
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
htim->IC_CaptureCallback(htim);
#else
HAL_TIM_IC_CaptureCallback(htim);
8005c02: 687b ldr r3, [r7, #4]
8005c04: 0018 movs r0, r3
8005c06: f000 f89f bl 8005d48 <HAL_TIM_IC_CaptureCallback>
8005c0a: e007 b.n 8005c1c <HAL_TIM_IRQHandler+0xb4>
{
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
htim->OC_DelayElapsedCallback(htim);
htim->PWM_PulseFinishedCallback(htim);
#else
HAL_TIM_OC_DelayElapsedCallback(htim);
8005c0c: 687b ldr r3, [r7, #4]
8005c0e: 0018 movs r0, r3
8005c10: f000 f892 bl 8005d38 <HAL_TIM_OC_DelayElapsedCallback>
HAL_TIM_PWM_PulseFinishedCallback(htim);
8005c14: 687b ldr r3, [r7, #4]
8005c16: 0018 movs r0, r3
8005c18: f000 f89e bl 8005d58 <HAL_TIM_PWM_PulseFinishedCallback>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
}
htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
8005c1c: 687b ldr r3, [r7, #4]
8005c1e: 2200 movs r2, #0
8005c20: 761a strb r2, [r3, #24]
}
}
/* Capture compare 3 event */
if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC3) != RESET)
8005c22: 687b ldr r3, [r7, #4]
8005c24: 681b ldr r3, [r3, #0]
8005c26: 691b ldr r3, [r3, #16]
8005c28: 2208 movs r2, #8
8005c2a: 4013 ands r3, r2
8005c2c: 2b08 cmp r3, #8
8005c2e: d124 bne.n 8005c7a <HAL_TIM_IRQHandler+0x112>
{
if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC3) != RESET)
8005c30: 687b ldr r3, [r7, #4]
8005c32: 681b ldr r3, [r3, #0]
8005c34: 68db ldr r3, [r3, #12]
8005c36: 2208 movs r2, #8
8005c38: 4013 ands r3, r2
8005c3a: 2b08 cmp r3, #8
8005c3c: d11d bne.n 8005c7a <HAL_TIM_IRQHandler+0x112>
{
__HAL_TIM_CLEAR_IT(htim, TIM_IT_CC3);
8005c3e: 687b ldr r3, [r7, #4]
8005c40: 681b ldr r3, [r3, #0]
8005c42: 2209 movs r2, #9
8005c44: 4252 negs r2, r2
8005c46: 611a str r2, [r3, #16]
htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3;
8005c48: 687b ldr r3, [r7, #4]
8005c4a: 2204 movs r2, #4
8005c4c: 761a strb r2, [r3, #24]
/* Input capture event */
if ((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U)
8005c4e: 687b ldr r3, [r7, #4]
8005c50: 681b ldr r3, [r3, #0]
8005c52: 69db ldr r3, [r3, #28]
8005c54: 2203 movs r2, #3
8005c56: 4013 ands r3, r2
8005c58: d004 beq.n 8005c64 <HAL_TIM_IRQHandler+0xfc>
{
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
htim->IC_CaptureCallback(htim);
#else
HAL_TIM_IC_CaptureCallback(htim);
8005c5a: 687b ldr r3, [r7, #4]
8005c5c: 0018 movs r0, r3
8005c5e: f000 f873 bl 8005d48 <HAL_TIM_IC_CaptureCallback>
8005c62: e007 b.n 8005c74 <HAL_TIM_IRQHandler+0x10c>
{
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
htim->OC_DelayElapsedCallback(htim);
htim->PWM_PulseFinishedCallback(htim);
#else
HAL_TIM_OC_DelayElapsedCallback(htim);
8005c64: 687b ldr r3, [r7, #4]
8005c66: 0018 movs r0, r3
8005c68: f000 f866 bl 8005d38 <HAL_TIM_OC_DelayElapsedCallback>
HAL_TIM_PWM_PulseFinishedCallback(htim);
8005c6c: 687b ldr r3, [r7, #4]
8005c6e: 0018 movs r0, r3
8005c70: f000 f872 bl 8005d58 <HAL_TIM_PWM_PulseFinishedCallback>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
}
htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
8005c74: 687b ldr r3, [r7, #4]
8005c76: 2200 movs r2, #0
8005c78: 761a strb r2, [r3, #24]
}
}
/* Capture compare 4 event */
if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC4) != RESET)
8005c7a: 687b ldr r3, [r7, #4]
8005c7c: 681b ldr r3, [r3, #0]
8005c7e: 691b ldr r3, [r3, #16]
8005c80: 2210 movs r2, #16
8005c82: 4013 ands r3, r2
8005c84: 2b10 cmp r3, #16
8005c86: d125 bne.n 8005cd4 <HAL_TIM_IRQHandler+0x16c>
{
if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC4) != RESET)
8005c88: 687b ldr r3, [r7, #4]
8005c8a: 681b ldr r3, [r3, #0]
8005c8c: 68db ldr r3, [r3, #12]
8005c8e: 2210 movs r2, #16
8005c90: 4013 ands r3, r2
8005c92: 2b10 cmp r3, #16
8005c94: d11e bne.n 8005cd4 <HAL_TIM_IRQHandler+0x16c>
{
__HAL_TIM_CLEAR_IT(htim, TIM_IT_CC4);
8005c96: 687b ldr r3, [r7, #4]
8005c98: 681b ldr r3, [r3, #0]
8005c9a: 2211 movs r2, #17
8005c9c: 4252 negs r2, r2
8005c9e: 611a str r2, [r3, #16]
htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4;
8005ca0: 687b ldr r3, [r7, #4]
8005ca2: 2208 movs r2, #8
8005ca4: 761a strb r2, [r3, #24]
/* Input capture event */
if ((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U)
8005ca6: 687b ldr r3, [r7, #4]
8005ca8: 681b ldr r3, [r3, #0]
8005caa: 69da ldr r2, [r3, #28]
8005cac: 23c0 movs r3, #192 ; 0xc0
8005cae: 009b lsls r3, r3, #2
8005cb0: 4013 ands r3, r2
8005cb2: d004 beq.n 8005cbe <HAL_TIM_IRQHandler+0x156>
{
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
htim->IC_CaptureCallback(htim);
#else
HAL_TIM_IC_CaptureCallback(htim);
8005cb4: 687b ldr r3, [r7, #4]
8005cb6: 0018 movs r0, r3
8005cb8: f000 f846 bl 8005d48 <HAL_TIM_IC_CaptureCallback>
8005cbc: e007 b.n 8005cce <HAL_TIM_IRQHandler+0x166>
{
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
htim->OC_DelayElapsedCallback(htim);
htim->PWM_PulseFinishedCallback(htim);
#else
HAL_TIM_OC_DelayElapsedCallback(htim);
8005cbe: 687b ldr r3, [r7, #4]
8005cc0: 0018 movs r0, r3
8005cc2: f000 f839 bl 8005d38 <HAL_TIM_OC_DelayElapsedCallback>
HAL_TIM_PWM_PulseFinishedCallback(htim);
8005cc6: 687b ldr r3, [r7, #4]
8005cc8: 0018 movs r0, r3
8005cca: f000 f845 bl 8005d58 <HAL_TIM_PWM_PulseFinishedCallback>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
}
htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
8005cce: 687b ldr r3, [r7, #4]
8005cd0: 2200 movs r2, #0
8005cd2: 761a strb r2, [r3, #24]
}
}
/* TIM Update event */
if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_UPDATE) != RESET)
8005cd4: 687b ldr r3, [r7, #4]
8005cd6: 681b ldr r3, [r3, #0]
8005cd8: 691b ldr r3, [r3, #16]
8005cda: 2201 movs r2, #1
8005cdc: 4013 ands r3, r2
8005cde: 2b01 cmp r3, #1
8005ce0: d10f bne.n 8005d02 <HAL_TIM_IRQHandler+0x19a>
{
if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_UPDATE) != RESET)
8005ce2: 687b ldr r3, [r7, #4]
8005ce4: 681b ldr r3, [r3, #0]
8005ce6: 68db ldr r3, [r3, #12]
8005ce8: 2201 movs r2, #1
8005cea: 4013 ands r3, r2
8005cec: 2b01 cmp r3, #1
8005cee: d108 bne.n 8005d02 <HAL_TIM_IRQHandler+0x19a>
{
__HAL_TIM_CLEAR_IT(htim, TIM_IT_UPDATE);
8005cf0: 687b ldr r3, [r7, #4]
8005cf2: 681b ldr r3, [r3, #0]
8005cf4: 2202 movs r2, #2
8005cf6: 4252 negs r2, r2
8005cf8: 611a str r2, [r3, #16]
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
htim->PeriodElapsedCallback(htim);
#else
HAL_TIM_PeriodElapsedCallback(htim);
8005cfa: 687b ldr r3, [r7, #4]
8005cfc: 0018 movs r0, r3
8005cfe: f7fc fb77 bl 80023f0 <HAL_TIM_PeriodElapsedCallback>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
}
}
/* TIM Trigger detection event */
if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_TRIGGER) != RESET)
8005d02: 687b ldr r3, [r7, #4]
8005d04: 681b ldr r3, [r3, #0]
8005d06: 691b ldr r3, [r3, #16]
8005d08: 2240 movs r2, #64 ; 0x40
8005d0a: 4013 ands r3, r2
8005d0c: 2b40 cmp r3, #64 ; 0x40
8005d0e: d10f bne.n 8005d30 <HAL_TIM_IRQHandler+0x1c8>
{
if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_TRIGGER) != RESET)
8005d10: 687b ldr r3, [r7, #4]
8005d12: 681b ldr r3, [r3, #0]
8005d14: 68db ldr r3, [r3, #12]
8005d16: 2240 movs r2, #64 ; 0x40
8005d18: 4013 ands r3, r2
8005d1a: 2b40 cmp r3, #64 ; 0x40
8005d1c: d108 bne.n 8005d30 <HAL_TIM_IRQHandler+0x1c8>
{
__HAL_TIM_CLEAR_IT(htim, TIM_IT_TRIGGER);
8005d1e: 687b ldr r3, [r7, #4]
8005d20: 681b ldr r3, [r3, #0]
8005d22: 2241 movs r2, #65 ; 0x41
8005d24: 4252 negs r2, r2
8005d26: 611a str r2, [r3, #16]
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
htim->TriggerCallback(htim);
#else
HAL_TIM_TriggerCallback(htim);
8005d28: 687b ldr r3, [r7, #4]
8005d2a: 0018 movs r0, r3
8005d2c: f000 f81c bl 8005d68 <HAL_TIM_TriggerCallback>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
}
}
}
8005d30: 46c0 nop ; (mov r8, r8)
8005d32: 46bd mov sp, r7
8005d34: b002 add sp, #8
8005d36: bd80 pop {r7, pc}
08005d38 <HAL_TIM_OC_DelayElapsedCallback>:
* @brief Output Compare callback in non-blocking mode
* @param htim TIM OC handle
* @retval None
*/
__weak void HAL_TIM_OC_DelayElapsedCallback(TIM_HandleTypeDef *htim)
{
8005d38: b580 push {r7, lr}
8005d3a: b082 sub sp, #8
8005d3c: af00 add r7, sp, #0
8005d3e: 6078 str r0, [r7, #4]
UNUSED(htim);
/* NOTE : This function should not be modified, when the callback is needed,
the HAL_TIM_OC_DelayElapsedCallback could be implemented in the user file
*/
}
8005d40: 46c0 nop ; (mov r8, r8)
8005d42: 46bd mov sp, r7
8005d44: b002 add sp, #8
8005d46: bd80 pop {r7, pc}
08005d48 <HAL_TIM_IC_CaptureCallback>:
* @brief Input Capture callback in non-blocking mode
* @param htim TIM IC handle
* @retval None
*/
__weak void HAL_TIM_IC_CaptureCallback(TIM_HandleTypeDef *htim)
{
8005d48: b580 push {r7, lr}
8005d4a: b082 sub sp, #8
8005d4c: af00 add r7, sp, #0
8005d4e: 6078 str r0, [r7, #4]
UNUSED(htim);
/* NOTE : This function should not be modified, when the callback is needed,
the HAL_TIM_IC_CaptureCallback could be implemented in the user file
*/
}
8005d50: 46c0 nop ; (mov r8, r8)
8005d52: 46bd mov sp, r7
8005d54: b002 add sp, #8
8005d56: bd80 pop {r7, pc}
08005d58 <HAL_TIM_PWM_PulseFinishedCallback>:
* @brief PWM Pulse finished callback in non-blocking mode
* @param htim TIM handle
* @retval None
*/
__weak void HAL_TIM_PWM_PulseFinishedCallback(TIM_HandleTypeDef *htim)
{
8005d58: b580 push {r7, lr}
8005d5a: b082 sub sp, #8
8005d5c: af00 add r7, sp, #0
8005d5e: 6078 str r0, [r7, #4]
UNUSED(htim);
/* NOTE : This function should not be modified, when the callback is needed,
the HAL_TIM_PWM_PulseFinishedCallback could be implemented in the user file
*/
}
8005d60: 46c0 nop ; (mov r8, r8)
8005d62: 46bd mov sp, r7
8005d64: b002 add sp, #8
8005d66: bd80 pop {r7, pc}
08005d68 <HAL_TIM_TriggerCallback>:
* @brief Hall Trigger detection callback in non-blocking mode
* @param htim TIM handle
* @retval None
*/
__weak void HAL_TIM_TriggerCallback(TIM_HandleTypeDef *htim)
{
8005d68: b580 push {r7, lr}
8005d6a: b082 sub sp, #8
8005d6c: af00 add r7, sp, #0
8005d6e: 6078 str r0, [r7, #4]
UNUSED(htim);
/* NOTE : This function should not be modified, when the callback is needed,
the HAL_TIM_TriggerCallback could be implemented in the user file
*/
}
8005d70: 46c0 nop ; (mov r8, r8)
8005d72: 46bd mov sp, r7
8005d74: b002 add sp, #8
8005d76: bd80 pop {r7, pc}
08005d78 <TIM_Base_SetConfig>:
* @param TIMx TIM peripheral
* @param Structure TIM Base configuration structure
* @retval None
*/
static void TIM_Base_SetConfig(TIM_TypeDef *TIMx, TIM_Base_InitTypeDef *Structure)
{
8005d78: b580 push {r7, lr}
8005d7a: b084 sub sp, #16
8005d7c: af00 add r7, sp, #0
8005d7e: 6078 str r0, [r7, #4]
8005d80: 6039 str r1, [r7, #0]
uint32_t tmpcr1;
tmpcr1 = TIMx->CR1;
8005d82: 687b ldr r3, [r7, #4]
8005d84: 681b ldr r3, [r3, #0]
8005d86: 60fb str r3, [r7, #12]
/* Set TIM Time Base Unit parameters ---------------------------------------*/
if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx))
8005d88: 687a ldr r2, [r7, #4]
8005d8a: 2380 movs r3, #128 ; 0x80
8005d8c: 05db lsls r3, r3, #23
8005d8e: 429a cmp r2, r3
8005d90: d00b beq.n 8005daa <TIM_Base_SetConfig+0x32>
8005d92: 687b ldr r3, [r7, #4]
8005d94: 4a23 ldr r2, [pc, #140] ; (8005e24 <TIM_Base_SetConfig+0xac>)
8005d96: 4293 cmp r3, r2
8005d98: d007 beq.n 8005daa <TIM_Base_SetConfig+0x32>
8005d9a: 687b ldr r3, [r7, #4]
8005d9c: 4a22 ldr r2, [pc, #136] ; (8005e28 <TIM_Base_SetConfig+0xb0>)
8005d9e: 4293 cmp r3, r2
8005da0: d003 beq.n 8005daa <TIM_Base_SetConfig+0x32>
8005da2: 687b ldr r3, [r7, #4]
8005da4: 4a21 ldr r2, [pc, #132] ; (8005e2c <TIM_Base_SetConfig+0xb4>)
8005da6: 4293 cmp r3, r2
8005da8: d108 bne.n 8005dbc <TIM_Base_SetConfig+0x44>
{
/* Select the Counter Mode */
tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS);
8005daa: 68fb ldr r3, [r7, #12]
8005dac: 2270 movs r2, #112 ; 0x70
8005dae: 4393 bics r3, r2
8005db0: 60fb str r3, [r7, #12]
tmpcr1 |= Structure->CounterMode;
8005db2: 683b ldr r3, [r7, #0]
8005db4: 685b ldr r3, [r3, #4]
8005db6: 68fa ldr r2, [r7, #12]
8005db8: 4313 orrs r3, r2
8005dba: 60fb str r3, [r7, #12]
}
if (IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx))
8005dbc: 687a ldr r2, [r7, #4]
8005dbe: 2380 movs r3, #128 ; 0x80
8005dc0: 05db lsls r3, r3, #23
8005dc2: 429a cmp r2, r3
8005dc4: d00b beq.n 8005dde <TIM_Base_SetConfig+0x66>
8005dc6: 687b ldr r3, [r7, #4]
8005dc8: 4a16 ldr r2, [pc, #88] ; (8005e24 <TIM_Base_SetConfig+0xac>)
8005dca: 4293 cmp r3, r2
8005dcc: d007 beq.n 8005dde <TIM_Base_SetConfig+0x66>
8005dce: 687b ldr r3, [r7, #4]
8005dd0: 4a15 ldr r2, [pc, #84] ; (8005e28 <TIM_Base_SetConfig+0xb0>)
8005dd2: 4293 cmp r3, r2
8005dd4: d003 beq.n 8005dde <TIM_Base_SetConfig+0x66>
8005dd6: 687b ldr r3, [r7, #4]
8005dd8: 4a14 ldr r2, [pc, #80] ; (8005e2c <TIM_Base_SetConfig+0xb4>)
8005dda: 4293 cmp r3, r2
8005ddc: d108 bne.n 8005df0 <TIM_Base_SetConfig+0x78>
{
/* Set the clock division */
tmpcr1 &= ~TIM_CR1_CKD;
8005dde: 68fb ldr r3, [r7, #12]
8005de0: 4a13 ldr r2, [pc, #76] ; (8005e30 <TIM_Base_SetConfig+0xb8>)
8005de2: 4013 ands r3, r2
8005de4: 60fb str r3, [r7, #12]
tmpcr1 |= (uint32_t)Structure->ClockDivision;
8005de6: 683b ldr r3, [r7, #0]
8005de8: 68db ldr r3, [r3, #12]
8005dea: 68fa ldr r2, [r7, #12]
8005dec: 4313 orrs r3, r2
8005dee: 60fb str r3, [r7, #12]
}
/* Set the auto-reload preload */
MODIFY_REG(tmpcr1, TIM_CR1_ARPE, Structure->AutoReloadPreload);
8005df0: 68fb ldr r3, [r7, #12]
8005df2: 2280 movs r2, #128 ; 0x80
8005df4: 4393 bics r3, r2
8005df6: 001a movs r2, r3
8005df8: 683b ldr r3, [r7, #0]
8005dfa: 691b ldr r3, [r3, #16]
8005dfc: 4313 orrs r3, r2
8005dfe: 60fb str r3, [r7, #12]
TIMx->CR1 = tmpcr1;
8005e00: 687b ldr r3, [r7, #4]
8005e02: 68fa ldr r2, [r7, #12]
8005e04: 601a str r2, [r3, #0]
/* Set the Autoreload value */
TIMx->ARR = (uint32_t)Structure->Period ;
8005e06: 683b ldr r3, [r7, #0]
8005e08: 689a ldr r2, [r3, #8]
8005e0a: 687b ldr r3, [r7, #4]
8005e0c: 62da str r2, [r3, #44] ; 0x2c
/* Set the Prescaler value */
TIMx->PSC = Structure->Prescaler;
8005e0e: 683b ldr r3, [r7, #0]
8005e10: 681a ldr r2, [r3, #0]
8005e12: 687b ldr r3, [r7, #4]
8005e14: 629a str r2, [r3, #40] ; 0x28
/* Generate an update event to reload the Prescaler
and the repetition counter (only for advanced timer) value immediately */
TIMx->EGR = TIM_EGR_UG;
8005e16: 687b ldr r3, [r7, #4]
8005e18: 2201 movs r2, #1
8005e1a: 615a str r2, [r3, #20]
}
8005e1c: 46c0 nop ; (mov r8, r8)
8005e1e: 46bd mov sp, r7
8005e20: b004 add sp, #16
8005e22: bd80 pop {r7, pc}
8005e24: 40000400 .word 0x40000400
8005e28: 40010800 .word 0x40010800
8005e2c: 40011400 .word 0x40011400
8005e30: fffffcff .word 0xfffffcff
08005e34 <HAL_TIMEx_MasterConfigSynchronization>:
* mode.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim,
TIM_MasterConfigTypeDef *sMasterConfig)
{
8005e34: b580 push {r7, lr}
8005e36: b084 sub sp, #16
8005e38: af00 add r7, sp, #0
8005e3a: 6078 str r0, [r7, #4]
8005e3c: 6039 str r1, [r7, #0]
assert_param(IS_TIM_MASTER_INSTANCE(htim->Instance));
assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger));
assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode));
/* Check input state */
__HAL_LOCK(htim);
8005e3e: 687b ldr r3, [r7, #4]
8005e40: 2238 movs r2, #56 ; 0x38
8005e42: 5c9b ldrb r3, [r3, r2]
8005e44: 2b01 cmp r3, #1
8005e46: d101 bne.n 8005e4c <HAL_TIMEx_MasterConfigSynchronization+0x18>
8005e48: 2302 movs r3, #2
8005e4a: e047 b.n 8005edc <HAL_TIMEx_MasterConfigSynchronization+0xa8>
8005e4c: 687b ldr r3, [r7, #4]
8005e4e: 2238 movs r2, #56 ; 0x38
8005e50: 2101 movs r1, #1
8005e52: 5499 strb r1, [r3, r2]
/* Change the handler state */
htim->State = HAL_TIM_STATE_BUSY;
8005e54: 687b ldr r3, [r7, #4]
8005e56: 2239 movs r2, #57 ; 0x39
8005e58: 2102 movs r1, #2
8005e5a: 5499 strb r1, [r3, r2]
/* Get the TIMx CR2 register value */
tmpcr2 = htim->Instance->CR2;
8005e5c: 687b ldr r3, [r7, #4]
8005e5e: 681b ldr r3, [r3, #0]
8005e60: 685b ldr r3, [r3, #4]
8005e62: 60fb str r3, [r7, #12]
/* Get the TIMx SMCR register value */
tmpsmcr = htim->Instance->SMCR;
8005e64: 687b ldr r3, [r7, #4]
8005e66: 681b ldr r3, [r3, #0]
8005e68: 689b ldr r3, [r3, #8]
8005e6a: 60bb str r3, [r7, #8]
/* Reset the MMS Bits */
tmpcr2 &= ~TIM_CR2_MMS;
8005e6c: 68fb ldr r3, [r7, #12]
8005e6e: 2270 movs r2, #112 ; 0x70
8005e70: 4393 bics r3, r2
8005e72: 60fb str r3, [r7, #12]
/* Select the TRGO source */
tmpcr2 |= sMasterConfig->MasterOutputTrigger;
8005e74: 683b ldr r3, [r7, #0]
8005e76: 681b ldr r3, [r3, #0]
8005e78: 68fa ldr r2, [r7, #12]
8005e7a: 4313 orrs r3, r2
8005e7c: 60fb str r3, [r7, #12]
/* Update TIMx CR2 */
htim->Instance->CR2 = tmpcr2;
8005e7e: 687b ldr r3, [r7, #4]
8005e80: 681b ldr r3, [r3, #0]
8005e82: 68fa ldr r2, [r7, #12]
8005e84: 605a str r2, [r3, #4]
if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
8005e86: 687b ldr r3, [r7, #4]
8005e88: 681a ldr r2, [r3, #0]
8005e8a: 2380 movs r3, #128 ; 0x80
8005e8c: 05db lsls r3, r3, #23
8005e8e: 429a cmp r2, r3
8005e90: d00e beq.n 8005eb0 <HAL_TIMEx_MasterConfigSynchronization+0x7c>
8005e92: 687b ldr r3, [r7, #4]
8005e94: 681b ldr r3, [r3, #0]
8005e96: 4a13 ldr r2, [pc, #76] ; (8005ee4 <HAL_TIMEx_MasterConfigSynchronization+0xb0>)
8005e98: 4293 cmp r3, r2
8005e9a: d009 beq.n 8005eb0 <HAL_TIMEx_MasterConfigSynchronization+0x7c>
8005e9c: 687b ldr r3, [r7, #4]
8005e9e: 681b ldr r3, [r3, #0]
8005ea0: 4a11 ldr r2, [pc, #68] ; (8005ee8 <HAL_TIMEx_MasterConfigSynchronization+0xb4>)
8005ea2: 4293 cmp r3, r2
8005ea4: d004 beq.n 8005eb0 <HAL_TIMEx_MasterConfigSynchronization+0x7c>
8005ea6: 687b ldr r3, [r7, #4]
8005ea8: 681b ldr r3, [r3, #0]
8005eaa: 4a10 ldr r2, [pc, #64] ; (8005eec <HAL_TIMEx_MasterConfigSynchronization+0xb8>)
8005eac: 4293 cmp r3, r2
8005eae: d10c bne.n 8005eca <HAL_TIMEx_MasterConfigSynchronization+0x96>
{
/* Reset the MSM Bit */
tmpsmcr &= ~TIM_SMCR_MSM;
8005eb0: 68bb ldr r3, [r7, #8]
8005eb2: 2280 movs r2, #128 ; 0x80
8005eb4: 4393 bics r3, r2
8005eb6: 60bb str r3, [r7, #8]
/* Set master mode */
tmpsmcr |= sMasterConfig->MasterSlaveMode;
8005eb8: 683b ldr r3, [r7, #0]
8005eba: 685b ldr r3, [r3, #4]
8005ebc: 68ba ldr r2, [r7, #8]
8005ebe: 4313 orrs r3, r2
8005ec0: 60bb str r3, [r7, #8]
/* Update TIMx SMCR */
htim->Instance->SMCR = tmpsmcr;
8005ec2: 687b ldr r3, [r7, #4]
8005ec4: 681b ldr r3, [r3, #0]
8005ec6: 68ba ldr r2, [r7, #8]
8005ec8: 609a str r2, [r3, #8]
}
/* Change the htim state */
htim->State = HAL_TIM_STATE_READY;
8005eca: 687b ldr r3, [r7, #4]
8005ecc: 2239 movs r2, #57 ; 0x39
8005ece: 2101 movs r1, #1
8005ed0: 5499 strb r1, [r3, r2]
__HAL_UNLOCK(htim);
8005ed2: 687b ldr r3, [r7, #4]
8005ed4: 2238 movs r2, #56 ; 0x38
8005ed6: 2100 movs r1, #0
8005ed8: 5499 strb r1, [r3, r2]
return HAL_OK;
8005eda: 2300 movs r3, #0
}
8005edc: 0018 movs r0, r3
8005ede: 46bd mov sp, r7
8005ee0: b004 add sp, #16
8005ee2: bd80 pop {r7, pc}
8005ee4: 40000400 .word 0x40000400
8005ee8: 40010800 .word 0x40010800
8005eec: 40011400 .word 0x40011400
08005ef0 <HAL_UART_Init>:
* parameters in the UART_InitTypeDef and initialize the associated handle.
* @param huart UART handle.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart)
{
8005ef0: b580 push {r7, lr}
8005ef2: b082 sub sp, #8
8005ef4: af00 add r7, sp, #0
8005ef6: 6078 str r0, [r7, #4]
/* Check the UART handle allocation */
if (huart == NULL)
8005ef8: 687b ldr r3, [r7, #4]
8005efa: 2b00 cmp r3, #0
8005efc: d101 bne.n 8005f02 <HAL_UART_Init+0x12>
{
return HAL_ERROR;
8005efe: 2301 movs r3, #1
8005f00: e044 b.n 8005f8c <HAL_UART_Init+0x9c>
{
/* Check the parameters */
assert_param((IS_UART_INSTANCE(huart->Instance)) || (IS_LPUART_INSTANCE(huart->Instance)));
}
if (huart->gState == HAL_UART_STATE_RESET)
8005f02: 687b ldr r3, [r7, #4]
8005f04: 6f9b ldr r3, [r3, #120] ; 0x78
8005f06: 2b00 cmp r3, #0
8005f08: d107 bne.n 8005f1a <HAL_UART_Init+0x2a>
{
/* Allocate lock resource and initialize it */
huart->Lock = HAL_UNLOCKED;
8005f0a: 687b ldr r3, [r7, #4]
8005f0c: 2274 movs r2, #116 ; 0x74
8005f0e: 2100 movs r1, #0
8005f10: 5499 strb r1, [r3, r2]
/* Init the low level hardware */
huart->MspInitCallback(huart);
#else
/* Init the low level hardware : GPIO, CLOCK */
HAL_UART_MspInit(huart);
8005f12: 687b ldr r3, [r7, #4]
8005f14: 0018 movs r0, r3
8005f16: f7fc fb33 bl 8002580 <HAL_UART_MspInit>
#endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
}
huart->gState = HAL_UART_STATE_BUSY;
8005f1a: 687b ldr r3, [r7, #4]
8005f1c: 2224 movs r2, #36 ; 0x24
8005f1e: 679a str r2, [r3, #120] ; 0x78
__HAL_UART_DISABLE(huart);
8005f20: 687b ldr r3, [r7, #4]
8005f22: 681b ldr r3, [r3, #0]
8005f24: 687a ldr r2, [r7, #4]
8005f26: 6812 ldr r2, [r2, #0]
8005f28: 6812 ldr r2, [r2, #0]
8005f2a: 2101 movs r1, #1
8005f2c: 438a bics r2, r1
8005f2e: 601a str r2, [r3, #0]
/* Set the UART Communication parameters */
if (UART_SetConfig(huart) == HAL_ERROR)
8005f30: 687b ldr r3, [r7, #4]
8005f32: 0018 movs r0, r3
8005f34: f000 faf8 bl 8006528 <UART_SetConfig>
8005f38: 0003 movs r3, r0
8005f3a: 2b01 cmp r3, #1
8005f3c: d101 bne.n 8005f42 <HAL_UART_Init+0x52>
{
return HAL_ERROR;
8005f3e: 2301 movs r3, #1
8005f40: e024 b.n 8005f8c <HAL_UART_Init+0x9c>
}
if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT)
8005f42: 687b ldr r3, [r7, #4]
8005f44: 6a5b ldr r3, [r3, #36] ; 0x24
8005f46: 2b00 cmp r3, #0
8005f48: d003 beq.n 8005f52 <HAL_UART_Init+0x62>
{
UART_AdvFeatureConfig(huart);
8005f4a: 687b ldr r3, [r7, #4]
8005f4c: 0018 movs r0, r3
8005f4e: f000 fdad bl 8006aac <UART_AdvFeatureConfig>
}
/* In asynchronous mode, the following bits must be kept cleared:
- LINEN and CLKEN bits in the USART_CR2 register,
- SCEN, HDSEL and IREN bits in the USART_CR3 register.*/
CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
8005f52: 687b ldr r3, [r7, #4]
8005f54: 681b ldr r3, [r3, #0]
8005f56: 687a ldr r2, [r7, #4]
8005f58: 6812 ldr r2, [r2, #0]
8005f5a: 6852 ldr r2, [r2, #4]
8005f5c: 490d ldr r1, [pc, #52] ; (8005f94 <HAL_UART_Init+0xa4>)
8005f5e: 400a ands r2, r1
8005f60: 605a str r2, [r3, #4]
CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN));
8005f62: 687b ldr r3, [r7, #4]
8005f64: 681b ldr r3, [r3, #0]
8005f66: 687a ldr r2, [r7, #4]
8005f68: 6812 ldr r2, [r2, #0]
8005f6a: 6892 ldr r2, [r2, #8]
8005f6c: 212a movs r1, #42 ; 0x2a
8005f6e: 438a bics r2, r1
8005f70: 609a str r2, [r3, #8]
__HAL_UART_ENABLE(huart);
8005f72: 687b ldr r3, [r7, #4]
8005f74: 681b ldr r3, [r3, #0]
8005f76: 687a ldr r2, [r7, #4]
8005f78: 6812 ldr r2, [r2, #0]
8005f7a: 6812 ldr r2, [r2, #0]
8005f7c: 2101 movs r1, #1
8005f7e: 430a orrs r2, r1
8005f80: 601a str r2, [r3, #0]
/* TEACK and/or REACK to check before moving huart->gState and huart->RxState to Ready */
return (UART_CheckIdleState(huart));
8005f82: 687b ldr r3, [r7, #4]
8005f84: 0018 movs r0, r3
8005f86: f000 fe3d bl 8006c04 <UART_CheckIdleState>
8005f8a: 0003 movs r3, r0
}
8005f8c: 0018 movs r0, r3
8005f8e: 46bd mov sp, r7
8005f90: b002 add sp, #8
8005f92: bd80 pop {r7, pc}
8005f94: ffffb7ff .word 0xffffb7ff
08005f98 <HAL_UART_DeInit>:
* @brief DeInitialize the UART peripheral.
* @param huart UART handle.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_UART_DeInit(UART_HandleTypeDef *huart)
{
8005f98: b580 push {r7, lr}
8005f9a: b082 sub sp, #8
8005f9c: af00 add r7, sp, #0
8005f9e: 6078 str r0, [r7, #4]
/* Check the UART handle allocation */
if (huart == NULL)
8005fa0: 687b ldr r3, [r7, #4]
8005fa2: 2b00 cmp r3, #0
8005fa4: d101 bne.n 8005faa <HAL_UART_DeInit+0x12>
{
return HAL_ERROR;
8005fa6: 2301 movs r3, #1
8005fa8: e02c b.n 8006004 <HAL_UART_DeInit+0x6c>
}
/* Check the parameters */
assert_param((IS_UART_INSTANCE(huart->Instance)) || (IS_LPUART_INSTANCE(huart->Instance)));
huart->gState = HAL_UART_STATE_BUSY;
8005faa: 687b ldr r3, [r7, #4]
8005fac: 2224 movs r2, #36 ; 0x24
8005fae: 679a str r2, [r3, #120] ; 0x78
__HAL_UART_DISABLE(huart);
8005fb0: 687b ldr r3, [r7, #4]
8005fb2: 681b ldr r3, [r3, #0]
8005fb4: 687a ldr r2, [r7, #4]
8005fb6: 6812 ldr r2, [r2, #0]
8005fb8: 6812 ldr r2, [r2, #0]
8005fba: 2101 movs r1, #1
8005fbc: 438a bics r2, r1
8005fbe: 601a str r2, [r3, #0]
huart->Instance->CR1 = 0x0U;
8005fc0: 687b ldr r3, [r7, #4]
8005fc2: 681b ldr r3, [r3, #0]
8005fc4: 2200 movs r2, #0
8005fc6: 601a str r2, [r3, #0]
huart->Instance->CR2 = 0x0U;
8005fc8: 687b ldr r3, [r7, #4]
8005fca: 681b ldr r3, [r3, #0]
8005fcc: 2200 movs r2, #0
8005fce: 605a str r2, [r3, #4]
huart->Instance->CR3 = 0x0U;
8005fd0: 687b ldr r3, [r7, #4]
8005fd2: 681b ldr r3, [r3, #0]
8005fd4: 2200 movs r2, #0
8005fd6: 609a str r2, [r3, #8]
}
/* DeInit the low level hardware */
huart->MspDeInitCallback(huart);
#else
/* DeInit the low level hardware */
HAL_UART_MspDeInit(huart);
8005fd8: 687b ldr r3, [r7, #4]
8005fda: 0018 movs r0, r3
8005fdc: f7fc fb22 bl 8002624 <HAL_UART_MspDeInit>
#endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
huart->ErrorCode = HAL_UART_ERROR_NONE;
8005fe0: 687b ldr r3, [r7, #4]
8005fe2: 2280 movs r2, #128 ; 0x80
8005fe4: 2100 movs r1, #0
8005fe6: 5099 str r1, [r3, r2]
huart->gState = HAL_UART_STATE_RESET;
8005fe8: 687b ldr r3, [r7, #4]
8005fea: 2200 movs r2, #0
8005fec: 679a str r2, [r3, #120] ; 0x78
huart->RxState = HAL_UART_STATE_RESET;
8005fee: 687b ldr r3, [r7, #4]
8005ff0: 2200 movs r2, #0
8005ff2: 67da str r2, [r3, #124] ; 0x7c
huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
8005ff4: 687b ldr r3, [r7, #4]
8005ff6: 2200 movs r2, #0
8005ff8: 661a str r2, [r3, #96] ; 0x60
__HAL_UNLOCK(huart);
8005ffa: 687b ldr r3, [r7, #4]
8005ffc: 2274 movs r2, #116 ; 0x74
8005ffe: 2100 movs r1, #0
8006000: 5499 strb r1, [r3, r2]
return HAL_OK;
8006002: 2300 movs r3, #0
}
8006004: 0018 movs r0, r3
8006006: 46bd mov sp, r7
8006008: b002 add sp, #8
800600a: bd80 pop {r7, pc}
0800600c <HAL_UART_Transmit_IT>:
* @param pData Pointer to data buffer (u8 or u16 data elements).
* @param Size Amount of data elements (u8 or u16) to be sent.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
{
800600c: b580 push {r7, lr}
800600e: b084 sub sp, #16
8006010: af00 add r7, sp, #0
8006012: 60f8 str r0, [r7, #12]
8006014: 60b9 str r1, [r7, #8]
8006016: 1dbb adds r3, r7, #6
8006018: 801a strh r2, [r3, #0]
/* Check that a Tx process is not already ongoing */
if (huart->gState == HAL_UART_STATE_READY)
800601a: 68fb ldr r3, [r7, #12]
800601c: 6f9b ldr r3, [r3, #120] ; 0x78
800601e: 2b20 cmp r3, #32
8006020: d159 bne.n 80060d6 <HAL_UART_Transmit_IT+0xca>
{
if ((pData == NULL) || (Size == 0U))
8006022: 68bb ldr r3, [r7, #8]
8006024: 2b00 cmp r3, #0
8006026: d003 beq.n 8006030 <HAL_UART_Transmit_IT+0x24>
8006028: 1dbb adds r3, r7, #6
800602a: 881b ldrh r3, [r3, #0]
800602c: 2b00 cmp r3, #0
800602e: d101 bne.n 8006034 <HAL_UART_Transmit_IT+0x28>
{
return HAL_ERROR;
8006030: 2301 movs r3, #1
8006032: e051 b.n 80060d8 <HAL_UART_Transmit_IT+0xcc>
}
/* In case of 9bits/No Parity transfer, pData buffer provided as input parameter
should be aligned on a u16 frontier, as data to be filled into TDR will be
handled through a u16 cast. */
if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
8006034: 68fb ldr r3, [r7, #12]
8006036: 689a ldr r2, [r3, #8]
8006038: 2380 movs r3, #128 ; 0x80
800603a: 015b lsls r3, r3, #5
800603c: 429a cmp r2, r3
800603e: d109 bne.n 8006054 <HAL_UART_Transmit_IT+0x48>
8006040: 68fb ldr r3, [r7, #12]
8006042: 691b ldr r3, [r3, #16]
8006044: 2b00 cmp r3, #0
8006046: d105 bne.n 8006054 <HAL_UART_Transmit_IT+0x48>
{
if ((((uint32_t)pData) & 1U) != 0U)
8006048: 68bb ldr r3, [r7, #8]
800604a: 2201 movs r2, #1
800604c: 4013 ands r3, r2
800604e: d001 beq.n 8006054 <HAL_UART_Transmit_IT+0x48>
{
return HAL_ERROR;
8006050: 2301 movs r3, #1
8006052: e041 b.n 80060d8 <HAL_UART_Transmit_IT+0xcc>
}
}
__HAL_LOCK(huart);
8006054: 68fb ldr r3, [r7, #12]
8006056: 2274 movs r2, #116 ; 0x74
8006058: 5c9b ldrb r3, [r3, r2]
800605a: 2b01 cmp r3, #1
800605c: d101 bne.n 8006062 <HAL_UART_Transmit_IT+0x56>
800605e: 2302 movs r3, #2
8006060: e03a b.n 80060d8 <HAL_UART_Transmit_IT+0xcc>
8006062: 68fb ldr r3, [r7, #12]
8006064: 2274 movs r2, #116 ; 0x74
8006066: 2101 movs r1, #1
8006068: 5499 strb r1, [r3, r2]
huart->pTxBuffPtr = pData;
800606a: 68fb ldr r3, [r7, #12]
800606c: 68ba ldr r2, [r7, #8]
800606e: 64da str r2, [r3, #76] ; 0x4c
huart->TxXferSize = Size;
8006070: 68fb ldr r3, [r7, #12]
8006072: 1dba adds r2, r7, #6
8006074: 2150 movs r1, #80 ; 0x50
8006076: 8812 ldrh r2, [r2, #0]
8006078: 525a strh r2, [r3, r1]
huart->TxXferCount = Size;
800607a: 68fb ldr r3, [r7, #12]
800607c: 1dba adds r2, r7, #6
800607e: 2152 movs r1, #82 ; 0x52
8006080: 8812 ldrh r2, [r2, #0]
8006082: 525a strh r2, [r3, r1]
huart->TxISR = NULL;
8006084: 68fb ldr r3, [r7, #12]
8006086: 2200 movs r2, #0
8006088: 669a str r2, [r3, #104] ; 0x68
huart->ErrorCode = HAL_UART_ERROR_NONE;
800608a: 68fb ldr r3, [r7, #12]
800608c: 2280 movs r2, #128 ; 0x80
800608e: 2100 movs r1, #0
8006090: 5099 str r1, [r3, r2]
huart->gState = HAL_UART_STATE_BUSY_TX;
8006092: 68fb ldr r3, [r7, #12]
8006094: 2221 movs r2, #33 ; 0x21
8006096: 679a str r2, [r3, #120] ; 0x78
/* Set the Tx ISR function pointer according to the data word length */
if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
8006098: 68fb ldr r3, [r7, #12]
800609a: 689a ldr r2, [r3, #8]
800609c: 2380 movs r3, #128 ; 0x80
800609e: 015b lsls r3, r3, #5
80060a0: 429a cmp r2, r3
80060a2: d107 bne.n 80060b4 <HAL_UART_Transmit_IT+0xa8>
80060a4: 68fb ldr r3, [r7, #12]
80060a6: 691b ldr r3, [r3, #16]
80060a8: 2b00 cmp r3, #0
80060aa: d103 bne.n 80060b4 <HAL_UART_Transmit_IT+0xa8>
{
huart->TxISR = UART_TxISR_16BIT;
80060ac: 68fb ldr r3, [r7, #12]
80060ae: 4a0c ldr r2, [pc, #48] ; (80060e0 <HAL_UART_Transmit_IT+0xd4>)
80060b0: 669a str r2, [r3, #104] ; 0x68
80060b2: e002 b.n 80060ba <HAL_UART_Transmit_IT+0xae>
}
else
{
huart->TxISR = UART_TxISR_8BIT;
80060b4: 68fb ldr r3, [r7, #12]
80060b6: 4a0b ldr r2, [pc, #44] ; (80060e4 <HAL_UART_Transmit_IT+0xd8>)
80060b8: 669a str r2, [r3, #104] ; 0x68
}
__HAL_UNLOCK(huart);
80060ba: 68fb ldr r3, [r7, #12]
80060bc: 2274 movs r2, #116 ; 0x74
80060be: 2100 movs r1, #0
80060c0: 5499 strb r1, [r3, r2]
/* Enable the Transmit Data Register Empty interrupt */
SET_BIT(huart->Instance->CR1, USART_CR1_TXEIE);
80060c2: 68fb ldr r3, [r7, #12]
80060c4: 681b ldr r3, [r3, #0]
80060c6: 68fa ldr r2, [r7, #12]
80060c8: 6812 ldr r2, [r2, #0]
80060ca: 6812 ldr r2, [r2, #0]
80060cc: 2180 movs r1, #128 ; 0x80
80060ce: 430a orrs r2, r1
80060d0: 601a str r2, [r3, #0]
return HAL_OK;
80060d2: 2300 movs r3, #0
80060d4: e000 b.n 80060d8 <HAL_UART_Transmit_IT+0xcc>
}
else
{
return HAL_BUSY;
80060d6: 2302 movs r3, #2
}
}
80060d8: 0018 movs r0, r3
80060da: 46bd mov sp, r7
80060dc: b004 add sp, #16
80060de: bd80 pop {r7, pc}
80060e0: 08006e91 .word 0x08006e91
80060e4: 08006e23 .word 0x08006e23
080060e8 <HAL_UART_IRQHandler>:
* @brief Handle UART interrupt request.
* @param huart UART handle.
* @retval None
*/
void HAL_UART_IRQHandler(UART_HandleTypeDef *huart)
{
80060e8: b580 push {r7, lr}
80060ea: b088 sub sp, #32
80060ec: af00 add r7, sp, #0
80060ee: 6078 str r0, [r7, #4]
uint32_t isrflags = READ_REG(huart->Instance->ISR);
80060f0: 687b ldr r3, [r7, #4]
80060f2: 681b ldr r3, [r3, #0]
80060f4: 69db ldr r3, [r3, #28]
80060f6: 61fb str r3, [r7, #28]
uint32_t cr1its = READ_REG(huart->Instance->CR1);
80060f8: 687b ldr r3, [r7, #4]
80060fa: 681b ldr r3, [r3, #0]
80060fc: 681b ldr r3, [r3, #0]
80060fe: 61bb str r3, [r7, #24]
uint32_t cr3its = READ_REG(huart->Instance->CR3);
8006100: 687b ldr r3, [r7, #4]
8006102: 681b ldr r3, [r3, #0]
8006104: 689b ldr r3, [r3, #8]
8006106: 617b str r3, [r7, #20]
uint32_t errorflags;
uint32_t errorcode;
/* If no error occurs */
errorflags = (isrflags & (uint32_t)(USART_ISR_PE | USART_ISR_FE | USART_ISR_ORE | USART_ISR_NE | USART_ISR_RTOF));
8006108: 69fb ldr r3, [r7, #28]
800610a: 4ab7 ldr r2, [pc, #732] ; (80063e8 <HAL_UART_IRQHandler+0x300>)
800610c: 4013 ands r3, r2
800610e: 613b str r3, [r7, #16]
if (errorflags == 0U)
8006110: 693b ldr r3, [r7, #16]
8006112: 2b00 cmp r3, #0
8006114: d112 bne.n 800613c <HAL_UART_IRQHandler+0x54>
{
/* UART in mode Receiver ---------------------------------------------------*/
if (((isrflags & USART_ISR_RXNE) != 0U)
8006116: 69fb ldr r3, [r7, #28]
8006118: 2220 movs r2, #32
800611a: 4013 ands r3, r2
800611c: d00e beq.n 800613c <HAL_UART_IRQHandler+0x54>
&& ((cr1its & USART_CR1_RXNEIE) != 0U))
800611e: 69bb ldr r3, [r7, #24]
8006120: 2220 movs r2, #32
8006122: 4013 ands r3, r2
8006124: d00a beq.n 800613c <HAL_UART_IRQHandler+0x54>
{
if (huart->RxISR != NULL)
8006126: 687b ldr r3, [r7, #4]
8006128: 6e5b ldr r3, [r3, #100] ; 0x64
800612a: 2b00 cmp r3, #0
800612c: d100 bne.n 8006130 <HAL_UART_IRQHandler+0x48>
800612e: e1d8 b.n 80064e2 <HAL_UART_IRQHandler+0x3fa>
{
huart->RxISR(huart);
8006130: 687b ldr r3, [r7, #4]
8006132: 6e5b ldr r3, [r3, #100] ; 0x64
8006134: 687a ldr r2, [r7, #4]
8006136: 0010 movs r0, r2
8006138: 4798 blx r3
}
return;
800613a: e1d2 b.n 80064e2 <HAL_UART_IRQHandler+0x3fa>
}
}
/* If some errors occur */
if ((errorflags != 0U)
800613c: 693b ldr r3, [r7, #16]
800613e: 2b00 cmp r3, #0
8006140: d100 bne.n 8006144 <HAL_UART_IRQHandler+0x5c>
8006142: e0d9 b.n 80062f8 <HAL_UART_IRQHandler+0x210>
&& (((cr3its & USART_CR3_EIE) != 0U)
8006144: 697b ldr r3, [r7, #20]
8006146: 2201 movs r2, #1
8006148: 4013 ands r3, r2
800614a: d104 bne.n 8006156 <HAL_UART_IRQHandler+0x6e>
|| ((cr1its & (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_RTOIE)) != 0U)))
800614c: 69bb ldr r3, [r7, #24]
800614e: 4aa7 ldr r2, [pc, #668] ; (80063ec <HAL_UART_IRQHandler+0x304>)
8006150: 4013 ands r3, r2
8006152: d100 bne.n 8006156 <HAL_UART_IRQHandler+0x6e>
8006154: e0d0 b.n 80062f8 <HAL_UART_IRQHandler+0x210>
{
/* UART parity error interrupt occurred -------------------------------------*/
if (((isrflags & USART_ISR_PE) != 0U) && ((cr1its & USART_CR1_PEIE) != 0U))
8006156: 69fb ldr r3, [r7, #28]
8006158: 2201 movs r2, #1
800615a: 4013 ands r3, r2
800615c: d010 beq.n 8006180 <HAL_UART_IRQHandler+0x98>
800615e: 69ba ldr r2, [r7, #24]
8006160: 2380 movs r3, #128 ; 0x80
8006162: 005b lsls r3, r3, #1
8006164: 4013 ands r3, r2
8006166: d00b beq.n 8006180 <HAL_UART_IRQHandler+0x98>
{
__HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_PEF);
8006168: 687b ldr r3, [r7, #4]
800616a: 681b ldr r3, [r3, #0]
800616c: 2201 movs r2, #1
800616e: 621a str r2, [r3, #32]
huart->ErrorCode |= HAL_UART_ERROR_PE;
8006170: 687b ldr r3, [r7, #4]
8006172: 2280 movs r2, #128 ; 0x80
8006174: 589b ldr r3, [r3, r2]
8006176: 2201 movs r2, #1
8006178: 431a orrs r2, r3
800617a: 687b ldr r3, [r7, #4]
800617c: 2180 movs r1, #128 ; 0x80
800617e: 505a str r2, [r3, r1]
}
/* UART frame error interrupt occurred --------------------------------------*/
if (((isrflags & USART_ISR_FE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U))
8006180: 69fb ldr r3, [r7, #28]
8006182: 2202 movs r2, #2
8006184: 4013 ands r3, r2
8006186: d00f beq.n 80061a8 <HAL_UART_IRQHandler+0xc0>
8006188: 697b ldr r3, [r7, #20]
800618a: 2201 movs r2, #1
800618c: 4013 ands r3, r2
800618e: d00b beq.n 80061a8 <HAL_UART_IRQHandler+0xc0>
{
__HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_FEF);
8006190: 687b ldr r3, [r7, #4]
8006192: 681b ldr r3, [r3, #0]
8006194: 2202 movs r2, #2
8006196: 621a str r2, [r3, #32]
huart->ErrorCode |= HAL_UART_ERROR_FE;
8006198: 687b ldr r3, [r7, #4]
800619a: 2280 movs r2, #128 ; 0x80
800619c: 589b ldr r3, [r3, r2]
800619e: 2204 movs r2, #4
80061a0: 431a orrs r2, r3
80061a2: 687b ldr r3, [r7, #4]
80061a4: 2180 movs r1, #128 ; 0x80
80061a6: 505a str r2, [r3, r1]
}
/* UART noise error interrupt occurred --------------------------------------*/
if (((isrflags & USART_ISR_NE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U))
80061a8: 69fb ldr r3, [r7, #28]
80061aa: 2204 movs r2, #4
80061ac: 4013 ands r3, r2
80061ae: d00f beq.n 80061d0 <HAL_UART_IRQHandler+0xe8>
80061b0: 697b ldr r3, [r7, #20]
80061b2: 2201 movs r2, #1
80061b4: 4013 ands r3, r2
80061b6: d00b beq.n 80061d0 <HAL_UART_IRQHandler+0xe8>
{
__HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_NEF);
80061b8: 687b ldr r3, [r7, #4]
80061ba: 681b ldr r3, [r3, #0]
80061bc: 2204 movs r2, #4
80061be: 621a str r2, [r3, #32]
huart->ErrorCode |= HAL_UART_ERROR_NE;
80061c0: 687b ldr r3, [r7, #4]
80061c2: 2280 movs r2, #128 ; 0x80
80061c4: 589b ldr r3, [r3, r2]
80061c6: 2202 movs r2, #2
80061c8: 431a orrs r2, r3
80061ca: 687b ldr r3, [r7, #4]
80061cc: 2180 movs r1, #128 ; 0x80
80061ce: 505a str r2, [r3, r1]
}
/* UART Over-Run interrupt occurred -----------------------------------------*/
if (((isrflags & USART_ISR_ORE) != 0U)
80061d0: 69fb ldr r3, [r7, #28]
80061d2: 2208 movs r2, #8
80061d4: 4013 ands r3, r2
80061d6: d013 beq.n 8006200 <HAL_UART_IRQHandler+0x118>
&& (((cr1its & USART_CR1_RXNEIE) != 0U) ||
80061d8: 69bb ldr r3, [r7, #24]
80061da: 2220 movs r2, #32
80061dc: 4013 ands r3, r2
80061de: d103 bne.n 80061e8 <HAL_UART_IRQHandler+0x100>
((cr3its & USART_CR3_EIE) != 0U)))
80061e0: 697b ldr r3, [r7, #20]
80061e2: 2201 movs r2, #1
80061e4: 4013 ands r3, r2
&& (((cr1its & USART_CR1_RXNEIE) != 0U) ||
80061e6: d00b beq.n 8006200 <HAL_UART_IRQHandler+0x118>
{
__HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF);
80061e8: 687b ldr r3, [r7, #4]
80061ea: 681b ldr r3, [r3, #0]
80061ec: 2208 movs r2, #8
80061ee: 621a str r2, [r3, #32]
huart->ErrorCode |= HAL_UART_ERROR_ORE;
80061f0: 687b ldr r3, [r7, #4]
80061f2: 2280 movs r2, #128 ; 0x80
80061f4: 589b ldr r3, [r3, r2]
80061f6: 2208 movs r2, #8
80061f8: 431a orrs r2, r3
80061fa: 687b ldr r3, [r7, #4]
80061fc: 2180 movs r1, #128 ; 0x80
80061fe: 505a str r2, [r3, r1]
}
/* UART Receiver Timeout interrupt occurred ---------------------------------*/
if (((isrflags & USART_ISR_RTOF) != 0U) && ((cr1its & USART_CR1_RTOIE) != 0U))
8006200: 69fa ldr r2, [r7, #28]
8006202: 2380 movs r3, #128 ; 0x80
8006204: 011b lsls r3, r3, #4
8006206: 4013 ands r3, r2
8006208: d011 beq.n 800622e <HAL_UART_IRQHandler+0x146>
800620a: 69ba ldr r2, [r7, #24]
800620c: 2380 movs r3, #128 ; 0x80
800620e: 04db lsls r3, r3, #19
8006210: 4013 ands r3, r2
8006212: d00c beq.n 800622e <HAL_UART_IRQHandler+0x146>
{
__HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_RTOF);
8006214: 687b ldr r3, [r7, #4]
8006216: 681b ldr r3, [r3, #0]
8006218: 2280 movs r2, #128 ; 0x80
800621a: 0112 lsls r2, r2, #4
800621c: 621a str r2, [r3, #32]
huart->ErrorCode |= HAL_UART_ERROR_RTO;
800621e: 687b ldr r3, [r7, #4]
8006220: 2280 movs r2, #128 ; 0x80
8006222: 589b ldr r3, [r3, r2]
8006224: 2220 movs r2, #32
8006226: 431a orrs r2, r3
8006228: 687b ldr r3, [r7, #4]
800622a: 2180 movs r1, #128 ; 0x80
800622c: 505a str r2, [r3, r1]
}
/* Call UART Error Call back function if need be ----------------------------*/
if (huart->ErrorCode != HAL_UART_ERROR_NONE)
800622e: 687b ldr r3, [r7, #4]
8006230: 2280 movs r2, #128 ; 0x80
8006232: 589b ldr r3, [r3, r2]
8006234: 2b00 cmp r3, #0
8006236: d100 bne.n 800623a <HAL_UART_IRQHandler+0x152>
8006238: e155 b.n 80064e6 <HAL_UART_IRQHandler+0x3fe>
{
/* UART in mode Receiver --------------------------------------------------*/
if (((isrflags & USART_ISR_RXNE) != 0U)
800623a: 69fb ldr r3, [r7, #28]
800623c: 2220 movs r2, #32
800623e: 4013 ands r3, r2
8006240: d00c beq.n 800625c <HAL_UART_IRQHandler+0x174>
&& ((cr1its & USART_CR1_RXNEIE) != 0U))
8006242: 69bb ldr r3, [r7, #24]
8006244: 2220 movs r2, #32
8006246: 4013 ands r3, r2
8006248: d008 beq.n 800625c <HAL_UART_IRQHandler+0x174>
{
if (huart->RxISR != NULL)
800624a: 687b ldr r3, [r7, #4]
800624c: 6e5b ldr r3, [r3, #100] ; 0x64
800624e: 2b00 cmp r3, #0
8006250: d004 beq.n 800625c <HAL_UART_IRQHandler+0x174>
{
huart->RxISR(huart);
8006252: 687b ldr r3, [r7, #4]
8006254: 6e5b ldr r3, [r3, #100] ; 0x64
8006256: 687a ldr r2, [r7, #4]
8006258: 0010 movs r0, r2
800625a: 4798 blx r3
/* If Error is to be considered as blocking :
- Receiver Timeout error in Reception
- Overrun error in Reception
- any error occurs in DMA mode reception
*/
errorcode = huart->ErrorCode;
800625c: 687b ldr r3, [r7, #4]
800625e: 2280 movs r2, #128 ; 0x80
8006260: 589b ldr r3, [r3, r2]
8006262: 60fb str r3, [r7, #12]
if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) ||
8006264: 687b ldr r3, [r7, #4]
8006266: 681b ldr r3, [r3, #0]
8006268: 689b ldr r3, [r3, #8]
800626a: 2240 movs r2, #64 ; 0x40
800626c: 4013 ands r3, r2
800626e: 2b40 cmp r3, #64 ; 0x40
8006270: d003 beq.n 800627a <HAL_UART_IRQHandler+0x192>
((errorcode & (HAL_UART_ERROR_RTO | HAL_UART_ERROR_ORE)) != 0U))
8006272: 68fb ldr r3, [r7, #12]
8006274: 2228 movs r2, #40 ; 0x28
8006276: 4013 ands r3, r2
if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) ||
8006278: d033 beq.n 80062e2 <HAL_UART_IRQHandler+0x1fa>
{
/* Blocking error : transfer is aborted
Set the UART state ready to be able to start again the process,
Disable Rx Interrupts, and disable Rx DMA request, if ongoing */
UART_EndRxTransfer(huart);
800627a: 687b ldr r3, [r7, #4]
800627c: 0018 movs r0, r3
800627e: f000 fd89 bl 8006d94 <UART_EndRxTransfer>
/* Disable the UART DMA Rx request if enabled */
if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
8006282: 687b ldr r3, [r7, #4]
8006284: 681b ldr r3, [r3, #0]
8006286: 689b ldr r3, [r3, #8]
8006288: 2240 movs r2, #64 ; 0x40
800628a: 4013 ands r3, r2
800628c: 2b40 cmp r3, #64 ; 0x40
800628e: d123 bne.n 80062d8 <HAL_UART_IRQHandler+0x1f0>
{
CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
8006290: 687b ldr r3, [r7, #4]
8006292: 681b ldr r3, [r3, #0]
8006294: 687a ldr r2, [r7, #4]
8006296: 6812 ldr r2, [r2, #0]
8006298: 6892 ldr r2, [r2, #8]
800629a: 2140 movs r1, #64 ; 0x40
800629c: 438a bics r2, r1
800629e: 609a str r2, [r3, #8]
/* Abort the UART DMA Rx channel */
if (huart->hdmarx != NULL)
80062a0: 687b ldr r3, [r7, #4]
80062a2: 6f1b ldr r3, [r3, #112] ; 0x70
80062a4: 2b00 cmp r3, #0
80062a6: d012 beq.n 80062ce <HAL_UART_IRQHandler+0x1e6>
{
/* Set the UART DMA Abort callback :
will lead to call HAL_UART_ErrorCallback() at end of DMA abort procedure */
huart->hdmarx->XferAbortCallback = UART_DMAAbortOnError;
80062a8: 687b ldr r3, [r7, #4]
80062aa: 6f1b ldr r3, [r3, #112] ; 0x70
80062ac: 4a50 ldr r2, [pc, #320] ; (80063f0 <HAL_UART_IRQHandler+0x308>)
80062ae: 639a str r2, [r3, #56] ; 0x38
/* Abort DMA RX */
if (HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK)
80062b0: 687b ldr r3, [r7, #4]
80062b2: 6f1b ldr r3, [r3, #112] ; 0x70
80062b4: 0018 movs r0, r3
80062b6: f7fd ffb0 bl 800421a <HAL_DMA_Abort_IT>
80062ba: 1e03 subs r3, r0, #0
80062bc: d01a beq.n 80062f4 <HAL_UART_IRQHandler+0x20c>
{
/* Call Directly huart->hdmarx->XferAbortCallback function in case of error */
huart->hdmarx->XferAbortCallback(huart->hdmarx);
80062be: 687b ldr r3, [r7, #4]
80062c0: 6f1b ldr r3, [r3, #112] ; 0x70
80062c2: 6b9a ldr r2, [r3, #56] ; 0x38
80062c4: 687b ldr r3, [r7, #4]
80062c6: 6f1b ldr r3, [r3, #112] ; 0x70
80062c8: 0018 movs r0, r3
80062ca: 4790 blx r2
if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
80062cc: e012 b.n 80062f4 <HAL_UART_IRQHandler+0x20c>
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
/*Call registered error callback*/
huart->ErrorCallback(huart);
#else
/*Call legacy weak error callback*/
HAL_UART_ErrorCallback(huart);
80062ce: 687b ldr r3, [r7, #4]
80062d0: 0018 movs r0, r3
80062d2: f000 f915 bl 8006500 <HAL_UART_ErrorCallback>
if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
80062d6: e00d b.n 80062f4 <HAL_UART_IRQHandler+0x20c>
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
/*Call registered error callback*/
huart->ErrorCallback(huart);
#else
/*Call legacy weak error callback*/
HAL_UART_ErrorCallback(huart);
80062d8: 687b ldr r3, [r7, #4]
80062da: 0018 movs r0, r3
80062dc: f000 f910 bl 8006500 <HAL_UART_ErrorCallback>
if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
80062e0: e008 b.n 80062f4 <HAL_UART_IRQHandler+0x20c>
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
/*Call registered error callback*/
huart->ErrorCallback(huart);
#else
/*Call legacy weak error callback*/
HAL_UART_ErrorCallback(huart);
80062e2: 687b ldr r3, [r7, #4]
80062e4: 0018 movs r0, r3
80062e6: f000 f90b bl 8006500 <HAL_UART_ErrorCallback>
#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
huart->ErrorCode = HAL_UART_ERROR_NONE;
80062ea: 687b ldr r3, [r7, #4]
80062ec: 2280 movs r2, #128 ; 0x80
80062ee: 2100 movs r1, #0
80062f0: 5099 str r1, [r3, r2]
}
}
return;
80062f2: e0f8 b.n 80064e6 <HAL_UART_IRQHandler+0x3fe>
if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
80062f4: 46c0 nop ; (mov r8, r8)
return;
80062f6: e0f6 b.n 80064e6 <HAL_UART_IRQHandler+0x3fe>
} /* End if some error occurs */
/* Check current reception Mode :
If Reception till IDLE event has been selected : */
if ( (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
80062f8: 687b ldr r3, [r7, #4]
80062fa: 6e1b ldr r3, [r3, #96] ; 0x60
80062fc: 2b01 cmp r3, #1
80062fe: d000 beq.n 8006302 <HAL_UART_IRQHandler+0x21a>
8006300: e0bb b.n 800647a <HAL_UART_IRQHandler+0x392>
&&((isrflags & USART_ISR_IDLE) != 0U)
8006302: 69fb ldr r3, [r7, #28]
8006304: 2210 movs r2, #16
8006306: 4013 ands r3, r2
8006308: d100 bne.n 800630c <HAL_UART_IRQHandler+0x224>
800630a: e0b6 b.n 800647a <HAL_UART_IRQHandler+0x392>
&&((cr1its & USART_ISR_IDLE) != 0U))
800630c: 69bb ldr r3, [r7, #24]
800630e: 2210 movs r2, #16
8006310: 4013 ands r3, r2
8006312: d100 bne.n 8006316 <HAL_UART_IRQHandler+0x22e>
8006314: e0b1 b.n 800647a <HAL_UART_IRQHandler+0x392>
{
__HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF);
8006316: 687b ldr r3, [r7, #4]
8006318: 681b ldr r3, [r3, #0]
800631a: 2210 movs r2, #16
800631c: 621a str r2, [r3, #32]
/* Check if DMA mode is enabled in UART */
if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
800631e: 687b ldr r3, [r7, #4]
8006320: 681b ldr r3, [r3, #0]
8006322: 689b ldr r3, [r3, #8]
8006324: 2240 movs r2, #64 ; 0x40
8006326: 4013 ands r3, r2
8006328: 2b40 cmp r3, #64 ; 0x40
800632a: d165 bne.n 80063f8 <HAL_UART_IRQHandler+0x310>
{
/* DMA mode enabled */
/* Check received length : If all expected data are received, do nothing,
(DMA cplt callback will be called).
Otherwise, if at least one data has already been received, IDLE event is to be notified to user */
uint16_t nb_remaining_rx_data = (uint16_t) __HAL_DMA_GET_COUNTER(huart->hdmarx);
800632c: 687b ldr r3, [r7, #4]
800632e: 6f1b ldr r3, [r3, #112] ; 0x70
8006330: 681b ldr r3, [r3, #0]
8006332: 685a ldr r2, [r3, #4]
8006334: 230a movs r3, #10
8006336: 18fb adds r3, r7, r3
8006338: 801a strh r2, [r3, #0]
if ( (nb_remaining_rx_data > 0U)
800633a: 230a movs r3, #10
800633c: 18fb adds r3, r7, r3
800633e: 881b ldrh r3, [r3, #0]
8006340: 2b00 cmp r3, #0
8006342: d100 bne.n 8006346 <HAL_UART_IRQHandler+0x25e>
8006344: e0d1 b.n 80064ea <HAL_UART_IRQHandler+0x402>
&&(nb_remaining_rx_data < huart->RxXferSize))
8006346: 687b ldr r3, [r7, #4]
8006348: 2258 movs r2, #88 ; 0x58
800634a: 5a9b ldrh r3, [r3, r2]
800634c: 220a movs r2, #10
800634e: 18ba adds r2, r7, r2
8006350: 8812 ldrh r2, [r2, #0]
8006352: 429a cmp r2, r3
8006354: d300 bcc.n 8006358 <HAL_UART_IRQHandler+0x270>
8006356: e0c8 b.n 80064ea <HAL_UART_IRQHandler+0x402>
{
/* Reception is not complete */
huart->RxXferCount = nb_remaining_rx_data;
8006358: 687b ldr r3, [r7, #4]
800635a: 220a movs r2, #10
800635c: 18ba adds r2, r7, r2
800635e: 215a movs r1, #90 ; 0x5a
8006360: 8812 ldrh r2, [r2, #0]
8006362: 525a strh r2, [r3, r1]
/* In Normal mode, end DMA xfer and HAL UART Rx process*/
if (HAL_IS_BIT_CLR(huart->hdmarx->Instance->CCR, DMA_CCR_CIRC))
8006364: 687b ldr r3, [r7, #4]
8006366: 6f1b ldr r3, [r3, #112] ; 0x70
8006368: 681b ldr r3, [r3, #0]
800636a: 681b ldr r3, [r3, #0]
800636c: 2220 movs r2, #32
800636e: 4013 ands r3, r2
8006370: d12a bne.n 80063c8 <HAL_UART_IRQHandler+0x2e0>
{
/* Disable PE and ERR (Frame error, noise error, overrun error) interrupts */
CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE);
8006372: 687b ldr r3, [r7, #4]
8006374: 681b ldr r3, [r3, #0]
8006376: 687a ldr r2, [r7, #4]
8006378: 6812 ldr r2, [r2, #0]
800637a: 6812 ldr r2, [r2, #0]
800637c: 491d ldr r1, [pc, #116] ; (80063f4 <HAL_UART_IRQHandler+0x30c>)
800637e: 400a ands r2, r1
8006380: 601a str r2, [r3, #0]
CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
8006382: 687b ldr r3, [r7, #4]
8006384: 681b ldr r3, [r3, #0]
8006386: 687a ldr r2, [r7, #4]
8006388: 6812 ldr r2, [r2, #0]
800638a: 6892 ldr r2, [r2, #8]
800638c: 2101 movs r1, #1
800638e: 438a bics r2, r1
8006390: 609a str r2, [r3, #8]
/* Disable the DMA transfer for the receiver request by resetting the DMAR bit
in the UART CR3 register */
CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
8006392: 687b ldr r3, [r7, #4]
8006394: 681b ldr r3, [r3, #0]
8006396: 687a ldr r2, [r7, #4]
8006398: 6812 ldr r2, [r2, #0]
800639a: 6892 ldr r2, [r2, #8]
800639c: 2140 movs r1, #64 ; 0x40
800639e: 438a bics r2, r1
80063a0: 609a str r2, [r3, #8]
/* At end of Rx process, restore huart->RxState to Ready */
huart->RxState = HAL_UART_STATE_READY;
80063a2: 687b ldr r3, [r7, #4]
80063a4: 2220 movs r2, #32
80063a6: 67da str r2, [r3, #124] ; 0x7c
huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
80063a8: 687b ldr r3, [r7, #4]
80063aa: 2200 movs r2, #0
80063ac: 661a str r2, [r3, #96] ; 0x60
CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
80063ae: 687b ldr r3, [r7, #4]
80063b0: 681b ldr r3, [r3, #0]
80063b2: 687a ldr r2, [r7, #4]
80063b4: 6812 ldr r2, [r2, #0]
80063b6: 6812 ldr r2, [r2, #0]
80063b8: 2110 movs r1, #16
80063ba: 438a bics r2, r1
80063bc: 601a str r2, [r3, #0]
/* Last bytes received, so no need as the abort is immediate */
(void)HAL_DMA_Abort(huart->hdmarx);
80063be: 687b ldr r3, [r7, #4]
80063c0: 6f1b ldr r3, [r3, #112] ; 0x70
80063c2: 0018 movs r0, r3
80063c4: f7fd fee9 bl 800419a <HAL_DMA_Abort>
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
/*Call registered Rx Event callback*/
huart->RxEventCallback(huart, (huart->RxXferSize - huart->RxXferCount));
#else
/*Call legacy weak Rx Event callback*/
HAL_UARTEx_RxEventCallback(huart, (huart->RxXferSize - huart->RxXferCount));
80063c8: 687b ldr r3, [r7, #4]
80063ca: 2258 movs r2, #88 ; 0x58
80063cc: 5a9a ldrh r2, [r3, r2]
80063ce: 687b ldr r3, [r7, #4]
80063d0: 215a movs r1, #90 ; 0x5a
80063d2: 5a5b ldrh r3, [r3, r1]
80063d4: b29b uxth r3, r3
80063d6: 1ad3 subs r3, r2, r3
80063d8: b29a uxth r2, r3
80063da: 687b ldr r3, [r7, #4]
80063dc: 0011 movs r1, r2
80063de: 0018 movs r0, r3
80063e0: f000 f896 bl 8006510 <HAL_UARTEx_RxEventCallback>
#endif
}
return;
80063e4: e081 b.n 80064ea <HAL_UART_IRQHandler+0x402>
80063e6: 46c0 nop ; (mov r8, r8)
80063e8: 0000080f .word 0x0000080f
80063ec: 04000120 .word 0x04000120
80063f0: 08006df5 .word 0x08006df5
80063f4: fffffeff .word 0xfffffeff
else
{
/* DMA mode not enabled */
/* Check received length : If all expected data are received, do nothing.
Otherwise, if at least one data has already been received, IDLE event is to be notified to user */
uint16_t nb_rx_data = huart->RxXferSize - huart->RxXferCount;
80063f8: 687b ldr r3, [r7, #4]
80063fa: 2258 movs r2, #88 ; 0x58
80063fc: 5a99 ldrh r1, [r3, r2]
80063fe: 687b ldr r3, [r7, #4]
8006400: 225a movs r2, #90 ; 0x5a
8006402: 5a9b ldrh r3, [r3, r2]
8006404: b29a uxth r2, r3
8006406: 2308 movs r3, #8
8006408: 18fb adds r3, r7, r3
800640a: 1a8a subs r2, r1, r2
800640c: 801a strh r2, [r3, #0]
if ( (huart->RxXferCount > 0U)
800640e: 687b ldr r3, [r7, #4]
8006410: 225a movs r2, #90 ; 0x5a
8006412: 5a9b ldrh r3, [r3, r2]
8006414: b29b uxth r3, r3
8006416: 2b00 cmp r3, #0
8006418: d100 bne.n 800641c <HAL_UART_IRQHandler+0x334>
800641a: e068 b.n 80064ee <HAL_UART_IRQHandler+0x406>
&&(nb_rx_data > 0U) )
800641c: 2308 movs r3, #8
800641e: 18fb adds r3, r7, r3
8006420: 881b ldrh r3, [r3, #0]
8006422: 2b00 cmp r3, #0
8006424: d063 beq.n 80064ee <HAL_UART_IRQHandler+0x406>
{
/* Disable the UART Parity Error Interrupt and RXNE interrupts */
CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
8006426: 687b ldr r3, [r7, #4]
8006428: 681b ldr r3, [r3, #0]
800642a: 687a ldr r2, [r7, #4]
800642c: 6812 ldr r2, [r2, #0]
800642e: 6812 ldr r2, [r2, #0]
8006430: 4932 ldr r1, [pc, #200] ; (80064fc <HAL_UART_IRQHandler+0x414>)
8006432: 400a ands r2, r1
8006434: 601a str r2, [r3, #0]
/* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) */
CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
8006436: 687b ldr r3, [r7, #4]
8006438: 681b ldr r3, [r3, #0]
800643a: 687a ldr r2, [r7, #4]
800643c: 6812 ldr r2, [r2, #0]
800643e: 6892 ldr r2, [r2, #8]
8006440: 2101 movs r1, #1
8006442: 438a bics r2, r1
8006444: 609a str r2, [r3, #8]
/* Rx process is completed, restore huart->RxState to Ready */
huart->RxState = HAL_UART_STATE_READY;
8006446: 687b ldr r3, [r7, #4]
8006448: 2220 movs r2, #32
800644a: 67da str r2, [r3, #124] ; 0x7c
huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
800644c: 687b ldr r3, [r7, #4]
800644e: 2200 movs r2, #0
8006450: 661a str r2, [r3, #96] ; 0x60
/* Clear RxISR function pointer */
huart->RxISR = NULL;
8006452: 687b ldr r3, [r7, #4]
8006454: 2200 movs r2, #0
8006456: 665a str r2, [r3, #100] ; 0x64
CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
8006458: 687b ldr r3, [r7, #4]
800645a: 681b ldr r3, [r3, #0]
800645c: 687a ldr r2, [r7, #4]
800645e: 6812 ldr r2, [r2, #0]
8006460: 6812 ldr r2, [r2, #0]
8006462: 2110 movs r1, #16
8006464: 438a bics r2, r1
8006466: 601a str r2, [r3, #0]
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
/*Call registered Rx complete callback*/
huart->RxEventCallback(huart, nb_rx_data);
#else
/*Call legacy weak Rx Event callback*/
HAL_UARTEx_RxEventCallback(huart, nb_rx_data);
8006468: 2308 movs r3, #8
800646a: 18fb adds r3, r7, r3
800646c: 881a ldrh r2, [r3, #0]
800646e: 687b ldr r3, [r7, #4]
8006470: 0011 movs r1, r2
8006472: 0018 movs r0, r3
8006474: f000 f84c bl 8006510 <HAL_UARTEx_RxEventCallback>
#endif
}
return;
8006478: e039 b.n 80064ee <HAL_UART_IRQHandler+0x406>
}
}
/* UART wakeup from Stop mode interrupt occurred ---------------------------*/
if (((isrflags & USART_ISR_WUF) != 0U) && ((cr3its & USART_CR3_WUFIE) != 0U))
800647a: 69fa ldr r2, [r7, #28]
800647c: 2380 movs r3, #128 ; 0x80
800647e: 035b lsls r3, r3, #13
8006480: 4013 ands r3, r2
8006482: d00e beq.n 80064a2 <HAL_UART_IRQHandler+0x3ba>
8006484: 697a ldr r2, [r7, #20]
8006486: 2380 movs r3, #128 ; 0x80
8006488: 03db lsls r3, r3, #15
800648a: 4013 ands r3, r2
800648c: d009 beq.n 80064a2 <HAL_UART_IRQHandler+0x3ba>
{
__HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_WUF);
800648e: 687b ldr r3, [r7, #4]
8006490: 681b ldr r3, [r3, #0]
8006492: 2280 movs r2, #128 ; 0x80
8006494: 0352 lsls r2, r2, #13
8006496: 621a str r2, [r3, #32]
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
/* Call registered Wakeup Callback */
huart->WakeupCallback(huart);
#else
/* Call legacy weak Wakeup Callback */
HAL_UARTEx_WakeupCallback(huart);
8006498: 687b ldr r3, [r7, #4]
800649a: 0018 movs r0, r3
800649c: f000 fd4d bl 8006f3a <HAL_UARTEx_WakeupCallback>
#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
return;
80064a0: e028 b.n 80064f4 <HAL_UART_IRQHandler+0x40c>
}
/* UART in mode Transmitter ------------------------------------------------*/
if (((isrflags & USART_ISR_TXE) != 0U)
80064a2: 69fb ldr r3, [r7, #28]
80064a4: 2280 movs r2, #128 ; 0x80
80064a6: 4013 ands r3, r2
80064a8: d00d beq.n 80064c6 <HAL_UART_IRQHandler+0x3de>
&& ((cr1its & USART_CR1_TXEIE) != 0U))
80064aa: 69bb ldr r3, [r7, #24]
80064ac: 2280 movs r2, #128 ; 0x80
80064ae: 4013 ands r3, r2
80064b0: d009 beq.n 80064c6 <HAL_UART_IRQHandler+0x3de>
{
if (huart->TxISR != NULL)
80064b2: 687b ldr r3, [r7, #4]
80064b4: 6e9b ldr r3, [r3, #104] ; 0x68
80064b6: 2b00 cmp r3, #0
80064b8: d01b beq.n 80064f2 <HAL_UART_IRQHandler+0x40a>
{
huart->TxISR(huart);
80064ba: 687b ldr r3, [r7, #4]
80064bc: 6e9b ldr r3, [r3, #104] ; 0x68
80064be: 687a ldr r2, [r7, #4]
80064c0: 0010 movs r0, r2
80064c2: 4798 blx r3
}
return;
80064c4: e015 b.n 80064f2 <HAL_UART_IRQHandler+0x40a>
}
/* UART in mode Transmitter (transmission end) -----------------------------*/
if (((isrflags & USART_ISR_TC) != 0U) && ((cr1its & USART_CR1_TCIE) != 0U))
80064c6: 69fb ldr r3, [r7, #28]
80064c8: 2240 movs r2, #64 ; 0x40
80064ca: 4013 ands r3, r2
80064cc: d012 beq.n 80064f4 <HAL_UART_IRQHandler+0x40c>
80064ce: 69bb ldr r3, [r7, #24]
80064d0: 2240 movs r2, #64 ; 0x40
80064d2: 4013 ands r3, r2
80064d4: d00e beq.n 80064f4 <HAL_UART_IRQHandler+0x40c>
{
UART_EndTransmit_IT(huart);
80064d6: 687b ldr r3, [r7, #4]
80064d8: 0018 movs r0, r3
80064da: f000 fd14 bl 8006f06 <UART_EndTransmit_IT>
return;
80064de: 46c0 nop ; (mov r8, r8)
80064e0: e008 b.n 80064f4 <HAL_UART_IRQHandler+0x40c>
return;
80064e2: 46c0 nop ; (mov r8, r8)
80064e4: e006 b.n 80064f4 <HAL_UART_IRQHandler+0x40c>
return;
80064e6: 46c0 nop ; (mov r8, r8)
80064e8: e004 b.n 80064f4 <HAL_UART_IRQHandler+0x40c>
return;
80064ea: 46c0 nop ; (mov r8, r8)
80064ec: e002 b.n 80064f4 <HAL_UART_IRQHandler+0x40c>
return;
80064ee: 46c0 nop ; (mov r8, r8)
80064f0: e000 b.n 80064f4 <HAL_UART_IRQHandler+0x40c>
return;
80064f2: 46c0 nop ; (mov r8, r8)
}
}
80064f4: 46bd mov sp, r7
80064f6: b008 add sp, #32
80064f8: bd80 pop {r7, pc}
80064fa: 46c0 nop ; (mov r8, r8)
80064fc: fffffedf .word 0xfffffedf
08006500 <HAL_UART_ErrorCallback>:
* @brief UART error callback.
* @param huart UART handle.
* @retval None
*/
__weak void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart)
{
8006500: b580 push {r7, lr}
8006502: b082 sub sp, #8
8006504: af00 add r7, sp, #0
8006506: 6078 str r0, [r7, #4]
UNUSED(huart);
/* NOTE : This function should not be modified, when the callback is needed,
the HAL_UART_ErrorCallback can be implemented in the user file.
*/
}
8006508: 46c0 nop ; (mov r8, r8)
800650a: 46bd mov sp, r7
800650c: b002 add sp, #8
800650e: bd80 pop {r7, pc}
08006510 <HAL_UARTEx_RxEventCallback>:
* @param Size Number of data available in application reception buffer (indicates a position in
* reception buffer until which, data are available)
* @retval None
*/
__weak void HAL_UARTEx_RxEventCallback(UART_HandleTypeDef *huart, uint16_t Size)
{
8006510: b580 push {r7, lr}
8006512: b082 sub sp, #8
8006514: af00 add r7, sp, #0
8006516: 6078 str r0, [r7, #4]
8006518: 000a movs r2, r1
800651a: 1cbb adds r3, r7, #2
800651c: 801a strh r2, [r3, #0]
UNUSED(Size);
/* NOTE : This function should not be modified, when the callback is needed,
the HAL_UARTEx_RxEventCallback can be implemented in the user file.
*/
}
800651e: 46c0 nop ; (mov r8, r8)
8006520: 46bd mov sp, r7
8006522: b002 add sp, #8
8006524: bd80 pop {r7, pc}
...
08006528 <UART_SetConfig>:
* @brief Configure the UART peripheral.
* @param huart UART handle.
* @retval HAL status
*/
HAL_StatusTypeDef UART_SetConfig(UART_HandleTypeDef *huart)
{
8006528: b5b0 push {r4, r5, r7, lr}
800652a: b08e sub sp, #56 ; 0x38
800652c: af00 add r7, sp, #0
800652e: 61f8 str r0, [r7, #28]
uint32_t tmpreg;
uint16_t brrtemp;
UART_ClockSourceTypeDef clocksource;
uint32_t usartdiv;
HAL_StatusTypeDef ret = HAL_OK;
8006530: 231a movs r3, #26
8006532: 2218 movs r2, #24
8006534: 4694 mov ip, r2
8006536: 44bc add ip, r7
8006538: 4463 add r3, ip
800653a: 2200 movs r2, #0
800653c: 701a strb r2, [r3, #0]
* the UART Word Length, Parity, Mode and oversampling:
* set the M bits according to huart->Init.WordLength value
* set PCE and PS bits according to huart->Init.Parity value
* set TE and RE bits according to huart->Init.Mode value
* set OVER8 bit according to huart->Init.OverSampling value */
tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling ;
800653e: 69fb ldr r3, [r7, #28]
8006540: 689a ldr r2, [r3, #8]
8006542: 69fb ldr r3, [r7, #28]
8006544: 691b ldr r3, [r3, #16]
8006546: 431a orrs r2, r3
8006548: 69fb ldr r3, [r7, #28]
800654a: 695b ldr r3, [r3, #20]
800654c: 431a orrs r2, r3
800654e: 69fb ldr r3, [r7, #28]
8006550: 69db ldr r3, [r3, #28]
8006552: 4313 orrs r3, r2
8006554: 637b str r3, [r7, #52] ; 0x34
MODIFY_REG(huart->Instance->CR1, USART_CR1_FIELDS, tmpreg);
8006556: 69fb ldr r3, [r7, #28]
8006558: 681b ldr r3, [r3, #0]
800655a: 69fa ldr r2, [r7, #28]
800655c: 6812 ldr r2, [r2, #0]
800655e: 6812 ldr r2, [r2, #0]
8006560: 49c8 ldr r1, [pc, #800] ; (8006884 <UART_SetConfig+0x35c>)
8006562: 4011 ands r1, r2
8006564: 6b7a ldr r2, [r7, #52] ; 0x34
8006566: 430a orrs r2, r1
8006568: 601a str r2, [r3, #0]
/*-------------------------- USART CR2 Configuration -----------------------*/
/* Configure the UART Stop Bits: Set STOP[13:12] bits according
* to huart->Init.StopBits value */
MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits);
800656a: 69fb ldr r3, [r7, #28]
800656c: 681b ldr r3, [r3, #0]
800656e: 69fa ldr r2, [r7, #28]
8006570: 6812 ldr r2, [r2, #0]
8006572: 6852 ldr r2, [r2, #4]
8006574: 49c4 ldr r1, [pc, #784] ; (8006888 <UART_SetConfig+0x360>)
8006576: 4011 ands r1, r2
8006578: 69fa ldr r2, [r7, #28]
800657a: 68d2 ldr r2, [r2, #12]
800657c: 430a orrs r2, r1
800657e: 605a str r2, [r3, #4]
/* Configure
* - UART HardWare Flow Control: set CTSE and RTSE bits according
* to huart->Init.HwFlowCtl value
* - one-bit sampling method versus three samples' majority rule according
* to huart->Init.OneBitSampling (not applicable to LPUART) */
tmpreg = (uint32_t)huart->Init.HwFlowCtl;
8006580: 69fb ldr r3, [r7, #28]
8006582: 699b ldr r3, [r3, #24]
8006584: 637b str r3, [r7, #52] ; 0x34
if (!(UART_INSTANCE_LOWPOWER(huart)))
8006586: 69fb ldr r3, [r7, #28]
8006588: 681b ldr r3, [r3, #0]
800658a: 4ac0 ldr r2, [pc, #768] ; (800688c <UART_SetConfig+0x364>)
800658c: 4293 cmp r3, r2
800658e: d004 beq.n 800659a <UART_SetConfig+0x72>
{
tmpreg |= huart->Init.OneBitSampling;
8006590: 69fb ldr r3, [r7, #28]
8006592: 6a1b ldr r3, [r3, #32]
8006594: 6b7a ldr r2, [r7, #52] ; 0x34
8006596: 4313 orrs r3, r2
8006598: 637b str r3, [r7, #52] ; 0x34
}
MODIFY_REG(huart->Instance->CR3, USART_CR3_FIELDS, tmpreg);
800659a: 69fb ldr r3, [r7, #28]
800659c: 681b ldr r3, [r3, #0]
800659e: 69fa ldr r2, [r7, #28]
80065a0: 6812 ldr r2, [r2, #0]
80065a2: 6892 ldr r2, [r2, #8]
80065a4: 49ba ldr r1, [pc, #744] ; (8006890 <UART_SetConfig+0x368>)
80065a6: 4011 ands r1, r2
80065a8: 6b7a ldr r2, [r7, #52] ; 0x34
80065aa: 430a orrs r2, r1
80065ac: 609a str r2, [r3, #8]
/*-------------------------- USART BRR Configuration -----------------------*/
UART_GETCLOCKSOURCE(huart, clocksource);
80065ae: 69fb ldr r3, [r7, #28]
80065b0: 681b ldr r3, [r3, #0]
80065b2: 4ab8 ldr r2, [pc, #736] ; (8006894 <UART_SetConfig+0x36c>)
80065b4: 4293 cmp r3, r2
80065b6: d134 bne.n 8006622 <UART_SetConfig+0xfa>
80065b8: 4bb7 ldr r3, [pc, #732] ; (8006898 <UART_SetConfig+0x370>)
80065ba: 6cdb ldr r3, [r3, #76] ; 0x4c
80065bc: 2203 movs r2, #3
80065be: 4013 ands r3, r2
80065c0: 2b01 cmp r3, #1
80065c2: d015 beq.n 80065f0 <UART_SetConfig+0xc8>
80065c4: d304 bcc.n 80065d0 <UART_SetConfig+0xa8>
80065c6: 2b02 cmp r3, #2
80065c8: d00a beq.n 80065e0 <UART_SetConfig+0xb8>
80065ca: 2b03 cmp r3, #3
80065cc: d018 beq.n 8006600 <UART_SetConfig+0xd8>
80065ce: e01f b.n 8006610 <UART_SetConfig+0xe8>
80065d0: 231b movs r3, #27
80065d2: 2218 movs r2, #24
80065d4: 4694 mov ip, r2
80065d6: 44bc add ip, r7
80065d8: 4463 add r3, ip
80065da: 2201 movs r2, #1
80065dc: 701a strb r2, [r3, #0]
80065de: e0c5 b.n 800676c <UART_SetConfig+0x244>
80065e0: 231b movs r3, #27
80065e2: 2218 movs r2, #24
80065e4: 4694 mov ip, r2
80065e6: 44bc add ip, r7
80065e8: 4463 add r3, ip
80065ea: 2202 movs r2, #2
80065ec: 701a strb r2, [r3, #0]
80065ee: e0bd b.n 800676c <UART_SetConfig+0x244>
80065f0: 231b movs r3, #27
80065f2: 2218 movs r2, #24
80065f4: 4694 mov ip, r2
80065f6: 44bc add ip, r7
80065f8: 4463 add r3, ip
80065fa: 2204 movs r2, #4
80065fc: 701a strb r2, [r3, #0]
80065fe: e0b5 b.n 800676c <UART_SetConfig+0x244>
8006600: 231b movs r3, #27
8006602: 2218 movs r2, #24
8006604: 4694 mov ip, r2
8006606: 44bc add ip, r7
8006608: 4463 add r3, ip
800660a: 2208 movs r2, #8
800660c: 701a strb r2, [r3, #0]
800660e: e0ad b.n 800676c <UART_SetConfig+0x244>
8006610: 231b movs r3, #27
8006612: 2218 movs r2, #24
8006614: 4694 mov ip, r2
8006616: 44bc add ip, r7
8006618: 4463 add r3, ip
800661a: 2210 movs r2, #16
800661c: 701a strb r2, [r3, #0]
800661e: 46c0 nop ; (mov r8, r8)
8006620: e0a4 b.n 800676c <UART_SetConfig+0x244>
8006622: 69fb ldr r3, [r7, #28]
8006624: 681b ldr r3, [r3, #0]
8006626: 4a9d ldr r2, [pc, #628] ; (800689c <UART_SetConfig+0x374>)
8006628: 4293 cmp r3, r2
800662a: d137 bne.n 800669c <UART_SetConfig+0x174>
800662c: 4b9a ldr r3, [pc, #616] ; (8006898 <UART_SetConfig+0x370>)
800662e: 6cdb ldr r3, [r3, #76] ; 0x4c
8006630: 220c movs r2, #12
8006632: 4013 ands r3, r2
8006634: 2b04 cmp r3, #4
8006636: d018 beq.n 800666a <UART_SetConfig+0x142>
8006638: d802 bhi.n 8006640 <UART_SetConfig+0x118>
800663a: 2b00 cmp r3, #0
800663c: d005 beq.n 800664a <UART_SetConfig+0x122>
800663e: e024 b.n 800668a <UART_SetConfig+0x162>
8006640: 2b08 cmp r3, #8
8006642: d00a beq.n 800665a <UART_SetConfig+0x132>
8006644: 2b0c cmp r3, #12
8006646: d018 beq.n 800667a <UART_SetConfig+0x152>
8006648: e01f b.n 800668a <UART_SetConfig+0x162>
800664a: 231b movs r3, #27
800664c: 2218 movs r2, #24
800664e: 4694 mov ip, r2
8006650: 44bc add ip, r7
8006652: 4463 add r3, ip
8006654: 2200 movs r2, #0
8006656: 701a strb r2, [r3, #0]
8006658: e088 b.n 800676c <UART_SetConfig+0x244>
800665a: 231b movs r3, #27
800665c: 2218 movs r2, #24
800665e: 4694 mov ip, r2
8006660: 44bc add ip, r7
8006662: 4463 add r3, ip
8006664: 2202 movs r2, #2
8006666: 701a strb r2, [r3, #0]
8006668: e080 b.n 800676c <UART_SetConfig+0x244>
800666a: 231b movs r3, #27
800666c: 2218 movs r2, #24
800666e: 4694 mov ip, r2
8006670: 44bc add ip, r7
8006672: 4463 add r3, ip
8006674: 2204 movs r2, #4
8006676: 701a strb r2, [r3, #0]
8006678: e078 b.n 800676c <UART_SetConfig+0x244>
800667a: 231b movs r3, #27
800667c: 2218 movs r2, #24
800667e: 4694 mov ip, r2
8006680: 44bc add ip, r7
8006682: 4463 add r3, ip
8006684: 2208 movs r2, #8
8006686: 701a strb r2, [r3, #0]
8006688: e070 b.n 800676c <UART_SetConfig+0x244>
800668a: 231b movs r3, #27
800668c: 2218 movs r2, #24
800668e: 4694 mov ip, r2
8006690: 44bc add ip, r7
8006692: 4463 add r3, ip
8006694: 2210 movs r2, #16
8006696: 701a strb r2, [r3, #0]
8006698: 46c0 nop ; (mov r8, r8)
800669a: e067 b.n 800676c <UART_SetConfig+0x244>
800669c: 69fb ldr r3, [r7, #28]
800669e: 681b ldr r3, [r3, #0]
80066a0: 4a7f ldr r2, [pc, #508] ; (80068a0 <UART_SetConfig+0x378>)
80066a2: 4293 cmp r3, r2
80066a4: d107 bne.n 80066b6 <UART_SetConfig+0x18e>
80066a6: 231b movs r3, #27
80066a8: 2218 movs r2, #24
80066aa: 4694 mov ip, r2
80066ac: 44bc add ip, r7
80066ae: 4463 add r3, ip
80066b0: 2200 movs r2, #0
80066b2: 701a strb r2, [r3, #0]
80066b4: e05a b.n 800676c <UART_SetConfig+0x244>
80066b6: 69fb ldr r3, [r7, #28]
80066b8: 681b ldr r3, [r3, #0]
80066ba: 4a7a ldr r2, [pc, #488] ; (80068a4 <UART_SetConfig+0x37c>)
80066bc: 4293 cmp r3, r2
80066be: d107 bne.n 80066d0 <UART_SetConfig+0x1a8>
80066c0: 231b movs r3, #27
80066c2: 2218 movs r2, #24
80066c4: 4694 mov ip, r2
80066c6: 44bc add ip, r7
80066c8: 4463 add r3, ip
80066ca: 2200 movs r2, #0
80066cc: 701a strb r2, [r3, #0]
80066ce: e04d b.n 800676c <UART_SetConfig+0x244>
80066d0: 69fb ldr r3, [r7, #28]
80066d2: 681b ldr r3, [r3, #0]
80066d4: 4a6d ldr r2, [pc, #436] ; (800688c <UART_SetConfig+0x364>)
80066d6: 4293 cmp r3, r2
80066d8: d141 bne.n 800675e <UART_SetConfig+0x236>
80066da: 4b6f ldr r3, [pc, #444] ; (8006898 <UART_SetConfig+0x370>)
80066dc: 6cda ldr r2, [r3, #76] ; 0x4c
80066de: 23c0 movs r3, #192 ; 0xc0
80066e0: 011b lsls r3, r3, #4
80066e2: 4013 ands r3, r2
80066e4: 2280 movs r2, #128 ; 0x80
80066e6: 00d2 lsls r2, r2, #3
80066e8: 4293 cmp r3, r2
80066ea: d01f beq.n 800672c <UART_SetConfig+0x204>
80066ec: 2280 movs r2, #128 ; 0x80
80066ee: 00d2 lsls r2, r2, #3
80066f0: 4293 cmp r3, r2
80066f2: d802 bhi.n 80066fa <UART_SetConfig+0x1d2>
80066f4: 2b00 cmp r3, #0
80066f6: d009 beq.n 800670c <UART_SetConfig+0x1e4>
80066f8: e028 b.n 800674c <UART_SetConfig+0x224>
80066fa: 2280 movs r2, #128 ; 0x80
80066fc: 0112 lsls r2, r2, #4
80066fe: 4293 cmp r3, r2
8006700: d00c beq.n 800671c <UART_SetConfig+0x1f4>
8006702: 22c0 movs r2, #192 ; 0xc0
8006704: 0112 lsls r2, r2, #4
8006706: 4293 cmp r3, r2
8006708: d018 beq.n 800673c <UART_SetConfig+0x214>
800670a: e01f b.n 800674c <UART_SetConfig+0x224>
800670c: 231b movs r3, #27
800670e: 2218 movs r2, #24
8006710: 4694 mov ip, r2
8006712: 44bc add ip, r7
8006714: 4463 add r3, ip
8006716: 2200 movs r2, #0
8006718: 701a strb r2, [r3, #0]
800671a: e027 b.n 800676c <UART_SetConfig+0x244>
800671c: 231b movs r3, #27
800671e: 2218 movs r2, #24
8006720: 4694 mov ip, r2
8006722: 44bc add ip, r7
8006724: 4463 add r3, ip
8006726: 2202 movs r2, #2
8006728: 701a strb r2, [r3, #0]
800672a: e01f b.n 800676c <UART_SetConfig+0x244>
800672c: 231b movs r3, #27
800672e: 2218 movs r2, #24
8006730: 4694 mov ip, r2
8006732: 44bc add ip, r7
8006734: 4463 add r3, ip
8006736: 2204 movs r2, #4
8006738: 701a strb r2, [r3, #0]
800673a: e017 b.n 800676c <UART_SetConfig+0x244>
800673c: 231b movs r3, #27
800673e: 2218 movs r2, #24
8006740: 4694 mov ip, r2
8006742: 44bc add ip, r7
8006744: 4463 add r3, ip
8006746: 2208 movs r2, #8
8006748: 701a strb r2, [r3, #0]
800674a: e00f b.n 800676c <UART_SetConfig+0x244>
800674c: 231b movs r3, #27
800674e: 2218 movs r2, #24
8006750: 4694 mov ip, r2
8006752: 44bc add ip, r7
8006754: 4463 add r3, ip
8006756: 2210 movs r2, #16
8006758: 701a strb r2, [r3, #0]
800675a: 46c0 nop ; (mov r8, r8)
800675c: e006 b.n 800676c <UART_SetConfig+0x244>
800675e: 231b movs r3, #27
8006760: 2218 movs r2, #24
8006762: 4694 mov ip, r2
8006764: 44bc add ip, r7
8006766: 4463 add r3, ip
8006768: 2210 movs r2, #16
800676a: 701a strb r2, [r3, #0]
/* Check LPUART instance */
if (UART_INSTANCE_LOWPOWER(huart))
800676c: 69fb ldr r3, [r7, #28]
800676e: 681b ldr r3, [r3, #0]
8006770: 4a46 ldr r2, [pc, #280] ; (800688c <UART_SetConfig+0x364>)
8006772: 4293 cmp r3, r2
8006774: d000 beq.n 8006778 <UART_SetConfig+0x250>
8006776: e09f b.n 80068b8 <UART_SetConfig+0x390>
{
/* Retrieve frequency clock */
switch (clocksource)
8006778: 231b movs r3, #27
800677a: 2218 movs r2, #24
800677c: 4694 mov ip, r2
800677e: 44bc add ip, r7
8006780: 4463 add r3, ip
8006782: 781b ldrb r3, [r3, #0]
8006784: 2b02 cmp r3, #2
8006786: d00d beq.n 80067a4 <UART_SetConfig+0x27c>
8006788: dc02 bgt.n 8006790 <UART_SetConfig+0x268>
800678a: 2b00 cmp r3, #0
800678c: d005 beq.n 800679a <UART_SetConfig+0x272>
800678e: e01d b.n 80067cc <UART_SetConfig+0x2a4>
8006790: 2b04 cmp r3, #4
8006792: d012 beq.n 80067ba <UART_SetConfig+0x292>
8006794: 2b08 cmp r3, #8
8006796: d015 beq.n 80067c4 <UART_SetConfig+0x29c>
8006798: e018 b.n 80067cc <UART_SetConfig+0x2a4>
{
case UART_CLOCKSOURCE_PCLK1:
pclk = HAL_RCC_GetPCLK1Freq();
800679a: f7fe ffd5 bl 8005748 <HAL_RCC_GetPCLK1Freq>
800679e: 0003 movs r3, r0
80067a0: 62fb str r3, [r7, #44] ; 0x2c
break;
80067a2: e01d b.n 80067e0 <UART_SetConfig+0x2b8>
case UART_CLOCKSOURCE_HSI:
if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIDIV) != 0U)
80067a4: 4b3c ldr r3, [pc, #240] ; (8006898 <UART_SetConfig+0x370>)
80067a6: 681b ldr r3, [r3, #0]
80067a8: 2210 movs r2, #16
80067aa: 4013 ands r3, r2
80067ac: d002 beq.n 80067b4 <UART_SetConfig+0x28c>
{
pclk = (uint32_t)(HSI_VALUE >> 2U);
80067ae: 4b3e ldr r3, [pc, #248] ; (80068a8 <UART_SetConfig+0x380>)
80067b0: 62fb str r3, [r7, #44] ; 0x2c
}
else
{
pclk = (uint32_t) HSI_VALUE;
}
break;
80067b2: e015 b.n 80067e0 <UART_SetConfig+0x2b8>
pclk = (uint32_t) HSI_VALUE;
80067b4: 4b3d ldr r3, [pc, #244] ; (80068ac <UART_SetConfig+0x384>)
80067b6: 62fb str r3, [r7, #44] ; 0x2c
break;
80067b8: e012 b.n 80067e0 <UART_SetConfig+0x2b8>
case UART_CLOCKSOURCE_SYSCLK:
pclk = HAL_RCC_GetSysClockFreq();
80067ba: f7fe ff19 bl 80055f0 <HAL_RCC_GetSysClockFreq>
80067be: 0003 movs r3, r0
80067c0: 62fb str r3, [r7, #44] ; 0x2c
break;
80067c2: e00d b.n 80067e0 <UART_SetConfig+0x2b8>
case UART_CLOCKSOURCE_LSE:
pclk = (uint32_t) LSE_VALUE;
80067c4: 2380 movs r3, #128 ; 0x80
80067c6: 021b lsls r3, r3, #8
80067c8: 62fb str r3, [r7, #44] ; 0x2c
break;
80067ca: e009 b.n 80067e0 <UART_SetConfig+0x2b8>
default:
pclk = 0U;
80067cc: 2300 movs r3, #0
80067ce: 62fb str r3, [r7, #44] ; 0x2c
ret = HAL_ERROR;
80067d0: 231a movs r3, #26
80067d2: 2218 movs r2, #24
80067d4: 4694 mov ip, r2
80067d6: 44bc add ip, r7
80067d8: 4463 add r3, ip
80067da: 2201 movs r2, #1
80067dc: 701a strb r2, [r3, #0]
break;
80067de: 46c0 nop ; (mov r8, r8)
}
/* If proper clock source reported */
if (pclk != 0U)
80067e0: 6afb ldr r3, [r7, #44] ; 0x2c
80067e2: 2b00 cmp r3, #0
80067e4: d100 bne.n 80067e8 <UART_SetConfig+0x2c0>
80067e6: e145 b.n 8006a74 <UART_SetConfig+0x54c>
{
/* No Prescaler applicable */
/* Ensure that Frequency clock is in the range [3 * baudrate, 4096 * baudrate] */
if ((pclk < (3U * huart->Init.BaudRate)) ||
80067e8: 69fb ldr r3, [r7, #28]
80067ea: 685a ldr r2, [r3, #4]
80067ec: 0013 movs r3, r2
80067ee: 005b lsls r3, r3, #1
80067f0: 189a adds r2, r3, r2
80067f2: 6afb ldr r3, [r7, #44] ; 0x2c
80067f4: 429a cmp r2, r3
80067f6: d805 bhi.n 8006804 <UART_SetConfig+0x2dc>
(pclk > (4096U * huart->Init.BaudRate)))
80067f8: 69fb ldr r3, [r7, #28]
80067fa: 685b ldr r3, [r3, #4]
80067fc: 031a lsls r2, r3, #12
if ((pclk < (3U * huart->Init.BaudRate)) ||
80067fe: 6afb ldr r3, [r7, #44] ; 0x2c
8006800: 429a cmp r2, r3
8006802: d207 bcs.n 8006814 <UART_SetConfig+0x2ec>
{
ret = HAL_ERROR;
8006804: 231a movs r3, #26
8006806: 2218 movs r2, #24
8006808: 4694 mov ip, r2
800680a: 44bc add ip, r7
800680c: 4463 add r3, ip
800680e: 2201 movs r2, #1
8006810: 701a strb r2, [r3, #0]
8006812: e12f b.n 8006a74 <UART_SetConfig+0x54c>
}
else
{
usartdiv = (uint32_t)(UART_DIV_LPUART(pclk, huart->Init.BaudRate));
8006814: 6afb ldr r3, [r7, #44] ; 0x2c
8006816: 613b str r3, [r7, #16]
8006818: 2300 movs r3, #0
800681a: 617b str r3, [r7, #20]
800681c: 6939 ldr r1, [r7, #16]
800681e: 697a ldr r2, [r7, #20]
8006820: 000b movs r3, r1
8006822: 0e1b lsrs r3, r3, #24
8006824: 0010 movs r0, r2
8006826: 0205 lsls r5, r0, #8
8006828: 431d orrs r5, r3
800682a: 000b movs r3, r1
800682c: 021c lsls r4, r3, #8
800682e: 69fb ldr r3, [r7, #28]
8006830: 685b ldr r3, [r3, #4]
8006832: 085b lsrs r3, r3, #1
8006834: 60bb str r3, [r7, #8]
8006836: 2300 movs r3, #0
8006838: 60fb str r3, [r7, #12]
800683a: 68b8 ldr r0, [r7, #8]
800683c: 68f9 ldr r1, [r7, #12]
800683e: 1900 adds r0, r0, r4
8006840: 4169 adcs r1, r5
8006842: 69fb ldr r3, [r7, #28]
8006844: 685b ldr r3, [r3, #4]
8006846: 603b str r3, [r7, #0]
8006848: 2300 movs r3, #0
800684a: 607b str r3, [r7, #4]
800684c: 683a ldr r2, [r7, #0]
800684e: 687b ldr r3, [r7, #4]
8006850: f7f9 fd5e bl 8000310 <__aeabi_uldivmod>
8006854: 0003 movs r3, r0
8006856: 000c movs r4, r1
8006858: 62bb str r3, [r7, #40] ; 0x28
if ((usartdiv >= LPUART_BRR_MIN) && (usartdiv <= LPUART_BRR_MAX))
800685a: 6abb ldr r3, [r7, #40] ; 0x28
800685c: 4a14 ldr r2, [pc, #80] ; (80068b0 <UART_SetConfig+0x388>)
800685e: 4293 cmp r3, r2
8006860: d908 bls.n 8006874 <UART_SetConfig+0x34c>
8006862: 6abb ldr r3, [r7, #40] ; 0x28
8006864: 4a13 ldr r2, [pc, #76] ; (80068b4 <UART_SetConfig+0x38c>)
8006866: 4293 cmp r3, r2
8006868: d804 bhi.n 8006874 <UART_SetConfig+0x34c>
{
huart->Instance->BRR = usartdiv;
800686a: 69fb ldr r3, [r7, #28]
800686c: 681b ldr r3, [r3, #0]
800686e: 6aba ldr r2, [r7, #40] ; 0x28
8006870: 60da str r2, [r3, #12]
8006872: e0ff b.n 8006a74 <UART_SetConfig+0x54c>
}
else
{
ret = HAL_ERROR;
8006874: 231a movs r3, #26
8006876: 2218 movs r2, #24
8006878: 4694 mov ip, r2
800687a: 44bc add ip, r7
800687c: 4463 add r3, ip
800687e: 2201 movs r2, #1
8006880: 701a strb r2, [r3, #0]
8006882: e0f7 b.n 8006a74 <UART_SetConfig+0x54c>
8006884: efff69f3 .word 0xefff69f3
8006888: ffffcfff .word 0xffffcfff
800688c: 40004800 .word 0x40004800
8006890: fffff4ff .word 0xfffff4ff
8006894: 40013800 .word 0x40013800
8006898: 40021000 .word 0x40021000
800689c: 40004400 .word 0x40004400
80068a0: 40004c00 .word 0x40004c00
80068a4: 40005000 .word 0x40005000
80068a8: 003d0900 .word 0x003d0900
80068ac: 00f42400 .word 0x00f42400
80068b0: 000002ff .word 0x000002ff
80068b4: 000fffff .word 0x000fffff
}
} /* if ( (pclk < (3 * huart->Init.BaudRate) ) || (pclk > (4096 * huart->Init.BaudRate) )) */
} /* if (pclk != 0) */
}
/* Check UART Over Sampling to set Baud Rate Register */
else if (huart->Init.OverSampling == UART_OVERSAMPLING_8)
80068b8: 69fb ldr r3, [r7, #28]
80068ba: 69da ldr r2, [r3, #28]
80068bc: 2380 movs r3, #128 ; 0x80
80068be: 021b lsls r3, r3, #8
80068c0: 429a cmp r2, r3
80068c2: d000 beq.n 80068c6 <UART_SetConfig+0x39e>
80068c4: e07d b.n 80069c2 <UART_SetConfig+0x49a>
{
switch (clocksource)
80068c6: 231b movs r3, #27
80068c8: 2218 movs r2, #24
80068ca: 4694 mov ip, r2
80068cc: 44bc add ip, r7
80068ce: 4463 add r3, ip
80068d0: 781b ldrb r3, [r3, #0]
80068d2: 2b08 cmp r3, #8
80068d4: d822 bhi.n 800691c <UART_SetConfig+0x3f4>
80068d6: 009a lsls r2, r3, #2
80068d8: 4b6e ldr r3, [pc, #440] ; (8006a94 <UART_SetConfig+0x56c>)
80068da: 18d3 adds r3, r2, r3
80068dc: 681b ldr r3, [r3, #0]
80068de: 469f mov pc, r3
{
case UART_CLOCKSOURCE_PCLK1:
pclk = HAL_RCC_GetPCLK1Freq();
80068e0: f7fe ff32 bl 8005748 <HAL_RCC_GetPCLK1Freq>
80068e4: 0003 movs r3, r0
80068e6: 62fb str r3, [r7, #44] ; 0x2c
break;
80068e8: e022 b.n 8006930 <UART_SetConfig+0x408>
case UART_CLOCKSOURCE_PCLK2:
pclk = HAL_RCC_GetPCLK2Freq();
80068ea: f7fe ff43 bl 8005774 <HAL_RCC_GetPCLK2Freq>
80068ee: 0003 movs r3, r0
80068f0: 62fb str r3, [r7, #44] ; 0x2c
break;
80068f2: e01d b.n 8006930 <UART_SetConfig+0x408>
case UART_CLOCKSOURCE_HSI:
if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIDIV) != 0U)
80068f4: 4b68 ldr r3, [pc, #416] ; (8006a98 <UART_SetConfig+0x570>)
80068f6: 681b ldr r3, [r3, #0]
80068f8: 2210 movs r2, #16
80068fa: 4013 ands r3, r2
80068fc: d002 beq.n 8006904 <UART_SetConfig+0x3dc>
{
pclk = (uint32_t)(HSI_VALUE >> 2U);
80068fe: 4b67 ldr r3, [pc, #412] ; (8006a9c <UART_SetConfig+0x574>)
8006900: 62fb str r3, [r7, #44] ; 0x2c
}
else
{
pclk = (uint32_t) HSI_VALUE;
}
break;
8006902: e015 b.n 8006930 <UART_SetConfig+0x408>
pclk = (uint32_t) HSI_VALUE;
8006904: 4b66 ldr r3, [pc, #408] ; (8006aa0 <UART_SetConfig+0x578>)
8006906: 62fb str r3, [r7, #44] ; 0x2c
break;
8006908: e012 b.n 8006930 <UART_SetConfig+0x408>
case UART_CLOCKSOURCE_SYSCLK:
pclk = HAL_RCC_GetSysClockFreq();
800690a: f7fe fe71 bl 80055f0 <HAL_RCC_GetSysClockFreq>
800690e: 0003 movs r3, r0
8006910: 62fb str r3, [r7, #44] ; 0x2c
break;
8006912: e00d b.n 8006930 <UART_SetConfig+0x408>
case UART_CLOCKSOURCE_LSE:
pclk = (uint32_t) LSE_VALUE;
8006914: 2380 movs r3, #128 ; 0x80
8006916: 021b lsls r3, r3, #8
8006918: 62fb str r3, [r7, #44] ; 0x2c
break;
800691a: e009 b.n 8006930 <UART_SetConfig+0x408>
default:
pclk = 0U;
800691c: 2300 movs r3, #0
800691e: 62fb str r3, [r7, #44] ; 0x2c
ret = HAL_ERROR;
8006920: 231a movs r3, #26
8006922: 2218 movs r2, #24
8006924: 4694 mov ip, r2
8006926: 44bc add ip, r7
8006928: 4463 add r3, ip
800692a: 2201 movs r2, #1
800692c: 701a strb r2, [r3, #0]
break;
800692e: 46c0 nop ; (mov r8, r8)
}
/* USARTDIV must be greater than or equal to 0d16 */
if (pclk != 0U)
8006930: 6afb ldr r3, [r7, #44] ; 0x2c
8006932: 2b00 cmp r3, #0
8006934: d100 bne.n 8006938 <UART_SetConfig+0x410>
8006936: e09d b.n 8006a74 <UART_SetConfig+0x54c>
{
usartdiv = (uint16_t)(UART_DIV_SAMPLING8(pclk, huart->Init.BaudRate));
8006938: 6afb ldr r3, [r7, #44] ; 0x2c
800693a: 005a lsls r2, r3, #1
800693c: 69fb ldr r3, [r7, #28]
800693e: 685b ldr r3, [r3, #4]
8006940: 085b lsrs r3, r3, #1
8006942: 18d2 adds r2, r2, r3
8006944: 69fb ldr r3, [r7, #28]
8006946: 685b ldr r3, [r3, #4]
8006948: 0019 movs r1, r3
800694a: 0010 movs r0, r2
800694c: f7f9 fbdc bl 8000108 <__udivsi3>
8006950: 0003 movs r3, r0
8006952: b29b uxth r3, r3
8006954: 62bb str r3, [r7, #40] ; 0x28
if ((usartdiv >= UART_BRR_MIN) && (usartdiv <= UART_BRR_MAX))
8006956: 6abb ldr r3, [r7, #40] ; 0x28
8006958: 2b0f cmp r3, #15
800695a: d92a bls.n 80069b2 <UART_SetConfig+0x48a>
800695c: 6abb ldr r3, [r7, #40] ; 0x28
800695e: 4a51 ldr r2, [pc, #324] ; (8006aa4 <UART_SetConfig+0x57c>)
8006960: 4293 cmp r3, r2
8006962: d826 bhi.n 80069b2 <UART_SetConfig+0x48a>
{
brrtemp = (uint16_t)(usartdiv & 0xFFF0U);
8006964: 6abb ldr r3, [r7, #40] ; 0x28
8006966: b29a uxth r2, r3
8006968: 230e movs r3, #14
800696a: 2118 movs r1, #24
800696c: 468c mov ip, r1
800696e: 44bc add ip, r7
8006970: 4463 add r3, ip
8006972: 210f movs r1, #15
8006974: 438a bics r2, r1
8006976: 801a strh r2, [r3, #0]
brrtemp |= (uint16_t)((usartdiv & (uint16_t)0x000FU) >> 1U);
8006978: 6abb ldr r3, [r7, #40] ; 0x28
800697a: 085b lsrs r3, r3, #1
800697c: b29b uxth r3, r3
800697e: 2207 movs r2, #7
8006980: 4013 ands r3, r2
8006982: b299 uxth r1, r3
8006984: 230e movs r3, #14
8006986: 2218 movs r2, #24
8006988: 4694 mov ip, r2
800698a: 44bc add ip, r7
800698c: 4463 add r3, ip
800698e: 220e movs r2, #14
8006990: 2018 movs r0, #24
8006992: 4684 mov ip, r0
8006994: 44bc add ip, r7
8006996: 4462 add r2, ip
8006998: 8812 ldrh r2, [r2, #0]
800699a: 430a orrs r2, r1
800699c: 801a strh r2, [r3, #0]
huart->Instance->BRR = brrtemp;
800699e: 69fb ldr r3, [r7, #28]
80069a0: 681b ldr r3, [r3, #0]
80069a2: 220e movs r2, #14
80069a4: 2118 movs r1, #24
80069a6: 468c mov ip, r1
80069a8: 44bc add ip, r7
80069aa: 4462 add r2, ip
80069ac: 8812 ldrh r2, [r2, #0]
80069ae: 60da str r2, [r3, #12]
80069b0: e060 b.n 8006a74 <UART_SetConfig+0x54c>
}
else
{
ret = HAL_ERROR;
80069b2: 231a movs r3, #26
80069b4: 2218 movs r2, #24
80069b6: 4694 mov ip, r2
80069b8: 44bc add ip, r7
80069ba: 4463 add r3, ip
80069bc: 2201 movs r2, #1
80069be: 701a strb r2, [r3, #0]
80069c0: e058 b.n 8006a74 <UART_SetConfig+0x54c>
}
}
}
else
{
switch (clocksource)
80069c2: 231b movs r3, #27
80069c4: 2218 movs r2, #24
80069c6: 4694 mov ip, r2
80069c8: 44bc add ip, r7
80069ca: 4463 add r3, ip
80069cc: 781b ldrb r3, [r3, #0]
80069ce: 2b08 cmp r3, #8
80069d0: d822 bhi.n 8006a18 <UART_SetConfig+0x4f0>
80069d2: 009a lsls r2, r3, #2
80069d4: 4b34 ldr r3, [pc, #208] ; (8006aa8 <UART_SetConfig+0x580>)
80069d6: 18d3 adds r3, r2, r3
80069d8: 681b ldr r3, [r3, #0]
80069da: 469f mov pc, r3
{
case UART_CLOCKSOURCE_PCLK1:
pclk = HAL_RCC_GetPCLK1Freq();
80069dc: f7fe feb4 bl 8005748 <HAL_RCC_GetPCLK1Freq>
80069e0: 0003 movs r3, r0
80069e2: 62fb str r3, [r7, #44] ; 0x2c
break;
80069e4: e022 b.n 8006a2c <UART_SetConfig+0x504>
case UART_CLOCKSOURCE_PCLK2:
pclk = HAL_RCC_GetPCLK2Freq();
80069e6: f7fe fec5 bl 8005774 <HAL_RCC_GetPCLK2Freq>
80069ea: 0003 movs r3, r0
80069ec: 62fb str r3, [r7, #44] ; 0x2c
break;
80069ee: e01d b.n 8006a2c <UART_SetConfig+0x504>
case UART_CLOCKSOURCE_HSI:
if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIDIV) != 0U)
80069f0: 4b29 ldr r3, [pc, #164] ; (8006a98 <UART_SetConfig+0x570>)
80069f2: 681b ldr r3, [r3, #0]
80069f4: 2210 movs r2, #16
80069f6: 4013 ands r3, r2
80069f8: d002 beq.n 8006a00 <UART_SetConfig+0x4d8>
{
pclk = (uint32_t)(HSI_VALUE >> 2U);
80069fa: 4b28 ldr r3, [pc, #160] ; (8006a9c <UART_SetConfig+0x574>)
80069fc: 62fb str r3, [r7, #44] ; 0x2c
}
else
{
pclk = (uint32_t) HSI_VALUE;
}
break;
80069fe: e015 b.n 8006a2c <UART_SetConfig+0x504>
pclk = (uint32_t) HSI_VALUE;
8006a00: 4b27 ldr r3, [pc, #156] ; (8006aa0 <UART_SetConfig+0x578>)
8006a02: 62fb str r3, [r7, #44] ; 0x2c
break;
8006a04: e012 b.n 8006a2c <UART_SetConfig+0x504>
case UART_CLOCKSOURCE_SYSCLK:
pclk = HAL_RCC_GetSysClockFreq();
8006a06: f7fe fdf3 bl 80055f0 <HAL_RCC_GetSysClockFreq>
8006a0a: 0003 movs r3, r0
8006a0c: 62fb str r3, [r7, #44] ; 0x2c
break;
8006a0e: e00d b.n 8006a2c <UART_SetConfig+0x504>
case UART_CLOCKSOURCE_LSE:
pclk = (uint32_t) LSE_VALUE;
8006a10: 2380 movs r3, #128 ; 0x80
8006a12: 021b lsls r3, r3, #8
8006a14: 62fb str r3, [r7, #44] ; 0x2c
break;
8006a16: e009 b.n 8006a2c <UART_SetConfig+0x504>
default:
pclk = 0U;
8006a18: 2300 movs r3, #0
8006a1a: 62fb str r3, [r7, #44] ; 0x2c
ret = HAL_ERROR;
8006a1c: 231a movs r3, #26
8006a1e: 2218 movs r2, #24
8006a20: 4694 mov ip, r2
8006a22: 44bc add ip, r7
8006a24: 4463 add r3, ip
8006a26: 2201 movs r2, #1
8006a28: 701a strb r2, [r3, #0]
break;
8006a2a: 46c0 nop ; (mov r8, r8)
}
if (pclk != 0U)
8006a2c: 6afb ldr r3, [r7, #44] ; 0x2c
8006a2e: 2b00 cmp r3, #0
8006a30: d020 beq.n 8006a74 <UART_SetConfig+0x54c>
{
/* USARTDIV must be greater than or equal to 0d16 */
usartdiv = (uint16_t)(UART_DIV_SAMPLING16(pclk, huart->Init.BaudRate));
8006a32: 69fb ldr r3, [r7, #28]
8006a34: 685b ldr r3, [r3, #4]
8006a36: 085a lsrs r2, r3, #1
8006a38: 6afb ldr r3, [r7, #44] ; 0x2c
8006a3a: 18d2 adds r2, r2, r3
8006a3c: 69fb ldr r3, [r7, #28]
8006a3e: 685b ldr r3, [r3, #4]
8006a40: 0019 movs r1, r3
8006a42: 0010 movs r0, r2
8006a44: f7f9 fb60 bl 8000108 <__udivsi3>
8006a48: 0003 movs r3, r0
8006a4a: b29b uxth r3, r3
8006a4c: 62bb str r3, [r7, #40] ; 0x28
if ((usartdiv >= UART_BRR_MIN) && (usartdiv <= UART_BRR_MAX))
8006a4e: 6abb ldr r3, [r7, #40] ; 0x28
8006a50: 2b0f cmp r3, #15
8006a52: d908 bls.n 8006a66 <UART_SetConfig+0x53e>
8006a54: 6abb ldr r3, [r7, #40] ; 0x28
8006a56: 4a13 ldr r2, [pc, #76] ; (8006aa4 <UART_SetConfig+0x57c>)
8006a58: 4293 cmp r3, r2
8006a5a: d804 bhi.n 8006a66 <UART_SetConfig+0x53e>
{
huart->Instance->BRR = usartdiv;
8006a5c: 69fb ldr r3, [r7, #28]
8006a5e: 681b ldr r3, [r3, #0]
8006a60: 6aba ldr r2, [r7, #40] ; 0x28
8006a62: 60da str r2, [r3, #12]
8006a64: e006 b.n 8006a74 <UART_SetConfig+0x54c>
}
else
{
ret = HAL_ERROR;
8006a66: 231a movs r3, #26
8006a68: 2218 movs r2, #24
8006a6a: 4694 mov ip, r2
8006a6c: 44bc add ip, r7
8006a6e: 4463 add r3, ip
8006a70: 2201 movs r2, #1
8006a72: 701a strb r2, [r3, #0]
}
}
/* Clear ISR function pointers */
huart->RxISR = NULL;
8006a74: 69fb ldr r3, [r7, #28]
8006a76: 2200 movs r2, #0
8006a78: 665a str r2, [r3, #100] ; 0x64
huart->TxISR = NULL;
8006a7a: 69fb ldr r3, [r7, #28]
8006a7c: 2200 movs r2, #0
8006a7e: 669a str r2, [r3, #104] ; 0x68
return ret;
8006a80: 231a movs r3, #26
8006a82: 2218 movs r2, #24
8006a84: 4694 mov ip, r2
8006a86: 44bc add ip, r7
8006a88: 4463 add r3, ip
8006a8a: 781b ldrb r3, [r3, #0]
}
8006a8c: 0018 movs r0, r3
8006a8e: 46bd mov sp, r7
8006a90: b00e add sp, #56 ; 0x38
8006a92: bdb0 pop {r4, r5, r7, pc}
8006a94: 08007480 .word 0x08007480
8006a98: 40021000 .word 0x40021000
8006a9c: 003d0900 .word 0x003d0900
8006aa0: 00f42400 .word 0x00f42400
8006aa4: 0000ffff .word 0x0000ffff
8006aa8: 080074a4 .word 0x080074a4
08006aac <UART_AdvFeatureConfig>:
* @brief Configure the UART peripheral advanced features.
* @param huart UART handle.
* @retval None
*/
void UART_AdvFeatureConfig(UART_HandleTypeDef *huart)
{
8006aac: b580 push {r7, lr}
8006aae: b082 sub sp, #8
8006ab0: af00 add r7, sp, #0
8006ab2: 6078 str r0, [r7, #4]
/* Check whether the set of advanced features to configure is properly set */
assert_param(IS_UART_ADVFEATURE_INIT(huart->AdvancedInit.AdvFeatureInit));
/* if required, configure TX pin active level inversion */
if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_TXINVERT_INIT))
8006ab4: 687b ldr r3, [r7, #4]
8006ab6: 6a5b ldr r3, [r3, #36] ; 0x24
8006ab8: 2201 movs r2, #1
8006aba: 4013 ands r3, r2
8006abc: d00a beq.n 8006ad4 <UART_AdvFeatureConfig+0x28>
{
assert_param(IS_UART_ADVFEATURE_TXINV(huart->AdvancedInit.TxPinLevelInvert));
MODIFY_REG(huart->Instance->CR2, USART_CR2_TXINV, huart->AdvancedInit.TxPinLevelInvert);
8006abe: 687b ldr r3, [r7, #4]
8006ac0: 681b ldr r3, [r3, #0]
8006ac2: 687a ldr r2, [r7, #4]
8006ac4: 6812 ldr r2, [r2, #0]
8006ac6: 6852 ldr r2, [r2, #4]
8006ac8: 4945 ldr r1, [pc, #276] ; (8006be0 <UART_AdvFeatureConfig+0x134>)
8006aca: 4011 ands r1, r2
8006acc: 687a ldr r2, [r7, #4]
8006ace: 6a92 ldr r2, [r2, #40] ; 0x28
8006ad0: 430a orrs r2, r1
8006ad2: 605a str r2, [r3, #4]
}
/* if required, configure RX pin active level inversion */
if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_RXINVERT_INIT))
8006ad4: 687b ldr r3, [r7, #4]
8006ad6: 6a5b ldr r3, [r3, #36] ; 0x24
8006ad8: 2202 movs r2, #2
8006ada: 4013 ands r3, r2
8006adc: d00a beq.n 8006af4 <UART_AdvFeatureConfig+0x48>
{
assert_param(IS_UART_ADVFEATURE_RXINV(huart->AdvancedInit.RxPinLevelInvert));
MODIFY_REG(huart->Instance->CR2, USART_CR2_RXINV, huart->AdvancedInit.RxPinLevelInvert);
8006ade: 687b ldr r3, [r7, #4]
8006ae0: 681b ldr r3, [r3, #0]
8006ae2: 687a ldr r2, [r7, #4]
8006ae4: 6812 ldr r2, [r2, #0]
8006ae6: 6852 ldr r2, [r2, #4]
8006ae8: 493e ldr r1, [pc, #248] ; (8006be4 <UART_AdvFeatureConfig+0x138>)
8006aea: 4011 ands r1, r2
8006aec: 687a ldr r2, [r7, #4]
8006aee: 6ad2 ldr r2, [r2, #44] ; 0x2c
8006af0: 430a orrs r2, r1
8006af2: 605a str r2, [r3, #4]
}
/* if required, configure data inversion */
if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_DATAINVERT_INIT))
8006af4: 687b ldr r3, [r7, #4]
8006af6: 6a5b ldr r3, [r3, #36] ; 0x24
8006af8: 2204 movs r2, #4
8006afa: 4013 ands r3, r2
8006afc: d00a beq.n 8006b14 <UART_AdvFeatureConfig+0x68>
{
assert_param(IS_UART_ADVFEATURE_DATAINV(huart->AdvancedInit.DataInvert));
MODIFY_REG(huart->Instance->CR2, USART_CR2_DATAINV, huart->AdvancedInit.DataInvert);
8006afe: 687b ldr r3, [r7, #4]
8006b00: 681b ldr r3, [r3, #0]
8006b02: 687a ldr r2, [r7, #4]
8006b04: 6812 ldr r2, [r2, #0]
8006b06: 6852 ldr r2, [r2, #4]
8006b08: 4937 ldr r1, [pc, #220] ; (8006be8 <UART_AdvFeatureConfig+0x13c>)
8006b0a: 4011 ands r1, r2
8006b0c: 687a ldr r2, [r7, #4]
8006b0e: 6b12 ldr r2, [r2, #48] ; 0x30
8006b10: 430a orrs r2, r1
8006b12: 605a str r2, [r3, #4]
}
/* if required, configure RX/TX pins swap */
if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_SWAP_INIT))
8006b14: 687b ldr r3, [r7, #4]
8006b16: 6a5b ldr r3, [r3, #36] ; 0x24
8006b18: 2208 movs r2, #8
8006b1a: 4013 ands r3, r2
8006b1c: d00a beq.n 8006b34 <UART_AdvFeatureConfig+0x88>
{
assert_param(IS_UART_ADVFEATURE_SWAP(huart->AdvancedInit.Swap));
MODIFY_REG(huart->Instance->CR2, USART_CR2_SWAP, huart->AdvancedInit.Swap);
8006b1e: 687b ldr r3, [r7, #4]
8006b20: 681b ldr r3, [r3, #0]
8006b22: 687a ldr r2, [r7, #4]
8006b24: 6812 ldr r2, [r2, #0]
8006b26: 6852 ldr r2, [r2, #4]
8006b28: 4930 ldr r1, [pc, #192] ; (8006bec <UART_AdvFeatureConfig+0x140>)
8006b2a: 4011 ands r1, r2
8006b2c: 687a ldr r2, [r7, #4]
8006b2e: 6b52 ldr r2, [r2, #52] ; 0x34
8006b30: 430a orrs r2, r1
8006b32: 605a str r2, [r3, #4]
}
/* if required, configure RX overrun detection disabling */
if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_RXOVERRUNDISABLE_INIT))
8006b34: 687b ldr r3, [r7, #4]
8006b36: 6a5b ldr r3, [r3, #36] ; 0x24
8006b38: 2210 movs r2, #16
8006b3a: 4013 ands r3, r2
8006b3c: d00a beq.n 8006b54 <UART_AdvFeatureConfig+0xa8>
{
assert_param(IS_UART_OVERRUN(huart->AdvancedInit.OverrunDisable));
MODIFY_REG(huart->Instance->CR3, USART_CR3_OVRDIS, huart->AdvancedInit.OverrunDisable);
8006b3e: 687b ldr r3, [r7, #4]
8006b40: 681b ldr r3, [r3, #0]
8006b42: 687a ldr r2, [r7, #4]
8006b44: 6812 ldr r2, [r2, #0]
8006b46: 6892 ldr r2, [r2, #8]
8006b48: 4929 ldr r1, [pc, #164] ; (8006bf0 <UART_AdvFeatureConfig+0x144>)
8006b4a: 4011 ands r1, r2
8006b4c: 687a ldr r2, [r7, #4]
8006b4e: 6b92 ldr r2, [r2, #56] ; 0x38
8006b50: 430a orrs r2, r1
8006b52: 609a str r2, [r3, #8]
}
/* if required, configure DMA disabling on reception error */
if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_DMADISABLEONERROR_INIT))
8006b54: 687b ldr r3, [r7, #4]
8006b56: 6a5b ldr r3, [r3, #36] ; 0x24
8006b58: 2220 movs r2, #32
8006b5a: 4013 ands r3, r2
8006b5c: d00a beq.n 8006b74 <UART_AdvFeatureConfig+0xc8>
{
assert_param(IS_UART_ADVFEATURE_DMAONRXERROR(huart->AdvancedInit.DMADisableonRxError));
MODIFY_REG(huart->Instance->CR3, USART_CR3_DDRE, huart->AdvancedInit.DMADisableonRxError);
8006b5e: 687b ldr r3, [r7, #4]
8006b60: 681b ldr r3, [r3, #0]
8006b62: 687a ldr r2, [r7, #4]
8006b64: 6812 ldr r2, [r2, #0]
8006b66: 6892 ldr r2, [r2, #8]
8006b68: 4922 ldr r1, [pc, #136] ; (8006bf4 <UART_AdvFeatureConfig+0x148>)
8006b6a: 4011 ands r1, r2
8006b6c: 687a ldr r2, [r7, #4]
8006b6e: 6bd2 ldr r2, [r2, #60] ; 0x3c
8006b70: 430a orrs r2, r1
8006b72: 609a str r2, [r3, #8]
}
/* if required, configure auto Baud rate detection scheme */
if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_AUTOBAUDRATE_INIT))
8006b74: 687b ldr r3, [r7, #4]
8006b76: 6a5b ldr r3, [r3, #36] ; 0x24
8006b78: 2240 movs r2, #64 ; 0x40
8006b7a: 4013 ands r3, r2
8006b7c: d01b beq.n 8006bb6 <UART_AdvFeatureConfig+0x10a>
{
assert_param(IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(huart->Instance));
assert_param(IS_UART_ADVFEATURE_AUTOBAUDRATE(huart->AdvancedInit.AutoBaudRateEnable));
MODIFY_REG(huart->Instance->CR2, USART_CR2_ABREN, huart->AdvancedInit.AutoBaudRateEnable);
8006b7e: 687b ldr r3, [r7, #4]
8006b80: 681b ldr r3, [r3, #0]
8006b82: 687a ldr r2, [r7, #4]
8006b84: 6812 ldr r2, [r2, #0]
8006b86: 6852 ldr r2, [r2, #4]
8006b88: 491b ldr r1, [pc, #108] ; (8006bf8 <UART_AdvFeatureConfig+0x14c>)
8006b8a: 4011 ands r1, r2
8006b8c: 687a ldr r2, [r7, #4]
8006b8e: 6c12 ldr r2, [r2, #64] ; 0x40
8006b90: 430a orrs r2, r1
8006b92: 605a str r2, [r3, #4]
/* set auto Baudrate detection parameters if detection is enabled */
if (huart->AdvancedInit.AutoBaudRateEnable == UART_ADVFEATURE_AUTOBAUDRATE_ENABLE)
8006b94: 687b ldr r3, [r7, #4]
8006b96: 6c1a ldr r2, [r3, #64] ; 0x40
8006b98: 2380 movs r3, #128 ; 0x80
8006b9a: 035b lsls r3, r3, #13
8006b9c: 429a cmp r2, r3
8006b9e: d10a bne.n 8006bb6 <UART_AdvFeatureConfig+0x10a>
{
assert_param(IS_UART_ADVFEATURE_AUTOBAUDRATEMODE(huart->AdvancedInit.AutoBaudRateMode));
MODIFY_REG(huart->Instance->CR2, USART_CR2_ABRMODE, huart->AdvancedInit.AutoBaudRateMode);
8006ba0: 687b ldr r3, [r7, #4]
8006ba2: 681b ldr r3, [r3, #0]
8006ba4: 687a ldr r2, [r7, #4]
8006ba6: 6812 ldr r2, [r2, #0]
8006ba8: 6852 ldr r2, [r2, #4]
8006baa: 4914 ldr r1, [pc, #80] ; (8006bfc <UART_AdvFeatureConfig+0x150>)
8006bac: 4011 ands r1, r2
8006bae: 687a ldr r2, [r7, #4]
8006bb0: 6c52 ldr r2, [r2, #68] ; 0x44
8006bb2: 430a orrs r2, r1
8006bb4: 605a str r2, [r3, #4]
}
}
/* if required, configure MSB first on communication line */
if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_MSBFIRST_INIT))
8006bb6: 687b ldr r3, [r7, #4]
8006bb8: 6a5b ldr r3, [r3, #36] ; 0x24
8006bba: 2280 movs r2, #128 ; 0x80
8006bbc: 4013 ands r3, r2
8006bbe: d00a beq.n 8006bd6 <UART_AdvFeatureConfig+0x12a>
{
assert_param(IS_UART_ADVFEATURE_MSBFIRST(huart->AdvancedInit.MSBFirst));
MODIFY_REG(huart->Instance->CR2, USART_CR2_MSBFIRST, huart->AdvancedInit.MSBFirst);
8006bc0: 687b ldr r3, [r7, #4]
8006bc2: 681b ldr r3, [r3, #0]
8006bc4: 687a ldr r2, [r7, #4]
8006bc6: 6812 ldr r2, [r2, #0]
8006bc8: 6852 ldr r2, [r2, #4]
8006bca: 490d ldr r1, [pc, #52] ; (8006c00 <UART_AdvFeatureConfig+0x154>)
8006bcc: 4011 ands r1, r2
8006bce: 687a ldr r2, [r7, #4]
8006bd0: 6c92 ldr r2, [r2, #72] ; 0x48
8006bd2: 430a orrs r2, r1
8006bd4: 605a str r2, [r3, #4]
}
}
8006bd6: 46c0 nop ; (mov r8, r8)
8006bd8: 46bd mov sp, r7
8006bda: b002 add sp, #8
8006bdc: bd80 pop {r7, pc}
8006bde: 46c0 nop ; (mov r8, r8)
8006be0: fffdffff .word 0xfffdffff
8006be4: fffeffff .word 0xfffeffff
8006be8: fffbffff .word 0xfffbffff
8006bec: ffff7fff .word 0xffff7fff
8006bf0: ffffefff .word 0xffffefff
8006bf4: ffffdfff .word 0xffffdfff
8006bf8: ffefffff .word 0xffefffff
8006bfc: ff9fffff .word 0xff9fffff
8006c00: fff7ffff .word 0xfff7ffff
08006c04 <UART_CheckIdleState>:
* @brief Check the UART Idle State.
* @param huart UART handle.
* @retval HAL status
*/
HAL_StatusTypeDef UART_CheckIdleState(UART_HandleTypeDef *huart)
{
8006c04: b580 push {r7, lr}
8006c06: b086 sub sp, #24
8006c08: af02 add r7, sp, #8
8006c0a: 6078 str r0, [r7, #4]
uint32_t tickstart;
/* Initialize the UART ErrorCode */
huart->ErrorCode = HAL_UART_ERROR_NONE;
8006c0c: 687b ldr r3, [r7, #4]
8006c0e: 2280 movs r2, #128 ; 0x80
8006c10: 2100 movs r1, #0
8006c12: 5099 str r1, [r3, r2]
/* Init tickstart for timeout management */
tickstart = HAL_GetTick();
8006c14: f7fd f9a8 bl 8003f68 <HAL_GetTick>
8006c18: 0003 movs r3, r0
8006c1a: 60fb str r3, [r7, #12]
/* Check if the Transmitter is enabled */
if ((huart->Instance->CR1 & USART_CR1_TE) == USART_CR1_TE)
8006c1c: 687b ldr r3, [r7, #4]
8006c1e: 681b ldr r3, [r3, #0]
8006c20: 681b ldr r3, [r3, #0]
8006c22: 2208 movs r2, #8
8006c24: 4013 ands r3, r2
8006c26: 2b08 cmp r3, #8
8006c28: d10d bne.n 8006c46 <UART_CheckIdleState+0x42>
{
/* Wait until TEACK flag is set */
if (UART_WaitOnFlagUntilTimeout(huart, USART_ISR_TEACK, RESET, tickstart, HAL_UART_TIMEOUT_VALUE) != HAL_OK)
8006c2a: 68fa ldr r2, [r7, #12]
8006c2c: 2380 movs r3, #128 ; 0x80
8006c2e: 0399 lsls r1, r3, #14
8006c30: 6878 ldr r0, [r7, #4]
8006c32: 4b18 ldr r3, [pc, #96] ; (8006c94 <UART_CheckIdleState+0x90>)
8006c34: 9300 str r3, [sp, #0]
8006c36: 0013 movs r3, r2
8006c38: 2200 movs r2, #0
8006c3a: f000 f82d bl 8006c98 <UART_WaitOnFlagUntilTimeout>
8006c3e: 1e03 subs r3, r0, #0
8006c40: d001 beq.n 8006c46 <UART_CheckIdleState+0x42>
{
/* Timeout occurred */
return HAL_TIMEOUT;
8006c42: 2303 movs r3, #3
8006c44: e022 b.n 8006c8c <UART_CheckIdleState+0x88>
}
}
/* Check if the Receiver is enabled */
if ((huart->Instance->CR1 & USART_CR1_RE) == USART_CR1_RE)
8006c46: 687b ldr r3, [r7, #4]
8006c48: 681b ldr r3, [r3, #0]
8006c4a: 681b ldr r3, [r3, #0]
8006c4c: 2204 movs r2, #4
8006c4e: 4013 ands r3, r2
8006c50: 2b04 cmp r3, #4
8006c52: d10d bne.n 8006c70 <UART_CheckIdleState+0x6c>
{
/* Wait until REACK flag is set */
if (UART_WaitOnFlagUntilTimeout(huart, USART_ISR_REACK, RESET, tickstart, HAL_UART_TIMEOUT_VALUE) != HAL_OK)
8006c54: 68fa ldr r2, [r7, #12]
8006c56: 2380 movs r3, #128 ; 0x80
8006c58: 03d9 lsls r1, r3, #15
8006c5a: 6878 ldr r0, [r7, #4]
8006c5c: 4b0d ldr r3, [pc, #52] ; (8006c94 <UART_CheckIdleState+0x90>)
8006c5e: 9300 str r3, [sp, #0]
8006c60: 0013 movs r3, r2
8006c62: 2200 movs r2, #0
8006c64: f000 f818 bl 8006c98 <UART_WaitOnFlagUntilTimeout>
8006c68: 1e03 subs r3, r0, #0
8006c6a: d001 beq.n 8006c70 <UART_CheckIdleState+0x6c>
{
/* Timeout occurred */
return HAL_TIMEOUT;
8006c6c: 2303 movs r3, #3
8006c6e: e00d b.n 8006c8c <UART_CheckIdleState+0x88>
}
}
/* Initialize the UART State */
huart->gState = HAL_UART_STATE_READY;
8006c70: 687b ldr r3, [r7, #4]
8006c72: 2220 movs r2, #32
8006c74: 679a str r2, [r3, #120] ; 0x78
huart->RxState = HAL_UART_STATE_READY;
8006c76: 687b ldr r3, [r7, #4]
8006c78: 2220 movs r2, #32
8006c7a: 67da str r2, [r3, #124] ; 0x7c
huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
8006c7c: 687b ldr r3, [r7, #4]
8006c7e: 2200 movs r2, #0
8006c80: 661a str r2, [r3, #96] ; 0x60
__HAL_UNLOCK(huart);
8006c82: 687b ldr r3, [r7, #4]
8006c84: 2274 movs r2, #116 ; 0x74
8006c86: 2100 movs r1, #0
8006c88: 5499 strb r1, [r3, r2]
return HAL_OK;
8006c8a: 2300 movs r3, #0
}
8006c8c: 0018 movs r0, r3
8006c8e: 46bd mov sp, r7
8006c90: b004 add sp, #16
8006c92: bd80 pop {r7, pc}
8006c94: 01ffffff .word 0x01ffffff
08006c98 <UART_WaitOnFlagUntilTimeout>:
* @param Timeout Timeout duration
* @retval HAL status
*/
HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status,
uint32_t Tickstart, uint32_t Timeout)
{
8006c98: b580 push {r7, lr}
8006c9a: b084 sub sp, #16
8006c9c: af00 add r7, sp, #0
8006c9e: 60f8 str r0, [r7, #12]
8006ca0: 60b9 str r1, [r7, #8]
8006ca2: 603b str r3, [r7, #0]
8006ca4: 1dfb adds r3, r7, #7
8006ca6: 701a strb r2, [r3, #0]
/* Wait until flag is set */
while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status)
8006ca8: e05e b.n 8006d68 <UART_WaitOnFlagUntilTimeout+0xd0>
{
/* Check for the Timeout */
if (Timeout != HAL_MAX_DELAY)
8006caa: 69bb ldr r3, [r7, #24]
8006cac: 3301 adds r3, #1
8006cae: d05b beq.n 8006d68 <UART_WaitOnFlagUntilTimeout+0xd0>
{
if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
8006cb0: f7fd f95a bl 8003f68 <HAL_GetTick>
8006cb4: 0002 movs r2, r0
8006cb6: 683b ldr r3, [r7, #0]
8006cb8: 1ad2 subs r2, r2, r3
8006cba: 69bb ldr r3, [r7, #24]
8006cbc: 429a cmp r2, r3
8006cbe: d802 bhi.n 8006cc6 <UART_WaitOnFlagUntilTimeout+0x2e>
8006cc0: 69bb ldr r3, [r7, #24]
8006cc2: 2b00 cmp r3, #0
8006cc4: d11b bne.n 8006cfe <UART_WaitOnFlagUntilTimeout+0x66>
{
/* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error)
interrupts for the interrupt process */
CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE));
8006cc6: 68fb ldr r3, [r7, #12]
8006cc8: 681b ldr r3, [r3, #0]
8006cca: 68fa ldr r2, [r7, #12]
8006ccc: 6812 ldr r2, [r2, #0]
8006cce: 6812 ldr r2, [r2, #0]
8006cd0: 492f ldr r1, [pc, #188] ; (8006d90 <UART_WaitOnFlagUntilTimeout+0xf8>)
8006cd2: 400a ands r2, r1
8006cd4: 601a str r2, [r3, #0]
CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
8006cd6: 68fb ldr r3, [r7, #12]
8006cd8: 681b ldr r3, [r3, #0]
8006cda: 68fa ldr r2, [r7, #12]
8006cdc: 6812 ldr r2, [r2, #0]
8006cde: 6892 ldr r2, [r2, #8]
8006ce0: 2101 movs r1, #1
8006ce2: 438a bics r2, r1
8006ce4: 609a str r2, [r3, #8]
huart->gState = HAL_UART_STATE_READY;
8006ce6: 68fb ldr r3, [r7, #12]
8006ce8: 2220 movs r2, #32
8006cea: 679a str r2, [r3, #120] ; 0x78
huart->RxState = HAL_UART_STATE_READY;
8006cec: 68fb ldr r3, [r7, #12]
8006cee: 2220 movs r2, #32
8006cf0: 67da str r2, [r3, #124] ; 0x7c
__HAL_UNLOCK(huart);
8006cf2: 68fb ldr r3, [r7, #12]
8006cf4: 2274 movs r2, #116 ; 0x74
8006cf6: 2100 movs r1, #0
8006cf8: 5499 strb r1, [r3, r2]
return HAL_TIMEOUT;
8006cfa: 2303 movs r3, #3
8006cfc: e044 b.n 8006d88 <UART_WaitOnFlagUntilTimeout+0xf0>
}
if (READ_BIT(huart->Instance->CR1, USART_CR1_RE) != 0U)
8006cfe: 68fb ldr r3, [r7, #12]
8006d00: 681b ldr r3, [r3, #0]
8006d02: 681b ldr r3, [r3, #0]
8006d04: 2204 movs r2, #4
8006d06: 4013 ands r3, r2
8006d08: d02e beq.n 8006d68 <UART_WaitOnFlagUntilTimeout+0xd0>
{
if (__HAL_UART_GET_FLAG(huart, UART_FLAG_RTOF) == SET)
8006d0a: 68fb ldr r3, [r7, #12]
8006d0c: 681b ldr r3, [r3, #0]
8006d0e: 69da ldr r2, [r3, #28]
8006d10: 2380 movs r3, #128 ; 0x80
8006d12: 011b lsls r3, r3, #4
8006d14: 401a ands r2, r3
8006d16: 2380 movs r3, #128 ; 0x80
8006d18: 011b lsls r3, r3, #4
8006d1a: 429a cmp r2, r3
8006d1c: d124 bne.n 8006d68 <UART_WaitOnFlagUntilTimeout+0xd0>
{
/* Clear Receiver Timeout flag*/
__HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_RTOF);
8006d1e: 68fb ldr r3, [r7, #12]
8006d20: 681b ldr r3, [r3, #0]
8006d22: 2280 movs r2, #128 ; 0x80
8006d24: 0112 lsls r2, r2, #4
8006d26: 621a str r2, [r3, #32]
/* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error)
interrupts for the interrupt process */
CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE));
8006d28: 68fb ldr r3, [r7, #12]
8006d2a: 681b ldr r3, [r3, #0]
8006d2c: 68fa ldr r2, [r7, #12]
8006d2e: 6812 ldr r2, [r2, #0]
8006d30: 6812 ldr r2, [r2, #0]
8006d32: 4917 ldr r1, [pc, #92] ; (8006d90 <UART_WaitOnFlagUntilTimeout+0xf8>)
8006d34: 400a ands r2, r1
8006d36: 601a str r2, [r3, #0]
CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
8006d38: 68fb ldr r3, [r7, #12]
8006d3a: 681b ldr r3, [r3, #0]
8006d3c: 68fa ldr r2, [r7, #12]
8006d3e: 6812 ldr r2, [r2, #0]
8006d40: 6892 ldr r2, [r2, #8]
8006d42: 2101 movs r1, #1
8006d44: 438a bics r2, r1
8006d46: 609a str r2, [r3, #8]
huart->gState = HAL_UART_STATE_READY;
8006d48: 68fb ldr r3, [r7, #12]
8006d4a: 2220 movs r2, #32
8006d4c: 679a str r2, [r3, #120] ; 0x78
huart->RxState = HAL_UART_STATE_READY;
8006d4e: 68fb ldr r3, [r7, #12]
8006d50: 2220 movs r2, #32
8006d52: 67da str r2, [r3, #124] ; 0x7c
huart->ErrorCode = HAL_UART_ERROR_RTO;
8006d54: 68fb ldr r3, [r7, #12]
8006d56: 2280 movs r2, #128 ; 0x80
8006d58: 2120 movs r1, #32
8006d5a: 5099 str r1, [r3, r2]
/* Process Unlocked */
__HAL_UNLOCK(huart);
8006d5c: 68fb ldr r3, [r7, #12]
8006d5e: 2274 movs r2, #116 ; 0x74
8006d60: 2100 movs r1, #0
8006d62: 5499 strb r1, [r3, r2]
return HAL_TIMEOUT;
8006d64: 2303 movs r3, #3
8006d66: e00f b.n 8006d88 <UART_WaitOnFlagUntilTimeout+0xf0>
while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status)
8006d68: 68fb ldr r3, [r7, #12]
8006d6a: 681b ldr r3, [r3, #0]
8006d6c: 69db ldr r3, [r3, #28]
8006d6e: 68ba ldr r2, [r7, #8]
8006d70: 401a ands r2, r3
8006d72: 68bb ldr r3, [r7, #8]
8006d74: 1ad3 subs r3, r2, r3
8006d76: 425a negs r2, r3
8006d78: 4153 adcs r3, r2
8006d7a: b2db uxtb r3, r3
8006d7c: 001a movs r2, r3
8006d7e: 1dfb adds r3, r7, #7
8006d80: 781b ldrb r3, [r3, #0]
8006d82: 429a cmp r2, r3
8006d84: d091 beq.n 8006caa <UART_WaitOnFlagUntilTimeout+0x12>
}
}
}
}
return HAL_OK;
8006d86: 2300 movs r3, #0
}
8006d88: 0018 movs r0, r3
8006d8a: 46bd mov sp, r7
8006d8c: b004 add sp, #16
8006d8e: bd80 pop {r7, pc}
8006d90: fffffe5f .word 0xfffffe5f
08006d94 <UART_EndRxTransfer>:
* @brief End ongoing Rx transfer on UART peripheral (following error detection or Reception completion).
* @param huart UART handle.
* @retval None
*/
static void UART_EndRxTransfer(UART_HandleTypeDef *huart)
{
8006d94: b580 push {r7, lr}
8006d96: b082 sub sp, #8
8006d98: af00 add r7, sp, #0
8006d9a: 6078 str r0, [r7, #4]
/* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
8006d9c: 687b ldr r3, [r7, #4]
8006d9e: 681b ldr r3, [r3, #0]
8006da0: 687a ldr r2, [r7, #4]
8006da2: 6812 ldr r2, [r2, #0]
8006da4: 6812 ldr r2, [r2, #0]
8006da6: 4912 ldr r1, [pc, #72] ; (8006df0 <UART_EndRxTransfer+0x5c>)
8006da8: 400a ands r2, r1
8006daa: 601a str r2, [r3, #0]
CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
8006dac: 687b ldr r3, [r7, #4]
8006dae: 681b ldr r3, [r3, #0]
8006db0: 687a ldr r2, [r7, #4]
8006db2: 6812 ldr r2, [r2, #0]
8006db4: 6892 ldr r2, [r2, #8]
8006db6: 2101 movs r1, #1
8006db8: 438a bics r2, r1
8006dba: 609a str r2, [r3, #8]
/* In case of reception waiting for IDLE event, disable also the IDLE IE interrupt source */
if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
8006dbc: 687b ldr r3, [r7, #4]
8006dbe: 6e1b ldr r3, [r3, #96] ; 0x60
8006dc0: 2b01 cmp r3, #1
8006dc2: d107 bne.n 8006dd4 <UART_EndRxTransfer+0x40>
{
CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
8006dc4: 687b ldr r3, [r7, #4]
8006dc6: 681b ldr r3, [r3, #0]
8006dc8: 687a ldr r2, [r7, #4]
8006dca: 6812 ldr r2, [r2, #0]
8006dcc: 6812 ldr r2, [r2, #0]
8006dce: 2110 movs r1, #16
8006dd0: 438a bics r2, r1
8006dd2: 601a str r2, [r3, #0]
}
/* At end of Rx process, restore huart->RxState to Ready */
huart->RxState = HAL_UART_STATE_READY;
8006dd4: 687b ldr r3, [r7, #4]
8006dd6: 2220 movs r2, #32
8006dd8: 67da str r2, [r3, #124] ; 0x7c
huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
8006dda: 687b ldr r3, [r7, #4]
8006ddc: 2200 movs r2, #0
8006dde: 661a str r2, [r3, #96] ; 0x60
/* Reset RxIsr function pointer */
huart->RxISR = NULL;
8006de0: 687b ldr r3, [r7, #4]
8006de2: 2200 movs r2, #0
8006de4: 665a str r2, [r3, #100] ; 0x64
}
8006de6: 46c0 nop ; (mov r8, r8)
8006de8: 46bd mov sp, r7
8006dea: b002 add sp, #8
8006dec: bd80 pop {r7, pc}
8006dee: 46c0 nop ; (mov r8, r8)
8006df0: fffffedf .word 0xfffffedf
08006df4 <UART_DMAAbortOnError>:
* (To be called at end of DMA Abort procedure following error occurrence).
* @param hdma DMA handle.
* @retval None
*/
static void UART_DMAAbortOnError(DMA_HandleTypeDef *hdma)
{
8006df4: b580 push {r7, lr}
8006df6: b084 sub sp, #16
8006df8: af00 add r7, sp, #0
8006dfa: 6078 str r0, [r7, #4]
UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent);
8006dfc: 687b ldr r3, [r7, #4]
8006dfe: 6a9b ldr r3, [r3, #40] ; 0x28
8006e00: 60fb str r3, [r7, #12]
huart->RxXferCount = 0U;
8006e02: 68fb ldr r3, [r7, #12]
8006e04: 225a movs r2, #90 ; 0x5a
8006e06: 2100 movs r1, #0
8006e08: 5299 strh r1, [r3, r2]
huart->TxXferCount = 0U;
8006e0a: 68fb ldr r3, [r7, #12]
8006e0c: 2252 movs r2, #82 ; 0x52
8006e0e: 2100 movs r1, #0
8006e10: 5299 strh r1, [r3, r2]
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
/*Call registered error callback*/
huart->ErrorCallback(huart);
#else
/*Call legacy weak error callback*/
HAL_UART_ErrorCallback(huart);
8006e12: 68fb ldr r3, [r7, #12]
8006e14: 0018 movs r0, r3
8006e16: f7ff fb73 bl 8006500 <HAL_UART_ErrorCallback>
#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
}
8006e1a: 46c0 nop ; (mov r8, r8)
8006e1c: 46bd mov sp, r7
8006e1e: b004 add sp, #16
8006e20: bd80 pop {r7, pc}
08006e22 <UART_TxISR_8BIT>:
* interruptions have been enabled by HAL_UART_Transmit_IT().
* @param huart UART handle.
* @retval None
*/
static void UART_TxISR_8BIT(UART_HandleTypeDef *huart)
{
8006e22: b580 push {r7, lr}
8006e24: b082 sub sp, #8
8006e26: af00 add r7, sp, #0
8006e28: 6078 str r0, [r7, #4]
/* Check that a Tx process is ongoing */
if (huart->gState == HAL_UART_STATE_BUSY_TX)
8006e2a: 687b ldr r3, [r7, #4]
8006e2c: 6f9b ldr r3, [r3, #120] ; 0x78
8006e2e: 2b21 cmp r3, #33 ; 0x21
8006e30: d12a bne.n 8006e88 <UART_TxISR_8BIT+0x66>
{
if (huart->TxXferCount == 0U)
8006e32: 687b ldr r3, [r7, #4]
8006e34: 2252 movs r2, #82 ; 0x52
8006e36: 5a9b ldrh r3, [r3, r2]
8006e38: b29b uxth r3, r3
8006e3a: 2b00 cmp r3, #0
8006e3c: d110 bne.n 8006e60 <UART_TxISR_8BIT+0x3e>
{
/* Disable the UART Transmit Data Register Empty Interrupt */
CLEAR_BIT(huart->Instance->CR1, USART_CR1_TXEIE);
8006e3e: 687b ldr r3, [r7, #4]
8006e40: 681b ldr r3, [r3, #0]
8006e42: 687a ldr r2, [r7, #4]
8006e44: 6812 ldr r2, [r2, #0]
8006e46: 6812 ldr r2, [r2, #0]
8006e48: 2180 movs r1, #128 ; 0x80
8006e4a: 438a bics r2, r1
8006e4c: 601a str r2, [r3, #0]
/* Enable the UART Transmit Complete Interrupt */
SET_BIT(huart->Instance->CR1, USART_CR1_TCIE);
8006e4e: 687b ldr r3, [r7, #4]
8006e50: 681b ldr r3, [r3, #0]
8006e52: 687a ldr r2, [r7, #4]
8006e54: 6812 ldr r2, [r2, #0]
8006e56: 6812 ldr r2, [r2, #0]
8006e58: 2140 movs r1, #64 ; 0x40
8006e5a: 430a orrs r2, r1
8006e5c: 601a str r2, [r3, #0]
huart->Instance->TDR = (uint8_t)(*huart->pTxBuffPtr & (uint8_t)0xFF);
huart->pTxBuffPtr++;
huart->TxXferCount--;
}
}
}
8006e5e: e013 b.n 8006e88 <UART_TxISR_8BIT+0x66>
huart->Instance->TDR = (uint8_t)(*huart->pTxBuffPtr & (uint8_t)0xFF);
8006e60: 687b ldr r3, [r7, #4]
8006e62: 681b ldr r3, [r3, #0]
8006e64: 687a ldr r2, [r7, #4]
8006e66: 6cd2 ldr r2, [r2, #76] ; 0x4c
8006e68: 7812 ldrb r2, [r2, #0]
8006e6a: 629a str r2, [r3, #40] ; 0x28
huart->pTxBuffPtr++;
8006e6c: 687b ldr r3, [r7, #4]
8006e6e: 6cdb ldr r3, [r3, #76] ; 0x4c
8006e70: 1c5a adds r2, r3, #1
8006e72: 687b ldr r3, [r7, #4]
8006e74: 64da str r2, [r3, #76] ; 0x4c
huart->TxXferCount--;
8006e76: 687b ldr r3, [r7, #4]
8006e78: 2252 movs r2, #82 ; 0x52
8006e7a: 5a9b ldrh r3, [r3, r2]
8006e7c: b29b uxth r3, r3
8006e7e: 3b01 subs r3, #1
8006e80: b299 uxth r1, r3
8006e82: 687b ldr r3, [r7, #4]
8006e84: 2252 movs r2, #82 ; 0x52
8006e86: 5299 strh r1, [r3, r2]
}
8006e88: 46c0 nop ; (mov r8, r8)
8006e8a: 46bd mov sp, r7
8006e8c: b002 add sp, #8
8006e8e: bd80 pop {r7, pc}
08006e90 <UART_TxISR_16BIT>:
* interruptions have been enabled by HAL_UART_Transmit_IT().
* @param huart UART handle.
* @retval None
*/
static void UART_TxISR_16BIT(UART_HandleTypeDef *huart)
{
8006e90: b580 push {r7, lr}
8006e92: b084 sub sp, #16
8006e94: af00 add r7, sp, #0
8006e96: 6078 str r0, [r7, #4]
uint16_t *tmp;
/* Check that a Tx process is ongoing */
if (huart->gState == HAL_UART_STATE_BUSY_TX)
8006e98: 687b ldr r3, [r7, #4]
8006e9a: 6f9b ldr r3, [r3, #120] ; 0x78
8006e9c: 2b21 cmp r3, #33 ; 0x21
8006e9e: d12e bne.n 8006efe <UART_TxISR_16BIT+0x6e>
{
if (huart->TxXferCount == 0U)
8006ea0: 687b ldr r3, [r7, #4]
8006ea2: 2252 movs r2, #82 ; 0x52
8006ea4: 5a9b ldrh r3, [r3, r2]
8006ea6: b29b uxth r3, r3
8006ea8: 2b00 cmp r3, #0
8006eaa: d110 bne.n 8006ece <UART_TxISR_16BIT+0x3e>
{
/* Disable the UART Transmit Data Register Empty Interrupt */
CLEAR_BIT(huart->Instance->CR1, USART_CR1_TXEIE);
8006eac: 687b ldr r3, [r7, #4]
8006eae: 681b ldr r3, [r3, #0]
8006eb0: 687a ldr r2, [r7, #4]
8006eb2: 6812 ldr r2, [r2, #0]
8006eb4: 6812 ldr r2, [r2, #0]
8006eb6: 2180 movs r1, #128 ; 0x80
8006eb8: 438a bics r2, r1
8006eba: 601a str r2, [r3, #0]
/* Enable the UART Transmit Complete Interrupt */
SET_BIT(huart->Instance->CR1, USART_CR1_TCIE);
8006ebc: 687b ldr r3, [r7, #4]
8006ebe: 681b ldr r3, [r3, #0]
8006ec0: 687a ldr r2, [r7, #4]
8006ec2: 6812 ldr r2, [r2, #0]
8006ec4: 6812 ldr r2, [r2, #0]
8006ec6: 2140 movs r1, #64 ; 0x40
8006ec8: 430a orrs r2, r1
8006eca: 601a str r2, [r3, #0]
huart->Instance->TDR = (((uint32_t)(*tmp)) & 0x01FFUL);
huart->pTxBuffPtr += 2U;
huart->TxXferCount--;
}
}
}
8006ecc: e017 b.n 8006efe <UART_TxISR_16BIT+0x6e>
tmp = (uint16_t *) huart->pTxBuffPtr;
8006ece: 687b ldr r3, [r7, #4]
8006ed0: 6cdb ldr r3, [r3, #76] ; 0x4c
8006ed2: 60fb str r3, [r7, #12]
huart->Instance->TDR = (((uint32_t)(*tmp)) & 0x01FFUL);
8006ed4: 687b ldr r3, [r7, #4]
8006ed6: 681b ldr r3, [r3, #0]
8006ed8: 68fa ldr r2, [r7, #12]
8006eda: 8812 ldrh r2, [r2, #0]
8006edc: 05d2 lsls r2, r2, #23
8006ede: 0dd2 lsrs r2, r2, #23
8006ee0: 629a str r2, [r3, #40] ; 0x28
huart->pTxBuffPtr += 2U;
8006ee2: 687b ldr r3, [r7, #4]
8006ee4: 6cdb ldr r3, [r3, #76] ; 0x4c
8006ee6: 1c9a adds r2, r3, #2
8006ee8: 687b ldr r3, [r7, #4]
8006eea: 64da str r2, [r3, #76] ; 0x4c
huart->TxXferCount--;
8006eec: 687b ldr r3, [r7, #4]
8006eee: 2252 movs r2, #82 ; 0x52
8006ef0: 5a9b ldrh r3, [r3, r2]
8006ef2: b29b uxth r3, r3
8006ef4: 3b01 subs r3, #1
8006ef6: b299 uxth r1, r3
8006ef8: 687b ldr r3, [r7, #4]
8006efa: 2252 movs r2, #82 ; 0x52
8006efc: 5299 strh r1, [r3, r2]
}
8006efe: 46c0 nop ; (mov r8, r8)
8006f00: 46bd mov sp, r7
8006f02: b004 add sp, #16
8006f04: bd80 pop {r7, pc}
08006f06 <UART_EndTransmit_IT>:
* @param huart pointer to a UART_HandleTypeDef structure that contains
* the configuration information for the specified UART module.
* @retval None
*/
static void UART_EndTransmit_IT(UART_HandleTypeDef *huart)
{
8006f06: b580 push {r7, lr}
8006f08: b082 sub sp, #8
8006f0a: af00 add r7, sp, #0
8006f0c: 6078 str r0, [r7, #4]
/* Disable the UART Transmit Complete Interrupt */
CLEAR_BIT(huart->Instance->CR1, USART_CR1_TCIE);
8006f0e: 687b ldr r3, [r7, #4]
8006f10: 681b ldr r3, [r3, #0]
8006f12: 687a ldr r2, [r7, #4]
8006f14: 6812 ldr r2, [r2, #0]
8006f16: 6812 ldr r2, [r2, #0]
8006f18: 2140 movs r1, #64 ; 0x40
8006f1a: 438a bics r2, r1
8006f1c: 601a str r2, [r3, #0]
/* Tx process is ended, restore huart->gState to Ready */
huart->gState = HAL_UART_STATE_READY;
8006f1e: 687b ldr r3, [r7, #4]
8006f20: 2220 movs r2, #32
8006f22: 679a str r2, [r3, #120] ; 0x78
/* Cleat TxISR function pointer */
huart->TxISR = NULL;
8006f24: 687b ldr r3, [r7, #4]
8006f26: 2200 movs r2, #0
8006f28: 669a str r2, [r3, #104] ; 0x68
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
/*Call registered Tx complete callback*/
huart->TxCpltCallback(huart);
#else
/*Call legacy weak Tx complete callback*/
HAL_UART_TxCpltCallback(huart);
8006f2a: 687b ldr r3, [r7, #4]
8006f2c: 0018 movs r0, r3
8006f2e: f7fc feb5 bl 8003c9c <HAL_UART_TxCpltCallback>
#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
}
8006f32: 46c0 nop ; (mov r8, r8)
8006f34: 46bd mov sp, r7
8006f36: b002 add sp, #8
8006f38: bd80 pop {r7, pc}
08006f3a <HAL_UARTEx_WakeupCallback>:
* @brief UART wakeup from Stop mode callback.
* @param huart UART handle.
* @retval None
*/
__weak void HAL_UARTEx_WakeupCallback(UART_HandleTypeDef *huart)
{
8006f3a: b580 push {r7, lr}
8006f3c: b082 sub sp, #8
8006f3e: af00 add r7, sp, #0
8006f40: 6078 str r0, [r7, #4]
UNUSED(huart);
/* NOTE : This function should not be modified, when the callback is needed,
the HAL_UARTEx_WakeupCallback can be implemented in the user file.
*/
}
8006f42: 46c0 nop ; (mov r8, r8)
8006f44: 46bd mov sp, r7
8006f46: b002 add sp, #8
8006f48: bd80 pop {r7, pc}
...
08006f4c <Reset_Handler>:
.section .text.Reset_Handler
.weak Reset_Handler
.type Reset_Handler, %function
Reset_Handler:
ldr r0, =_estack
8006f4c: 480d ldr r0, [pc, #52] ; (8006f84 <LoopForever+0x2>)
mov sp, r0 /* set stack pointer */
8006f4e: 4685 mov sp, r0
/* Copy the data segment initializers from flash to SRAM */
ldr r0, =_sdata
8006f50: 480d ldr r0, [pc, #52] ; (8006f88 <LoopForever+0x6>)
ldr r1, =_edata
8006f52: 490e ldr r1, [pc, #56] ; (8006f8c <LoopForever+0xa>)
ldr r2, =_sidata
8006f54: 4a0e ldr r2, [pc, #56] ; (8006f90 <LoopForever+0xe>)
movs r3, #0
8006f56: 2300 movs r3, #0
b LoopCopyDataInit
8006f58: e002 b.n 8006f60 <LoopCopyDataInit>
08006f5a <CopyDataInit>:
CopyDataInit:
ldr r4, [r2, r3]
8006f5a: 58d4 ldr r4, [r2, r3]
str r4, [r0, r3]
8006f5c: 50c4 str r4, [r0, r3]
adds r3, r3, #4
8006f5e: 3304 adds r3, #4
08006f60 <LoopCopyDataInit>:
LoopCopyDataInit:
adds r4, r0, r3
8006f60: 18c4 adds r4, r0, r3
cmp r4, r1
8006f62: 428c cmp r4, r1
bcc CopyDataInit
8006f64: d3f9 bcc.n 8006f5a <CopyDataInit>
/* Zero fill the bss segment. */
ldr r2, =_sbss
8006f66: 4a0b ldr r2, [pc, #44] ; (8006f94 <LoopForever+0x12>)
ldr r4, =_ebss
8006f68: 4c0b ldr r4, [pc, #44] ; (8006f98 <LoopForever+0x16>)
movs r3, #0
8006f6a: 2300 movs r3, #0
b LoopFillZerobss
8006f6c: e001 b.n 8006f72 <LoopFillZerobss>
08006f6e <FillZerobss>:
FillZerobss:
str r3, [r2]
8006f6e: 6013 str r3, [r2, #0]
adds r2, r2, #4
8006f70: 3204 adds r2, #4
08006f72 <LoopFillZerobss>:
LoopFillZerobss:
cmp r2, r4
8006f72: 42a2 cmp r2, r4
bcc FillZerobss
8006f74: d3fb bcc.n 8006f6e <FillZerobss>
/* Call the clock system intitialization function.*/
bl SystemInit
8006f76: f7fb f9d5 bl 8002324 <SystemInit>
/* Call static constructors */
bl __libc_init_array
8006f7a: f000 f811 bl 8006fa0 <__libc_init_array>
/* Call the application's entry point.*/
bl main
8006f7e: f7fb f86b bl 8002058 <main>
08006f82 <LoopForever>:
LoopForever:
b LoopForever
8006f82: e7fe b.n 8006f82 <LoopForever>
ldr r0, =_estack
8006f84: 20005000 .word 0x20005000
ldr r0, =_sdata
8006f88: 20000000 .word 0x20000000
ldr r1, =_edata
8006f8c: 20000010 .word 0x20000010
ldr r2, =_sidata
8006f90: 080074d8 .word 0x080074d8
ldr r2, =_sbss
8006f94: 20000010 .word 0x20000010
ldr r4, =_ebss
8006f98: 200003b0 .word 0x200003b0
08006f9c <ADC1_COMP_IRQHandler>:
* @retval : None
*/
.section .text.Default_Handler,"ax",%progbits
Default_Handler:
Infinite_Loop:
b Infinite_Loop
8006f9c: e7fe b.n 8006f9c <ADC1_COMP_IRQHandler>
...
08006fa0 <__libc_init_array>:
8006fa0: b570 push {r4, r5, r6, lr}
8006fa2: 2600 movs r6, #0
8006fa4: 4d0c ldr r5, [pc, #48] ; (8006fd8 <__libc_init_array+0x38>)
8006fa6: 4c0d ldr r4, [pc, #52] ; (8006fdc <__libc_init_array+0x3c>)
8006fa8: 1b64 subs r4, r4, r5
8006faa: 10a4 asrs r4, r4, #2
8006fac: 42a6 cmp r6, r4
8006fae: d109 bne.n 8006fc4 <__libc_init_array+0x24>
8006fb0: 2600 movs r6, #0
8006fb2: f000 f82b bl 800700c <_init>
8006fb6: 4d0a ldr r5, [pc, #40] ; (8006fe0 <__libc_init_array+0x40>)
8006fb8: 4c0a ldr r4, [pc, #40] ; (8006fe4 <__libc_init_array+0x44>)
8006fba: 1b64 subs r4, r4, r5
8006fbc: 10a4 asrs r4, r4, #2
8006fbe: 42a6 cmp r6, r4
8006fc0: d105 bne.n 8006fce <__libc_init_array+0x2e>
8006fc2: bd70 pop {r4, r5, r6, pc}
8006fc4: 00b3 lsls r3, r6, #2
8006fc6: 58eb ldr r3, [r5, r3]
8006fc8: 4798 blx r3
8006fca: 3601 adds r6, #1
8006fcc: e7ee b.n 8006fac <__libc_init_array+0xc>
8006fce: 00b3 lsls r3, r6, #2
8006fd0: 58eb ldr r3, [r5, r3]
8006fd2: 4798 blx r3
8006fd4: 3601 adds r6, #1
8006fd6: e7f2 b.n 8006fbe <__libc_init_array+0x1e>
8006fd8: 080074d0 .word 0x080074d0
8006fdc: 080074d0 .word 0x080074d0
8006fe0: 080074d0 .word 0x080074d0
8006fe4: 080074d4 .word 0x080074d4
08006fe8 <memcpy>:
8006fe8: 2300 movs r3, #0
8006fea: b510 push {r4, lr}
8006fec: 429a cmp r2, r3
8006fee: d100 bne.n 8006ff2 <memcpy+0xa>
8006ff0: bd10 pop {r4, pc}
8006ff2: 5ccc ldrb r4, [r1, r3]
8006ff4: 54c4 strb r4, [r0, r3]
8006ff6: 3301 adds r3, #1
8006ff8: e7f8 b.n 8006fec <memcpy+0x4>
08006ffa <memset>:
8006ffa: 0003 movs r3, r0
8006ffc: 1882 adds r2, r0, r2
8006ffe: 4293 cmp r3, r2
8007000: d100 bne.n 8007004 <memset+0xa>
8007002: 4770 bx lr
8007004: 7019 strb r1, [r3, #0]
8007006: 3301 adds r3, #1
8007008: e7f9 b.n 8006ffe <memset+0x4>
...
0800700c <_init>:
800700c: b5f8 push {r3, r4, r5, r6, r7, lr}
800700e: 46c0 nop ; (mov r8, r8)
8007010: bcf8 pop {r3, r4, r5, r6, r7}
8007012: bc08 pop {r3}
8007014: 469e mov lr, r3
8007016: 4770 bx lr
08007018 <_fini>:
8007018: b5f8 push {r3, r4, r5, r6, r7, lr}
800701a: 46c0 nop ; (mov r8, r8)
800701c: bcf8 pop {r3, r4, r5, r6, r7}
800701e: bc08 pop {r3}
8007020: 469e mov lr, r3
8007022: 4770 bx lr
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