diff --git a/Core/Inc/my.h b/Core/Inc/my.h index 5e89255..fec9dd8 100644 --- a/Core/Inc/my.h +++ b/Core/Inc/my.h @@ -17,7 +17,7 @@ -#define MY_ADDRESS ((uint16_t) 3) +#define MY_ADDRESS ((uint16_t) 1) diff --git a/Core/Src/gpio.c b/Core/Src/gpio.c index c54bc49..7f79fe5 100644 --- a/Core/Src/gpio.c +++ b/Core/Src/gpio.c @@ -101,16 +101,18 @@ void MX_GPIO_Init(void) /*Configure GPIO pins : PAPin PAPin PAPin */ GPIO_InitStruct.Pin = UPER_Pin|OP_Pin|KZ_Pin; - GPIO_InitStruct.Mode = GPIO_MODE_IT_RISING_FALLING; + GPIO_InitStruct.Mode = GPIO_MODE_INPUT; GPIO_InitStruct.Pull = GPIO_NOPULL; HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); /* EXTI interrupt init*/ - HAL_NVIC_SetPriority(EXTI0_1_IRQn, 1, 0); - HAL_NVIC_EnableIRQ(EXTI0_1_IRQn); - HAL_NVIC_SetPriority(EXTI2_3_IRQn, 1, 0); - HAL_NVIC_EnableIRQ(EXTI2_3_IRQn); + /* + HAL_NVIC_SetPriority(EXTI0_1_IRQn, 4, 0); //приорететы прерываний по лампочкам поставили ниже чем уарт, что бы они не вешали канал + HAL_NVIC_EnableIRQ(EXTI0_1_IRQn); + HAL_NVIC_SetPriority(EXTI2_3_IRQn, 4, 0); //приорететы прерываний по лампочкам поставили ниже чем уарт, что бы они не вешали канал + HAL_NVIC_EnableIRQ(EXTI2_3_IRQn); +*/ } /* USER CODE BEGIN 2 */ diff --git a/Core/Src/main.c b/Core/Src/main.c index 9f24934..0aa664a 100644 --- a/Core/Src/main.c +++ b/Core/Src/main.c @@ -76,7 +76,7 @@ int main(void) MX_FLASH_Init(); MX_TIM7_Init(); - //pardata.OWN = 1; // was defined in my.h + //pardata.OWN = 4; // was defined in my.h SetAndCorrect(); MX_USART1_UART_Init(); @@ -103,6 +103,13 @@ int main(void) SetAndCorrect(); wrCorr(); } + + HAL_GPIO_EXTI_Callback(0); // избавились от прерываний + + + + + } } diff --git a/Core/Src/stm32l0xx_it.c b/Core/Src/stm32l0xx_it.c index 22858fa..44644bb 100644 --- a/Core/Src/stm32l0xx_it.c +++ b/Core/Src/stm32l0xx_it.c @@ -55,6 +55,10 @@ extern __IO UserData_TypeDef pardata; /* Private user code ---------------------------------------------------------*/ /* USER CODE BEGIN 0 */ extern uint8_t timeout; //таймаут при приёме нескольких данных +extern uint16_t timerUPER; +extern uint16_t timerOP; +extern uint16_t timerKZ; + extern uint8_t iolen; extern bool sendreq; extern bool send; @@ -136,6 +140,16 @@ void SysTick_Handler(void) /* USER CODE END SysTick_IRQn 0 */ HAL_IncTick(); + if(timerUPER) + timerUPER--; + + if(timerOP) + timerOP--; + + if(timerKZ) + timerKZ--; + + if(timeout) timeout--; else diff --git a/Core/Src/usart.c b/Core/Src/usart.c index 1ebf9c7..4065e67 100644 --- a/Core/Src/usart.c +++ b/Core/Src/usart.c @@ -912,54 +912,60 @@ __IO uint16_t a; void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin) { - if(GPIO_Pin == UPER_Pin) // Overdrive +// if(GPIO_Pin == UPER_Pin) // Overdrive { - __HAL_GPIO_EXTI_CLEAR_FLAG(UPER_Pin); + // __HAL_GPIO_EXTI_CLEAR_FLAG(UPER_Pin); if(HAL_GPIO_ReadPin(GPIOA, UPER_Pin) == GPIO_PIN_SET) { - //timerUPER = 1000; + timerUPER = 1000; HAL_GPIO_WritePin(GPIOA, PER_Pin, GPIO_PIN_SET); AMP_STATUS |= UPER_Pin; } else { + if(timerUPER==0){ AMP_STATUS &= ~UPER_Pin; HAL_GPIO_WritePin(GPIOA, PER_Pin, GPIO_PIN_RESET); + } } } - if(GPIO_Pin == OP_Pin) // OP +// if(GPIO_Pin == OP_Pin) // OP { - __HAL_GPIO_EXTI_CLEAR_FLAG(OP_Pin); + // __HAL_GPIO_EXTI_CLEAR_FLAG(OP_Pin); if(HAL_GPIO_ReadPin(GPIOA, OP_Pin) == GPIO_PIN_SET) { - //timerOP = 1000; + timerOP = 1000; AMP_STATUS |= OP_Pin; } else { + if(timerOP==0){ AMP_STATUS &= ~OP_Pin; + } } } - if(GPIO_Pin == KZ_Pin) // KZ +// if(GPIO_Pin == KZ_Pin) // KZ { - __HAL_GPIO_EXTI_CLEAR_FLAG(KZ_Pin); +// __HAL_GPIO_EXTI_CLEAR_FLAG(KZ_Pin); if(HAL_GPIO_ReadPin(GPIOA, KZ_Pin) == GPIO_PIN_SET) { - //timerKZ = 1000; + timerKZ = 1000; AMP_STATUS |= KZ_Pin; } else { + if(timerKZ==0){ AMP_STATUS &= ~KZ_Pin; + } } } } diff --git a/Debug/A141 Amplifier.list b/Debug/A141 Amplifier.list index 6021231..f1abde3 100644 --- a/Debug/A141 Amplifier.list +++ b/Debug/A141 Amplifier.list @@ -5,39 +5,39 @@ Sections: Idx Name Size VMA LMA File off Algn 0 .isr_vector 000000c0 08000000 08000000 00010000 2**0 CONTENTS, ALLOC, LOAD, READONLY, DATA - 1 .text 00006f28 080000c0 080000c0 000100c0 2**2 + 1 .text 00006f64 080000c0 080000c0 000100c0 2**2 CONTENTS, ALLOC, LOAD, READONLY, CODE - 2 .rodata 000004a4 08006fe8 08006fe8 00016fe8 2**2 + 2 .rodata 000004a4 08007024 08007024 00017024 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA - 3 .ARM 00000008 0800748c 0800748c 0001748c 2**2 + 3 .ARM 00000008 080074c8 080074c8 000174c8 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA - 4 .init_array 00000004 08007494 08007494 00017494 2**2 + 4 .init_array 00000004 080074d0 080074d0 000174d0 2**2 CONTENTS, ALLOC, LOAD, DATA - 5 .fini_array 00000004 08007498 08007498 00017498 2**2 + 5 .fini_array 00000004 080074d4 080074d4 000174d4 2**2 CONTENTS, ALLOC, LOAD, DATA - 6 .data 00000010 20000000 0800749c 00020000 2**2 + 6 .data 00000010 20000000 080074d8 00020000 2**2 CONTENTS, ALLOC, LOAD, DATA - 7 .bss 00000398 20000010 080074ac 00020010 2**2 + 7 .bss 000003a0 20000010 080074e8 00020010 2**2 ALLOC - 8 ._user_heap_stack 00000600 200003a8 080074ac 000203a8 2**0 + 8 ._user_heap_stack 00000600 200003b0 080074e8 000203b0 2**0 ALLOC 9 .ARM.attributes 00000028 00000000 00000000 00020010 2**0 CONTENTS, READONLY - 10 .debug_info 0001130a 00000000 00000000 00020038 2**0 + 10 .debug_info 000111e9 00000000 00000000 00020038 2**0 CONTENTS, READONLY, DEBUGGING - 11 .debug_abbrev 000029ed 00000000 00000000 00031342 2**0 + 11 .debug_abbrev 000029e4 00000000 00000000 00031221 2**0 CONTENTS, READONLY, DEBUGGING - 12 .debug_aranges 00000e40 00000000 00000000 00033d30 2**3 + 12 .debug_aranges 00000e40 00000000 00000000 00033c08 2**3 CONTENTS, READONLY, DEBUGGING - 13 .debug_ranges 00000d18 00000000 00000000 00034b70 2**3 + 13 .debug_ranges 00000d18 00000000 00000000 00034a48 2**3 CONTENTS, READONLY, DEBUGGING - 14 .debug_line 00007152 00000000 00000000 00035888 2**0 + 14 .debug_line 0000715d 00000000 00000000 00035760 2**0 CONTENTS, READONLY, DEBUGGING - 15 .debug_str 000045bb 00000000 00000000 0003c9da 2**0 + 15 .debug_str 000045bb 00000000 00000000 0003c8bd 2**0 CONTENTS, READONLY, DEBUGGING - 16 .comment 0000007c 00000000 00000000 00040f95 2**0 + 16 .comment 0000007c 00000000 00000000 00040e78 2**0 CONTENTS, READONLY - 17 .debug_frame 00003434 00000000 00000000 00041014 2**2 + 17 .debug_frame 00003434 00000000 00000000 00040ef4 2**2 CONTENTS, READONLY, DEBUGGING Disassembly of section .text: @@ -59,7 +59,7 @@ Disassembly of section .text: 80000da: bd10 pop {r4, pc} 80000dc: 20000010 .word 0x20000010 80000e0: 00000000 .word 0x00000000 - 80000e4: 08006fd0 .word 0x08006fd0 + 80000e4: 0800700c .word 0x0800700c 080000e8 : 80000e8: 4b04 ldr r3, [pc, #16] ; (80000fc ) @@ -74,7 +74,7 @@ Disassembly of section .text: 80000fa: 46c0 nop ; (mov r8, r8) 80000fc: 00000000 .word 0x00000000 8000100: 20000014 .word 0x20000014 - 8000104: 08006fd0 .word 0x08006fd0 + 8000104: 0800700c .word 0x0800700c 08000108 <__udivsi3>: 8000108: 2200 movs r2, #0 @@ -968,8 +968,8 @@ Disassembly of section .text: 80007d2: 4653 mov r3, sl 80007d4: 21ff movs r1, #255 ; 0xff 80007d6: e759 b.n 800068c <__aeabi_fdiv+0x138> - 80007d8: 08006fe8 .word 0x08006fe8 - 80007dc: 08007028 .word 0x08007028 + 80007d8: 08007024 .word 0x08007024 + 80007dc: 08007064 .word 0x08007064 80007e0: f7ffffff .word 0xf7ffffff 080007e4 <__eqsf2>: @@ -1429,7 +1429,7 @@ Disassembly of section .text: 8000b66: 22ff movs r2, #255 ; 0xff 8000b68: e72e b.n 80009c8 <__aeabi_fmul+0x94> 8000b6a: 46c0 nop ; (mov r8, r8) - 8000b6c: 08007068 .word 0x08007068 + 8000b6c: 080070a4 .word 0x080070a4 8000b70: f7ffffff .word 0xf7ffffff 08000b74 <__aeabi_fsub>: @@ -2354,7 +2354,7 @@ uint32_t k; 8001288: 2200 movs r2, #0 800128a: 210c movs r1, #12 800128c: 0018 movs r0, r3 - 800128e: f003 fc3e bl 8004b0e + 800128e: f003 fc5c bl 8004b4a if(pardata.IKU < Ku1) 8001292: 4bcc ldr r3, [pc, #816] ; (80015c4 ) @@ -2368,13 +2368,13 @@ uint32_t k; 800129e: 2200 movs r2, #0 80012a0: 2101 movs r1, #1 80012a2: 0018 movs r0, r3 - 80012a4: f003 fc33 bl 8004b0e + 80012a4: f003 fc51 bl 8004b4a HAL_GPIO_WritePin(GPIOB, A1_Pin, GPIO_PIN_SET); 80012a8: 4bc7 ldr r3, [pc, #796] ; (80015c8 ) 80012aa: 2201 movs r2, #1 80012ac: 2102 movs r1, #2 80012ae: 0018 movs r0, r3 - 80012b0: f003 fc2d bl 8004b0e + 80012b0: f003 fc4b bl 8004b4a else { HAL_GPIO_WritePin(GPIOB, A0_Pin, GPIO_PIN_RESET); @@ -2393,13 +2393,13 @@ uint32_t k; 80012c2: 2201 movs r2, #1 80012c4: 2101 movs r1, #1 80012c6: 0018 movs r0, r3 - 80012c8: f003 fc21 bl 8004b0e + 80012c8: f003 fc3f bl 8004b4a HAL_GPIO_WritePin(GPIOB, A1_Pin, GPIO_PIN_RESET); 80012cc: 4bbe ldr r3, [pc, #760] ; (80015c8 ) 80012ce: 2200 movs r2, #0 80012d0: 2102 movs r1, #2 80012d2: 0018 movs r0, r3 - 80012d4: f003 fc1b bl 8004b0e + 80012d4: f003 fc39 bl 8004b4a break; 80012d8: e045 b.n 8001366 HAL_GPIO_WritePin(GPIOB, A0_Pin, GPIO_PIN_RESET); @@ -2407,13 +2407,13 @@ uint32_t k; 80012dc: 2200 movs r2, #0 80012de: 2101 movs r1, #1 80012e0: 0018 movs r0, r3 - 80012e2: f003 fc14 bl 8004b0e + 80012e2: f003 fc32 bl 8004b4a HAL_GPIO_WritePin(GPIOB, A1_Pin, GPIO_PIN_RESET); 80012e6: 4bb8 ldr r3, [pc, #736] ; (80015c8 ) 80012e8: 2200 movs r2, #0 80012ea: 2102 movs r1, #2 80012ec: 0018 movs r0, r3 - 80012ee: f003 fc0e bl 8004b0e + 80012ee: f003 fc2c bl 8004b4a break; 80012f2: e038 b.n 8001366 case ICP: // ICP @@ -2442,19 +2442,19 @@ uint32_t k; 8001310: 2201 movs r2, #1 8001312: 2101 movs r1, #1 8001314: 0018 movs r0, r3 - 8001316: f003 fbfa bl 8004b0e + 8001316: f003 fc18 bl 8004b4a HAL_GPIO_WritePin(GPIOB, A1_Pin, GPIO_PIN_RESET); 800131a: 4bab ldr r3, [pc, #684] ; (80015c8 ) 800131c: 2200 movs r2, #0 800131e: 2102 movs r1, #2 8001320: 0018 movs r0, r3 - 8001322: f003 fbf4 bl 8004b0e + 8001322: f003 fc12 bl 8004b4a HAL_GPIO_WritePin(GPIOB, (A2_Pin | A3_Pin), GPIO_PIN_SET); 8001326: 4ba8 ldr r3, [pc, #672] ; (80015c8 ) 8001328: 2201 movs r2, #1 800132a: 210c movs r1, #12 800132c: 0018 movs r0, r3 - 800132e: f003 fbee bl 8004b0e + 800132e: f003 fc0c bl 8004b4a HAL_GPIO_WritePin(GPIOB, A1_Pin, GPIO_PIN_RESET); HAL_GPIO_WritePin(GPIOB, A2_Pin, GPIO_PIN_SET); @@ -2467,25 +2467,25 @@ uint32_t k; 8001336: 2200 movs r2, #0 8001338: 2101 movs r1, #1 800133a: 0018 movs r0, r3 - 800133c: f003 fbe7 bl 8004b0e + 800133c: f003 fc05 bl 8004b4a HAL_GPIO_WritePin(GPIOB, A1_Pin, GPIO_PIN_RESET); 8001340: 4ba1 ldr r3, [pc, #644] ; (80015c8 ) 8001342: 2200 movs r2, #0 8001344: 2102 movs r1, #2 8001346: 0018 movs r0, r3 - 8001348: f003 fbe1 bl 8004b0e + 8001348: f003 fbff bl 8004b4a HAL_GPIO_WritePin(GPIOB, A2_Pin, GPIO_PIN_SET); 800134c: 4b9e ldr r3, [pc, #632] ; (80015c8 ) 800134e: 2201 movs r2, #1 8001350: 2104 movs r1, #4 8001352: 0018 movs r0, r3 - 8001354: f003 fbdb bl 8004b0e + 8001354: f003 fbf9 bl 8004b4a HAL_GPIO_WritePin(GPIOB, A3_Pin, GPIO_PIN_RESET); 8001358: 4b9b ldr r3, [pc, #620] ; (80015c8 ) 800135a: 2200 movs r2, #0 800135c: 2108 movs r1, #8 800135e: 0018 movs r0, r3 - 8001360: f003 fbd5 bl 8004b0e + 8001360: f003 fbf3 bl 8004b4a break; 8001364: 46c0 nop ; (mov r8, r8) } @@ -2508,7 +2508,7 @@ uint32_t k; 800137c: 2200 movs r2, #0 800137e: 2170 movs r1, #112 ; 0x70 8001380: 0018 movs r0, r3 - 8001382: f003 fbc4 bl 8004b0e + 8001382: f003 fbe2 bl 8004b4a break; 8001386: e047 b.n 8001418 case Ku0_2: case Ku2: // 0.2, 2 @@ -2517,13 +2517,13 @@ uint32_t k; 800138a: 2201 movs r2, #1 800138c: 2110 movs r1, #16 800138e: 0018 movs r0, r3 - 8001390: f003 fbbd bl 8004b0e + 8001390: f003 fbdb bl 8004b4a HAL_GPIO_WritePin(GPIOB, (A5_Pin | A6_Pin), GPIO_PIN_RESET); 8001394: 4b8c ldr r3, [pc, #560] ; (80015c8 ) 8001396: 2200 movs r2, #0 8001398: 2160 movs r1, #96 ; 0x60 800139a: 0018 movs r0, r3 - 800139c: f003 fbb7 bl 8004b0e + 800139c: f003 fbd5 bl 8004b4a break; 80013a0: e03a b.n 8001418 case Ku0_5: case Ku5: // 0.5, 5 @@ -2532,13 +2532,13 @@ uint32_t k; 80013a4: 2201 movs r2, #1 80013a6: 2120 movs r1, #32 80013a8: 0018 movs r0, r3 - 80013aa: f003 fbb0 bl 8004b0e + 80013aa: f003 fbce bl 8004b4a HAL_GPIO_WritePin(GPIOB, (A4_Pin | A6_Pin), GPIO_PIN_RESET); 80013ae: 4b86 ldr r3, [pc, #536] ; (80015c8 ) 80013b0: 2200 movs r2, #0 80013b2: 2150 movs r1, #80 ; 0x50 80013b4: 0018 movs r0, r3 - 80013b6: f003 fbaa bl 8004b0e + 80013b6: f003 fbc8 bl 8004b4a break; 80013ba: e02d b.n 8001418 @@ -2548,13 +2548,13 @@ uint32_t k; 80013be: 2200 movs r2, #0 80013c0: 2140 movs r1, #64 ; 0x40 80013c2: 0018 movs r0, r3 - 80013c4: f003 fba3 bl 8004b0e + 80013c4: f003 fbc1 bl 8004b4a HAL_GPIO_WritePin(GPIOB, (A4_Pin | A5_Pin), GPIO_PIN_SET); 80013c8: 4b7f ldr r3, [pc, #508] ; (80015c8 ) 80013ca: 2201 movs r2, #1 80013cc: 2130 movs r1, #48 ; 0x30 80013ce: 0018 movs r0, r3 - 80013d0: f003 fb9d bl 8004b0e + 80013d0: f003 fbbb bl 8004b4a break; 80013d4: e020 b.n 8001418 case Ku20: case Ku200: // 20, 200 @@ -2563,13 +2563,13 @@ uint32_t k; 80013d8: 2201 movs r2, #1 80013da: 2150 movs r1, #80 ; 0x50 80013dc: 0018 movs r0, r3 - 80013de: f003 fb96 bl 8004b0e + 80013de: f003 fbb4 bl 8004b4a HAL_GPIO_WritePin(GPIOB, A5_Pin, GPIO_PIN_RESET); 80013e2: 4b79 ldr r3, [pc, #484] ; (80015c8 ) 80013e4: 2200 movs r2, #0 80013e6: 2120 movs r1, #32 80013e8: 0018 movs r0, r3 - 80013ea: f003 fb90 bl 8004b0e + 80013ea: f003 fbae bl 8004b4a break; 80013ee: e013 b.n 8001418 case Ku50: case Ku500: // 50, 500 @@ -2578,13 +2578,13 @@ uint32_t k; 80013f2: 2201 movs r2, #1 80013f4: 2160 movs r1, #96 ; 0x60 80013f6: 0018 movs r0, r3 - 80013f8: f003 fb89 bl 8004b0e + 80013f8: f003 fba7 bl 8004b4a HAL_GPIO_WritePin(GPIOB, A4_Pin, GPIO_PIN_RESET); 80013fc: 4b72 ldr r3, [pc, #456] ; (80015c8 ) 80013fe: 2200 movs r2, #0 8001400: 2110 movs r1, #16 8001402: 0018 movs r0, r3 - 8001404: f003 fb83 bl 8004b0e + 8001404: f003 fba1 bl 8004b4a break; 8001408: e006 b.n 8001418 case Ku100: case Ku1000: // 100, 1000 @@ -2593,7 +2593,7 @@ uint32_t k; 800140c: 2201 movs r2, #1 800140e: 2170 movs r1, #112 ; 0x70 8001410: 0018 movs r0, r3 - 8001412: f003 fb7c bl 8004b0e + 8001412: f003 fb9a bl 8004b4a break; 8001416: 46c0 nop ; (mov r8, r8) } @@ -2613,21 +2613,21 @@ uint32_t k; 8001426: 4868 ldr r0, [pc, #416] ; (80015c8 ) 8001428: 2201 movs r2, #1 800142a: 0019 movs r1, r3 - 800142c: f003 fb6f bl 8004b0e + 800142c: f003 fb8d bl 8004b4a HAL_GPIO_WritePin(GPIOB, A9_Pin, GPIO_PIN_RESET); //HP 2HZ 8001430: 2380 movs r3, #128 ; 0x80 8001432: 009b lsls r3, r3, #2 8001434: 4864 ldr r0, [pc, #400] ; (80015c8 ) 8001436: 2200 movs r2, #0 8001438: 0019 movs r1, r3 - 800143a: f003 fb68 bl 8004b0e + 800143a: f003 fb86 bl 8004b4a HAL_GPIO_WritePin(GPIOB, (A10_Pin | A11_Pin | A12_Pin), GPIO_PIN_SET); //LP 100kHz 800143e: 23e0 movs r3, #224 ; 0xe0 8001440: 015b lsls r3, r3, #5 8001442: 4861 ldr r0, [pc, #388] ; (80015c8 ) 8001444: 2201 movs r2, #1 8001446: 0019 movs r1, r3 - 8001448: f003 fb61 bl 8004b0e + 8001448: f003 fb7f bl 8004b4a 800144c: e0ce b.n 80015ec } else @@ -2651,7 +2651,7 @@ uint32_t k; 8001466: 4858 ldr r0, [pc, #352] ; (80015c8 ) 8001468: 2200 movs r2, #0 800146a: 0019 movs r1, r3 - 800146c: f003 fb4f bl 8004b0e + 800146c: f003 fb6d bl 8004b4a break; 8001470: e03a b.n 80014e8 case Hp0_3: // 0,3 Hz @@ -2660,14 +2660,14 @@ uint32_t k; 8001474: 2201 movs r2, #1 8001476: 2180 movs r1, #128 ; 0x80 8001478: 0018 movs r0, r3 - 800147a: f003 fb48 bl 8004b0e + 800147a: f003 fb66 bl 8004b4a HAL_GPIO_WritePin(GPIOB, (A8_Pin | A9_Pin), GPIO_PIN_RESET); 800147e: 23c0 movs r3, #192 ; 0xc0 8001480: 009b lsls r3, r3, #2 8001482: 4851 ldr r0, [pc, #324] ; (80015c8 ) 8001484: 2200 movs r2, #0 8001486: 0019 movs r1, r3 - 8001488: f003 fb41 bl 8004b0e + 8001488: f003 fb5f bl 8004b4a break; 800148c: e02c b.n 80014e8 case Hp1: // 1 Hz @@ -2677,14 +2677,14 @@ uint32_t k; 8001492: 484d ldr r0, [pc, #308] ; (80015c8 ) 8001494: 2201 movs r2, #1 8001496: 0019 movs r1, r3 - 8001498: f003 fb39 bl 8004b0e + 8001498: f003 fb57 bl 8004b4a HAL_GPIO_WritePin(GPIOB, (A7_Pin | A9_Pin), GPIO_PIN_RESET); 800149c: 23a0 movs r3, #160 ; 0xa0 800149e: 009b lsls r3, r3, #2 80014a0: 4849 ldr r0, [pc, #292] ; (80015c8 ) 80014a2: 2200 movs r2, #0 80014a4: 0019 movs r1, r3 - 80014a6: f003 fb32 bl 8004b0e + 80014a6: f003 fb50 bl 8004b4a break; 80014aa: e01d b.n 80014e8 case Hp2: // 2 Hz @@ -2694,14 +2694,14 @@ uint32_t k; 80014b0: 4845 ldr r0, [pc, #276] ; (80015c8 ) 80014b2: 2201 movs r2, #1 80014b4: 0019 movs r1, r3 - 80014b6: f003 fb2a bl 8004b0e + 80014b6: f003 fb48 bl 8004b4a HAL_GPIO_WritePin(GPIOB, A9_Pin, GPIO_PIN_RESET); 80014ba: 2380 movs r3, #128 ; 0x80 80014bc: 009b lsls r3, r3, #2 80014be: 4842 ldr r0, [pc, #264] ; (80015c8 ) 80014c0: 2200 movs r2, #0 80014c2: 0019 movs r1, r3 - 80014c4: f003 fb23 bl 8004b0e + 80014c4: f003 fb41 bl 8004b4a break; 80014c8: e00e b.n 80014e8 case Hp10: // 10 Hz @@ -2711,14 +2711,14 @@ uint32_t k; 80014ce: 483e ldr r0, [pc, #248] ; (80015c8 ) 80014d0: 2201 movs r2, #1 80014d2: 0019 movs r1, r3 - 80014d4: f003 fb1b bl 8004b0e + 80014d4: f003 fb39 bl 8004b4a HAL_GPIO_WritePin(GPIOB, (A7_Pin | A8_Pin), GPIO_PIN_RESET); 80014d8: 23c0 movs r3, #192 ; 0xc0 80014da: 005b lsls r3, r3, #1 80014dc: 483a ldr r0, [pc, #232] ; (80015c8 ) 80014de: 2200 movs r2, #0 80014e0: 0019 movs r1, r3 - 80014e2: f003 fb14 bl 8004b0e + 80014e2: f003 fb32 bl 8004b4a break; 80014e6: 46c0 nop ; (mov r8, r8) } @@ -2743,7 +2743,7 @@ uint32_t k; 8001502: 4831 ldr r0, [pc, #196] ; (80015c8 ) 8001504: 2200 movs r2, #0 8001506: 0019 movs r1, r3 - 8001508: f003 fb01 bl 8004b0e + 8001508: f003 fb1f bl 8004b4a break; // 500 Hz 800150c: e06e b.n 80015ec case Lp500: @@ -2753,14 +2753,14 @@ uint32_t k; 8001512: 482d ldr r0, [pc, #180] ; (80015c8 ) 8001514: 2201 movs r2, #1 8001516: 0019 movs r1, r3 - 8001518: f003 faf9 bl 8004b0e + 8001518: f003 fb17 bl 8004b4a HAL_GPIO_WritePin(GPIOB, (A11_Pin | A12_Pin), GPIO_PIN_RESET); 800151c: 23c0 movs r3, #192 ; 0xc0 800151e: 015b lsls r3, r3, #5 8001520: 4829 ldr r0, [pc, #164] ; (80015c8 ) 8001522: 2200 movs r2, #0 8001524: 0019 movs r1, r3 - 8001526: f003 faf2 bl 8004b0e + 8001526: f003 fb10 bl 8004b4a break; 800152a: e05f b.n 80015ec case Lp1000: // 1 kHz @@ -2770,14 +2770,14 @@ uint32_t k; 8001530: 4825 ldr r0, [pc, #148] ; (80015c8 ) 8001532: 2201 movs r2, #1 8001534: 0019 movs r1, r3 - 8001536: f003 faea bl 8004b0e + 8001536: f003 fb08 bl 8004b4a HAL_GPIO_WritePin(GPIOB, (A10_Pin | A12_Pin), GPIO_PIN_RESET); 800153a: 23a0 movs r3, #160 ; 0xa0 800153c: 015b lsls r3, r3, #5 800153e: 4822 ldr r0, [pc, #136] ; (80015c8 ) 8001540: 2200 movs r2, #0 8001542: 0019 movs r1, r3 - 8001544: f003 fae3 bl 8004b0e + 8001544: f003 fb01 bl 8004b4a break; 8001548: e050 b.n 80015ec case Lp5000: // 5 kHz @@ -2787,14 +2787,14 @@ uint32_t k; 800154e: 481e ldr r0, [pc, #120] ; (80015c8 ) 8001550: 2201 movs r2, #1 8001552: 0019 movs r1, r3 - 8001554: f003 fadb bl 8004b0e + 8001554: f003 faf9 bl 8004b4a HAL_GPIO_WritePin(GPIOB, A12_Pin, GPIO_PIN_RESET); 8001558: 2380 movs r3, #128 ; 0x80 800155a: 015b lsls r3, r3, #5 800155c: 481a ldr r0, [pc, #104] ; (80015c8 ) 800155e: 2200 movs r2, #0 8001560: 0019 movs r1, r3 - 8001562: f003 fad4 bl 8004b0e + 8001562: f003 faf2 bl 8004b4a break; 8001566: e041 b.n 80015ec case Lp10000: // 10 kHz @@ -2804,14 +2804,14 @@ uint32_t k; 800156c: 4816 ldr r0, [pc, #88] ; (80015c8 ) 800156e: 2201 movs r2, #1 8001570: 0019 movs r1, r3 - 8001572: f003 facc bl 8004b0e + 8001572: f003 faea bl 8004b4a HAL_GPIO_WritePin(GPIOB, (A10_Pin | A11_Pin), GPIO_PIN_RESET); 8001576: 23c0 movs r3, #192 ; 0xc0 8001578: 011b lsls r3, r3, #4 800157a: 4813 ldr r0, [pc, #76] ; (80015c8 ) 800157c: 2200 movs r2, #0 800157e: 0019 movs r1, r3 - 8001580: f003 fac5 bl 8004b0e + 8001580: f003 fae3 bl 8004b4a break; 8001584: e032 b.n 80015ec case Lp20000: // 20 kHz @@ -2821,14 +2821,14 @@ uint32_t k; 800158a: 480f ldr r0, [pc, #60] ; (80015c8 ) 800158c: 2201 movs r2, #1 800158e: 0019 movs r1, r3 - 8001590: f003 fabd bl 8004b0e + 8001590: f003 fadb bl 8004b4a HAL_GPIO_WritePin(GPIOB, A11_Pin, GPIO_PIN_RESET); 8001594: 2380 movs r3, #128 ; 0x80 8001596: 011b lsls r3, r3, #4 8001598: 480b ldr r0, [pc, #44] ; (80015c8 ) 800159a: 2200 movs r2, #0 800159c: 0019 movs r1, r3 - 800159e: f003 fab6 bl 8004b0e + 800159e: f003 fad4 bl 8004b4a break; 80015a2: e023 b.n 80015ec case Lp50000: // 50 kHz @@ -2838,23 +2838,23 @@ uint32_t k; 80015a8: 4807 ldr r0, [pc, #28] ; (80015c8 ) 80015aa: 2201 movs r2, #1 80015ac: 0019 movs r1, r3 - 80015ae: f003 faae bl 8004b0e + 80015ae: f003 facc bl 8004b4a HAL_GPIO_WritePin(GPIOB, A10_Pin, GPIO_PIN_RESET); 80015b2: 2380 movs r3, #128 ; 0x80 80015b4: 00db lsls r3, r3, #3 80015b6: 4804 ldr r0, [pc, #16] ; (80015c8 ) 80015b8: 2200 movs r2, #0 80015ba: 0019 movs r1, r3 - 80015bc: f003 faa7 bl 8004b0e + 80015bc: f003 fac5 bl 8004b4a break; 80015c0: e014 b.n 80015ec 80015c2: 46c0 nop ; (mov r8, r8) - 80015c4: 20000098 .word 0x20000098 + 80015c4: 200000a0 .word 0x200000a0 80015c8: 50000400 .word 0x50000400 - 80015cc: 080070a8 .word 0x080070a8 - 80015d0: 20000034 .word 0x20000034 - 80015d4: 080070dc .word 0x080070dc - 80015d8: 080070f0 .word 0x080070f0 + 80015cc: 080070e4 .word 0x080070e4 + 80015d0: 2000003c .word 0x2000003c + 80015d4: 08007118 .word 0x08007118 + 80015d8: 0800712c .word 0x0800712c case Lp100000: // 100 kHz HAL_GPIO_WritePin(GPIOB, (A10_Pin | A11_Pin | A12_Pin), GPIO_PIN_SET); 80015dc: 23e0 movs r3, #224 ; 0xe0 @@ -2862,7 +2862,7 @@ uint32_t k; 80015e0: 48a6 ldr r0, [pc, #664] ; (800187c ) 80015e2: 2201 movs r2, #1 80015e4: 0019 movs r1, r3 - 80015e6: f003 fa92 bl 8004b0e + 80015e6: f003 fab0 bl 8004b4a break; 80015ea: 46c0 nop ; (mov r8, r8) } @@ -3185,15 +3185,15 @@ uint32_t k; 8001878: b002 add sp, #8 800187a: bd80 pop {r7, pc} 800187c: 50000400 .word 0x50000400 - 8001880: 20000098 .word 0x20000098 - 8001884: 20000048 .word 0x20000048 + 8001880: 200000a0 .word 0x200000a0 + 8001884: 20000050 .word 0x20000050 8001888: eb1c432d .word 0xeb1c432d 800188c: 3f1a36e2 .word 0x3f1a36e2 8001890: d2f1a9fc .word 0xd2f1a9fc 8001894: 3f50624d .word 0x3f50624d - 8001898: 2000003c .word 0x2000003c + 8001898: 20000044 .word 0x20000044 800189c: 461c4000 .word 0x461c4000 - 80018a0: 20000044 .word 0x20000044 + 80018a0: 2000004c .word 0x2000004c 80018a4: 47ae147b .word 0x47ae147b 80018a8: 3f847ae1 .word 0x3f847ae1 80018ac: 447a0000 .word 0x447a0000 @@ -3202,7 +3202,7 @@ uint32_t k; 80018b8: 42c80000 .word 0x42c80000 80018bc: 41200000 .word 0x41200000 80018c0: 47c35000 .word 0x47c35000 - 80018c4: 20000040 .word 0x20000040 + 80018c4: 20000048 .word 0x20000048 080018c8 : @@ -3510,10 +3510,10 @@ void initCalibr(void) 8001a4a: 46c0 nop ; (mov r8, r8) 8001a4c: 46bd mov sp, r7 8001a4e: bd80 pop {r7, pc} - 8001a50: 20000098 .word 0x20000098 - 8001a54: 20000030 .word 0x20000030 - 8001a58: 08007110 .word 0x08007110 - 8001a5c: 20000034 .word 0x20000034 + 8001a50: 200000a0 .word 0x200000a0 + 8001a54: 20000038 .word 0x20000038 + 8001a58: 0800714c .word 0x0800714c + 8001a5c: 2000003c .word 0x2000003c 08001a60 : @@ -3556,7 +3556,7 @@ uint16_t dvd = DVD; 8001a8e: 4822 ldr r0, [pc, #136] ; (8001b18 ) 8001a90: 2201 movs r2, #1 8001a92: 0019 movs r1, r3 - 8001a94: f003 f83b bl 8004b0e + 8001a94: f003 f859 bl 8004b4a 8001a98: e006 b.n 8001aa8 else HAL_GPIO_WritePin(GPIOB, STD_Pin, GPIO_PIN_RESET); 8001a9a: 2380 movs r3, #128 ; 0x80 @@ -3564,7 +3564,7 @@ uint16_t dvd = DVD; 8001a9e: 481e ldr r0, [pc, #120] ; (8001b18 ) 8001aa0: 2200 movs r2, #0 8001aa2: 0019 movs r1, r3 - 8001aa4: f003 f833 bl 8004b0e + 8001aa4: f003 f851 bl 8004b4a HAL_GPIO_WritePin(GPIOB, SCK_Pin, GPIO_PIN_RESET); 8001aa8: 2380 movs r3, #128 ; 0x80 @@ -3572,14 +3572,14 @@ uint16_t dvd = DVD; 8001aac: 481a ldr r0, [pc, #104] ; (8001b18 ) 8001aae: 2200 movs r2, #0 8001ab0: 0019 movs r1, r3 - 8001ab2: f003 f82c bl 8004b0e + 8001ab2: f003 f84a bl 8004b4a HAL_GPIO_WritePin(GPIOB, SCK_Pin, GPIO_PIN_SET); 8001ab6: 2380 movs r3, #128 ; 0x80 8001ab8: 021b lsls r3, r3, #8 8001aba: 4817 ldr r0, [pc, #92] ; (8001b18 ) 8001abc: 2201 movs r2, #1 8001abe: 0019 movs r1, r3 - 8001ac0: f003 f825 bl 8004b0e + 8001ac0: f003 f843 bl 8004b4a dvd <<= 1; 8001ac4: 1d3a adds r2, r7, #4 8001ac6: 1d3b adds r3, r7, #4 @@ -3604,28 +3604,28 @@ uint16_t dvd = DVD; 8001ae4: 480c ldr r0, [pc, #48] ; (8001b18 ) 8001ae6: 2200 movs r2, #0 8001ae8: 0019 movs r1, r3 - 8001aea: f003 f810 bl 8004b0e + 8001aea: f003 f82e bl 8004b4a HAL_GPIO_WritePin(GPIOB, FL_Pin, GPIO_PIN_SET); 8001aee: 2380 movs r3, #128 ; 0x80 8001af0: 019b lsls r3, r3, #6 8001af2: 4809 ldr r0, [pc, #36] ; (8001b18 ) 8001af4: 2201 movs r2, #1 8001af6: 0019 movs r1, r3 - 8001af8: f003 f809 bl 8004b0e + 8001af8: f003 f827 bl 8004b4a HAL_GPIO_WritePin(GPIOB, STD_Pin, GPIO_PIN_SET); 8001afc: 2380 movs r3, #128 ; 0x80 8001afe: 01db lsls r3, r3, #7 8001b00: 4805 ldr r0, [pc, #20] ; (8001b18 ) 8001b02: 2201 movs r2, #1 8001b04: 0019 movs r1, r3 - 8001b06: f003 f802 bl 8004b0e + 8001b06: f003 f820 bl 8004b4a } 8001b0a: 46c0 nop ; (mov r8, r8) 8001b0c: 46bd mov sp, r7 8001b0e: b002 add sp, #8 8001b10: bd80 pop {r7, pc} 8001b12: 46c0 nop ; (mov r8, r8) - 8001b14: 20000040 .word 0x20000040 + 8001b14: 20000048 .word 0x20000048 8001b18: 50000400 .word 0x50000400 08001b1c : @@ -3679,11 +3679,11 @@ uint32_t *pData, Address; 8001b54: 701a strb r2, [r3, #0] HAL_FLASH_Unlock(); - 8001b56: f002 fbc7 bl 80042e8 + 8001b56: f002 fbe5 bl 8004324 FLASH_PageErase(USERPAGE); 8001b5a: 4b24 ldr r3, [pc, #144] ; (8001bec ) 8001b5c: 0018 movs r0, r3 - 8001b5e: f002 fd35 bl 80045cc + 8001b5e: f002 fd53 bl 8004608 CLEAR_BIT(FLASH->PECR, FLASH_PECR_PROG); 8001b62: 4b23 ldr r3, [pc, #140] ; (8001bf0 ) 8001b64: 4a22 ldr r2, [pc, #136] ; (8001bf0 ) @@ -3700,7 +3700,7 @@ uint32_t *pData, Address; 8001b78: 605a str r2, [r3, #4] FLASH_WaitForLastOperation(100); 8001b7a: 2064 movs r0, #100 ; 0x64 - 8001b7c: f002 fc18 bl 80043b0 + 8001b7c: f002 fc36 bl 80043ec Address = USERPAGE; 8001b80: 4b1a ldr r3, [pc, #104] ; (8001bec ) @@ -3723,7 +3723,7 @@ uint32_t *pData, Address; 8001b9a: 687b ldr r3, [r7, #4] 8001b9c: 0019 movs r1, r3 8001b9e: 2002 movs r0, #2 - 8001ba0: f002 fb66 bl 8004270 + 8001ba0: f002 fb84 bl 80042ac Address += 4; 8001ba4: 687b ldr r3, [r7, #4] 8001ba6: 3304 adds r3, #4 @@ -3760,7 +3760,7 @@ uint32_t *pData, Address; 8001bda: 400a ands r2, r1 8001bdc: 605a str r2, [r3, #4] HAL_FLASH_Lock(); - 8001bde: f002 fbd3 bl 8004388 + 8001bde: f002 fbf1 bl 80043c4 } 8001be2: 46c0 nop ; (mov r8, r8) 8001be4: 46bd mov sp, r7 @@ -3770,7 +3770,7 @@ uint32_t *pData, Address; 8001bec: 0801ff00 .word 0x0801ff00 8001bf0: 40022000 .word 0x40022000 8001bf4: fffffdff .word 0xfffffdff - 8001bf8: 20000098 .word 0x20000098 + 8001bf8: 200000a0 .word 0x200000a0 08001bfc : @@ -3802,7 +3802,7 @@ uint8_t rewrite = 0; 8001c1c: 4b4f ldr r3, [pc, #316] ; (8001d5c ) 8001c1e: 881b ldrh r3, [r3, #0] 8001c20: b29b uxth r3, r3 - 8001c22: 2b03 cmp r3, #3 + 8001c22: 2b01 cmp r3, #1 8001c24: d104 bne.n 8001c30 8001c26: 4b4d ldr r3, [pc, #308] ; (8001d5c ) 8001c28: 881b ldrh r3, [r3, #0] @@ -3812,7 +3812,7 @@ uint8_t rewrite = 0; { pardata.OWN = MY_ADDRESS; 8001c30: 4b4a ldr r3, [pc, #296] ; (8001d5c ) - 8001c32: 2203 movs r2, #3 + 8001c32: 2201 movs r2, #1 8001c34: 801a strh r2, [r3, #0] pardata.BAUD = 7; //115200 8001c36: 4b49 ldr r3, [pc, #292] ; (8001d5c ) @@ -4024,7 +4024,7 @@ uint8_t rewrite = 0; 8001d56: 46bd mov sp, r7 8001d58: b003 add sp, #12 8001d5a: bd90 pop {r4, r7, pc} - 8001d5c: 20000098 .word 0x20000098 + 8001d5c: 200000a0 .word 0x200000a0 8001d60: 0801ff00 .word 0x0801ff00 8001d64: 3f800054 .word 0x3f800054 8001d68: 4120000a .word 0x4120000a @@ -4054,11 +4054,11 @@ uint32_t *pData, Address; 8001d80: 701a strb r2, [r3, #0] HAL_FLASH_Unlock(); - 8001d82: f002 fab1 bl 80042e8 + 8001d82: f002 facf bl 8004324 FLASH_PageErase(CORRPAGE); 8001d86: 4b24 ldr r3, [pc, #144] ; (8001e18 ) 8001d88: 0018 movs r0, r3 - 8001d8a: f002 fc1f bl 80045cc + 8001d8a: f002 fc3d bl 8004608 CLEAR_BIT(FLASH->PECR, FLASH_PECR_PROG); 8001d8e: 4b23 ldr r3, [pc, #140] ; (8001e1c ) 8001d90: 4a22 ldr r2, [pc, #136] ; (8001e1c ) @@ -4075,7 +4075,7 @@ uint32_t *pData, Address; 8001da4: 605a str r2, [r3, #4] FLASH_WaitForLastOperation(100); 8001da6: 2064 movs r0, #100 ; 0x64 - 8001da8: f002 fb02 bl 80043b0 + 8001da8: f002 fb20 bl 80043ec Address = CORRPAGE; 8001dac: 4b1a ldr r3, [pc, #104] ; (8001e18 ) @@ -4098,7 +4098,7 @@ uint32_t *pData, Address; 8001dc6: 687b ldr r3, [r7, #4] 8001dc8: 0019 movs r1, r3 8001dca: 2002 movs r0, #2 - 8001dcc: f002 fa50 bl 8004270 + 8001dcc: f002 fa6e bl 80042ac Address += 4; 8001dd0: 687b ldr r3, [r7, #4] 8001dd2: 3304 adds r3, #4 @@ -4135,7 +4135,7 @@ uint32_t *pData, Address; 8001e06: 400a ands r2, r1 8001e08: 605a str r2, [r3, #4] HAL_FLASH_Lock(); - 8001e0a: f002 fabd bl 8004388 + 8001e0a: f002 fadb bl 80043c4 } 8001e0e: 46c0 nop ; (mov r8, r8) 8001e10: 46bd mov sp, r7 @@ -4145,7 +4145,7 @@ uint32_t *pData, Address; 8001e18: 0801ff80 .word 0x0801ff80 8001e1c: 40022000 .word 0x40022000 8001e20: fffffdff .word 0xfffffdff - 8001e24: 20000048 .word 0x20000048 + 8001e24: 20000050 .word 0x20000050 08001e28 : @@ -4164,7 +4164,7 @@ uint8_t i, j; 8001e34: 0011 movs r1, r2 8001e36: 2350 movs r3, #80 ; 0x50 8001e38: 001a movs r2, r3 - 8001e3a: f005 f8b7 bl 8006fac + 8001e3a: f005 f8d5 bl 8006fe8 if(((CorrWord[0][0] == 0xffff) || (CorrWord[0][1] == 0xffff)) || ((CorrWord[0][0] == 0) || (CorrWord[0][1] == 0))) 8001e3e: 4b27 ldr r3, [pc, #156] ; (8001edc ) @@ -4258,10 +4258,10 @@ uint8_t i, j; 8001ed6: 46bd mov sp, r7 8001ed8: b002 add sp, #8 8001eda: bdb0 pop {r4, r5, r7, pc} - 8001edc: 20000048 .word 0x20000048 + 8001edc: 20000050 .word 0x20000050 8001ee0: 0801ff80 .word 0x0801ff80 8001ee4: 0000ffff .word 0x0000ffff - 8001ee8: 0800716c .word 0x0800716c + 8001ee8: 080071a8 .word 0x080071a8 08001eec : * Output @@ -4281,30 +4281,30 @@ void MX_GPIO_Init(void) 8001ef8: 2314 movs r3, #20 8001efa: 001a movs r2, r3 8001efc: 2100 movs r1, #0 - 8001efe: f005 f85e bl 8006fbe + 8001efe: f005 f87c bl 8006ffa /* GPIO Ports Clock Enable */ __HAL_RCC_GPIOA_CLK_ENABLE(); - 8001f02: 4b5a ldr r3, [pc, #360] ; (800206c ) - 8001f04: 4a59 ldr r2, [pc, #356] ; (800206c ) + 8001f02: 4b52 ldr r3, [pc, #328] ; (800204c ) + 8001f04: 4a51 ldr r2, [pc, #324] ; (800204c ) 8001f06: 6ad2 ldr r2, [r2, #44] ; 0x2c 8001f08: 2101 movs r1, #1 8001f0a: 430a orrs r2, r1 8001f0c: 62da str r2, [r3, #44] ; 0x2c - 8001f0e: 4b57 ldr r3, [pc, #348] ; (800206c ) + 8001f0e: 4b4f ldr r3, [pc, #316] ; (800204c ) 8001f10: 6adb ldr r3, [r3, #44] ; 0x2c 8001f12: 2201 movs r2, #1 8001f14: 4013 ands r3, r2 8001f16: 60bb str r3, [r7, #8] 8001f18: 68bb ldr r3, [r7, #8] __HAL_RCC_GPIOB_CLK_ENABLE(); - 8001f1a: 4b54 ldr r3, [pc, #336] ; (800206c ) - 8001f1c: 4a53 ldr r2, [pc, #332] ; (800206c ) + 8001f1a: 4b4c ldr r3, [pc, #304] ; (800204c ) + 8001f1c: 4a4b ldr r2, [pc, #300] ; (800204c ) 8001f1e: 6ad2 ldr r2, [r2, #44] ; 0x2c 8001f20: 2102 movs r1, #2 8001f22: 430a orrs r2, r1 8001f24: 62da str r2, [r3, #44] ; 0x2c - 8001f26: 4b51 ldr r3, [pc, #324] ; (800206c ) + 8001f26: 4b49 ldr r3, [pc, #292] ; (800204c ) 8001f28: 6adb ldr r3, [r3, #44] ; 0x2c 8001f2a: 2202 movs r2, #2 8001f2c: 4013 ands r3, r2 @@ -4319,15 +4319,15 @@ void MX_GPIO_Init(void) 8001f38: 05db lsls r3, r3, #23 8001f3a: 2200 movs r2, #0 8001f3c: 0018 movs r0, r3 - 8001f3e: f002 fde6 bl 8004b0e + 8001f3e: f002 fe04 bl 8004b4a /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(GPIOB, A0_Pin|A1_Pin|A2_Pin|A10_Pin - 8001f42: 494b ldr r1, [pc, #300] ; (8002070 ) - 8001f44: 4b4b ldr r3, [pc, #300] ; (8002074 ) + 8001f42: 4943 ldr r1, [pc, #268] ; (8002050 ) + 8001f44: 4b43 ldr r3, [pc, #268] ; (8002054 ) 8001f46: 2200 movs r2, #0 8001f48: 0018 movs r0, r3 - 8001f4a: f002 fde0 bl 8004b0e + 8001f4a: f002 fdfe bl 8004b4a |A11_Pin|A12_Pin|A3_Pin|A4_Pin |A5_Pin|A6_Pin|A7_Pin|A8_Pin |A9_Pin, GPIO_PIN_RESET); @@ -4336,10 +4336,10 @@ void MX_GPIO_Init(void) HAL_GPIO_WritePin(GPIOB, FL_Pin|STD_Pin|SCK_Pin, GPIO_PIN_SET); 8001f4e: 23e0 movs r3, #224 ; 0xe0 8001f50: 021b lsls r3, r3, #8 - 8001f52: 4848 ldr r0, [pc, #288] ; (8002074 ) + 8001f52: 4840 ldr r0, [pc, #256] ; (8002054 ) 8001f54: 2201 movs r2, #1 8001f56: 0019 movs r1, r3 - 8001f58: f002 fdd9 bl 8004b0e + 8001f58: f002 fdf7 bl 8004b4a @@ -4371,7 +4371,7 @@ void MX_GPIO_Init(void) 8001f82: 05db lsls r3, r3, #23 8001f84: 0011 movs r1, r2 8001f86: 0018 movs r0, r3 - 8001f88: f002 fb42 bl 8004610 + 8001f88: f002 fb60 bl 800464c /*Configure GPIO pins : PBPin PBPin PBPin PBPin PBPin PBPin PBPin PBPin @@ -4380,7 +4380,7 @@ void MX_GPIO_Init(void) GPIO_InitStruct.Pin = A0_Pin|A1_Pin|A2_Pin|A10_Pin 8001f8c: 230c movs r3, #12 8001f8e: 18fb adds r3, r7, r3 - 8001f90: 4a37 ldr r2, [pc, #220] ; (8002070 ) + 8001f90: 4a2f ldr r2, [pc, #188] ; (8002050 ) 8001f92: 601a str r2, [r3, #0] |A11_Pin|A12_Pin|A3_Pin|A4_Pin |A5_Pin|A6_Pin|A7_Pin|A8_Pin @@ -4403,10 +4403,10 @@ void MX_GPIO_Init(void) HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 8001fac: 230c movs r3, #12 8001fae: 18fb adds r3, r7, r3 - 8001fb0: 4a30 ldr r2, [pc, #192] ; (8002074 ) + 8001fb0: 4a28 ldr r2, [pc, #160] ; (8002054 ) 8001fb2: 0019 movs r1, r3 8001fb4: 0010 movs r0, r2 - 8001fb6: f002 fb2b bl 8004610 + 8001fb6: f002 fb49 bl 800464c /*Configure GPIO pins : PBPin PBPin PBPin */ GPIO_InitStruct.Pin = FL_Pin|STD_Pin|SCK_Pin; @@ -4433,10 +4433,10 @@ void MX_GPIO_Init(void) HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 8001fdc: 230c movs r3, #12 8001fde: 18fb adds r3, r7, r3 - 8001fe0: 4a24 ldr r2, [pc, #144] ; (8002074 ) + 8001fe0: 4a1c ldr r2, [pc, #112] ; (8002054 ) 8001fe2: 0019 movs r1, r3 8001fe4: 0010 movs r0, r2 - 8001fe6: f002 fb13 bl 8004610 + 8001fe6: f002 fb31 bl 800464c /*Configure GPIO pin : PtPin */ GPIO_InitStruct.Pin = RE_Pin; @@ -4467,7 +4467,7 @@ void MX_GPIO_Init(void) 8002012: 05db lsls r3, r3, #23 8002014: 0011 movs r1, r2 8002016: 0018 movs r0, r3 - 8002018: f002 fafa bl 8004610 + 8002018: f002 fb18 bl 800464c @@ -4478,10 +4478,10 @@ void MX_GPIO_Init(void) 800201e: 18fb adds r3, r7, r3 8002020: 2207 movs r2, #7 8002022: 601a str r2, [r3, #0] - GPIO_InitStruct.Mode = GPIO_MODE_IT_RISING_FALLING; + GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 8002024: 230c movs r3, #12 8002026: 18fb adds r3, r7, r3 - 8002028: 4a13 ldr r2, [pc, #76] ; (8002078 ) + 8002028: 2200 movs r2, #0 800202a: 605a str r2, [r3, #4] GPIO_InitStruct.Pull = GPIO_NOPULL; 800202c: 230c movs r3, #12 @@ -4495,13878 +4495,13913 @@ void MX_GPIO_Init(void) 800203a: 05db lsls r3, r3, #23 800203c: 0011 movs r1, r2 800203e: 0018 movs r0, r3 - 8002040: f002 fae6 bl 8004610 - - /* EXTI interrupt init*/ - HAL_NVIC_SetPriority(EXTI0_1_IRQn, 1, 0); - 8002044: 2200 movs r2, #0 - 8002046: 2101 movs r1, #1 - 8002048: 2005 movs r0, #5 - 800204a: f002 f845 bl 80040d8 + 8002040: f002 fb04 bl 800464c + HAL_NVIC_SetPriority(EXTI0_1_IRQn, 4, 0); //приорететы прерываний по лампочкам поставили ниже чем уарт, что бы они не вешали канал HAL_NVIC_EnableIRQ(EXTI0_1_IRQn); - 800204e: 2005 movs r0, #5 - 8002050: f002 f858 bl 8004104 - HAL_NVIC_SetPriority(EXTI2_3_IRQn, 1, 0); - 8002054: 2200 movs r2, #0 - 8002056: 2101 movs r1, #1 - 8002058: 2006 movs r0, #6 - 800205a: f002 f83d bl 80040d8 + HAL_NVIC_SetPriority(EXTI2_3_IRQn, 4, 0); //приорететы прерываний по лампочкам поставили ниже чем уарт, что бы они не вешали канал HAL_NVIC_EnableIRQ(EXTI2_3_IRQn); - 800205e: 2006 movs r0, #6 - 8002060: f002 f850 bl 8004104 - +*/ } - 8002064: 46c0 nop ; (mov r8, r8) - 8002066: 46bd mov sp, r7 - 8002068: b008 add sp, #32 - 800206a: bd80 pop {r7, pc} - 800206c: 40021000 .word 0x40021000 - 8002070: 00001fff .word 0x00001fff - 8002074: 50000400 .word 0x50000400 - 8002078: 10310000 .word 0x10310000 + 8002044: 46c0 nop ; (mov r8, r8) + 8002046: 46bd mov sp, r7 + 8002048: b008 add sp, #32 + 800204a: bd80 pop {r7, pc} + 800204c: 40021000 .word 0x40021000 + 8002050: 00001fff .word 0x00001fff + 8002054: 50000400 .word 0x50000400 -0800207c
: +08002058
: /** * @brief The application entry point. * @retval int */ int main(void) { - 800207c: b580 push {r7, lr} - 800207e: af00 add r7, sp, #0 + 8002058: b580 push {r7, lr} + 800205a: af00 add r7, sp, #0 HAL_Init(); - 8002080: f001 feee bl 8003e60 + 800205c: f001 ff1e bl 8003e9c SystemClock_Config(); - 8002084: f000 f834 bl 80020f0 + 8002060: f000 f836 bl 80020d0 MX_GPIO_Init(); - 8002088: f7ff ff30 bl 8001eec + 8002064: f7ff ff42 bl 8001eec MX_FLASH_Init(); - 800208c: f7ff fd46 bl 8001b1c + 8002068: f7ff fd58 bl 8001b1c MX_TIM7_Init(); - 8002090: f000 f93a bl 8002308 + 800206c: f000 f960 bl 8002330 - //pardata.OWN = 1; // was defined in my.h + //pardata.OWN = 4; // was defined in my.h SetAndCorrect(); - 8002094: f7ff f8ec bl 8001270 + 8002070: f7ff f8fe bl 8001270 MX_USART1_UART_Init(); - 8002098: f000 f9ac bl 80023f4 + 8002074: f000 f9d2 bl 800241c while (1) { if(needClbr) - 800209c: 4b11 ldr r3, [pc, #68] ; (80020e4 ) - 800209e: 781b ldrb r3, [r3, #0] - 80020a0: b2db uxtb r3, r3 - 80020a2: 2b00 cmp r3, #0 - 80020a4: d004 beq.n 80020b0 + 8002078: 4b12 ldr r3, [pc, #72] ; (80020c4 ) + 800207a: 781b ldrb r3, [r3, #0] + 800207c: b2db uxtb r3, r3 + 800207e: 2b00 cmp r3, #0 + 8002080: d004 beq.n 800208c { needClbr = false; - 80020a6: 4b0f ldr r3, [pc, #60] ; (80020e4 ) - 80020a8: 2200 movs r2, #0 - 80020aa: 701a strb r2, [r3, #0] + 8002082: 4b10 ldr r3, [pc, #64] ; (80020c4 ) + 8002084: 2200 movs r2, #0 + 8002086: 701a strb r2, [r3, #0] initCalibr(); - 80020ac: f7ff fc0c bl 80018c8 + 8002088: f7ff fc1e bl 80018c8 } if(needSave) - 80020b0: 4b0d ldr r3, [pc, #52] ; (80020e8 ) - 80020b2: 781b ldrb r3, [r3, #0] - 80020b4: b2db uxtb r3, r3 - 80020b6: 2b00 cmp r3, #0 - 80020b8: d006 beq.n 80020c8 + 800208c: 4b0e ldr r3, [pc, #56] ; (80020c8 ) + 800208e: 781b ldrb r3, [r3, #0] + 8002090: b2db uxtb r3, r3 + 8002092: 2b00 cmp r3, #0 + 8002094: d006 beq.n 80020a4 { needSave = false; - 80020ba: 4b0b ldr r3, [pc, #44] ; (80020e8 ) - 80020bc: 2200 movs r2, #0 - 80020be: 701a strb r2, [r3, #0] + 8002096: 4b0c ldr r3, [pc, #48] ; (80020c8 ) + 8002098: 2200 movs r2, #0 + 800209a: 701a strb r2, [r3, #0] SetAndCorrect(); - 80020c0: f7ff f8d6 bl 8001270 + 800209c: f7ff f8e8 bl 8001270 wrPar(); - 80020c4: f7ff fd3c bl 8001b40 + 80020a0: f7ff fd4e bl 8001b40 } if(needCorr) - 80020c8: 4b08 ldr r3, [pc, #32] ; (80020ec ) - 80020ca: 781b ldrb r3, [r3, #0] - 80020cc: b2db uxtb r3, r3 - 80020ce: 2b00 cmp r3, #0 - 80020d0: d0e4 beq.n 800209c + 80020a4: 4b09 ldr r3, [pc, #36] ; (80020cc ) + 80020a6: 781b ldrb r3, [r3, #0] + 80020a8: b2db uxtb r3, r3 + 80020aa: 2b00 cmp r3, #0 + 80020ac: d006 beq.n 80020bc { needCorr = false; - 80020d2: 4b06 ldr r3, [pc, #24] ; (80020ec ) - 80020d4: 2200 movs r2, #0 - 80020d6: 701a strb r2, [r3, #0] + 80020ae: 4b07 ldr r3, [pc, #28] ; (80020cc ) + 80020b0: 2200 movs r2, #0 + 80020b2: 701a strb r2, [r3, #0] SetAndCorrect(); - 80020d8: f7ff f8ca bl 8001270 + 80020b4: f7ff f8dc bl 8001270 wrCorr(); - 80020dc: f7ff fe46 bl 8001d6c - if(needClbr) - 80020e0: e7dc b.n 800209c - 80020e2: 46c0 nop ; (mov r8, r8) - 80020e4: 2000002e .word 0x2000002e - 80020e8: 20000037 .word 0x20000037 - 80020ec: 20000038 .word 0x20000038 + 80020b8: f7ff fe58 bl 8001d6c + } -080020f0 : + HAL_GPIO_EXTI_Callback(0); // избавились от прерываний + 80020bc: 2000 movs r0, #0 + 80020be: f001 fe63 bl 8003d88 + if(needClbr) + 80020c2: e7d9 b.n 8002078 + 80020c4: 20000034 .word 0x20000034 + 80020c8: 2000003f .word 0x2000003f + 80020cc: 20000040 .word 0x20000040 + +080020d0 : /** * @brief System Clock Configuration * @retval None */ void SystemClock_Config(void) { - 80020f0: b580 push {r7, lr} - 80020f2: b09c sub sp, #112 ; 0x70 - 80020f4: af00 add r7, sp, #0 + 80020d0: b580 push {r7, lr} + 80020d2: b09c sub sp, #112 ; 0x70 + 80020d4: af00 add r7, sp, #0 RCC_OscInitTypeDef RCC_OscInitStruct = {0}; - 80020f6: 2338 movs r3, #56 ; 0x38 - 80020f8: 18fb adds r3, r7, r3 - 80020fa: 0018 movs r0, r3 - 80020fc: 2338 movs r3, #56 ; 0x38 - 80020fe: 001a movs r2, r3 - 8002100: 2100 movs r1, #0 - 8002102: f004 ff5c bl 8006fbe + 80020d6: 2338 movs r3, #56 ; 0x38 + 80020d8: 18fb adds r3, r7, r3 + 80020da: 0018 movs r0, r3 + 80020dc: 2338 movs r3, #56 ; 0x38 + 80020de: 001a movs r2, r3 + 80020e0: 2100 movs r1, #0 + 80020e2: f004 ff8a bl 8006ffa RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; - 8002106: 2324 movs r3, #36 ; 0x24 - 8002108: 18fb adds r3, r7, r3 - 800210a: 0018 movs r0, r3 - 800210c: 2314 movs r3, #20 - 800210e: 001a movs r2, r3 - 8002110: 2100 movs r1, #0 - 8002112: f004 ff54 bl 8006fbe + 80020e6: 2324 movs r3, #36 ; 0x24 + 80020e8: 18fb adds r3, r7, r3 + 80020ea: 0018 movs r0, r3 + 80020ec: 2314 movs r3, #20 + 80020ee: 001a movs r2, r3 + 80020f0: 2100 movs r1, #0 + 80020f2: f004 ff82 bl 8006ffa RCC_PeriphCLKInitTypeDef PeriphClkInit = {0}; - 8002116: 003b movs r3, r7 - 8002118: 0018 movs r0, r3 - 800211a: 2324 movs r3, #36 ; 0x24 - 800211c: 001a movs r2, r3 - 800211e: 2100 movs r1, #0 - 8002120: f004 ff4d bl 8006fbe + 80020f6: 003b movs r3, r7 + 80020f8: 0018 movs r0, r3 + 80020fa: 2324 movs r3, #36 ; 0x24 + 80020fc: 001a movs r2, r3 + 80020fe: 2100 movs r1, #0 + 8002100: f004 ff7b bl 8006ffa /** Configure the main internal regulator output voltage */ __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); - 8002124: 4b2f ldr r3, [pc, #188] ; (80021e4 ) - 8002126: 4a2f ldr r2, [pc, #188] ; (80021e4 ) - 8002128: 6812 ldr r2, [r2, #0] - 800212a: 492f ldr r1, [pc, #188] ; (80021e8 ) - 800212c: 400a ands r2, r1 - 800212e: 2180 movs r1, #128 ; 0x80 - 8002130: 0109 lsls r1, r1, #4 - 8002132: 430a orrs r2, r1 - 8002134: 601a str r2, [r3, #0] + 8002104: 4b2f ldr r3, [pc, #188] ; (80021c4 ) + 8002106: 4a2f ldr r2, [pc, #188] ; (80021c4 ) + 8002108: 6812 ldr r2, [r2, #0] + 800210a: 492f ldr r1, [pc, #188] ; (80021c8 ) + 800210c: 400a ands r2, r1 + 800210e: 2180 movs r1, #128 ; 0x80 + 8002110: 0109 lsls r1, r1, #4 + 8002112: 430a orrs r2, r1 + 8002114: 601a str r2, [r3, #0] /** Initializes the RCC Oscillators according to the specified parameters * in the RCC_OscInitTypeDef structure. */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; + 8002116: 2338 movs r3, #56 ; 0x38 + 8002118: 18fb adds r3, r7, r3 + 800211a: 2202 movs r2, #2 + 800211c: 601a str r2, [r3, #0] + RCC_OscInitStruct.HSIState = RCC_HSI_ON; + 800211e: 2338 movs r3, #56 ; 0x38 + 8002120: 18fb adds r3, r7, r3 + 8002122: 2201 movs r2, #1 + 8002124: 60da str r2, [r3, #12] + RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; + 8002126: 2338 movs r3, #56 ; 0x38 + 8002128: 18fb adds r3, r7, r3 + 800212a: 2210 movs r2, #16 + 800212c: 611a str r2, [r3, #16] + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + 800212e: 2338 movs r3, #56 ; 0x38 + 8002130: 18fb adds r3, r7, r3 + 8002132: 2202 movs r2, #2 + 8002134: 629a str r2, [r3, #40] ; 0x28 + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; 8002136: 2338 movs r3, #56 ; 0x38 8002138: 18fb adds r3, r7, r3 - 800213a: 2202 movs r2, #2 - 800213c: 601a str r2, [r3, #0] - RCC_OscInitStruct.HSIState = RCC_HSI_ON; + 800213a: 2200 movs r2, #0 + 800213c: 62da str r2, [r3, #44] ; 0x2c + RCC_OscInitStruct.PLL.PLLMUL = RCC_PLLMUL_3; 800213e: 2338 movs r3, #56 ; 0x38 8002140: 18fb adds r3, r7, r3 - 8002142: 2201 movs r2, #1 - 8002144: 60da str r2, [r3, #12] - RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; + 8002142: 2200 movs r2, #0 + 8002144: 631a str r2, [r3, #48] ; 0x30 + RCC_OscInitStruct.PLL.PLLDIV = RCC_PLLDIV_3; 8002146: 2338 movs r3, #56 ; 0x38 8002148: 18fb adds r3, r7, r3 - 800214a: 2210 movs r2, #16 - 800214c: 611a str r2, [r3, #16] - RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; - 800214e: 2338 movs r3, #56 ; 0x38 - 8002150: 18fb adds r3, r7, r3 - 8002152: 2202 movs r2, #2 - 8002154: 629a str r2, [r3, #40] ; 0x28 - RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; - 8002156: 2338 movs r3, #56 ; 0x38 - 8002158: 18fb adds r3, r7, r3 - 800215a: 2200 movs r2, #0 - 800215c: 62da str r2, [r3, #44] ; 0x2c - RCC_OscInitStruct.PLL.PLLMUL = RCC_PLLMUL_3; - 800215e: 2338 movs r3, #56 ; 0x38 - 8002160: 18fb adds r3, r7, r3 - 8002162: 2200 movs r2, #0 - 8002164: 631a str r2, [r3, #48] ; 0x30 - RCC_OscInitStruct.PLL.PLLDIV = RCC_PLLDIV_3; - 8002166: 2338 movs r3, #56 ; 0x38 - 8002168: 18fb adds r3, r7, r3 - 800216a: 2280 movs r2, #128 ; 0x80 - 800216c: 0412 lsls r2, r2, #16 - 800216e: 635a str r2, [r3, #52] ; 0x34 + 800214a: 2280 movs r2, #128 ; 0x80 + 800214c: 0412 lsls r2, r2, #16 + 800214e: 635a str r2, [r3, #52] ; 0x34 if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) - 8002170: 2338 movs r3, #56 ; 0x38 - 8002172: 18fb adds r3, r7, r3 - 8002174: 0018 movs r0, r3 - 8002176: f002 fd03 bl 8004b80 - 800217a: 1e03 subs r3, r0, #0 - 800217c: d001 beq.n 8002182 + 8002150: 2338 movs r3, #56 ; 0x38 + 8002152: 18fb adds r3, r7, r3 + 8002154: 0018 movs r0, r3 + 8002156: f002 fd31 bl 8004bbc + 800215a: 1e03 subs r3, r0, #0 + 800215c: d001 beq.n 8002162 { Error_Handler(); - 800217e: f000 f835 bl 80021ec + 800215e: f000 f835 bl 80021cc } /** Initializes the CPU, AHB and APB buses clocks */ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK - 8002182: 2324 movs r3, #36 ; 0x24 - 8002184: 18fb adds r3, r7, r3 - 8002186: 220f movs r2, #15 - 8002188: 601a str r2, [r3, #0] + 8002162: 2324 movs r3, #36 ; 0x24 + 8002164: 18fb adds r3, r7, r3 + 8002166: 220f movs r2, #15 + 8002168: 601a str r2, [r3, #0] |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; - 800218a: 2324 movs r3, #36 ; 0x24 - 800218c: 18fb adds r3, r7, r3 - 800218e: 2203 movs r2, #3 - 8002190: 605a str r2, [r3, #4] + 800216a: 2324 movs r3, #36 ; 0x24 + 800216c: 18fb adds r3, r7, r3 + 800216e: 2203 movs r2, #3 + 8002170: 605a str r2, [r3, #4] RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV2; - 8002192: 2324 movs r3, #36 ; 0x24 - 8002194: 18fb adds r3, r7, r3 - 8002196: 2280 movs r2, #128 ; 0x80 - 8002198: 609a str r2, [r3, #8] + 8002172: 2324 movs r3, #36 ; 0x24 + 8002174: 18fb adds r3, r7, r3 + 8002176: 2280 movs r2, #128 ; 0x80 + 8002178: 609a str r2, [r3, #8] RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; - 800219a: 2324 movs r3, #36 ; 0x24 - 800219c: 18fb adds r3, r7, r3 - 800219e: 2200 movs r2, #0 - 80021a0: 60da str r2, [r3, #12] + 800217a: 2324 movs r3, #36 ; 0x24 + 800217c: 18fb adds r3, r7, r3 + 800217e: 2200 movs r2, #0 + 8002180: 60da str r2, [r3, #12] RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; - 80021a2: 2324 movs r3, #36 ; 0x24 - 80021a4: 18fb adds r3, r7, r3 - 80021a6: 2200 movs r2, #0 - 80021a8: 611a str r2, [r3, #16] + 8002182: 2324 movs r3, #36 ; 0x24 + 8002184: 18fb adds r3, r7, r3 + 8002186: 2200 movs r2, #0 + 8002188: 611a str r2, [r3, #16] if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK) - 80021aa: 2324 movs r3, #36 ; 0x24 - 80021ac: 18fb adds r3, r7, r3 - 80021ae: 2100 movs r1, #0 - 80021b0: 0018 movs r0, r3 - 80021b2: f003 f8b7 bl 8005324 - 80021b6: 1e03 subs r3, r0, #0 - 80021b8: d001 beq.n 80021be + 800218a: 2324 movs r3, #36 ; 0x24 + 800218c: 18fb adds r3, r7, r3 + 800218e: 2100 movs r1, #0 + 8002190: 0018 movs r0, r3 + 8002192: f003 f8e5 bl 8005360 + 8002196: 1e03 subs r3, r0, #0 + 8002198: d001 beq.n 800219e { Error_Handler(); - 80021ba: f000 f817 bl 80021ec + 800219a: f000 f817 bl 80021cc } PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USART1; - 80021be: 003b movs r3, r7 - 80021c0: 2201 movs r2, #1 - 80021c2: 601a str r2, [r3, #0] + 800219e: 003b movs r3, r7 + 80021a0: 2201 movs r2, #1 + 80021a2: 601a str r2, [r3, #0] PeriphClkInit.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2; - 80021c4: 003b movs r3, r7 - 80021c6: 2200 movs r2, #0 - 80021c8: 609a str r2, [r3, #8] + 80021a4: 003b movs r3, r7 + 80021a6: 2200 movs r2, #0 + 80021a8: 609a str r2, [r3, #8] if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) - 80021ca: 003b movs r3, r7 - 80021cc: 0018 movs r0, r3 - 80021ce: f003 fac9 bl 8005764 - 80021d2: 1e03 subs r3, r0, #0 - 80021d4: d001 beq.n 80021da + 80021aa: 003b movs r3, r7 + 80021ac: 0018 movs r0, r3 + 80021ae: f003 faf7 bl 80057a0 + 80021b2: 1e03 subs r3, r0, #0 + 80021b4: d001 beq.n 80021ba { Error_Handler(); - 80021d6: f000 f809 bl 80021ec + 80021b6: f000 f809 bl 80021cc } } - 80021da: 46c0 nop ; (mov r8, r8) - 80021dc: 46bd mov sp, r7 - 80021de: b01c add sp, #112 ; 0x70 - 80021e0: bd80 pop {r7, pc} - 80021e2: 46c0 nop ; (mov r8, r8) - 80021e4: 40007000 .word 0x40007000 - 80021e8: ffffe7ff .word 0xffffe7ff + 80021ba: 46c0 nop ; (mov r8, r8) + 80021bc: 46bd mov sp, r7 + 80021be: b01c add sp, #112 ; 0x70 + 80021c0: bd80 pop {r7, pc} + 80021c2: 46c0 nop ; (mov r8, r8) + 80021c4: 40007000 .word 0x40007000 + 80021c8: ffffe7ff .word 0xffffe7ff -080021ec : +080021cc : /** * @brief This function is executed in case of error occurrence. * @retval None */ void Error_Handler(void) { - 80021ec: b580 push {r7, lr} - 80021ee: af00 add r7, sp, #0 + 80021cc: b580 push {r7, lr} + 80021ce: af00 add r7, sp, #0 \details Disables IRQ interrupts by setting the I-bit in the CPSR. Can only be executed in Privileged modes. */ __STATIC_FORCEINLINE void __disable_irq(void) { __ASM volatile ("cpsid i" : : : "memory"); - 80021f0: b672 cpsid i + 80021d0: b672 cpsid i /* USER CODE BEGIN Error_Handler_Debug */ /* User can add his own implementation to report the HAL error return state */ __disable_irq(); while (1) - 80021f2: e7fe b.n 80021f2 + 80021d2: e7fe b.n 80021d2 -080021f4 : +080021d4 : /* USER CODE END 0 */ /** * Initializes the Global MSP. */ void HAL_MspInit(void) { - 80021f4: b580 push {r7, lr} - 80021f6: af00 add r7, sp, #0 + 80021d4: b580 push {r7, lr} + 80021d6: af00 add r7, sp, #0 /* USER CODE BEGIN MspInit 0 */ /* USER CODE END MspInit 0 */ __HAL_RCC_SYSCFG_CLK_ENABLE(); - 80021f8: 4b07 ldr r3, [pc, #28] ; (8002218 ) - 80021fa: 4a07 ldr r2, [pc, #28] ; (8002218 ) - 80021fc: 6b52 ldr r2, [r2, #52] ; 0x34 - 80021fe: 2101 movs r1, #1 - 8002200: 430a orrs r2, r1 - 8002202: 635a str r2, [r3, #52] ; 0x34 + 80021d8: 4b07 ldr r3, [pc, #28] ; (80021f8 ) + 80021da: 4a07 ldr r2, [pc, #28] ; (80021f8 ) + 80021dc: 6b52 ldr r2, [r2, #52] ; 0x34 + 80021de: 2101 movs r1, #1 + 80021e0: 430a orrs r2, r1 + 80021e2: 635a str r2, [r3, #52] ; 0x34 __HAL_RCC_PWR_CLK_ENABLE(); - 8002204: 4b04 ldr r3, [pc, #16] ; (8002218 ) - 8002206: 4a04 ldr r2, [pc, #16] ; (8002218 ) - 8002208: 6b92 ldr r2, [r2, #56] ; 0x38 - 800220a: 2180 movs r1, #128 ; 0x80 - 800220c: 0549 lsls r1, r1, #21 - 800220e: 430a orrs r2, r1 - 8002210: 639a str r2, [r3, #56] ; 0x38 + 80021e4: 4b04 ldr r3, [pc, #16] ; (80021f8 ) + 80021e6: 4a04 ldr r2, [pc, #16] ; (80021f8 ) + 80021e8: 6b92 ldr r2, [r2, #56] ; 0x38 + 80021ea: 2180 movs r1, #128 ; 0x80 + 80021ec: 0549 lsls r1, r1, #21 + 80021ee: 430a orrs r2, r1 + 80021f0: 639a str r2, [r3, #56] ; 0x38 /* System interrupt init*/ /* USER CODE BEGIN MspInit 1 */ /* USER CODE END MspInit 1 */ } - 8002212: 46c0 nop ; (mov r8, r8) - 8002214: 46bd mov sp, r7 - 8002216: bd80 pop {r7, pc} - 8002218: 40021000 .word 0x40021000 + 80021f2: 46c0 nop ; (mov r8, r8) + 80021f4: 46bd mov sp, r7 + 80021f6: bd80 pop {r7, pc} + 80021f8: 40021000 .word 0x40021000 -0800221c : +080021fc : /******************************************************************************/ /** * @brief This function handles Non maskable Interrupt. */ void NMI_Handler(void) { - 800221c: b580 push {r7, lr} - 800221e: af00 add r7, sp, #0 + 80021fc: b580 push {r7, lr} + 80021fe: af00 add r7, sp, #0 /* USER CODE BEGIN NonMaskableInt_IRQn 0 */ /* USER CODE END NonMaskableInt_IRQn 0 */ /* USER CODE BEGIN NonMaskableInt_IRQn 1 */ while (1) - 8002220: e7fe b.n 8002220 + 8002200: e7fe b.n 8002200 -08002222 : +08002202 : /** * @brief This function handles Hard fault interrupt. */ void HardFault_Handler(void) { - 8002222: b580 push {r7, lr} - 8002224: af00 add r7, sp, #0 + 8002202: b580 push {r7, lr} + 8002204: af00 add r7, sp, #0 /* USER CODE BEGIN HardFault_IRQn 0 */ /* USER CODE END HardFault_IRQn 0 */ while (1) - 8002226: e7fe b.n 8002226 + 8002206: e7fe b.n 8002206 -08002228 : +08002208 : /** * @brief This function handles System service call via SWI instruction. */ void SVC_Handler(void) { - 8002228: b580 push {r7, lr} - 800222a: af00 add r7, sp, #0 + 8002208: b580 push {r7, lr} + 800220a: af00 add r7, sp, #0 /* USER CODE END SVC_IRQn 0 */ /* USER CODE BEGIN SVC_IRQn 1 */ /* USER CODE END SVC_IRQn 1 */ } - 800222c: 46c0 nop ; (mov r8, r8) - 800222e: 46bd mov sp, r7 - 8002230: bd80 pop {r7, pc} + 800220c: 46c0 nop ; (mov r8, r8) + 800220e: 46bd mov sp, r7 + 8002210: bd80 pop {r7, pc} -08002232 : +08002212 : /** * @brief This function handles Pendable request for system service. */ void PendSV_Handler(void) { - 8002232: b580 push {r7, lr} - 8002234: af00 add r7, sp, #0 + 8002212: b580 push {r7, lr} + 8002214: af00 add r7, sp, #0 /* USER CODE END PendSV_IRQn 0 */ /* USER CODE BEGIN PendSV_IRQn 1 */ /* USER CODE END PendSV_IRQn 1 */ } - 8002236: 46c0 nop ; (mov r8, r8) - 8002238: 46bd mov sp, r7 - 800223a: bd80 pop {r7, pc} + 8002216: 46c0 nop ; (mov r8, r8) + 8002218: 46bd mov sp, r7 + 800221a: bd80 pop {r7, pc} -0800223c : +0800221c : /** * @brief This function handles System tick timer. */ void SysTick_Handler(void) { - 800223c: b580 push {r7, lr} - 800223e: af00 add r7, sp, #0 + 800221c: b580 push {r7, lr} + 800221e: af00 add r7, sp, #0 /* USER CODE BEGIN SysTick_IRQn 0 */ /* USER CODE END SysTick_IRQn 0 */ HAL_IncTick(); - 8002240: f001 fe62 bl 8003f08 + 8002220: f001 fe90 bl 8003f44 + + if(timerUPER) + 8002224: 4b26 ldr r3, [pc, #152] ; (80022c0 ) + 8002226: 881b ldrh r3, [r3, #0] + 8002228: 2b00 cmp r3, #0 + 800222a: d005 beq.n 8002238 + timerUPER--; + 800222c: 4b24 ldr r3, [pc, #144] ; (80022c0 ) + 800222e: 881b ldrh r3, [r3, #0] + 8002230: 3b01 subs r3, #1 + 8002232: b29a uxth r2, r3 + 8002234: 4b22 ldr r3, [pc, #136] ; (80022c0 ) + 8002236: 801a strh r2, [r3, #0] + + if(timerOP) + 8002238: 4b22 ldr r3, [pc, #136] ; (80022c4 ) + 800223a: 881b ldrh r3, [r3, #0] + 800223c: 2b00 cmp r3, #0 + 800223e: d005 beq.n 800224c + timerOP--; + 8002240: 4b20 ldr r3, [pc, #128] ; (80022c4 ) + 8002242: 881b ldrh r3, [r3, #0] + 8002244: 3b01 subs r3, #1 + 8002246: b29a uxth r2, r3 + 8002248: 4b1e ldr r3, [pc, #120] ; (80022c4 ) + 800224a: 801a strh r2, [r3, #0] + + if(timerKZ) + 800224c: 4b1e ldr r3, [pc, #120] ; (80022c8 ) + 800224e: 881b ldrh r3, [r3, #0] + 8002250: 2b00 cmp r3, #0 + 8002252: d005 beq.n 8002260 + timerKZ--; + 8002254: 4b1c ldr r3, [pc, #112] ; (80022c8 ) + 8002256: 881b ldrh r3, [r3, #0] + 8002258: 3b01 subs r3, #1 + 800225a: b29a uxth r2, r3 + 800225c: 4b1a ldr r3, [pc, #104] ; (80022c8 ) + 800225e: 801a strh r2, [r3, #0] + if(timeout) - 8002244: 4b17 ldr r3, [pc, #92] ; (80022a4 ) - 8002246: 781b ldrb r3, [r3, #0] - 8002248: 2b00 cmp r3, #0 - 800224a: d006 beq.n 800225a + 8002260: 4b1a ldr r3, [pc, #104] ; (80022cc ) + 8002262: 781b ldrb r3, [r3, #0] + 8002264: 2b00 cmp r3, #0 + 8002266: d006 beq.n 8002276 timeout--; - 800224c: 4b15 ldr r3, [pc, #84] ; (80022a4 ) - 800224e: 781b ldrb r3, [r3, #0] - 8002250: 3b01 subs r3, #1 - 8002252: b2da uxtb r2, r3 - 8002254: 4b13 ldr r3, [pc, #76] ; (80022a4 ) - 8002256: 701a strb r2, [r3, #0] + 8002268: 4b18 ldr r3, [pc, #96] ; (80022cc ) + 800226a: 781b ldrb r3, [r3, #0] + 800226c: 3b01 subs r3, #1 + 800226e: b2da uxtb r2, r3 + 8002270: 4b16 ldr r3, [pc, #88] ; (80022cc ) + 8002272: 701a strb r2, [r3, #0] } else send = false; } } - 8002258: e020 b.n 800229c + 8002274: e020 b.n 80022b8 if(iolen) - 800225a: 4b13 ldr r3, [pc, #76] ; (80022a8 ) - 800225c: 781b ldrb r3, [r3, #0] - 800225e: 2b00 cmp r3, #0 - 8002260: d002 beq.n 8002268 + 8002276: 4b16 ldr r3, [pc, #88] ; (80022d0 ) + 8002278: 781b ldrb r3, [r3, #0] + 800227a: 2b00 cmp r3, #0 + 800227c: d002 beq.n 8002284 iolen = 0; - 8002262: 4b11 ldr r3, [pc, #68] ; (80022a8 ) - 8002264: 2200 movs r2, #0 - 8002266: 701a strb r2, [r3, #0] + 800227e: 4b14 ldr r3, [pc, #80] ; (80022d0 ) + 8002280: 2200 movs r2, #0 + 8002282: 701a strb r2, [r3, #0] if(sendreq) - 8002268: 4b10 ldr r3, [pc, #64] ; (80022ac ) - 800226a: 781b ldrb r3, [r3, #0] - 800226c: 2b00 cmp r3, #0 - 800226e: d012 beq.n 8002296 + 8002284: 4b13 ldr r3, [pc, #76] ; (80022d4 ) + 8002286: 781b ldrb r3, [r3, #0] + 8002288: 2b00 cmp r3, #0 + 800228a: d012 beq.n 80022b2 sendreq = false; - 8002270: 4b0e ldr r3, [pc, #56] ; (80022ac ) - 8002272: 2200 movs r2, #0 - 8002274: 701a strb r2, [r3, #0] + 800228c: 4b11 ldr r3, [pc, #68] ; (80022d4 ) + 800228e: 2200 movs r2, #0 + 8002290: 701a strb r2, [r3, #0] send = true; - 8002276: 4b0e ldr r3, [pc, #56] ; (80022b0 ) - 8002278: 2201 movs r2, #1 - 800227a: 701a strb r2, [r3, #0] + 8002292: 4b11 ldr r3, [pc, #68] ; (80022d8 ) + 8002294: 2201 movs r2, #1 + 8002296: 701a strb r2, [r3, #0] timeout = time35[pardata.BAUD]; - 800227c: 4b0d ldr r3, [pc, #52] ; (80022b4 ) - 800227e: 885b ldrh r3, [r3, #2] - 8002280: b29b uxth r3, r3 - 8002282: 001a movs r2, r3 - 8002284: 4b0c ldr r3, [pc, #48] ; (80022b8 ) - 8002286: 0052 lsls r2, r2, #1 - 8002288: 5ad3 ldrh r3, [r2, r3] - 800228a: b2da uxtb r2, r3 - 800228c: 4b05 ldr r3, [pc, #20] ; (80022a4 ) - 800228e: 701a strb r2, [r3, #0] + 8002298: 4b10 ldr r3, [pc, #64] ; (80022dc ) + 800229a: 885b ldrh r3, [r3, #2] + 800229c: b29b uxth r3, r3 + 800229e: 001a movs r2, r3 + 80022a0: 4b0f ldr r3, [pc, #60] ; (80022e0 ) + 80022a2: 0052 lsls r2, r2, #1 + 80022a4: 5ad3 ldrh r3, [r2, r3] + 80022a6: b2da uxtb r2, r3 + 80022a8: 4b08 ldr r3, [pc, #32] ; (80022cc ) + 80022aa: 701a strb r2, [r3, #0] StartTransfer(); - 8002290: f001 fd52 bl 8003d38 + 80022ac: f001 fd58 bl 8003d60 } - 8002294: e002 b.n 800229c + 80022b0: e002 b.n 80022b8 send = false; - 8002296: 4b06 ldr r3, [pc, #24] ; (80022b0 ) - 8002298: 2200 movs r2, #0 - 800229a: 701a strb r2, [r3, #0] + 80022b2: 4b09 ldr r3, [pc, #36] ; (80022d8 ) + 80022b4: 2200 movs r2, #0 + 80022b6: 701a strb r2, [r3, #0] } - 800229c: 46c0 nop ; (mov r8, r8) - 800229e: 46bd mov sp, r7 - 80022a0: bd80 pop {r7, pc} - 80022a2: 46c0 nop ; (mov r8, r8) - 80022a4: 20000288 .word 0x20000288 - 80022a8: 20000035 .word 0x20000035 - 80022ac: 20000036 .word 0x20000036 - 80022b0: 20000005 .word 0x20000005 - 80022b4: 20000098 .word 0x20000098 - 80022b8: 080071bc .word 0x080071bc + 80022b8: 46c0 nop ; (mov r8, r8) + 80022ba: 46bd mov sp, r7 + 80022bc: bd80 pop {r7, pc} + 80022be: 46c0 nop ; (mov r8, r8) + 80022c0: 2000002e .word 0x2000002e + 80022c4: 20000030 .word 0x20000030 + 80022c8: 20000032 .word 0x20000032 + 80022cc: 20000290 .word 0x20000290 + 80022d0: 2000003d .word 0x2000003d + 80022d4: 2000003e .word 0x2000003e + 80022d8: 20000005 .word 0x20000005 + 80022dc: 200000a0 .word 0x200000a0 + 80022e0: 080071f8 .word 0x080071f8 -080022bc : +080022e4 : /** * @brief This function handles EXTI line 0 and line 1 interrupts. */ void EXTI0_1_IRQHandler(void) { - 80022bc: b580 push {r7, lr} - 80022be: af00 add r7, sp, #0 + 80022e4: b580 push {r7, lr} + 80022e6: af00 add r7, sp, #0 /* USER CODE BEGIN EXTI0_1_IRQn 0 */ /* USER CODE END EXTI0_1_IRQn 0 */ HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_0); - 80022c0: 2001 movs r0, #1 - 80022c2: f002 fc41 bl 8004b48 + 80022e8: 2001 movs r0, #1 + 80022ea: f002 fc4b bl 8004b84 HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_1); - 80022c6: 2002 movs r0, #2 - 80022c8: f002 fc3e bl 8004b48 + 80022ee: 2002 movs r0, #2 + 80022f0: f002 fc48 bl 8004b84 /* USER CODE BEGIN EXTI0_1_IRQn 1 */ /* USER CODE END EXTI0_1_IRQn 1 */ } - 80022cc: 46c0 nop ; (mov r8, r8) - 80022ce: 46bd mov sp, r7 - 80022d0: bd80 pop {r7, pc} + 80022f4: 46c0 nop ; (mov r8, r8) + 80022f6: 46bd mov sp, r7 + 80022f8: bd80 pop {r7, pc} -080022d2 : +080022fa : /** * @brief This function handles EXTI line 2 and line 3 interrupts. */ void EXTI2_3_IRQHandler(void) { - 80022d2: b580 push {r7, lr} - 80022d4: af00 add r7, sp, #0 + 80022fa: b580 push {r7, lr} + 80022fc: af00 add r7, sp, #0 /* USER CODE BEGIN EXTI2_3_IRQn 0 */ /* USER CODE END EXTI2_3_IRQn 0 */ HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_2); - 80022d6: 2004 movs r0, #4 - 80022d8: f002 fc36 bl 8004b48 + 80022fe: 2004 movs r0, #4 + 8002300: f002 fc40 bl 8004b84 /* USER CODE BEGIN EXTI2_3_IRQn 1 */ /* USER CODE END EXTI2_3_IRQn 1 */ } - 80022dc: 46c0 nop ; (mov r8, r8) - 80022de: 46bd mov sp, r7 - 80022e0: bd80 pop {r7, pc} + 8002304: 46c0 nop ; (mov r8, r8) + 8002306: 46bd mov sp, r7 + 8002308: bd80 pop {r7, pc} ... -080022e4 : +0800230c : */ /* USER CODE BEGIN 1 */ void TIM7_IRQHandler(void) { - 80022e4: b580 push {r7, lr} - 80022e6: af00 add r7, sp, #0 + 800230c: b580 push {r7, lr} + 800230e: af00 add r7, sp, #0 HAL_TIM_IRQHandler(&htim7); - 80022e8: 4b03 ldr r3, [pc, #12] ; (80022f8 ) - 80022ea: 0018 movs r0, r3 - 80022ec: f003 fc1e bl 8005b2c + 8002310: 4b03 ldr r3, [pc, #12] ; (8002320 ) + 8002312: 0018 movs r0, r3 + 8002314: f003 fc28 bl 8005b68 } - 80022f0: 46c0 nop ; (mov r8, r8) - 80022f2: 46bd mov sp, r7 - 80022f4: bd80 pop {r7, pc} - 80022f6: 46c0 nop ; (mov r8, r8) - 80022f8: 200000c0 .word 0x200000c0 + 8002318: 46c0 nop ; (mov r8, r8) + 800231a: 46bd mov sp, r7 + 800231c: bd80 pop {r7, pc} + 800231e: 46c0 nop ; (mov r8, r8) + 8002320: 200000c8 .word 0x200000c8 -080022fc : +08002324 : * @brief Setup the microcontroller system. * @param None * @retval None */ void SystemInit (void) { - 80022fc: b580 push {r7, lr} - 80022fe: af00 add r7, sp, #0 + 8002324: b580 push {r7, lr} + 8002326: af00 add r7, sp, #0 /* Configure the Vector Table location add offset address ------------------*/ #if defined (USER_VECT_TAB_ADDRESS) SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */ #endif /* USER_VECT_TAB_ADDRESS */ } - 8002300: 46c0 nop ; (mov r8, r8) - 8002302: 46bd mov sp, r7 - 8002304: bd80 pop {r7, pc} + 8002328: 46c0 nop ; (mov r8, r8) + 800232a: 46bd mov sp, r7 + 800232c: bd80 pop {r7, pc} ... -08002308 : +08002330 : /* TIM7 init function */ void MX_TIM7_Init(void) { - 8002308: b580 push {r7, lr} - 800230a: b082 sub sp, #8 - 800230c: af00 add r7, sp, #0 + 8002330: b580 push {r7, lr} + 8002332: b082 sub sp, #8 + 8002334: af00 add r7, sp, #0 TIM_MasterConfigTypeDef sMasterConfig = {0}; - 800230e: 003b movs r3, r7 - 8002310: 0018 movs r0, r3 - 8002312: 2308 movs r3, #8 - 8002314: 001a movs r2, r3 - 8002316: 2100 movs r1, #0 - 8002318: f004 fe51 bl 8006fbe + 8002336: 003b movs r3, r7 + 8002338: 0018 movs r0, r3 + 800233a: 2308 movs r3, #8 + 800233c: 001a movs r2, r3 + 800233e: 2100 movs r1, #0 + 8002340: f004 fe5b bl 8006ffa htim7.Instance = TIM7; - 800231c: 4b17 ldr r3, [pc, #92] ; (800237c ) - 800231e: 4a18 ldr r2, [pc, #96] ; (8002380 ) - 8002320: 601a str r2, [r3, #0] + 8002344: 4b17 ldr r3, [pc, #92] ; (80023a4 ) + 8002346: 4a18 ldr r2, [pc, #96] ; (80023a8 ) + 8002348: 601a str r2, [r3, #0] htim7.Init.Prescaler = 0; - 8002322: 4b16 ldr r3, [pc, #88] ; (800237c ) - 8002324: 2200 movs r2, #0 - 8002326: 605a str r2, [r3, #4] + 800234a: 4b16 ldr r3, [pc, #88] ; (80023a4 ) + 800234c: 2200 movs r2, #0 + 800234e: 605a str r2, [r3, #4] htim7.Init.CounterMode = TIM_COUNTERMODE_UP; - 8002328: 4b14 ldr r3, [pc, #80] ; (800237c ) - 800232a: 2200 movs r2, #0 - 800232c: 609a str r2, [r3, #8] + 8002350: 4b14 ldr r3, [pc, #80] ; (80023a4 ) + 8002352: 2200 movs r2, #0 + 8002354: 609a str r2, [r3, #8] htim7.Init.Period = 7999; // Irq's 1ms - 800232e: 4b13 ldr r3, [pc, #76] ; (800237c ) - 8002330: 4a14 ldr r2, [pc, #80] ; (8002384 ) - 8002332: 60da str r2, [r3, #12] + 8002356: 4b13 ldr r3, [pc, #76] ; (80023a4 ) + 8002358: 4a14 ldr r2, [pc, #80] ; (80023ac ) + 800235a: 60da str r2, [r3, #12] htim7.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; - 8002334: 4b11 ldr r3, [pc, #68] ; (800237c ) - 8002336: 2200 movs r2, #0 - 8002338: 615a str r2, [r3, #20] + 800235c: 4b11 ldr r3, [pc, #68] ; (80023a4 ) + 800235e: 2200 movs r2, #0 + 8002360: 615a str r2, [r3, #20] if (HAL_TIM_Base_Init(&htim7) != HAL_OK) - 800233a: 4b10 ldr r3, [pc, #64] ; (800237c ) - 800233c: 0018 movs r0, r3 - 800233e: f003 fb63 bl 8005a08 - 8002342: 1e03 subs r3, r0, #0 - 8002344: d001 beq.n 800234a + 8002362: 4b10 ldr r3, [pc, #64] ; (80023a4 ) + 8002364: 0018 movs r0, r3 + 8002366: f003 fb6d bl 8005a44 + 800236a: 1e03 subs r3, r0, #0 + 800236c: d001 beq.n 8002372 { Error_Handler(); - 8002346: f7ff ff51 bl 80021ec + 800236e: f7ff ff2d bl 80021cc } sMasterConfig.MasterOutputTrigger = TIM_TRGO_UPDATE; - 800234a: 003b movs r3, r7 - 800234c: 2220 movs r2, #32 - 800234e: 601a str r2, [r3, #0] + 8002372: 003b movs r3, r7 + 8002374: 2220 movs r2, #32 + 8002376: 601a str r2, [r3, #0] sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; - 8002350: 003b movs r3, r7 - 8002352: 2200 movs r2, #0 - 8002354: 605a str r2, [r3, #4] + 8002378: 003b movs r3, r7 + 800237a: 2200 movs r2, #0 + 800237c: 605a str r2, [r3, #4] if (HAL_TIMEx_MasterConfigSynchronization(&htim7, &sMasterConfig) != HAL_OK) - 8002356: 003a movs r2, r7 - 8002358: 4b08 ldr r3, [pc, #32] ; (800237c ) - 800235a: 0011 movs r1, r2 - 800235c: 0018 movs r0, r3 - 800235e: f003 fd4b bl 8005df8 - 8002362: 1e03 subs r3, r0, #0 - 8002364: d001 beq.n 800236a + 800237e: 003a movs r2, r7 + 8002380: 4b08 ldr r3, [pc, #32] ; (80023a4 ) + 8002382: 0011 movs r1, r2 + 8002384: 0018 movs r0, r3 + 8002386: f003 fd55 bl 8005e34 + 800238a: 1e03 subs r3, r0, #0 + 800238c: d001 beq.n 8002392 { Error_Handler(); - 8002366: f7ff ff41 bl 80021ec + 800238e: f7ff ff1d bl 80021cc } /* USER CODE BEGIN TIM7_Init 2 */ HAL_TIM_Base_Start_IT(&htim7); - 800236a: 4b04 ldr r3, [pc, #16] ; (800237c ) - 800236c: 0018 movs r0, r3 - 800236e: f003 fb8b bl 8005a88 + 8002392: 4b04 ldr r3, [pc, #16] ; (80023a4 ) + 8002394: 0018 movs r0, r3 + 8002396: f003 fb95 bl 8005ac4 /* USER CODE END TIM7_Init 2 */ } - 8002372: 46c0 nop ; (mov r8, r8) - 8002374: 46bd mov sp, r7 - 8002376: b002 add sp, #8 - 8002378: bd80 pop {r7, pc} - 800237a: 46c0 nop ; (mov r8, r8) - 800237c: 200000c0 .word 0x200000c0 - 8002380: 40001400 .word 0x40001400 - 8002384: 00001f3f .word 0x00001f3f + 800239a: 46c0 nop ; (mov r8, r8) + 800239c: 46bd mov sp, r7 + 800239e: b002 add sp, #8 + 80023a0: bd80 pop {r7, pc} + 80023a2: 46c0 nop ; (mov r8, r8) + 80023a4: 200000c8 .word 0x200000c8 + 80023a8: 40001400 .word 0x40001400 + 80023ac: 00001f3f .word 0x00001f3f -08002388 : +080023b0 : void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* tim_baseHandle) { - 8002388: b580 push {r7, lr} - 800238a: b082 sub sp, #8 - 800238c: af00 add r7, sp, #0 - 800238e: 6078 str r0, [r7, #4] + 80023b0: b580 push {r7, lr} + 80023b2: b082 sub sp, #8 + 80023b4: af00 add r7, sp, #0 + 80023b6: 6078 str r0, [r7, #4] if(tim_baseHandle->Instance==TIM7) - 8002390: 687b ldr r3, [r7, #4] - 8002392: 681b ldr r3, [r3, #0] - 8002394: 4a0a ldr r2, [pc, #40] ; (80023c0 ) - 8002396: 4293 cmp r3, r2 - 8002398: d10d bne.n 80023b6 + 80023b8: 687b ldr r3, [r7, #4] + 80023ba: 681b ldr r3, [r3, #0] + 80023bc: 4a0a ldr r2, [pc, #40] ; (80023e8 ) + 80023be: 4293 cmp r3, r2 + 80023c0: d10d bne.n 80023de { /* USER CODE BEGIN TIM7_MspInit 0 */ /* USER CODE END TIM7_MspInit 0 */ /* TIM7 clock enable */ __HAL_RCC_TIM7_CLK_ENABLE(); - 800239a: 4b0a ldr r3, [pc, #40] ; (80023c4 ) - 800239c: 4a09 ldr r2, [pc, #36] ; (80023c4 ) - 800239e: 6b92 ldr r2, [r2, #56] ; 0x38 - 80023a0: 2120 movs r1, #32 - 80023a2: 430a orrs r2, r1 - 80023a4: 639a str r2, [r3, #56] ; 0x38 + 80023c2: 4b0a ldr r3, [pc, #40] ; (80023ec ) + 80023c4: 4a09 ldr r2, [pc, #36] ; (80023ec ) + 80023c6: 6b92 ldr r2, [r2, #56] ; 0x38 + 80023c8: 2120 movs r1, #32 + 80023ca: 430a orrs r2, r1 + 80023cc: 639a str r2, [r3, #56] ; 0x38 /* TIM7 interrupt Init */ HAL_NVIC_SetPriority(TIM7_IRQn, 2, 0); - 80023a6: 2200 movs r2, #0 - 80023a8: 2102 movs r1, #2 - 80023aa: 2012 movs r0, #18 - 80023ac: f001 fe94 bl 80040d8 + 80023ce: 2200 movs r2, #0 + 80023d0: 2102 movs r1, #2 + 80023d2: 2012 movs r0, #18 + 80023d4: f001 fe9e bl 8004114 HAL_NVIC_EnableIRQ(TIM7_IRQn); - 80023b0: 2012 movs r0, #18 - 80023b2: f001 fea7 bl 8004104 + 80023d8: 2012 movs r0, #18 + 80023da: f001 feb1 bl 8004140 /* USER CODE BEGIN TIM7_MspInit 1 */ /* USER CODE END TIM7_MspInit 1 */ } } - 80023b6: 46c0 nop ; (mov r8, r8) - 80023b8: 46bd mov sp, r7 - 80023ba: b002 add sp, #8 - 80023bc: bd80 pop {r7, pc} - 80023be: 46c0 nop ; (mov r8, r8) - 80023c0: 40001400 .word 0x40001400 - 80023c4: 40021000 .word 0x40021000 + 80023de: 46c0 nop ; (mov r8, r8) + 80023e0: 46bd mov sp, r7 + 80023e2: b002 add sp, #8 + 80023e4: bd80 pop {r7, pc} + 80023e6: 46c0 nop ; (mov r8, r8) + 80023e8: 40001400 .word 0x40001400 + 80023ec: 40021000 .word 0x40021000 -080023c8 : +080023f0 : /* USER CODE BEGIN 1 */ /* USER CODE BEGIN 1 */ void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim) { - 80023c8: b580 push {r7, lr} - 80023ca: b082 sub sp, #8 - 80023cc: af00 add r7, sp, #0 - 80023ce: 6078 str r0, [r7, #4] + 80023f0: b580 push {r7, lr} + 80023f2: b082 sub sp, #8 + 80023f4: af00 add r7, sp, #0 + 80023f6: 6078 str r0, [r7, #4] if((uint32_t) htim->Instance == TIM7_SOURCE) //TIM2_IRQs every 1024 Hz - 80023d0: 687b ldr r3, [r7, #4] - 80023d2: 681b ldr r3, [r3, #0] - 80023d4: 001a movs r2, r3 - 80023d6: 4b06 ldr r3, [pc, #24] ; (80023f0 ) - 80023d8: 429a cmp r2, r3 - 80023da: d104 bne.n 80023e6 + 80023f8: 687b ldr r3, [r7, #4] + 80023fa: 681b ldr r3, [r3, #0] + 80023fc: 001a movs r2, r3 + 80023fe: 4b06 ldr r3, [pc, #24] ; (8002418 ) + 8002400: 429a cmp r2, r3 + 8002402: d104 bne.n 800240e { __HAL_TIM_CLEAR_IT(htim, TIM_IT_UPDATE); - 80023dc: 687b ldr r3, [r7, #4] - 80023de: 681b ldr r3, [r3, #0] - 80023e0: 2202 movs r2, #2 - 80023e2: 4252 negs r2, r2 - 80023e4: 611a str r2, [r3, #16] + 8002404: 687b ldr r3, [r7, #4] + 8002406: 681b ldr r3, [r3, #0] + 8002408: 2202 movs r2, #2 + 800240a: 4252 negs r2, r2 + 800240c: 611a str r2, [r3, #16] timerKZ--; if(!timerKZ) AMP_STATUS &= ~KZ_Pin; }*/ } } - 80023e6: 46c0 nop ; (mov r8, r8) - 80023e8: 46bd mov sp, r7 - 80023ea: b002 add sp, #8 - 80023ec: bd80 pop {r7, pc} - 80023ee: 46c0 nop ; (mov r8, r8) - 80023f0: 40001400 .word 0x40001400 + 800240e: 46c0 nop ; (mov r8, r8) + 8002410: 46bd mov sp, r7 + 8002412: b002 add sp, #8 + 8002414: bd80 pop {r7, pc} + 8002416: 46c0 nop ; (mov r8, r8) + 8002418: 40001400 .word 0x40001400 -080023f4 : +0800241c : const int8_t inversely[] = {3, 1, -1,-3}; static const uint32_t BAUDRATE[] = {4800, 7200, 9600, 14400, 19200, 38400, 57600, 115200, 128000, 230400}; void MX_USART1_UART_Init(void) { - 80023f4: b580 push {r7, lr} - 80023f6: af00 add r7, sp, #0 + 800241c: b580 push {r7, lr} + 800241e: af00 add r7, sp, #0 huart1.Instance = USART1; - 80023f8: 4b4a ldr r3, [pc, #296] ; (8002524 ) - 80023fa: 4a4b ldr r2, [pc, #300] ; (8002528 ) - 80023fc: 601a str r2, [r3, #0] + 8002420: 4b4a ldr r3, [pc, #296] ; (800254c ) + 8002422: 4a4b ldr r2, [pc, #300] ; (8002550 ) + 8002424: 601a str r2, [r3, #0] huart1.Init.BaudRate = BAUDRATE[pardata.BAUD]; - 80023fe: 4b4b ldr r3, [pc, #300] ; (800252c ) - 8002400: 885b ldrh r3, [r3, #2] - 8002402: b29b uxth r3, r3 - 8002404: 001a movs r2, r3 - 8002406: 4b4a ldr r3, [pc, #296] ; (8002530 ) - 8002408: 0092 lsls r2, r2, #2 - 800240a: 58d2 ldr r2, [r2, r3] - 800240c: 4b45 ldr r3, [pc, #276] ; (8002524 ) - 800240e: 605a str r2, [r3, #4] + 8002426: 4b4b ldr r3, [pc, #300] ; (8002554 ) + 8002428: 885b ldrh r3, [r3, #2] + 800242a: b29b uxth r3, r3 + 800242c: 001a movs r2, r3 + 800242e: 4b4a ldr r3, [pc, #296] ; (8002558 ) + 8002430: 0092 lsls r2, r2, #2 + 8002432: 58d2 ldr r2, [r2, r3] + 8002434: 4b45 ldr r3, [pc, #276] ; (800254c ) + 8002436: 605a str r2, [r3, #4] huart1.Init.WordLength = UART_WORDLENGTH_8B; - 8002410: 4b44 ldr r3, [pc, #272] ; (8002524 ) - 8002412: 2200 movs r2, #0 - 8002414: 609a str r2, [r3, #8] + 8002438: 4b44 ldr r3, [pc, #272] ; (800254c ) + 800243a: 2200 movs r2, #0 + 800243c: 609a str r2, [r3, #8] huart1.Init.StopBits = UART_STOPBITS_1; - 8002416: 4b43 ldr r3, [pc, #268] ; (8002524 ) - 8002418: 2200 movs r2, #0 - 800241a: 60da str r2, [r3, #12] + 800243e: 4b43 ldr r3, [pc, #268] ; (800254c ) + 8002440: 2200 movs r2, #0 + 8002442: 60da str r2, [r3, #12] switch(pardata.INFB) - 800241c: 4b43 ldr r3, [pc, #268] ; (800252c ) - 800241e: 889b ldrh r3, [r3, #4] - 8002420: b29b uxth r3, r3 - 8002422: 2b01 cmp r3, #1 - 8002424: d00a beq.n 800243c - 8002426: 2b02 cmp r3, #2 - 8002428: d011 beq.n 800244e - 800242a: 2b00 cmp r3, #0 - 800242c: d118 bne.n 8002460 + 8002444: 4b43 ldr r3, [pc, #268] ; (8002554 ) + 8002446: 889b ldrh r3, [r3, #4] + 8002448: b29b uxth r3, r3 + 800244a: 2b01 cmp r3, #1 + 800244c: d00a beq.n 8002464 + 800244e: 2b02 cmp r3, #2 + 8002450: d011 beq.n 8002476 + 8002452: 2b00 cmp r3, #0 + 8002454: d118 bne.n 8002488 { case 0: //NONE huart1.Init.WordLength = UART_WORDLENGTH_8B; - 800242e: 4b3d ldr r3, [pc, #244] ; (8002524 ) - 8002430: 2200 movs r2, #0 - 8002432: 609a str r2, [r3, #8] + 8002456: 4b3d ldr r3, [pc, #244] ; (800254c ) + 8002458: 2200 movs r2, #0 + 800245a: 609a str r2, [r3, #8] huart1.Init.Parity = UART_PARITY_NONE; - 8002434: 4b3b ldr r3, [pc, #236] ; (8002524 ) - 8002436: 2200 movs r2, #0 - 8002438: 611a str r2, [r3, #16] + 800245c: 4b3b ldr r3, [pc, #236] ; (800254c ) + 800245e: 2200 movs r2, #0 + 8002460: 611a str r2, [r3, #16] break; - 800243a: e011 b.n 8002460 + 8002462: e011 b.n 8002488 case 1: //ODD huart1.Init.WordLength = UART_WORDLENGTH_9B; - 800243c: 4b39 ldr r3, [pc, #228] ; (8002524 ) - 800243e: 2280 movs r2, #128 ; 0x80 - 8002440: 0152 lsls r2, r2, #5 - 8002442: 609a str r2, [r3, #8] + 8002464: 4b39 ldr r3, [pc, #228] ; (800254c ) + 8002466: 2280 movs r2, #128 ; 0x80 + 8002468: 0152 lsls r2, r2, #5 + 800246a: 609a str r2, [r3, #8] huart1.Init.Parity = UART_PARITY_ODD; - 8002444: 4b37 ldr r3, [pc, #220] ; (8002524 ) - 8002446: 22c0 movs r2, #192 ; 0xc0 - 8002448: 00d2 lsls r2, r2, #3 - 800244a: 611a str r2, [r3, #16] + 800246c: 4b37 ldr r3, [pc, #220] ; (800254c ) + 800246e: 22c0 movs r2, #192 ; 0xc0 + 8002470: 00d2 lsls r2, r2, #3 + 8002472: 611a str r2, [r3, #16] break; - 800244c: e008 b.n 8002460 + 8002474: e008 b.n 8002488 case 2: //EVEN huart1.Init.WordLength = UART_WORDLENGTH_9B; - 800244e: 4b35 ldr r3, [pc, #212] ; (8002524 ) - 8002450: 2280 movs r2, #128 ; 0x80 - 8002452: 0152 lsls r2, r2, #5 - 8002454: 609a str r2, [r3, #8] + 8002476: 4b35 ldr r3, [pc, #212] ; (800254c ) + 8002478: 2280 movs r2, #128 ; 0x80 + 800247a: 0152 lsls r2, r2, #5 + 800247c: 609a str r2, [r3, #8] huart1.Init.Parity = UART_PARITY_EVEN; - 8002456: 4b33 ldr r3, [pc, #204] ; (8002524 ) - 8002458: 2280 movs r2, #128 ; 0x80 - 800245a: 00d2 lsls r2, r2, #3 - 800245c: 611a str r2, [r3, #16] + 800247e: 4b33 ldr r3, [pc, #204] ; (800254c ) + 8002480: 2280 movs r2, #128 ; 0x80 + 8002482: 00d2 lsls r2, r2, #3 + 8002484: 611a str r2, [r3, #16] break; - 800245e: 46c0 nop ; (mov r8, r8) + 8002486: 46c0 nop ; (mov r8, r8) } if(pardata.BAUD < 7) - 8002460: 4b32 ldr r3, [pc, #200] ; (800252c ) - 8002462: 885b ldrh r3, [r3, #2] - 8002464: b29b uxth r3, r3 - 8002466: 2b06 cmp r3, #6 - 8002468: d804 bhi.n 8002474 + 8002488: 4b32 ldr r3, [pc, #200] ; (8002554 ) + 800248a: 885b ldrh r3, [r3, #2] + 800248c: b29b uxth r3, r3 + 800248e: 2b06 cmp r3, #6 + 8002490: d804 bhi.n 800249c huart1.Init.OverSampling = UART_OVERSAMPLING_8; - 800246a: 4b2e ldr r3, [pc, #184] ; (8002524 ) - 800246c: 2280 movs r2, #128 ; 0x80 - 800246e: 0212 lsls r2, r2, #8 - 8002470: 61da str r2, [r3, #28] - 8002472: e002 b.n 800247a + 8002492: 4b2e ldr r3, [pc, #184] ; (800254c ) + 8002494: 2280 movs r2, #128 ; 0x80 + 8002496: 0212 lsls r2, r2, #8 + 8002498: 61da str r2, [r3, #28] + 800249a: e002 b.n 80024a2 else huart1.Init.OverSampling = UART_OVERSAMPLING_16; - 8002474: 4b2b ldr r3, [pc, #172] ; (8002524 ) - 8002476: 2200 movs r2, #0 - 8002478: 61da str r2, [r3, #28] + 800249c: 4b2b ldr r3, [pc, #172] ; (800254c ) + 800249e: 2200 movs r2, #0 + 80024a0: 61da str r2, [r3, #28] huart1.Init.Mode = UART_MODE_TX_RX; - 800247a: 4b2a ldr r3, [pc, #168] ; (8002524 ) - 800247c: 220c movs r2, #12 - 800247e: 615a str r2, [r3, #20] + 80024a2: 4b2a ldr r3, [pc, #168] ; (800254c ) + 80024a4: 220c movs r2, #12 + 80024a6: 615a str r2, [r3, #20] huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE; - 8002480: 4b28 ldr r3, [pc, #160] ; (8002524 ) - 8002482: 2200 movs r2, #0 - 8002484: 619a str r2, [r3, #24] + 80024a8: 4b28 ldr r3, [pc, #160] ; (800254c ) + 80024aa: 2200 movs r2, #0 + 80024ac: 619a str r2, [r3, #24] huart1.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; - 8002486: 4b27 ldr r3, [pc, #156] ; (8002524 ) - 8002488: 2200 movs r2, #0 - 800248a: 621a str r2, [r3, #32] + 80024ae: 4b27 ldr r3, [pc, #156] ; (800254c ) + 80024b0: 2200 movs r2, #0 + 80024b2: 621a str r2, [r3, #32] huart1.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT; - 800248c: 4b25 ldr r3, [pc, #148] ; (8002524 ) - 800248e: 2200 movs r2, #0 - 8002490: 625a str r2, [r3, #36] ; 0x24 + 80024b4: 4b25 ldr r3, [pc, #148] ; (800254c ) + 80024b6: 2200 movs r2, #0 + 80024b8: 625a str r2, [r3, #36] ; 0x24 if(HAL_UART_Init(&huart1) != HAL_OK) { - 8002492: 4b24 ldr r3, [pc, #144] ; (8002524 ) - 8002494: 0018 movs r0, r3 - 8002496: f003 fd0d bl 8005eb4 - 800249a: 1e03 subs r3, r0, #0 - 800249c: d001 beq.n 80024a2 + 80024ba: 4b24 ldr r3, [pc, #144] ; (800254c ) + 80024bc: 0018 movs r0, r3 + 80024be: f003 fd17 bl 8005ef0 + 80024c2: 1e03 subs r3, r0, #0 + 80024c4: d001 beq.n 80024ca Error_Handler(); - 800249e: f7ff fea5 bl 80021ec + 80024c6: f7ff fe81 bl 80021cc } if(__HAL_UART_GET_FLAG(&huart1, UART_FLAG_ORE)) - 80024a2: 4b20 ldr r3, [pc, #128] ; (8002524 ) - 80024a4: 681b ldr r3, [r3, #0] - 80024a6: 69db ldr r3, [r3, #28] - 80024a8: 2208 movs r2, #8 - 80024aa: 4013 ands r3, r2 - 80024ac: 2b08 cmp r3, #8 - 80024ae: d103 bne.n 80024b8 + 80024ca: 4b20 ldr r3, [pc, #128] ; (800254c ) + 80024cc: 681b ldr r3, [r3, #0] + 80024ce: 69db ldr r3, [r3, #28] + 80024d0: 2208 movs r2, #8 + 80024d2: 4013 ands r3, r2 + 80024d4: 2b08 cmp r3, #8 + 80024d6: d103 bne.n 80024e0 __HAL_UART_CLEAR_FLAG(&huart1, UART_FLAG_ORE); - 80024b0: 4b1c ldr r3, [pc, #112] ; (8002524 ) - 80024b2: 681b ldr r3, [r3, #0] - 80024b4: 2208 movs r2, #8 - 80024b6: 621a str r2, [r3, #32] + 80024d8: 4b1c ldr r3, [pc, #112] ; (800254c ) + 80024da: 681b ldr r3, [r3, #0] + 80024dc: 2208 movs r2, #8 + 80024de: 621a str r2, [r3, #32] if(__HAL_UART_GET_FLAG(&huart1, UART_FLAG_PE)) - 80024b8: 4b1a ldr r3, [pc, #104] ; (8002524 ) - 80024ba: 681b ldr r3, [r3, #0] - 80024bc: 69db ldr r3, [r3, #28] - 80024be: 2201 movs r2, #1 - 80024c0: 4013 ands r3, r2 - 80024c2: 2b01 cmp r3, #1 - 80024c4: d103 bne.n 80024ce + 80024e0: 4b1a ldr r3, [pc, #104] ; (800254c ) + 80024e2: 681b ldr r3, [r3, #0] + 80024e4: 69db ldr r3, [r3, #28] + 80024e6: 2201 movs r2, #1 + 80024e8: 4013 ands r3, r2 + 80024ea: 2b01 cmp r3, #1 + 80024ec: d103 bne.n 80024f6 __HAL_UART_CLEAR_FLAG(&huart1, UART_FLAG_PE); - 80024c6: 4b17 ldr r3, [pc, #92] ; (8002524 ) - 80024c8: 681b ldr r3, [r3, #0] - 80024ca: 2201 movs r2, #1 - 80024cc: 621a str r2, [r3, #32] + 80024ee: 4b17 ldr r3, [pc, #92] ; (800254c ) + 80024f0: 681b ldr r3, [r3, #0] + 80024f2: 2201 movs r2, #1 + 80024f4: 621a str r2, [r3, #32] if(__HAL_UART_GET_FLAG(&huart1, UART_FLAG_FE)) - 80024ce: 4b15 ldr r3, [pc, #84] ; (8002524 ) - 80024d0: 681b ldr r3, [r3, #0] - 80024d2: 69db ldr r3, [r3, #28] - 80024d4: 2202 movs r2, #2 - 80024d6: 4013 ands r3, r2 - 80024d8: 2b02 cmp r3, #2 - 80024da: d103 bne.n 80024e4 + 80024f6: 4b15 ldr r3, [pc, #84] ; (800254c ) + 80024f8: 681b ldr r3, [r3, #0] + 80024fa: 69db ldr r3, [r3, #28] + 80024fc: 2202 movs r2, #2 + 80024fe: 4013 ands r3, r2 + 8002500: 2b02 cmp r3, #2 + 8002502: d103 bne.n 800250c __HAL_UART_CLEAR_FLAG(&huart1, UART_FLAG_FE); - 80024dc: 4b11 ldr r3, [pc, #68] ; (8002524 ) - 80024de: 681b ldr r3, [r3, #0] - 80024e0: 2202 movs r2, #2 - 80024e2: 621a str r2, [r3, #32] + 8002504: 4b11 ldr r3, [pc, #68] ; (800254c ) + 8002506: 681b ldr r3, [r3, #0] + 8002508: 2202 movs r2, #2 + 800250a: 621a str r2, [r3, #32] if(__HAL_UART_GET_FLAG(&huart1, UART_FLAG_NE)) - 80024e4: 4b0f ldr r3, [pc, #60] ; (8002524 ) - 80024e6: 681b ldr r3, [r3, #0] - 80024e8: 69db ldr r3, [r3, #28] - 80024ea: 2204 movs r2, #4 - 80024ec: 4013 ands r3, r2 - 80024ee: 2b04 cmp r3, #4 - 80024f0: d103 bne.n 80024fa + 800250c: 4b0f ldr r3, [pc, #60] ; (800254c ) + 800250e: 681b ldr r3, [r3, #0] + 8002510: 69db ldr r3, [r3, #28] + 8002512: 2204 movs r2, #4 + 8002514: 4013 ands r3, r2 + 8002516: 2b04 cmp r3, #4 + 8002518: d103 bne.n 8002522 __HAL_UART_CLEAR_FLAG(&huart1, UART_FLAG_NE); - 80024f2: 4b0c ldr r3, [pc, #48] ; (8002524 ) - 80024f4: 681b ldr r3, [r3, #0] - 80024f6: 2204 movs r2, #4 - 80024f8: 621a str r2, [r3, #32] + 800251a: 4b0c ldr r3, [pc, #48] ; (800254c ) + 800251c: 681b ldr r3, [r3, #0] + 800251e: 2204 movs r2, #4 + 8002520: 621a str r2, [r3, #32] HAL_GPIO_WritePin(RE_GPIO_Port, RE_Pin, GPIO_PIN_RESET); - 80024fa: 2380 movs r3, #128 ; 0x80 - 80024fc: 0059 lsls r1, r3, #1 - 80024fe: 23a0 movs r3, #160 ; 0xa0 - 8002500: 05db lsls r3, r3, #23 - 8002502: 2200 movs r2, #0 - 8002504: 0018 movs r0, r3 - 8002506: f002 fb02 bl 8004b0e + 8002522: 2380 movs r3, #128 ; 0x80 + 8002524: 0059 lsls r1, r3, #1 + 8002526: 23a0 movs r3, #160 ; 0xa0 + 8002528: 05db lsls r3, r3, #23 + 800252a: 2200 movs r2, #0 + 800252c: 0018 movs r0, r3 + 800252e: f002 fb0c bl 8004b4a SET_BIT(huart1.Instance->CR1, USART_CR1_RXNEIE | USART_CR1_PEIE); - 800250a: 4b06 ldr r3, [pc, #24] ; (8002524 ) - 800250c: 681b ldr r3, [r3, #0] - 800250e: 4a05 ldr r2, [pc, #20] ; (8002524 ) - 8002510: 6812 ldr r2, [r2, #0] - 8002512: 6812 ldr r2, [r2, #0] - 8002514: 2190 movs r1, #144 ; 0x90 - 8002516: 0049 lsls r1, r1, #1 - 8002518: 430a orrs r2, r1 - 800251a: 601a str r2, [r3, #0] + 8002532: 4b06 ldr r3, [pc, #24] ; (800254c ) + 8002534: 681b ldr r3, [r3, #0] + 8002536: 4a05 ldr r2, [pc, #20] ; (800254c ) + 8002538: 6812 ldr r2, [r2, #0] + 800253a: 6812 ldr r2, [r2, #0] + 800253c: 2190 movs r1, #144 ; 0x90 + 800253e: 0049 lsls r1, r1, #1 + 8002540: 430a orrs r2, r1 + 8002542: 601a str r2, [r3, #0] } - 800251c: 46c0 nop ; (mov r8, r8) - 800251e: 46bd mov sp, r7 - 8002520: bd80 pop {r7, pc} - 8002522: 46c0 nop ; (mov r8, r8) - 8002524: 20000104 .word 0x20000104 - 8002528: 40013800 .word 0x40013800 - 800252c: 20000098 .word 0x20000098 - 8002530: 0800741c .word 0x0800741c + 8002544: 46c0 nop ; (mov r8, r8) + 8002546: 46bd mov sp, r7 + 8002548: bd80 pop {r7, pc} + 800254a: 46c0 nop ; (mov r8, r8) + 800254c: 2000010c .word 0x2000010c + 8002550: 40013800 .word 0x40013800 + 8002554: 200000a0 .word 0x200000a0 + 8002558: 08007458 .word 0x08007458 -08002534 : +0800255c : void MX_USART1_UART_DeInit(void) { - 8002534: b580 push {r7, lr} - 8002536: af00 add r7, sp, #0 + 800255c: b580 push {r7, lr} + 800255e: af00 add r7, sp, #0 if(HAL_UART_DeInit(&huart1) != HAL_OK) { - 8002538: 4b06 ldr r3, [pc, #24] ; (8002554 ) - 800253a: 0018 movs r0, r3 - 800253c: f003 fd0e bl 8005f5c - 8002540: 1e03 subs r3, r0, #0 - 8002542: d001 beq.n 8002548 + 8002560: 4b06 ldr r3, [pc, #24] ; (800257c ) + 8002562: 0018 movs r0, r3 + 8002564: f003 fd18 bl 8005f98 + 8002568: 1e03 subs r3, r0, #0 + 800256a: d001 beq.n 8002570 Error_Handler(); - 8002544: f7ff fe52 bl 80021ec + 800256c: f7ff fe2e bl 80021cc } HAL_NVIC_DisableIRQ(USART1_IRQn); - 8002548: 201b movs r0, #27 - 800254a: f001 fdeb bl 8004124 + 8002570: 201b movs r0, #27 + 8002572: f001 fdf5 bl 8004160 } - 800254e: 46c0 nop ; (mov r8, r8) - 8002550: 46bd mov sp, r7 - 8002552: bd80 pop {r7, pc} - 8002554: 20000104 .word 0x20000104 + 8002576: 46c0 nop ; (mov r8, r8) + 8002578: 46bd mov sp, r7 + 800257a: bd80 pop {r7, pc} + 800257c: 2000010c .word 0x2000010c -08002558 : +08002580 : void HAL_UART_MspInit(UART_HandleTypeDef* uartHandle) { - 8002558: b580 push {r7, lr} - 800255a: b088 sub sp, #32 - 800255c: af00 add r7, sp, #0 - 800255e: 6078 str r0, [r7, #4] + 8002580: b580 push {r7, lr} + 8002582: b088 sub sp, #32 + 8002584: af00 add r7, sp, #0 + 8002586: 6078 str r0, [r7, #4] GPIO_InitTypeDef GPIO_InitStruct = {0}; - 8002560: 230c movs r3, #12 - 8002562: 18fb adds r3, r7, r3 - 8002564: 0018 movs r0, r3 - 8002566: 2314 movs r3, #20 - 8002568: 001a movs r2, r3 - 800256a: 2100 movs r1, #0 - 800256c: f004 fd27 bl 8006fbe + 8002588: 230c movs r3, #12 + 800258a: 18fb adds r3, r7, r3 + 800258c: 0018 movs r0, r3 + 800258e: 2314 movs r3, #20 + 8002590: 001a movs r2, r3 + 8002592: 2100 movs r1, #0 + 8002594: f004 fd31 bl 8006ffa if(uartHandle->Instance==USART1) - 8002570: 687b ldr r3, [r7, #4] - 8002572: 681b ldr r3, [r3, #0] - 8002574: 4a1f ldr r2, [pc, #124] ; (80025f4 ) - 8002576: 4293 cmp r3, r2 - 8002578: d137 bne.n 80025ea + 8002598: 687b ldr r3, [r7, #4] + 800259a: 681b ldr r3, [r3, #0] + 800259c: 4a1f ldr r2, [pc, #124] ; (800261c ) + 800259e: 4293 cmp r3, r2 + 80025a0: d137 bne.n 8002612 { __HAL_RCC_USART1_CLK_ENABLE(); - 800257a: 4b1f ldr r3, [pc, #124] ; (80025f8 ) - 800257c: 4a1e ldr r2, [pc, #120] ; (80025f8 ) - 800257e: 6b52 ldr r2, [r2, #52] ; 0x34 - 8002580: 2180 movs r1, #128 ; 0x80 - 8002582: 01c9 lsls r1, r1, #7 - 8002584: 430a orrs r2, r1 - 8002586: 635a str r2, [r3, #52] ; 0x34 + 80025a2: 4b1f ldr r3, [pc, #124] ; (8002620 ) + 80025a4: 4a1e ldr r2, [pc, #120] ; (8002620 ) + 80025a6: 6b52 ldr r2, [r2, #52] ; 0x34 + 80025a8: 2180 movs r1, #128 ; 0x80 + 80025aa: 01c9 lsls r1, r1, #7 + 80025ac: 430a orrs r2, r1 + 80025ae: 635a str r2, [r3, #52] ; 0x34 __HAL_RCC_GPIOA_CLK_ENABLE(); - 8002588: 4b1b ldr r3, [pc, #108] ; (80025f8 ) - 800258a: 4a1b ldr r2, [pc, #108] ; (80025f8 ) - 800258c: 6ad2 ldr r2, [r2, #44] ; 0x2c - 800258e: 2101 movs r1, #1 - 8002590: 430a orrs r2, r1 - 8002592: 62da str r2, [r3, #44] ; 0x2c - 8002594: 4b18 ldr r3, [pc, #96] ; (80025f8 ) - 8002596: 6adb ldr r3, [r3, #44] ; 0x2c - 8002598: 2201 movs r2, #1 - 800259a: 4013 ands r3, r2 - 800259c: 60bb str r3, [r7, #8] - 800259e: 68bb ldr r3, [r7, #8] + 80025b0: 4b1b ldr r3, [pc, #108] ; (8002620 ) + 80025b2: 4a1b ldr r2, [pc, #108] ; (8002620 ) + 80025b4: 6ad2 ldr r2, [r2, #44] ; 0x2c + 80025b6: 2101 movs r1, #1 + 80025b8: 430a orrs r2, r1 + 80025ba: 62da str r2, [r3, #44] ; 0x2c + 80025bc: 4b18 ldr r3, [pc, #96] ; (8002620 ) + 80025be: 6adb ldr r3, [r3, #44] ; 0x2c + 80025c0: 2201 movs r2, #1 + 80025c2: 4013 ands r3, r2 + 80025c4: 60bb str r3, [r7, #8] + 80025c6: 68bb ldr r3, [r7, #8] /**USART1 GPIO Configuration PA9 ------> USART1_TX PA10 ------> USART1_RX */ GPIO_InitStruct.Pin = GPIO_PIN_9|GPIO_PIN_10; - 80025a0: 230c movs r3, #12 - 80025a2: 18fb adds r3, r7, r3 - 80025a4: 22c0 movs r2, #192 ; 0xc0 - 80025a6: 00d2 lsls r2, r2, #3 - 80025a8: 601a str r2, [r3, #0] + 80025c8: 230c movs r3, #12 + 80025ca: 18fb adds r3, r7, r3 + 80025cc: 22c0 movs r2, #192 ; 0xc0 + 80025ce: 00d2 lsls r2, r2, #3 + 80025d0: 601a str r2, [r3, #0] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - 80025aa: 230c movs r3, #12 - 80025ac: 18fb adds r3, r7, r3 - 80025ae: 2202 movs r2, #2 - 80025b0: 605a str r2, [r3, #4] + 80025d2: 230c movs r3, #12 + 80025d4: 18fb adds r3, r7, r3 + 80025d6: 2202 movs r2, #2 + 80025d8: 605a str r2, [r3, #4] GPIO_InitStruct.Pull = GPIO_NOPULL; - 80025b2: 230c movs r3, #12 - 80025b4: 18fb adds r3, r7, r3 - 80025b6: 2200 movs r2, #0 - 80025b8: 609a str r2, [r3, #8] + 80025da: 230c movs r3, #12 + 80025dc: 18fb adds r3, r7, r3 + 80025de: 2200 movs r2, #0 + 80025e0: 609a str r2, [r3, #8] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; - 80025ba: 230c movs r3, #12 - 80025bc: 18fb adds r3, r7, r3 - 80025be: 2203 movs r2, #3 - 80025c0: 60da str r2, [r3, #12] + 80025e2: 230c movs r3, #12 + 80025e4: 18fb adds r3, r7, r3 + 80025e6: 2203 movs r2, #3 + 80025e8: 60da str r2, [r3, #12] GPIO_InitStruct.Alternate = GPIO_AF4_USART1; - 80025c2: 230c movs r3, #12 - 80025c4: 18fb adds r3, r7, r3 - 80025c6: 2204 movs r2, #4 - 80025c8: 611a str r2, [r3, #16] + 80025ea: 230c movs r3, #12 + 80025ec: 18fb adds r3, r7, r3 + 80025ee: 2204 movs r2, #4 + 80025f0: 611a str r2, [r3, #16] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 80025ca: 230c movs r3, #12 - 80025cc: 18fa adds r2, r7, r3 - 80025ce: 23a0 movs r3, #160 ; 0xa0 - 80025d0: 05db lsls r3, r3, #23 - 80025d2: 0011 movs r1, r2 - 80025d4: 0018 movs r0, r3 - 80025d6: f002 f81b bl 8004610 + 80025f2: 230c movs r3, #12 + 80025f4: 18fa adds r2, r7, r3 + 80025f6: 23a0 movs r3, #160 ; 0xa0 + 80025f8: 05db lsls r3, r3, #23 + 80025fa: 0011 movs r1, r2 + 80025fc: 0018 movs r0, r3 + 80025fe: f002 f825 bl 800464c /* USART1 interrupt Init */ HAL_NVIC_SetPriority(USART1_IRQn, 3, 0); - 80025da: 2200 movs r2, #0 - 80025dc: 2103 movs r1, #3 - 80025de: 201b movs r0, #27 - 80025e0: f001 fd7a bl 80040d8 + 8002602: 2200 movs r2, #0 + 8002604: 2103 movs r1, #3 + 8002606: 201b movs r0, #27 + 8002608: f001 fd84 bl 8004114 HAL_NVIC_EnableIRQ(USART1_IRQn); - 80025e4: 201b movs r0, #27 - 80025e6: f001 fd8d bl 8004104 + 800260c: 201b movs r0, #27 + 800260e: f001 fd97 bl 8004140 } } - 80025ea: 46c0 nop ; (mov r8, r8) - 80025ec: 46bd mov sp, r7 - 80025ee: b008 add sp, #32 - 80025f0: bd80 pop {r7, pc} - 80025f2: 46c0 nop ; (mov r8, r8) - 80025f4: 40013800 .word 0x40013800 - 80025f8: 40021000 .word 0x40021000 + 8002612: 46c0 nop ; (mov r8, r8) + 8002614: 46bd mov sp, r7 + 8002616: b008 add sp, #32 + 8002618: bd80 pop {r7, pc} + 800261a: 46c0 nop ; (mov r8, r8) + 800261c: 40013800 .word 0x40013800 + 8002620: 40021000 .word 0x40021000 -080025fc : +08002624 : void HAL_UART_MspDeInit(UART_HandleTypeDef* uartHandle) { - 80025fc: b580 push {r7, lr} - 80025fe: b082 sub sp, #8 - 8002600: af00 add r7, sp, #0 - 8002602: 6078 str r0, [r7, #4] + 8002624: b580 push {r7, lr} + 8002626: b082 sub sp, #8 + 8002628: af00 add r7, sp, #0 + 800262a: 6078 str r0, [r7, #4] if(uartHandle->Instance==USART1) - 8002604: 687b ldr r3, [r7, #4] - 8002606: 681b ldr r3, [r3, #0] - 8002608: 4a0b ldr r2, [pc, #44] ; (8002638 ) - 800260a: 4293 cmp r3, r2 - 800260c: d110 bne.n 8002630 + 800262c: 687b ldr r3, [r7, #4] + 800262e: 681b ldr r3, [r3, #0] + 8002630: 4a0b ldr r2, [pc, #44] ; (8002660 ) + 8002632: 4293 cmp r3, r2 + 8002634: d110 bne.n 8002658 { /* USER CODE BEGIN USART1_MspDeInit 0 */ /* USER CODE END USART1_MspDeInit 0 */ /* Peripheral clock disable */ __HAL_RCC_USART1_CLK_DISABLE(); - 800260e: 4b0b ldr r3, [pc, #44] ; (800263c ) - 8002610: 4a0a ldr r2, [pc, #40] ; (800263c ) - 8002612: 6b52 ldr r2, [r2, #52] ; 0x34 - 8002614: 490a ldr r1, [pc, #40] ; (8002640 ) - 8002616: 400a ands r2, r1 - 8002618: 635a str r2, [r3, #52] ; 0x34 + 8002636: 4b0b ldr r3, [pc, #44] ; (8002664 ) + 8002638: 4a0a ldr r2, [pc, #40] ; (8002664 ) + 800263a: 6b52 ldr r2, [r2, #52] ; 0x34 + 800263c: 490a ldr r1, [pc, #40] ; (8002668 ) + 800263e: 400a ands r2, r1 + 8002640: 635a str r2, [r3, #52] ; 0x34 /**USART1 GPIO Configuration PA9 ------> USART1_TX PA10 ------> USART1_RX */ HAL_GPIO_DeInit(GPIOA, GPIO_PIN_9|GPIO_PIN_10); - 800261a: 23c0 movs r3, #192 ; 0xc0 - 800261c: 00da lsls r2, r3, #3 - 800261e: 23a0 movs r3, #160 ; 0xa0 - 8002620: 05db lsls r3, r3, #23 - 8002622: 0011 movs r1, r2 - 8002624: 0018 movs r0, r3 - 8002626: f002 f971 bl 800490c + 8002642: 23c0 movs r3, #192 ; 0xc0 + 8002644: 00da lsls r2, r3, #3 + 8002646: 23a0 movs r3, #160 ; 0xa0 + 8002648: 05db lsls r3, r3, #23 + 800264a: 0011 movs r1, r2 + 800264c: 0018 movs r0, r3 + 800264e: f002 f97b bl 8004948 /* USART1 interrupt Deinit */ HAL_NVIC_DisableIRQ(USART1_IRQn); - 800262a: 201b movs r0, #27 - 800262c: f001 fd7a bl 8004124 + 8002652: 201b movs r0, #27 + 8002654: f001 fd84 bl 8004160 /* USER CODE BEGIN USART1_MspDeInit 1 */ /* USER CODE END USART1_MspDeInit 1 */ } } - 8002630: 46c0 nop ; (mov r8, r8) - 8002632: 46bd mov sp, r7 - 8002634: b002 add sp, #8 - 8002636: bd80 pop {r7, pc} - 8002638: 40013800 .word 0x40013800 - 800263c: 40021000 .word 0x40021000 - 8002640: ffffbfff .word 0xffffbfff + 8002658: 46c0 nop ; (mov r8, r8) + 800265a: 46bd mov sp, r7 + 800265c: b002 add sp, #8 + 800265e: bd80 pop {r7, pc} + 8002660: 40013800 .word 0x40013800 + 8002664: 40021000 .word 0x40021000 + 8002668: ffffbfff .word 0xffffbfff -08002644 : +0800266c : /* USER CODE BEGIN 1 */ void USART1_IRQHandler(void) { - 8002644: b580 push {r7, lr} - 8002646: af00 add r7, sp, #0 + 800266c: b580 push {r7, lr} + 800266e: af00 add r7, sp, #0 if((__HAL_UART_GET_IT_SOURCE(&huart1, UART_IT_RXNE)) && (__HAL_UART_GET_FLAG(&huart1, UART_FLAG_RXNE))) - 8002648: 4b22 ldr r3, [pc, #136] ; (80026d4 ) - 800264a: 681b ldr r3, [r3, #0] - 800264c: 681b ldr r3, [r3, #0] - 800264e: 2220 movs r2, #32 - 8002650: 4013 ands r3, r2 - 8002652: d00b beq.n 800266c - 8002654: 4b1f ldr r3, [pc, #124] ; (80026d4 ) - 8002656: 681b ldr r3, [r3, #0] - 8002658: 69db ldr r3, [r3, #28] - 800265a: 2220 movs r2, #32 - 800265c: 4013 ands r3, r2 - 800265e: 2b20 cmp r3, #32 - 8002660: d104 bne.n 800266c + 8002670: 4b22 ldr r3, [pc, #136] ; (80026fc ) + 8002672: 681b ldr r3, [r3, #0] + 8002674: 681b ldr r3, [r3, #0] + 8002676: 2220 movs r2, #32 + 8002678: 4013 ands r3, r2 + 800267a: d00b beq.n 8002694 + 800267c: 4b1f ldr r3, [pc, #124] ; (80026fc ) + 800267e: 681b ldr r3, [r3, #0] + 8002680: 69db ldr r3, [r3, #28] + 8002682: 2220 movs r2, #32 + 8002684: 4013 ands r3, r2 + 8002686: 2b20 cmp r3, #32 + 8002688: d104 bne.n 8002694 { HAL_UART_RxCpltCallback(&huart1); - 8002662: 4b1c ldr r3, [pc, #112] ; (80026d4 ) - 8002664: 0018 movs r0, r3 - 8002666: f000 f929 bl 80028bc - 800266a: e003 b.n 8002674 + 800268a: 4b1c ldr r3, [pc, #112] ; (80026fc ) + 800268c: 0018 movs r0, r3 + 800268e: f000 f929 bl 80028e4 + 8002692: e003 b.n 800269c } else { HAL_UART_IRQHandler(&huart1); - 800266c: 4b19 ldr r3, [pc, #100] ; (80026d4 ) - 800266e: 0018 movs r0, r3 - 8002670: f003 fd1c bl 80060ac + 8002694: 4b19 ldr r3, [pc, #100] ; (80026fc ) + 8002696: 0018 movs r0, r3 + 8002698: f003 fd26 bl 80060e8 } if(__HAL_UART_GET_FLAG(&huart1, UART_FLAG_ORE)) - 8002674: 4b17 ldr r3, [pc, #92] ; (80026d4 ) - 8002676: 681b ldr r3, [r3, #0] - 8002678: 69db ldr r3, [r3, #28] - 800267a: 2208 movs r2, #8 - 800267c: 4013 ands r3, r2 - 800267e: 2b08 cmp r3, #8 - 8002680: d103 bne.n 800268a + 800269c: 4b17 ldr r3, [pc, #92] ; (80026fc ) + 800269e: 681b ldr r3, [r3, #0] + 80026a0: 69db ldr r3, [r3, #28] + 80026a2: 2208 movs r2, #8 + 80026a4: 4013 ands r3, r2 + 80026a6: 2b08 cmp r3, #8 + 80026a8: d103 bne.n 80026b2 __HAL_UART_CLEAR_FLAG(&huart1, UART_FLAG_ORE); - 8002682: 4b14 ldr r3, [pc, #80] ; (80026d4 ) - 8002684: 681b ldr r3, [r3, #0] - 8002686: 2208 movs r2, #8 - 8002688: 621a str r2, [r3, #32] + 80026aa: 4b14 ldr r3, [pc, #80] ; (80026fc ) + 80026ac: 681b ldr r3, [r3, #0] + 80026ae: 2208 movs r2, #8 + 80026b0: 621a str r2, [r3, #32] if(__HAL_UART_GET_FLAG(&huart1, UART_FLAG_PE)) - 800268a: 4b12 ldr r3, [pc, #72] ; (80026d4 ) - 800268c: 681b ldr r3, [r3, #0] - 800268e: 69db ldr r3, [r3, #28] - 8002690: 2201 movs r2, #1 - 8002692: 4013 ands r3, r2 - 8002694: 2b01 cmp r3, #1 - 8002696: d103 bne.n 80026a0 + 80026b2: 4b12 ldr r3, [pc, #72] ; (80026fc ) + 80026b4: 681b ldr r3, [r3, #0] + 80026b6: 69db ldr r3, [r3, #28] + 80026b8: 2201 movs r2, #1 + 80026ba: 4013 ands r3, r2 + 80026bc: 2b01 cmp r3, #1 + 80026be: d103 bne.n 80026c8 __HAL_UART_CLEAR_FLAG(&huart1, UART_FLAG_PE); - 8002698: 4b0e ldr r3, [pc, #56] ; (80026d4 ) - 800269a: 681b ldr r3, [r3, #0] - 800269c: 2201 movs r2, #1 - 800269e: 621a str r2, [r3, #32] + 80026c0: 4b0e ldr r3, [pc, #56] ; (80026fc ) + 80026c2: 681b ldr r3, [r3, #0] + 80026c4: 2201 movs r2, #1 + 80026c6: 621a str r2, [r3, #32] if(__HAL_UART_GET_FLAG(&huart1, UART_FLAG_FE)) - 80026a0: 4b0c ldr r3, [pc, #48] ; (80026d4 ) - 80026a2: 681b ldr r3, [r3, #0] - 80026a4: 69db ldr r3, [r3, #28] - 80026a6: 2202 movs r2, #2 - 80026a8: 4013 ands r3, r2 - 80026aa: 2b02 cmp r3, #2 - 80026ac: d103 bne.n 80026b6 + 80026c8: 4b0c ldr r3, [pc, #48] ; (80026fc ) + 80026ca: 681b ldr r3, [r3, #0] + 80026cc: 69db ldr r3, [r3, #28] + 80026ce: 2202 movs r2, #2 + 80026d0: 4013 ands r3, r2 + 80026d2: 2b02 cmp r3, #2 + 80026d4: d103 bne.n 80026de __HAL_UART_CLEAR_FLAG(&huart1, UART_FLAG_FE); - 80026ae: 4b09 ldr r3, [pc, #36] ; (80026d4 ) - 80026b0: 681b ldr r3, [r3, #0] - 80026b2: 2202 movs r2, #2 - 80026b4: 621a str r2, [r3, #32] + 80026d6: 4b09 ldr r3, [pc, #36] ; (80026fc ) + 80026d8: 681b ldr r3, [r3, #0] + 80026da: 2202 movs r2, #2 + 80026dc: 621a str r2, [r3, #32] if(__HAL_UART_GET_FLAG(&huart1, UART_FLAG_NE)) - 80026b6: 4b07 ldr r3, [pc, #28] ; (80026d4 ) - 80026b8: 681b ldr r3, [r3, #0] - 80026ba: 69db ldr r3, [r3, #28] - 80026bc: 2204 movs r2, #4 - 80026be: 4013 ands r3, r2 - 80026c0: 2b04 cmp r3, #4 - 80026c2: d103 bne.n 80026cc + 80026de: 4b07 ldr r3, [pc, #28] ; (80026fc ) + 80026e0: 681b ldr r3, [r3, #0] + 80026e2: 69db ldr r3, [r3, #28] + 80026e4: 2204 movs r2, #4 + 80026e6: 4013 ands r3, r2 + 80026e8: 2b04 cmp r3, #4 + 80026ea: d103 bne.n 80026f4 __HAL_UART_CLEAR_FLAG(&huart1, UART_FLAG_NE); - 80026c4: 4b03 ldr r3, [pc, #12] ; (80026d4 ) - 80026c6: 681b ldr r3, [r3, #0] - 80026c8: 2204 movs r2, #4 - 80026ca: 621a str r2, [r3, #32] + 80026ec: 4b03 ldr r3, [pc, #12] ; (80026fc ) + 80026ee: 681b ldr r3, [r3, #0] + 80026f0: 2204 movs r2, #4 + 80026f2: 621a str r2, [r3, #32] } - 80026cc: 46c0 nop ; (mov r8, r8) - 80026ce: 46bd mov sp, r7 - 80026d0: bd80 pop {r7, pc} - 80026d2: 46c0 nop ; (mov r8, r8) - 80026d4: 20000104 .word 0x20000104 + 80026f4: 46c0 nop ; (mov r8, r8) + 80026f6: 46bd mov sp, r7 + 80026f8: bd80 pop {r7, pc} + 80026fa: 46c0 nop ; (mov r8, r8) + 80026fc: 2000010c .word 0x2000010c -080026d8 : +08002700 : /* USER CODE END 1 */ void strtOut(uint16_t n) { - 80026d8: b590 push {r4, r7, lr} - 80026da: b085 sub sp, #20 - 80026dc: af00 add r7, sp, #0 - 80026de: 0002 movs r2, r0 - 80026e0: 1dbb adds r3, r7, #6 - 80026e2: 801a strh r2, [r3, #0] + 8002700: b590 push {r4, r7, lr} + 8002702: b085 sub sp, #20 + 8002704: af00 add r7, sp, #0 + 8002706: 0002 movs r2, r0 + 8002708: 1dbb adds r3, r7, #6 + 800270a: 801a strh r2, [r3, #0] uint16_t crc; if(tx[0]) - 80026e4: 4b1d ldr r3, [pc, #116] ; (800275c ) - 80026e6: 781b ldrb r3, [r3, #0] - 80026e8: 2b00 cmp r3, #0 - 80026ea: d02f beq.n 800274c + 800270c: 4b1d ldr r3, [pc, #116] ; (8002784 ) + 800270e: 781b ldrb r3, [r3, #0] + 8002710: 2b00 cmp r3, #0 + 8002712: d02f beq.n 8002774 { lastbyte = n + 2; //пїЅпїЅпїЅпїЅпїЅпїЅпїЅпїЅпїЅпїЅ пїЅпїЅпїЅпїЅпїЅпїЅпїЅпїЅпїЅпїЅпїЅпїЅ пїЅпїЅпїЅпїЅпїЅпїЅ - 80026ec: 1dbb adds r3, r7, #6 - 80026ee: 881b ldrh r3, [r3, #0] - 80026f0: 3302 adds r3, #2 - 80026f2: b29a uxth r2, r3 - 80026f4: 4b1a ldr r3, [pc, #104] ; (8002760 ) - 80026f6: 801a strh r2, [r3, #0] + 8002714: 1dbb adds r3, r7, #6 + 8002716: 881b ldrh r3, [r3, #0] + 8002718: 3302 adds r3, #2 + 800271a: b29a uxth r2, r3 + 800271c: 4b1a ldr r3, [pc, #104] ; (8002788 ) + 800271e: 801a strh r2, [r3, #0] crc = Crc16_TX(n); //пїЅпїЅпїЅпїЅпїЅпїЅпїЅпїЅпїЅпїЅ CRC16 - 80026f8: 230e movs r3, #14 - 80026fa: 18fc adds r4, r7, r3 - 80026fc: 1dbb adds r3, r7, #6 - 80026fe: 881b ldrh r3, [r3, #0] - 8002700: 0018 movs r0, r3 - 8002702: f000 f875 bl 80027f0 - 8002706: 0003 movs r3, r0 - 8002708: 8023 strh r3, [r4, #0] + 8002720: 230e movs r3, #14 + 8002722: 18fc adds r4, r7, r3 + 8002724: 1dbb adds r3, r7, #6 + 8002726: 881b ldrh r3, [r3, #0] + 8002728: 0018 movs r0, r3 + 800272a: f000 f875 bl 8002818 + 800272e: 0003 movs r3, r0 + 8002730: 8023 strh r3, [r4, #0] tx[n] = lo(crc); //пїЅпїЅпїЅпїЅпїЅпїЅ CRC16 - 800270a: 1dbb adds r3, r7, #6 - 800270c: 881b ldrh r3, [r3, #0] - 800270e: 220e movs r2, #14 - 8002710: 18ba adds r2, r7, r2 - 8002712: 8812 ldrh r2, [r2, #0] - 8002714: b2d1 uxtb r1, r2 - 8002716: 4a11 ldr r2, [pc, #68] ; (800275c ) - 8002718: 54d1 strb r1, [r2, r3] + 8002732: 1dbb adds r3, r7, #6 + 8002734: 881b ldrh r3, [r3, #0] + 8002736: 220e movs r2, #14 + 8002738: 18ba adds r2, r7, r2 + 800273a: 8812 ldrh r2, [r2, #0] + 800273c: b2d1 uxtb r1, r2 + 800273e: 4a11 ldr r2, [pc, #68] ; (8002784 ) + 8002740: 54d1 strb r1, [r2, r3] tx[n + 1] = hi(crc); // пїЅ пїЅпїЅпїЅпїЅпїЅпїЅпїЅпїЅпїЅ 2 пїЅпїЅпїЅпїЅпїЅ - 800271a: 1dbb adds r3, r7, #6 - 800271c: 881b ldrh r3, [r3, #0] - 800271e: 3301 adds r3, #1 - 8002720: 220e movs r2, #14 - 8002722: 18ba adds r2, r7, r2 - 8002724: 8812 ldrh r2, [r2, #0] - 8002726: 0a12 lsrs r2, r2, #8 - 8002728: b292 uxth r2, r2 - 800272a: b2d1 uxtb r1, r2 - 800272c: 4a0b ldr r2, [pc, #44] ; (800275c ) - 800272e: 54d1 strb r1, [r2, r3] + 8002742: 1dbb adds r3, r7, #6 + 8002744: 881b ldrh r3, [r3, #0] + 8002746: 3301 adds r3, #1 + 8002748: 220e movs r2, #14 + 800274a: 18ba adds r2, r7, r2 + 800274c: 8812 ldrh r2, [r2, #0] + 800274e: 0a12 lsrs r2, r2, #8 + 8002750: b292 uxth r2, r2 + 8002752: b2d1 uxtb r1, r2 + 8002754: 4a0b ldr r2, [pc, #44] ; (8002784 ) + 8002756: 54d1 strb r1, [r2, r3] HAL_GPIO_WritePin(RE_GPIO_Port, RE_Pin, GPIO_PIN_SET); //пїЅпїЅпїЅпїЅпїЅпїЅпїЅпїЅпїЅпїЅпїЅ RS485 пїЅпїЅ пїЅпїЅпїЅпїЅпїЅпїЅпїЅпїЅ - 8002730: 2380 movs r3, #128 ; 0x80 - 8002732: 0059 lsls r1, r3, #1 - 8002734: 23a0 movs r3, #160 ; 0xa0 - 8002736: 05db lsls r3, r3, #23 - 8002738: 2201 movs r2, #1 - 800273a: 0018 movs r0, r3 - 800273c: f002 f9e7 bl 8004b0e + 8002758: 2380 movs r3, #128 ; 0x80 + 800275a: 0059 lsls r1, r3, #1 + 800275c: 23a0 movs r3, #160 ; 0xa0 + 800275e: 05db lsls r3, r3, #23 + 8002760: 2201 movs r2, #1 + 8002762: 0018 movs r0, r3 + 8002764: f002 f9f1 bl 8004b4a ioa = 1; - 8002740: 4b08 ldr r3, [pc, #32] ; (8002764 ) - 8002742: 2201 movs r2, #1 - 8002744: 701a strb r2, [r3, #0] + 8002768: 4b08 ldr r3, [pc, #32] ; (800278c ) + 800276a: 2201 movs r2, #1 + 800276c: 701a strb r2, [r3, #0] sendreq = true; - 8002746: 4b08 ldr r3, [pc, #32] ; (8002768 ) - 8002748: 2201 movs r2, #1 - 800274a: 701a strb r2, [r3, #0] + 800276e: 4b08 ldr r3, [pc, #32] ; (8002790 ) + 8002770: 2201 movs r2, #1 + 8002772: 701a strb r2, [r3, #0] } iolen = 0; - 800274c: 4b07 ldr r3, [pc, #28] ; (800276c ) - 800274e: 2200 movs r2, #0 - 8002750: 701a strb r2, [r3, #0] + 8002774: 4b07 ldr r3, [pc, #28] ; (8002794 ) + 8002776: 2200 movs r2, #0 + 8002778: 701a strb r2, [r3, #0] } - 8002752: 46c0 nop ; (mov r8, r8) - 8002754: 46bd mov sp, r7 - 8002756: b005 add sp, #20 - 8002758: bd90 pop {r4, r7, pc} - 800275a: 46c0 nop ; (mov r8, r8) - 800275c: 20000188 .word 0x20000188 - 8002760: 2000028a .word 0x2000028a - 8002764: 20000100 .word 0x20000100 - 8002768: 20000036 .word 0x20000036 - 800276c: 20000035 .word 0x20000035 + 800277a: 46c0 nop ; (mov r8, r8) + 800277c: 46bd mov sp, r7 + 800277e: b005 add sp, #20 + 8002780: bd90 pop {r4, r7, pc} + 8002782: 46c0 nop ; (mov r8, r8) + 8002784: 20000190 .word 0x20000190 + 8002788: 20000292 .word 0x20000292 + 800278c: 20000108 .word 0x20000108 + 8002790: 2000003e .word 0x2000003e + 8002794: 2000003d .word 0x2000003d -08002770 : +08002798 : uint16_t Crc16(uint16_t len) { - 8002770: b580 push {r7, lr} - 8002772: b084 sub sp, #16 - 8002774: af00 add r7, sp, #0 - 8002776: 0002 movs r2, r0 - 8002778: 1dbb adds r3, r7, #6 - 800277a: 801a strh r2, [r3, #0] + 8002798: b580 push {r7, lr} + 800279a: b084 sub sp, #16 + 800279c: af00 add r7, sp, #0 + 800279e: 0002 movs r2, r0 + 80027a0: 1dbb adds r3, r7, #6 + 80027a2: 801a strh r2, [r3, #0] uint16_t i; uint16_t crc = 0xFFFF; - 800277c: 230c movs r3, #12 - 800277e: 18fb adds r3, r7, r3 - 8002780: 2201 movs r2, #1 - 8002782: 4252 negs r2, r2 - 8002784: 801a strh r2, [r3, #0] + 80027a4: 230c movs r3, #12 + 80027a6: 18fb adds r3, r7, r3 + 80027a8: 2201 movs r2, #1 + 80027aa: 4252 negs r2, r2 + 80027ac: 801a strh r2, [r3, #0] for(i = 0; i < len; i++) { - 8002786: 230e movs r3, #14 - 8002788: 18fb adds r3, r7, r3 - 800278a: 2200 movs r2, #0 - 800278c: 801a strh r2, [r3, #0] - 800278e: e01d b.n 80027cc + 80027ae: 230e movs r3, #14 + 80027b0: 18fb adds r3, r7, r3 + 80027b2: 2200 movs r2, #0 + 80027b4: 801a strh r2, [r3, #0] + 80027b6: e01d b.n 80027f4 crc = (crc >> 8) ^ Crc16Table[(crc & 0xFF) ^ iobuf[i]]; - 8002790: 230c movs r3, #12 - 8002792: 18fb adds r3, r7, r3 - 8002794: 881b ldrh r3, [r3, #0] - 8002796: 0a1b lsrs r3, r3, #8 - 8002798: b299 uxth r1, r3 - 800279a: 230c movs r3, #12 - 800279c: 18fb adds r3, r7, r3 - 800279e: 881b ldrh r3, [r3, #0] - 80027a0: 22ff movs r2, #255 ; 0xff - 80027a2: 4013 ands r3, r2 - 80027a4: 220e movs r2, #14 - 80027a6: 18ba adds r2, r7, r2 - 80027a8: 8812 ldrh r2, [r2, #0] - 80027aa: 480f ldr r0, [pc, #60] ; (80027e8 ) - 80027ac: 5c82 ldrb r2, [r0, r2] - 80027ae: 405a eors r2, r3 - 80027b0: 4b0e ldr r3, [pc, #56] ; (80027ec ) - 80027b2: 0052 lsls r2, r2, #1 - 80027b4: 5ad2 ldrh r2, [r2, r3] - 80027b6: 230c movs r3, #12 - 80027b8: 18fb adds r3, r7, r3 - 80027ba: 404a eors r2, r1 - 80027bc: 801a strh r2, [r3, #0] + 80027b8: 230c movs r3, #12 + 80027ba: 18fb adds r3, r7, r3 + 80027bc: 881b ldrh r3, [r3, #0] + 80027be: 0a1b lsrs r3, r3, #8 + 80027c0: b299 uxth r1, r3 + 80027c2: 230c movs r3, #12 + 80027c4: 18fb adds r3, r7, r3 + 80027c6: 881b ldrh r3, [r3, #0] + 80027c8: 22ff movs r2, #255 ; 0xff + 80027ca: 4013 ands r3, r2 + 80027cc: 220e movs r2, #14 + 80027ce: 18ba adds r2, r7, r2 + 80027d0: 8812 ldrh r2, [r2, #0] + 80027d2: 480f ldr r0, [pc, #60] ; (8002810 ) + 80027d4: 5c82 ldrb r2, [r0, r2] + 80027d6: 405a eors r2, r3 + 80027d8: 4b0e ldr r3, [pc, #56] ; (8002814 ) + 80027da: 0052 lsls r2, r2, #1 + 80027dc: 5ad2 ldrh r2, [r2, r3] + 80027de: 230c movs r3, #12 + 80027e0: 18fb adds r3, r7, r3 + 80027e2: 404a eors r2, r1 + 80027e4: 801a strh r2, [r3, #0] for(i = 0; i < len; i++) { - 80027be: 230e movs r3, #14 - 80027c0: 18fb adds r3, r7, r3 - 80027c2: 881a ldrh r2, [r3, #0] - 80027c4: 230e movs r3, #14 - 80027c6: 18fb adds r3, r7, r3 - 80027c8: 3201 adds r2, #1 - 80027ca: 801a strh r2, [r3, #0] - 80027cc: 230e movs r3, #14 - 80027ce: 18fa adds r2, r7, r3 - 80027d0: 1dbb adds r3, r7, #6 - 80027d2: 8812 ldrh r2, [r2, #0] - 80027d4: 881b ldrh r3, [r3, #0] - 80027d6: 429a cmp r2, r3 - 80027d8: d3da bcc.n 8002790 + 80027e6: 230e movs r3, #14 + 80027e8: 18fb adds r3, r7, r3 + 80027ea: 881a ldrh r2, [r3, #0] + 80027ec: 230e movs r3, #14 + 80027ee: 18fb adds r3, r7, r3 + 80027f0: 3201 adds r2, #1 + 80027f2: 801a strh r2, [r3, #0] + 80027f4: 230e movs r3, #14 + 80027f6: 18fa adds r2, r7, r3 + 80027f8: 1dbb adds r3, r7, #6 + 80027fa: 8812 ldrh r2, [r2, #0] + 80027fc: 881b ldrh r3, [r3, #0] + 80027fe: 429a cmp r2, r3 + 8002800: d3da bcc.n 80027b8 } return crc; - 80027da: 230c movs r3, #12 - 80027dc: 18fb adds r3, r7, r3 - 80027de: 881b ldrh r3, [r3, #0] + 8002802: 230c movs r3, #12 + 8002804: 18fb adds r3, r7, r3 + 8002806: 881b ldrh r3, [r3, #0] } - 80027e0: 0018 movs r0, r3 - 80027e2: 46bd mov sp, r7 - 80027e4: b004 add sp, #16 - 80027e6: bd80 pop {r7, pc} - 80027e8: 2000028c .word 0x2000028c - 80027ec: 080071f4 .word 0x080071f4 + 8002808: 0018 movs r0, r3 + 800280a: 46bd mov sp, r7 + 800280c: b004 add sp, #16 + 800280e: bd80 pop {r7, pc} + 8002810: 20000294 .word 0x20000294 + 8002814: 08007230 .word 0x08007230 -080027f0 : +08002818 : uint16_t Crc16_TX(uint16_t len) { - 80027f0: b580 push {r7, lr} - 80027f2: b084 sub sp, #16 - 80027f4: af00 add r7, sp, #0 - 80027f6: 0002 movs r2, r0 - 80027f8: 1dbb adds r3, r7, #6 - 80027fa: 801a strh r2, [r3, #0] + 8002818: b580 push {r7, lr} + 800281a: b084 sub sp, #16 + 800281c: af00 add r7, sp, #0 + 800281e: 0002 movs r2, r0 + 8002820: 1dbb adds r3, r7, #6 + 8002822: 801a strh r2, [r3, #0] uint16_t i; uint16_t crc = 0xFFFF; - 80027fc: 230c movs r3, #12 - 80027fe: 18fb adds r3, r7, r3 - 8002800: 2201 movs r2, #1 - 8002802: 4252 negs r2, r2 - 8002804: 801a strh r2, [r3, #0] + 8002824: 230c movs r3, #12 + 8002826: 18fb adds r3, r7, r3 + 8002828: 2201 movs r2, #1 + 800282a: 4252 negs r2, r2 + 800282c: 801a strh r2, [r3, #0] for(i = 0; i < len; i++) { - 8002806: 230e movs r3, #14 - 8002808: 18fb adds r3, r7, r3 - 800280a: 2200 movs r2, #0 - 800280c: 801a strh r2, [r3, #0] - 800280e: e01d b.n 800284c + 800282e: 230e movs r3, #14 + 8002830: 18fb adds r3, r7, r3 + 8002832: 2200 movs r2, #0 + 8002834: 801a strh r2, [r3, #0] + 8002836: e01d b.n 8002874 crc = (crc >> 8) ^ Crc16Table[(crc & 0xFF) ^ tx[i]]; - 8002810: 230c movs r3, #12 - 8002812: 18fb adds r3, r7, r3 - 8002814: 881b ldrh r3, [r3, #0] - 8002816: 0a1b lsrs r3, r3, #8 - 8002818: b299 uxth r1, r3 - 800281a: 230c movs r3, #12 - 800281c: 18fb adds r3, r7, r3 - 800281e: 881b ldrh r3, [r3, #0] - 8002820: 22ff movs r2, #255 ; 0xff - 8002822: 4013 ands r3, r2 - 8002824: 220e movs r2, #14 - 8002826: 18ba adds r2, r7, r2 - 8002828: 8812 ldrh r2, [r2, #0] - 800282a: 480f ldr r0, [pc, #60] ; (8002868 ) - 800282c: 5c82 ldrb r2, [r0, r2] - 800282e: 405a eors r2, r3 - 8002830: 4b0e ldr r3, [pc, #56] ; (800286c ) - 8002832: 0052 lsls r2, r2, #1 - 8002834: 5ad2 ldrh r2, [r2, r3] - 8002836: 230c movs r3, #12 - 8002838: 18fb adds r3, r7, r3 - 800283a: 404a eors r2, r1 - 800283c: 801a strh r2, [r3, #0] + 8002838: 230c movs r3, #12 + 800283a: 18fb adds r3, r7, r3 + 800283c: 881b ldrh r3, [r3, #0] + 800283e: 0a1b lsrs r3, r3, #8 + 8002840: b299 uxth r1, r3 + 8002842: 230c movs r3, #12 + 8002844: 18fb adds r3, r7, r3 + 8002846: 881b ldrh r3, [r3, #0] + 8002848: 22ff movs r2, #255 ; 0xff + 800284a: 4013 ands r3, r2 + 800284c: 220e movs r2, #14 + 800284e: 18ba adds r2, r7, r2 + 8002850: 8812 ldrh r2, [r2, #0] + 8002852: 480f ldr r0, [pc, #60] ; (8002890 ) + 8002854: 5c82 ldrb r2, [r0, r2] + 8002856: 405a eors r2, r3 + 8002858: 4b0e ldr r3, [pc, #56] ; (8002894 ) + 800285a: 0052 lsls r2, r2, #1 + 800285c: 5ad2 ldrh r2, [r2, r3] + 800285e: 230c movs r3, #12 + 8002860: 18fb adds r3, r7, r3 + 8002862: 404a eors r2, r1 + 8002864: 801a strh r2, [r3, #0] for(i = 0; i < len; i++) { - 800283e: 230e movs r3, #14 - 8002840: 18fb adds r3, r7, r3 - 8002842: 881a ldrh r2, [r3, #0] - 8002844: 230e movs r3, #14 - 8002846: 18fb adds r3, r7, r3 - 8002848: 3201 adds r2, #1 - 800284a: 801a strh r2, [r3, #0] - 800284c: 230e movs r3, #14 - 800284e: 18fa adds r2, r7, r3 - 8002850: 1dbb adds r3, r7, #6 - 8002852: 8812 ldrh r2, [r2, #0] - 8002854: 881b ldrh r3, [r3, #0] - 8002856: 429a cmp r2, r3 - 8002858: d3da bcc.n 8002810 + 8002866: 230e movs r3, #14 + 8002868: 18fb adds r3, r7, r3 + 800286a: 881a ldrh r2, [r3, #0] + 800286c: 230e movs r3, #14 + 800286e: 18fb adds r3, r7, r3 + 8002870: 3201 adds r2, #1 + 8002872: 801a strh r2, [r3, #0] + 8002874: 230e movs r3, #14 + 8002876: 18fa adds r2, r7, r3 + 8002878: 1dbb adds r3, r7, #6 + 800287a: 8812 ldrh r2, [r2, #0] + 800287c: 881b ldrh r3, [r3, #0] + 800287e: 429a cmp r2, r3 + 8002880: d3da bcc.n 8002838 } return crc; - 800285a: 230c movs r3, #12 - 800285c: 18fb adds r3, r7, r3 - 800285e: 881b ldrh r3, [r3, #0] + 8002882: 230c movs r3, #12 + 8002884: 18fb adds r3, r7, r3 + 8002886: 881b ldrh r3, [r3, #0] } - 8002860: 0018 movs r0, r3 - 8002862: 46bd mov sp, r7 - 8002864: b004 add sp, #16 - 8002866: bd80 pop {r7, pc} - 8002868: 20000188 .word 0x20000188 - 800286c: 080071f4 .word 0x080071f4 + 8002888: 0018 movs r0, r3 + 800288a: 46bd mov sp, r7 + 800288c: b004 add sp, #16 + 800288e: bd80 pop {r7, pc} + 8002890: 20000190 .word 0x20000190 + 8002894: 08007230 .word 0x08007230 -08002870 : +08002898 : void SetBaudRate() { - 8002870: b580 push {r7, lr} - 8002872: af00 add r7, sp, #0 + 8002898: b580 push {r7, lr} + 800289a: af00 add r7, sp, #0 timeout = time35[pardata.BAUD]; - 8002874: 4b0c ldr r3, [pc, #48] ; (80028a8 ) - 8002876: 885b ldrh r3, [r3, #2] - 8002878: b29b uxth r3, r3 - 800287a: 001a movs r2, r3 - 800287c: 4b0b ldr r3, [pc, #44] ; (80028ac ) - 800287e: 0052 lsls r2, r2, #1 - 8002880: 5ad3 ldrh r3, [r2, r3] - 8002882: b2da uxtb r2, r3 - 8002884: 4b0a ldr r3, [pc, #40] ; (80028b0 ) - 8002886: 701a strb r2, [r3, #0] + 800289c: 4b0c ldr r3, [pc, #48] ; (80028d0 ) + 800289e: 885b ldrh r3, [r3, #2] + 80028a0: b29b uxth r3, r3 + 80028a2: 001a movs r2, r3 + 80028a4: 4b0b ldr r3, [pc, #44] ; (80028d4 ) + 80028a6: 0052 lsls r2, r2, #1 + 80028a8: 5ad3 ldrh r3, [r2, r3] + 80028aa: b2da uxtb r2, r3 + 80028ac: 4b0a ldr r3, [pc, #40] ; (80028d8 ) + 80028ae: 701a strb r2, [r3, #0] delayREDE = sendtime[pardata.BAUD]; - 8002888: 4b07 ldr r3, [pc, #28] ; (80028a8 ) - 800288a: 885b ldrh r3, [r3, #2] - 800288c: b29b uxth r3, r3 - 800288e: 001a movs r2, r3 - 8002890: 4b08 ldr r3, [pc, #32] ; (80028b4 ) - 8002892: 0052 lsls r2, r2, #1 - 8002894: 5ad2 ldrh r2, [r2, r3] - 8002896: 4b08 ldr r3, [pc, #32] ; (80028b8 ) - 8002898: 801a strh r2, [r3, #0] + 80028b0: 4b07 ldr r3, [pc, #28] ; (80028d0 ) + 80028b2: 885b ldrh r3, [r3, #2] + 80028b4: b29b uxth r3, r3 + 80028b6: 001a movs r2, r3 + 80028b8: 4b08 ldr r3, [pc, #32] ; (80028dc ) + 80028ba: 0052 lsls r2, r2, #1 + 80028bc: 5ad2 ldrh r2, [r2, r3] + 80028be: 4b08 ldr r3, [pc, #32] ; (80028e0 ) + 80028c0: 801a strh r2, [r3, #0] MX_USART1_UART_DeInit(); - 800289a: f7ff fe4b bl 8002534 + 80028c2: f7ff fe4b bl 800255c MX_USART1_UART_Init(); - 800289e: f7ff fda9 bl 80023f4 + 80028c6: f7ff fda9 bl 800241c } - 80028a2: 46c0 nop ; (mov r8, r8) - 80028a4: 46bd mov sp, r7 - 80028a6: bd80 pop {r7, pc} - 80028a8: 20000098 .word 0x20000098 - 80028ac: 08007408 .word 0x08007408 - 80028b0: 20000288 .word 0x20000288 - 80028b4: 080073f4 .word 0x080073f4 - 80028b8: 20000102 .word 0x20000102 + 80028ca: 46c0 nop ; (mov r8, r8) + 80028cc: 46bd mov sp, r7 + 80028ce: bd80 pop {r7, pc} + 80028d0: 200000a0 .word 0x200000a0 + 80028d4: 08007444 .word 0x08007444 + 80028d8: 20000290 .word 0x20000290 + 80028dc: 08007430 .word 0x08007430 + 80028e0: 2000010a .word 0x2000010a -080028bc : +080028e4 : void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart) { - 80028bc: b5b0 push {r4, r5, r7, lr} - 80028be: b088 sub sp, #32 - 80028c0: af00 add r7, sp, #0 - 80028c2: 6078 str r0, [r7, #4] + 80028e4: b5b0 push {r4, r5, r7, lr} + 80028e6: b088 sub sp, #32 + 80028e8: af00 add r7, sp, #0 + 80028ea: 6078 str r0, [r7, #4] usfloat f; uint8_t tmp, tmp1; uint16_t tmp16; float tmpf; timeout = time35[pardata.BAUD]; - 80028c4: 4bd5 ldr r3, [pc, #852] ; (8002c1c ) - 80028c6: 885b ldrh r3, [r3, #2] - 80028c8: b29b uxth r3, r3 - 80028ca: 001a movs r2, r3 - 80028cc: 4bd4 ldr r3, [pc, #848] ; (8002c20 ) - 80028ce: 0052 lsls r2, r2, #1 - 80028d0: 5ad3 ldrh r3, [r2, r3] - 80028d2: b2da uxtb r2, r3 - 80028d4: 4bd3 ldr r3, [pc, #844] ; (8002c24 ) - 80028d6: 701a strb r2, [r3, #0] + 80028ec: 4bd5 ldr r3, [pc, #852] ; (8002c44 ) + 80028ee: 885b ldrh r3, [r3, #2] + 80028f0: b29b uxth r3, r3 + 80028f2: 001a movs r2, r3 + 80028f4: 4bd4 ldr r3, [pc, #848] ; (8002c48 ) + 80028f6: 0052 lsls r2, r2, #1 + 80028f8: 5ad3 ldrh r3, [r2, r3] + 80028fa: b2da uxtb r2, r3 + 80028fc: 4bd3 ldr r3, [pc, #844] ; (8002c4c ) + 80028fe: 701a strb r2, [r3, #0] iobuf[iolen++] = (uint8_t) (USART1->RDR & 0xFF); - 80028d8: 4bd3 ldr r3, [pc, #844] ; (8002c28 ) - 80028da: 781b ldrb r3, [r3, #0] - 80028dc: 1c5a adds r2, r3, #1 - 80028de: b2d1 uxtb r1, r2 - 80028e0: 4ad1 ldr r2, [pc, #836] ; (8002c28 ) - 80028e2: 7011 strb r1, [r2, #0] - 80028e4: 001a movs r2, r3 - 80028e6: 4bd1 ldr r3, [pc, #836] ; (8002c2c ) - 80028e8: 6a5b ldr r3, [r3, #36] ; 0x24 - 80028ea: b2d9 uxtb r1, r3 - 80028ec: 4bd0 ldr r3, [pc, #832] ; (8002c30 ) - 80028ee: 5499 strb r1, [r3, r2] + 8002900: 4bd3 ldr r3, [pc, #844] ; (8002c50 ) + 8002902: 781b ldrb r3, [r3, #0] + 8002904: 1c5a adds r2, r3, #1 + 8002906: b2d1 uxtb r1, r2 + 8002908: 4ad1 ldr r2, [pc, #836] ; (8002c50 ) + 800290a: 7011 strb r1, [r2, #0] + 800290c: 001a movs r2, r3 + 800290e: 4bd1 ldr r3, [pc, #836] ; (8002c54 ) + 8002910: 6a5b ldr r3, [r3, #36] ; 0x24 + 8002912: b2d9 uxtb r1, r3 + 8002914: 4bd0 ldr r3, [pc, #832] ; (8002c58 ) + 8002916: 5499 strb r1, [r3, r2] if((iobuf[0] == pardata.OWN) || (!iobuf[0])) - 80028f0: 4bcf ldr r3, [pc, #828] ; (8002c30 ) - 80028f2: 781b ldrb r3, [r3, #0] - 80028f4: b29a uxth r2, r3 - 80028f6: 4bc9 ldr r3, [pc, #804] ; (8002c1c ) - 80028f8: 881b ldrh r3, [r3, #0] - 80028fa: b29b uxth r3, r3 - 80028fc: 429a cmp r2, r3 - 80028fe: d005 beq.n 800290c - 8002900: 4bcb ldr r3, [pc, #812] ; (8002c30 ) - 8002902: 781b ldrb r3, [r3, #0] - 8002904: 2b00 cmp r3, #0 - 8002906: d001 beq.n 800290c - 8002908: f001 f9a6 bl 8003c58 + 8002918: 4bcf ldr r3, [pc, #828] ; (8002c58 ) + 800291a: 781b ldrb r3, [r3, #0] + 800291c: b29a uxth r2, r3 + 800291e: 4bc9 ldr r3, [pc, #804] ; (8002c44 ) + 8002920: 881b ldrh r3, [r3, #0] + 8002922: b29b uxth r3, r3 + 8002924: 429a cmp r2, r3 + 8002926: d005 beq.n 8002934 + 8002928: 4bcb ldr r3, [pc, #812] ; (8002c58 ) + 800292a: 781b ldrb r3, [r3, #0] + 800292c: 2b00 cmp r3, #0 + 800292e: d001 beq.n 8002934 + 8002930: f001 f9a6 bl 8003c80 { if(iolen > 1) - 800290c: 4bc6 ldr r3, [pc, #792] ; (8002c28 ) - 800290e: 781b ldrb r3, [r3, #0] - 8002910: 2b01 cmp r3, #1 - 8002912: d801 bhi.n 8002918 - 8002914: f001 f9a0 bl 8003c58 + 8002934: 4bc6 ldr r3, [pc, #792] ; (8002c50 ) + 8002936: 781b ldrb r3, [r3, #0] + 8002938: 2b01 cmp r3, #1 + 800293a: d801 bhi.n 8002940 + 800293c: f001 f9a0 bl 8003c80 { if(iolen == 2) - 8002918: 4bc3 ldr r3, [pc, #780] ; (8002c28 ) - 800291a: 781b ldrb r3, [r3, #0] - 800291c: 2b02 cmp r3, #2 - 800291e: d124 bne.n 800296a + 8002940: 4bc3 ldr r3, [pc, #780] ; (8002c50 ) + 8002942: 781b ldrb r3, [r3, #0] + 8002944: 2b02 cmp r3, #2 + 8002946: d124 bne.n 8002992 { switch(iobuf[1]) - 8002920: 4bc3 ldr r3, [pc, #780] ; (8002c30 ) - 8002922: 785b ldrb r3, [r3, #1] - 8002924: 2b03 cmp r3, #3 - 8002926: d002 beq.n 800292e - 8002928: 2b10 cmp r3, #16 - 800292a: d004 beq.n 8002936 - 800292c: e007 b.n 800293e + 8002948: 4bc3 ldr r3, [pc, #780] ; (8002c58 ) + 800294a: 785b ldrb r3, [r3, #1] + 800294c: 2b03 cmp r3, #3 + 800294e: d002 beq.n 8002956 + 8002950: 2b10 cmp r3, #16 + 8002952: d004 beq.n 800295e + 8002954: e007 b.n 8002966 { case 0x03: lastbyte = 7; - 800292e: 4bc1 ldr r3, [pc, #772] ; (8002c34 ) - 8002930: 2207 movs r2, #7 - 8002932: 801a strh r2, [r3, #0] + 8002956: 4bc1 ldr r3, [pc, #772] ; (8002c5c ) + 8002958: 2207 movs r2, #7 + 800295a: 801a strh r2, [r3, #0] break; - 8002934: e019 b.n 800296a + 800295c: e019 b.n 8002992 case 0x10: lastbyte = 6; - 8002936: 4bbf ldr r3, [pc, #764] ; (8002c34 ) - 8002938: 2206 movs r2, #6 - 800293a: 801a strh r2, [r3, #0] + 800295e: 4bbf ldr r3, [pc, #764] ; (8002c5c ) + 8002960: 2206 movs r2, #6 + 8002962: 801a strh r2, [r3, #0] break; - 800293c: e015 b.n 800296a + 8002964: e015 b.n 8002992 default: lastbyte = 3; - 800293e: 4bbd ldr r3, [pc, #756] ; (8002c34 ) - 8002940: 2203 movs r2, #3 - 8002942: 801a strh r2, [r3, #0] + 8002966: 4bbd ldr r3, [pc, #756] ; (8002c5c ) + 8002968: 2203 movs r2, #3 + 800296a: 801a strh r2, [r3, #0] tx[0] = iobuf[0]; - 8002944: 4bba ldr r3, [pc, #744] ; (8002c30 ) - 8002946: 781a ldrb r2, [r3, #0] - 8002948: 4bbb ldr r3, [pc, #748] ; (8002c38 ) - 800294a: 701a strb r2, [r3, #0] + 800296c: 4bba ldr r3, [pc, #744] ; (8002c58 ) + 800296e: 781a ldrb r2, [r3, #0] + 8002970: 4bbb ldr r3, [pc, #748] ; (8002c60 ) + 8002972: 701a strb r2, [r3, #0] tx[1] = (iobuf[1] | 0x80); - 800294c: 4bb8 ldr r3, [pc, #736] ; (8002c30 ) - 800294e: 785b ldrb r3, [r3, #1] - 8002950: 2280 movs r2, #128 ; 0x80 - 8002952: 4252 negs r2, r2 - 8002954: 4313 orrs r3, r2 - 8002956: b2da uxtb r2, r3 - 8002958: 4bb7 ldr r3, [pc, #732] ; (8002c38 ) - 800295a: 705a strb r2, [r3, #1] + 8002974: 4bb8 ldr r3, [pc, #736] ; (8002c58 ) + 8002976: 785b ldrb r3, [r3, #1] + 8002978: 2280 movs r2, #128 ; 0x80 + 800297a: 4252 negs r2, r2 + 800297c: 4313 orrs r3, r2 + 800297e: b2da uxtb r2, r3 + 8002980: 4bb7 ldr r3, [pc, #732] ; (8002c60 ) + 8002982: 705a strb r2, [r3, #1] tx[2] = 0x03; - 800295c: 4bb6 ldr r3, [pc, #728] ; (8002c38 ) - 800295e: 2203 movs r2, #3 - 8002960: 709a strb r2, [r3, #2] + 8002984: 4bb6 ldr r3, [pc, #728] ; (8002c60 ) + 8002986: 2203 movs r2, #3 + 8002988: 709a strb r2, [r3, #2] strtOut(3); - 8002962: 2003 movs r0, #3 - 8002964: f7ff feb8 bl 80026d8 + 800298a: 2003 movs r0, #3 + 800298c: f7ff feb8 bl 8002700 break; - 8002968: 46c0 nop ; (mov r8, r8) + 8002990: 46c0 nop ; (mov r8, r8) } } if(iolen > lastbyte) - 800296a: 4baf ldr r3, [pc, #700] ; (8002c28 ) - 800296c: 781b ldrb r3, [r3, #0] - 800296e: b29a uxth r2, r3 - 8002970: 4bb0 ldr r3, [pc, #704] ; (8002c34 ) - 8002972: 881b ldrh r3, [r3, #0] - 8002974: 429a cmp r2, r3 - 8002976: d801 bhi.n 800297c - 8002978: f001 f96e bl 8003c58 + 8002992: 4baf ldr r3, [pc, #700] ; (8002c50 ) + 8002994: 781b ldrb r3, [r3, #0] + 8002996: b29a uxth r2, r3 + 8002998: 4bb0 ldr r3, [pc, #704] ; (8002c5c ) + 800299a: 881b ldrh r3, [r3, #0] + 800299c: 429a cmp r2, r3 + 800299e: d801 bhi.n 80029a4 + 80029a0: f001 f96e bl 8003c80 { switch(iobuf[1]) - 800297c: 4bac ldr r3, [pc, #688] ; (8002c30 ) - 800297e: 785b ldrb r3, [r3, #1] - 8002980: 2b03 cmp r3, #3 - 8002982: d004 beq.n 800298e - 8002984: 2b10 cmp r3, #16 - 8002986: d100 bne.n 800298a - 8002988: e267 b.n 8002e5a + 80029a4: 4bac ldr r3, [pc, #688] ; (8002c58 ) + 80029a6: 785b ldrb r3, [r3, #1] + 80029a8: 2b03 cmp r3, #3 + 80029aa: d004 beq.n 80029b6 + 80029ac: 2b10 cmp r3, #16 + 80029ae: d100 bne.n 80029b2 + 80029b0: e267 b.n 8002e82 } } } //iolen++; } - 800298a: f001 f965 bl 8003c58 + 80029b2: f001 f965 bl 8003c80 iolen = 0; - 800298e: 4ba6 ldr r3, [pc, #664] ; (8002c28 ) - 8002990: 2200 movs r2, #0 - 8002992: 701a strb r2, [r3, #0] + 80029b6: 4ba6 ldr r3, [pc, #664] ; (8002c50 ) + 80029b8: 2200 movs r2, #0 + 80029ba: 701a strb r2, [r3, #0] crc.ch[0] = iobuf[6]; - 8002994: 4ba6 ldr r3, [pc, #664] ; (8002c30 ) - 8002996: 799a ldrb r2, [r3, #6] - 8002998: 2314 movs r3, #20 - 800299a: 18fb adds r3, r7, r3 - 800299c: 701a strb r2, [r3, #0] + 80029bc: 4ba6 ldr r3, [pc, #664] ; (8002c58 ) + 80029be: 799a ldrb r2, [r3, #6] + 80029c0: 2314 movs r3, #20 + 80029c2: 18fb adds r3, r7, r3 + 80029c4: 701a strb r2, [r3, #0] crc.ch[1] = iobuf[7]; - 800299e: 4ba4 ldr r3, [pc, #656] ; (8002c30 ) - 80029a0: 79da ldrb r2, [r3, #7] - 80029a2: 2314 movs r3, #20 - 80029a4: 18fb adds r3, r7, r3 - 80029a6: 705a strb r2, [r3, #1] + 80029c6: 4ba4 ldr r3, [pc, #656] ; (8002c58 ) + 80029c8: 79da ldrb r2, [r3, #7] + 80029ca: 2314 movs r3, #20 + 80029cc: 18fb adds r3, r7, r3 + 80029ce: 705a strb r2, [r3, #1] if(crc.sh == Crc16(6)) // ïðè êîððåêòíîì çíà÷åíèè CRC - 80029a8: 2314 movs r3, #20 - 80029aa: 18fb adds r3, r7, r3 - 80029ac: 881c ldrh r4, [r3, #0] - 80029ae: 2006 movs r0, #6 - 80029b0: f7ff fede bl 8002770 - 80029b4: 0003 movs r3, r0 - 80029b6: 429c cmp r4, r3 - 80029b8: d001 beq.n 80029be - 80029ba: f001 f94c bl 8003c56 + 80029d0: 2314 movs r3, #20 + 80029d2: 18fb adds r3, r7, r3 + 80029d4: 881c ldrh r4, [r3, #0] + 80029d6: 2006 movs r0, #6 + 80029d8: f7ff fede bl 8002798 + 80029dc: 0003 movs r3, r0 + 80029de: 429c cmp r4, r3 + 80029e0: d001 beq.n 80029e6 + 80029e2: f001 f94c bl 8003c7e addr.ch[1] = iobuf[2]; //Г±ГІ áàéò àäðåñà ðåãèñòðà - 80029be: 4b9c ldr r3, [pc, #624] ; (8002c30 ) - 80029c0: 789a ldrb r2, [r3, #2] - 80029c2: 2310 movs r3, #16 - 80029c4: 18fb adds r3, r7, r3 - 80029c6: 705a strb r2, [r3, #1] + 80029e6: 4b9c ldr r3, [pc, #624] ; (8002c58 ) + 80029e8: 789a ldrb r2, [r3, #2] + 80029ea: 2310 movs r3, #16 + 80029ec: 18fb adds r3, r7, r3 + 80029ee: 705a strb r2, [r3, #1] addr.ch[0] = iobuf[3]; // ìë áàéò àäðåñà ðåãèñòðà - 80029c8: 4b99 ldr r3, [pc, #612] ; (8002c30 ) - 80029ca: 78da ldrb r2, [r3, #3] - 80029cc: 2310 movs r3, #16 - 80029ce: 18fb adds r3, r7, r3 - 80029d0: 701a strb r2, [r3, #0] - regs.ch[1] = iobuf[4]; // Г±ГІ áàéò êîë-ГўГ  ðåãèñòðîâ (ñëîâ) - 80029d2: 4b97 ldr r3, [pc, #604] ; (8002c30 ) - 80029d4: 791a ldrb r2, [r3, #4] - 80029d6: 230c movs r3, #12 - 80029d8: 18fb adds r3, r7, r3 - 80029da: 705a strb r2, [r3, #1] - regs.ch[0] = iobuf[5]; // ìë áàéò êîë-ГўГ® ðåãèñòðîâ (ñëîâ) - 80029dc: 4b94 ldr r3, [pc, #592] ; (8002c30 ) - 80029de: 795a ldrb r2, [r3, #5] - 80029e0: 230c movs r3, #12 - 80029e2: 18fb adds r3, r7, r3 - 80029e4: 701a strb r2, [r3, #0] - if(addr.sh == 1000) // Г—ГІГҐГ­ГЁГҐ áàéòà ÏÅÐÅÃÐÓÇÊÈ - 80029e6: 2310 movs r3, #16 - 80029e8: 18fb adds r3, r7, r3 - 80029ea: 881a ldrh r2, [r3, #0] - 80029ec: 23fa movs r3, #250 ; 0xfa - 80029ee: 009b lsls r3, r3, #2 - 80029f0: 429a cmp r2, r3 - 80029f2: d142 bne.n 8002a7a - if(regs.ch[0] != 1) // åñëè çàïðîøåí Г­ГҐ ÎÄÈÍ ðåãèñòð - 80029f4: 230c movs r3, #12 + 80029f0: 4b99 ldr r3, [pc, #612] ; (8002c58 ) + 80029f2: 78da ldrb r2, [r3, #3] + 80029f4: 2310 movs r3, #16 80029f6: 18fb adds r3, r7, r3 - 80029f8: 781b ldrb r3, [r3, #0] - 80029fa: 2b01 cmp r3, #1 - 80029fc: d013 beq.n 8002a26 + 80029f8: 701a strb r2, [r3, #0] + regs.ch[1] = iobuf[4]; // Г±ГІ áàéò êîë-ГўГ  ðåãèñòðîâ (ñëîâ) + 80029fa: 4b97 ldr r3, [pc, #604] ; (8002c58 ) + 80029fc: 791a ldrb r2, [r3, #4] + 80029fe: 230c movs r3, #12 + 8002a00: 18fb adds r3, r7, r3 + 8002a02: 705a strb r2, [r3, #1] + regs.ch[0] = iobuf[5]; // ìë áàéò êîë-ГўГ® ðåãèñòðîâ (ñëîâ) + 8002a04: 4b94 ldr r3, [pc, #592] ; (8002c58 ) + 8002a06: 795a ldrb r2, [r3, #5] + 8002a08: 230c movs r3, #12 + 8002a0a: 18fb adds r3, r7, r3 + 8002a0c: 701a strb r2, [r3, #0] + if(addr.sh == 1000) // Г—ГІГҐГ­ГЁГҐ áàéòà ÏÅÐÅÃÐÓÇÊÈ + 8002a0e: 2310 movs r3, #16 + 8002a10: 18fb adds r3, r7, r3 + 8002a12: 881a ldrh r2, [r3, #0] + 8002a14: 23fa movs r3, #250 ; 0xfa + 8002a16: 009b lsls r3, r3, #2 + 8002a18: 429a cmp r2, r3 + 8002a1a: d142 bne.n 8002aa2 + if(regs.ch[0] != 1) // åñëè çàïðîøåí Г­ГҐ ÎÄÈÍ ðåãèñòð + 8002a1c: 230c movs r3, #12 + 8002a1e: 18fb adds r3, r7, r3 + 8002a20: 781b ldrb r3, [r3, #0] + 8002a22: 2b01 cmp r3, #1 + 8002a24: d013 beq.n 8002a4e tx[0] = iobuf[0]; - 80029fe: 4b8c ldr r3, [pc, #560] ; (8002c30 ) - 8002a00: 781a ldrb r2, [r3, #0] - 8002a02: 4b8d ldr r3, [pc, #564] ; (8002c38 ) - 8002a04: 701a strb r2, [r3, #0] - tx[1] = (iobuf[1] | 0x80); - 8002a06: 4b8a ldr r3, [pc, #552] ; (8002c30 ) - 8002a08: 785b ldrb r3, [r3, #1] - 8002a0a: 2280 movs r2, #128 ; 0x80 - 8002a0c: 4252 negs r2, r2 - 8002a0e: 4313 orrs r3, r2 - 8002a10: b2da uxtb r2, r3 - 8002a12: 4b89 ldr r3, [pc, #548] ; (8002c38 ) - 8002a14: 705a strb r2, [r3, #1] - tx[2] = 0x03; - 8002a16: 4b88 ldr r3, [pc, #544] ; (8002c38 ) - 8002a18: 2203 movs r2, #3 - 8002a1a: 709a strb r2, [r3, #2] - strtOut(3); - 8002a1c: 2003 movs r0, #3 - 8002a1e: f7ff fe5b bl 80026d8 - break; - 8002a22: f001 f918 bl 8003c56 - tx[0] = iobuf[0]; - 8002a26: 4b82 ldr r3, [pc, #520] ; (8002c30 ) + 8002a26: 4b8c ldr r3, [pc, #560] ; (8002c58 ) 8002a28: 781a ldrb r2, [r3, #0] - 8002a2a: 4b83 ldr r3, [pc, #524] ; (8002c38 ) + 8002a2a: 4b8d ldr r3, [pc, #564] ; (8002c60 ) 8002a2c: 701a strb r2, [r3, #0] - tx[1] = iobuf[1]; - 8002a2e: 4b80 ldr r3, [pc, #512] ; (8002c30 ) - 8002a30: 785a ldrb r2, [r3, #1] - 8002a32: 4b81 ldr r3, [pc, #516] ; (8002c38 ) - 8002a34: 705a strb r2, [r3, #1] - tx[2] = regs.ch[0] << 1; // êîë-ГўГ® áàéò - 8002a36: 230c movs r3, #12 - 8002a38: 18fb adds r3, r7, r3 - 8002a3a: 781b ldrb r3, [r3, #0] - 8002a3c: 18db adds r3, r3, r3 - 8002a3e: b2da uxtb r2, r3 - 8002a40: 4b7d ldr r3, [pc, #500] ; (8002c38 ) - 8002a42: 709a strb r2, [r3, #2] - tx[3] = 0; - 8002a44: 4b7c ldr r3, [pc, #496] ; (8002c38 ) - 8002a46: 2200 movs r2, #0 - 8002a48: 70da strb r2, [r3, #3] - tx[4] = lo(AMP_STATUS); - 8002a4a: 4b7c ldr r3, [pc, #496] ; (8002c3c ) - 8002a4c: 881b ldrh r3, [r3, #0] - 8002a4e: b29b uxth r3, r3 - 8002a50: b2da uxtb r2, r3 - 8002a52: 4b79 ldr r3, [pc, #484] ; (8002c38 ) - 8002a54: 711a strb r2, [r3, #4] - tx[5] = hi(AMP_STATUS); - 8002a56: 4b79 ldr r3, [pc, #484] ; (8002c3c ) - 8002a58: 881b ldrh r3, [r3, #0] - 8002a5a: b29b uxth r3, r3 - 8002a5c: 0a1b lsrs r3, r3, #8 - 8002a5e: b29b uxth r3, r3 - 8002a60: b2da uxtb r2, r3 - 8002a62: 4b75 ldr r3, [pc, #468] ; (8002c38 ) - 8002a64: 715a strb r2, [r3, #5] - strtOut(3 + tx[2]); - 8002a66: 4b74 ldr r3, [pc, #464] ; (8002c38 ) - 8002a68: 789b ldrb r3, [r3, #2] - 8002a6a: b29b uxth r3, r3 - 8002a6c: 3303 adds r3, #3 - 8002a6e: b29b uxth r3, r3 - 8002a70: 0018 movs r0, r3 - 8002a72: f7ff fe31 bl 80026d8 - break; - 8002a76: f001 f8ee bl 8003c56 - switch(addr.sh) - 8002a7a: 2310 movs r3, #16 - 8002a7c: 18fb adds r3, r7, r3 - 8002a7e: 881b ldrh r3, [r3, #0] - 8002a80: 4a6f ldr r2, [pc, #444] ; (8002c40 ) - 8002a82: 4293 cmp r3, r2 - 8002a84: d100 bne.n 8002a88 - 8002a86: e111 b.n 8002cac - 8002a88: 4a6d ldr r2, [pc, #436] ; (8002c40 ) - 8002a8a: 4293 cmp r3, r2 - 8002a8c: dc0b bgt.n 8002aa6 - 8002a8e: 4a6d ldr r2, [pc, #436] ; (8002c44 ) - 8002a90: 4293 cmp r3, r2 - 8002a92: da00 bge.n 8002a96 - 8002a94: e1cc b.n 8002e30 - 8002a96: 4a6c ldr r2, [pc, #432] ; (8002c48 ) - 8002a98: 4293 cmp r3, r2 - 8002a9a: dd19 ble.n 8002ad0 - 8002a9c: 4a6b ldr r2, [pc, #428] ; (8002c4c ) - 8002a9e: 4293 cmp r3, r2 - 8002aa0: d100 bne.n 8002aa4 - 8002aa2: e07a b.n 8002b9a - 8002aa4: e1c4 b.n 8002e30 - 8002aa6: 4a6a ldr r2, [pc, #424] ; (8002c50 ) - 8002aa8: 4293 cmp r3, r2 - 8002aaa: d100 bne.n 8002aae - 8002aac: e075 b.n 8002b9a - 8002aae: 4a68 ldr r2, [pc, #416] ; (8002c50 ) - 8002ab0: 4293 cmp r3, r2 - 8002ab2: dc04 bgt.n 8002abe - 8002ab4: 4a67 ldr r2, [pc, #412] ; (8002c54 ) - 8002ab6: 4293 cmp r3, r2 - 8002ab8: d100 bne.n 8002abc - 8002aba: e158 b.n 8002d6e - 8002abc: e1b8 b.n 8002e30 - 8002abe: 4a66 ldr r2, [pc, #408] ; (8002c58 ) - 8002ac0: 4293 cmp r3, r2 - 8002ac2: d100 bne.n 8002ac6 - 8002ac4: e0f2 b.n 8002cac - 8002ac6: 4a65 ldr r2, [pc, #404] ; (8002c5c ) - 8002ac8: 4293 cmp r3, r2 - 8002aca: d100 bne.n 8002ace - 8002acc: e14f b.n 8002d6e - 8002ace: e1af b.n 8002e30 - if(regs.ch[0] > (5011 - addr.sh)) - 8002ad0: 230c movs r3, #12 - 8002ad2: 18fb adds r3, r7, r3 - 8002ad4: 781b ldrb r3, [r3, #0] - 8002ad6: 001a movs r2, r3 - 8002ad8: 2310 movs r3, #16 - 8002ada: 18fb adds r3, r7, r3 - 8002adc: 881b ldrh r3, [r3, #0] - 8002ade: 0019 movs r1, r3 - 8002ae0: 4b5f ldr r3, [pc, #380] ; (8002c60 ) - 8002ae2: 1a5b subs r3, r3, r1 - 8002ae4: 429a cmp r2, r3 - 8002ae6: dd12 ble.n 8002b0e - tx[0] = iobuf[0]; - 8002ae8: 4b51 ldr r3, [pc, #324] ; (8002c30 ) - 8002aea: 781a ldrb r2, [r3, #0] - 8002aec: 4b52 ldr r3, [pc, #328] ; (8002c38 ) - 8002aee: 701a strb r2, [r3, #0] - tx[1] = (iobuf[1] | 0x80); - 8002af0: 4b4f ldr r3, [pc, #316] ; (8002c30 ) - 8002af2: 785b ldrb r3, [r3, #1] - 8002af4: 2280 movs r2, #128 ; 0x80 - 8002af6: 4252 negs r2, r2 - 8002af8: 4313 orrs r3, r2 - 8002afa: b2da uxtb r2, r3 - 8002afc: 4b4e ldr r3, [pc, #312] ; (8002c38 ) - 8002afe: 705a strb r2, [r3, #1] - tx[2] = 0x03; - 8002b00: 4b4d ldr r3, [pc, #308] ; (8002c38 ) - 8002b02: 2203 movs r2, #3 - 8002b04: 709a strb r2, [r3, #2] - strtOut(3); - 8002b06: 2003 movs r0, #3 - 8002b08: f7ff fde6 bl 80026d8 - break; - 8002b0c: e1a3 b.n 8002e56 - tx[0] = iobuf[0]; - 8002b0e: 4b48 ldr r3, [pc, #288] ; (8002c30 ) - 8002b10: 781a ldrb r2, [r3, #0] - 8002b12: 4b49 ldr r3, [pc, #292] ; (8002c38 ) - 8002b14: 701a strb r2, [r3, #0] - tx[1] = iobuf[1]; - 8002b16: 4b46 ldr r3, [pc, #280] ; (8002c30 ) - 8002b18: 785a ldrb r2, [r3, #1] - 8002b1a: 4b47 ldr r3, [pc, #284] ; (8002c38 ) - 8002b1c: 705a strb r2, [r3, #1] - tx[2] = regs.ch[0] << 1; - 8002b1e: 230c movs r3, #12 - 8002b20: 18fb adds r3, r7, r3 - 8002b22: 781b ldrb r3, [r3, #0] - 8002b24: 18db adds r3, r3, r3 - 8002b26: b2da uxtb r2, r3 - 8002b28: 4b43 ldr r3, [pc, #268] ; (8002c38 ) - 8002b2a: 709a strb r2, [r3, #2] - pch = (uint8_t *) &pardata.IIN + ((addr.sh - 5001) << 1); - 8002b2c: 2310 movs r3, #16 - 8002b2e: 18fb adds r3, r7, r3 - 8002b30: 881b ldrh r3, [r3, #0] - 8002b32: 4a4c ldr r2, [pc, #304] ; (8002c64 ) - 8002b34: 4694 mov ip, r2 - 8002b36: 4463 add r3, ip - 8002b38: 005b lsls r3, r3, #1 - 8002b3a: 001a movs r2, r3 - 8002b3c: 4b4a ldr r3, [pc, #296] ; (8002c68 ) - 8002b3e: 18d3 adds r3, r2, r3 - 8002b40: 61bb str r3, [r7, #24] - for(j = 0; j < tx[2]; j++) - 8002b42: 231f movs r3, #31 - 8002b44: 18fb adds r3, r7, r3 - 8002b46: 2200 movs r2, #0 - 8002b48: 701a strb r2, [r3, #0] - 8002b4a: e016 b.n 8002b7a - tx[j + 3] = *(pch + (j ^ 1)); - 8002b4c: 231f movs r3, #31 - 8002b4e: 18fb adds r3, r7, r3 - 8002b50: 781b ldrb r3, [r3, #0] - 8002b52: 3303 adds r3, #3 - 8002b54: 221f movs r2, #31 - 8002b56: 18ba adds r2, r7, r2 - 8002b58: 7812 ldrb r2, [r2, #0] - 8002b5a: 2101 movs r1, #1 - 8002b5c: 404a eors r2, r1 - 8002b5e: b2d2 uxtb r2, r2 - 8002b60: 0011 movs r1, r2 - 8002b62: 69ba ldr r2, [r7, #24] - 8002b64: 1852 adds r2, r2, r1 - 8002b66: 7811 ldrb r1, [r2, #0] - 8002b68: 4a33 ldr r2, [pc, #204] ; (8002c38 ) - 8002b6a: 54d1 strb r1, [r2, r3] - for(j = 0; j < tx[2]; j++) - 8002b6c: 231f movs r3, #31 - 8002b6e: 18fb adds r3, r7, r3 - 8002b70: 781a ldrb r2, [r3, #0] - 8002b72: 231f movs r3, #31 - 8002b74: 18fb adds r3, r7, r3 - 8002b76: 3201 adds r2, #1 - 8002b78: 701a strb r2, [r3, #0] - 8002b7a: 4b2f ldr r3, [pc, #188] ; (8002c38 ) - 8002b7c: 789b ldrb r3, [r3, #2] - 8002b7e: 221f movs r2, #31 - 8002b80: 18ba adds r2, r7, r2 - 8002b82: 7812 ldrb r2, [r2, #0] - 8002b84: 429a cmp r2, r3 - 8002b86: d3e1 bcc.n 8002b4c - strtOut(3 + tx[2]); - 8002b88: 4b2b ldr r3, [pc, #172] ; (8002c38 ) - 8002b8a: 789b ldrb r3, [r3, #2] - 8002b8c: b29b uxth r3, r3 - 8002b8e: 3303 adds r3, #3 - 8002b90: b29b uxth r3, r3 - 8002b92: 0018 movs r0, r3 - 8002b94: f7ff fda0 bl 80026d8 - break; - 8002b98: e15d b.n 8002e56 - tmp = 3; - 8002b9a: 231e movs r3, #30 - 8002b9c: 18fb adds r3, r7, r3 - 8002b9e: 2203 movs r2, #3 - 8002ba0: 701a strb r2, [r3, #0] - tx[0] = iobuf[0]; - 8002ba2: 4b23 ldr r3, [pc, #140] ; (8002c30 ) - 8002ba4: 781a ldrb r2, [r3, #0] - 8002ba6: 4b24 ldr r3, [pc, #144] ; (8002c38 ) - 8002ba8: 701a strb r2, [r3, #0] - tx[1] = iobuf[1]; - 8002baa: 4b21 ldr r3, [pc, #132] ; (8002c30 ) - 8002bac: 785a ldrb r2, [r3, #1] - 8002bae: 4b22 ldr r3, [pc, #136] ; (8002c38 ) - 8002bb0: 705a strb r2, [r3, #1] - tx[2] = regs.ch[0] << 2; // êîë-ГўГ® áàéò äàííûõ - 8002bb2: 230c movs r3, #12 - 8002bb4: 18fb adds r3, r7, r3 - 8002bb6: 781b ldrb r3, [r3, #0] - 8002bb8: 009b lsls r3, r3, #2 - 8002bba: b2da uxtb r2, r3 - 8002bbc: 4b1e ldr r3, [pc, #120] ; (8002c38 ) - 8002bbe: 709a strb r2, [r3, #2] - if(addr.sh == 7002) - 8002bc0: 2310 movs r3, #16 - 8002bc2: 18fb adds r3, r7, r3 - 8002bc4: 881b ldrh r3, [r3, #0] - 8002bc6: 4a21 ldr r2, [pc, #132] ; (8002c4c ) - 8002bc8: 4293 cmp r3, r2 - 8002bca: d10c bne.n 8002be6 - tmp <<= 1; //tmp=6 - 8002bcc: 231e movs r3, #30 - 8002bce: 18fa adds r2, r7, r3 - 8002bd0: 231e movs r3, #30 - 8002bd2: 18fb adds r3, r7, r3 - 8002bd4: 781b ldrb r3, [r3, #0] - 8002bd6: 18db adds r3, r3, r3 - 8002bd8: 7013 strb r3, [r2, #0] - tx[2] >>= 1; //êîë-ГўГ® ñëîâ äàííûõ - 8002bda: 4b17 ldr r3, [pc, #92] ; (8002c38 ) - 8002bdc: 789b ldrb r3, [r3, #2] - 8002bde: 085b lsrs r3, r3, #1 - 8002be0: b2da uxtb r2, r3 - 8002be2: 4b15 ldr r3, [pc, #84] ; (8002c38 ) - 8002be4: 709a strb r2, [r3, #2] - if(regs.ch[0] > tmp) - 8002be6: 230c movs r3, #12 - 8002be8: 18fb adds r3, r7, r3 - 8002bea: 781b ldrb r3, [r3, #0] - 8002bec: 221e movs r2, #30 - 8002bee: 18ba adds r2, r7, r2 - 8002bf0: 7812 ldrb r2, [r2, #0] - 8002bf2: 429a cmp r2, r3 - 8002bf4: d23a bcs.n 8002c6c - tx[0] = iobuf[0]; - 8002bf6: 4b0e ldr r3, [pc, #56] ; (8002c30 ) - 8002bf8: 781a ldrb r2, [r3, #0] - 8002bfa: 4b0f ldr r3, [pc, #60] ; (8002c38 ) - 8002bfc: 701a strb r2, [r3, #0] - tx[1] = (iobuf[1] | 0x80); - 8002bfe: 4b0c ldr r3, [pc, #48] ; (8002c30 ) - 8002c00: 785b ldrb r3, [r3, #1] - 8002c02: 2280 movs r2, #128 ; 0x80 - 8002c04: 4252 negs r2, r2 - 8002c06: 4313 orrs r3, r2 - 8002c08: b2da uxtb r2, r3 - 8002c0a: 4b0b ldr r3, [pc, #44] ; (8002c38 ) - 8002c0c: 705a strb r2, [r3, #1] - tx[2] = 0x03; - 8002c0e: 4b0a ldr r3, [pc, #40] ; (8002c38 ) - 8002c10: 2203 movs r2, #3 - 8002c12: 709a strb r2, [r3, #2] - strtOut(3); - 8002c14: 2003 movs r0, #3 - 8002c16: f7ff fd5f bl 80026d8 - break; - 8002c1a: e11c b.n 8002e56 - 8002c1c: 20000098 .word 0x20000098 - 8002c20: 08007408 .word 0x08007408 - 8002c24: 20000288 .word 0x20000288 - 8002c28: 20000035 .word 0x20000035 - 8002c2c: 40013800 .word 0x40013800 - 8002c30: 2000028c .word 0x2000028c - 8002c34: 2000028a .word 0x2000028a - 8002c38: 20000188 .word 0x20000188 - 8002c3c: 2000002c .word 0x2000002c - 8002c40: 00001b5c .word 0x00001b5c - 8002c44: 00001389 .word 0x00001389 - 8002c48: 00001392 .word 0x00001392 - 8002c4c: 00001b5a .word 0x00001b5a - 8002c50: 00001d4d .word 0x00001d4d - 8002c54: 00001b5e .word 0x00001b5e - 8002c58: 00001d4e .word 0x00001d4e - 8002c5c: 00001d4f .word 0x00001d4f - 8002c60: 00001393 .word 0x00001393 - 8002c64: ffffec77 .word 0xffffec77 - 8002c68: 2000009e .word 0x2000009e - f.fl = pardata.KCOND; - 8002c6c: 4be9 ldr r3, [pc, #932] ; (8003014 ) - 8002c6e: 69db ldr r3, [r3, #28] - 8002c70: 60bb str r3, [r7, #8] - tx[3] = f.ch[3]; - 8002c72: 2308 movs r3, #8 - 8002c74: 18fb adds r3, r7, r3 - 8002c76: 78da ldrb r2, [r3, #3] - 8002c78: 4be7 ldr r3, [pc, #924] ; (8003018 ) - 8002c7a: 70da strb r2, [r3, #3] - tx[4] = f.ch[2]; - 8002c7c: 2308 movs r3, #8 - 8002c7e: 18fb adds r3, r7, r3 - 8002c80: 789a ldrb r2, [r3, #2] - 8002c82: 4be5 ldr r3, [pc, #916] ; (8003018 ) - 8002c84: 711a strb r2, [r3, #4] - tx[5] = f.ch[1]; - 8002c86: 2308 movs r3, #8 - 8002c88: 18fb adds r3, r7, r3 - 8002c8a: 785a ldrb r2, [r3, #1] - 8002c8c: 4be2 ldr r3, [pc, #904] ; (8003018 ) - 8002c8e: 715a strb r2, [r3, #5] - tx[6] = f.ch[0]; - 8002c90: 2308 movs r3, #8 - 8002c92: 18fb adds r3, r7, r3 - 8002c94: 781a ldrb r2, [r3, #0] - 8002c96: 4be0 ldr r3, [pc, #896] ; (8003018 ) - 8002c98: 719a strb r2, [r3, #6] - strtOut(3 + tx[2]); - 8002c9a: 4bdf ldr r3, [pc, #892] ; (8003018 ) - 8002c9c: 789b ldrb r3, [r3, #2] - 8002c9e: b29b uxth r3, r3 - 8002ca0: 3303 adds r3, #3 - 8002ca2: b29b uxth r3, r3 - 8002ca4: 0018 movs r0, r3 - 8002ca6: f7ff fd17 bl 80026d8 - break; - 8002caa: e0d4 b.n 8002e56 - tmp = 2; - 8002cac: 231e movs r3, #30 - 8002cae: 18fb adds r3, r7, r3 - 8002cb0: 2202 movs r2, #2 - 8002cb2: 701a strb r2, [r3, #0] - tx[0] = iobuf[0]; - 8002cb4: 4bd9 ldr r3, [pc, #868] ; (800301c ) - 8002cb6: 781a ldrb r2, [r3, #0] - 8002cb8: 4bd7 ldr r3, [pc, #860] ; (8003018 ) - 8002cba: 701a strb r2, [r3, #0] - tx[1] = iobuf[1]; - 8002cbc: 4bd7 ldr r3, [pc, #860] ; (800301c ) - 8002cbe: 785a ldrb r2, [r3, #1] - 8002cc0: 4bd5 ldr r3, [pc, #852] ; (8003018 ) - 8002cc2: 705a strb r2, [r3, #1] - tx[2] = regs.ch[0] << 2; - 8002cc4: 230c movs r3, #12 - 8002cc6: 18fb adds r3, r7, r3 - 8002cc8: 781b ldrb r3, [r3, #0] - 8002cca: 009b lsls r3, r3, #2 - 8002ccc: b2da uxtb r2, r3 - 8002cce: 4bd2 ldr r3, [pc, #840] ; (8003018 ) - 8002cd0: 709a strb r2, [r3, #2] - if(addr.sh == 7004) - 8002cd2: 2310 movs r3, #16 - 8002cd4: 18fb adds r3, r7, r3 - 8002cd6: 881b ldrh r3, [r3, #0] - 8002cd8: 4ad1 ldr r2, [pc, #836] ; (8003020 ) - 8002cda: 4293 cmp r3, r2 - 8002cdc: d10c bne.n 8002cf8 - tmp <<= 1; - 8002cde: 231e movs r3, #30 - 8002ce0: 18fa adds r2, r7, r3 - 8002ce2: 231e movs r3, #30 - 8002ce4: 18fb adds r3, r7, r3 - 8002ce6: 781b ldrb r3, [r3, #0] - 8002ce8: 18db adds r3, r3, r3 - 8002cea: 7013 strb r3, [r2, #0] - tx[2] >>= 1; - 8002cec: 4bca ldr r3, [pc, #808] ; (8003018 ) - 8002cee: 789b ldrb r3, [r3, #2] - 8002cf0: 085b lsrs r3, r3, #1 - 8002cf2: b2da uxtb r2, r3 - 8002cf4: 4bc8 ldr r3, [pc, #800] ; (8003018 ) - 8002cf6: 709a strb r2, [r3, #2] - if(regs.ch[0] > tmp) - 8002cf8: 230c movs r3, #12 - 8002cfa: 18fb adds r3, r7, r3 - 8002cfc: 781b ldrb r3, [r3, #0] - 8002cfe: 221e movs r2, #30 - 8002d00: 18ba adds r2, r7, r2 - 8002d02: 7812 ldrb r2, [r2, #0] - 8002d04: 429a cmp r2, r3 - 8002d06: d212 bcs.n 8002d2e - tx[0] = iobuf[0]; - 8002d08: 4bc4 ldr r3, [pc, #784] ; (800301c ) - 8002d0a: 781a ldrb r2, [r3, #0] - 8002d0c: 4bc2 ldr r3, [pc, #776] ; (8003018 ) - 8002d0e: 701a strb r2, [r3, #0] - tx[1] = (iobuf[1] | 0x80); - 8002d10: 4bc2 ldr r3, [pc, #776] ; (800301c ) - 8002d12: 785b ldrb r3, [r3, #1] - 8002d14: 2280 movs r2, #128 ; 0x80 - 8002d16: 4252 negs r2, r2 - 8002d18: 4313 orrs r3, r2 - 8002d1a: b2da uxtb r2, r3 - 8002d1c: 4bbe ldr r3, [pc, #760] ; (8003018 ) - 8002d1e: 705a strb r2, [r3, #1] - tx[2] = 0x03; - 8002d20: 4bbd ldr r3, [pc, #756] ; (8003018 ) - 8002d22: 2203 movs r2, #3 - 8002d24: 709a strb r2, [r3, #2] - strtOut(3); - 8002d26: 2003 movs r0, #3 - 8002d28: f7ff fcd6 bl 80026d8 - break; - 8002d2c: e093 b.n 8002e56 - f.fl = pardata.SENS; - 8002d2e: 4bb9 ldr r3, [pc, #740] ; (8003014 ) - 8002d30: 6a1b ldr r3, [r3, #32] - 8002d32: 60bb str r3, [r7, #8] - tx[3] = f.ch[3]; - 8002d34: 2308 movs r3, #8 - 8002d36: 18fb adds r3, r7, r3 - 8002d38: 78da ldrb r2, [r3, #3] - 8002d3a: 4bb7 ldr r3, [pc, #732] ; (8003018 ) - 8002d3c: 70da strb r2, [r3, #3] - tx[4] = f.ch[2]; - 8002d3e: 2308 movs r3, #8 - 8002d40: 18fb adds r3, r7, r3 - 8002d42: 789a ldrb r2, [r3, #2] - 8002d44: 4bb4 ldr r3, [pc, #720] ; (8003018 ) - 8002d46: 711a strb r2, [r3, #4] - tx[5] = f.ch[1]; - 8002d48: 2308 movs r3, #8 - 8002d4a: 18fb adds r3, r7, r3 - 8002d4c: 785a ldrb r2, [r3, #1] - 8002d4e: 4bb2 ldr r3, [pc, #712] ; (8003018 ) - 8002d50: 715a strb r2, [r3, #5] - tx[6] = f.ch[0]; - 8002d52: 2308 movs r3, #8 - 8002d54: 18fb adds r3, r7, r3 - 8002d56: 781a ldrb r2, [r3, #0] - 8002d58: 4baf ldr r3, [pc, #700] ; (8003018 ) - 8002d5a: 719a strb r2, [r3, #6] - strtOut(3 + tx[2]); - 8002d5c: 4bae ldr r3, [pc, #696] ; (8003018 ) - 8002d5e: 789b ldrb r3, [r3, #2] - 8002d60: b29b uxth r3, r3 - 8002d62: 3303 adds r3, #3 - 8002d64: b29b uxth r3, r3 - 8002d66: 0018 movs r0, r3 - 8002d68: f7ff fcb6 bl 80026d8 - break; - 8002d6c: e073 b.n 8002e56 - tmp = 1; - 8002d6e: 231e movs r3, #30 - 8002d70: 18fb adds r3, r7, r3 - 8002d72: 2201 movs r2, #1 - 8002d74: 701a strb r2, [r3, #0] - tx[0] = iobuf[0]; - 8002d76: 4ba9 ldr r3, [pc, #676] ; (800301c ) - 8002d78: 781a ldrb r2, [r3, #0] - 8002d7a: 4ba7 ldr r3, [pc, #668] ; (8003018 ) - 8002d7c: 701a strb r2, [r3, #0] - tx[1] = iobuf[1]; - 8002d7e: 4ba7 ldr r3, [pc, #668] ; (800301c ) - 8002d80: 785a ldrb r2, [r3, #1] - 8002d82: 4ba5 ldr r3, [pc, #660] ; (8003018 ) - 8002d84: 705a strb r2, [r3, #1] - tx[2] = regs.ch[0] << 2; - 8002d86: 230c movs r3, #12 - 8002d88: 18fb adds r3, r7, r3 - 8002d8a: 781b ldrb r3, [r3, #0] - 8002d8c: 009b lsls r3, r3, #2 - 8002d8e: b2da uxtb r2, r3 - 8002d90: 4ba1 ldr r3, [pc, #644] ; (8003018 ) - 8002d92: 709a strb r2, [r3, #2] - if(addr.sh == 7006) - 8002d94: 2310 movs r3, #16 - 8002d96: 18fb adds r3, r7, r3 - 8002d98: 881b ldrh r3, [r3, #0] - 8002d9a: 4aa2 ldr r2, [pc, #648] ; (8003024 ) - 8002d9c: 4293 cmp r3, r2 - 8002d9e: d10c bne.n 8002dba - tmp <<= 1; - 8002da0: 231e movs r3, #30 - 8002da2: 18fa adds r2, r7, r3 - 8002da4: 231e movs r3, #30 - 8002da6: 18fb adds r3, r7, r3 - 8002da8: 781b ldrb r3, [r3, #0] - 8002daa: 18db adds r3, r3, r3 - 8002dac: 7013 strb r3, [r2, #0] - tx[2] >>= 1; - 8002dae: 4b9a ldr r3, [pc, #616] ; (8003018 ) - 8002db0: 789b ldrb r3, [r3, #2] - 8002db2: 085b lsrs r3, r3, #1 - 8002db4: b2da uxtb r2, r3 - 8002db6: 4b98 ldr r3, [pc, #608] ; (8003018 ) - 8002db8: 709a strb r2, [r3, #2] - if(regs.ch[0] > tmp) - 8002dba: 230c movs r3, #12 - 8002dbc: 18fb adds r3, r7, r3 - 8002dbe: 781b ldrb r3, [r3, #0] - 8002dc0: 221e movs r2, #30 - 8002dc2: 18ba adds r2, r7, r2 - 8002dc4: 7812 ldrb r2, [r2, #0] - 8002dc6: 429a cmp r2, r3 - 8002dc8: d212 bcs.n 8002df0 - tx[0] = iobuf[0]; - 8002dca: 4b94 ldr r3, [pc, #592] ; (800301c ) - 8002dcc: 781a ldrb r2, [r3, #0] - 8002dce: 4b92 ldr r3, [pc, #584] ; (8003018 ) - 8002dd0: 701a strb r2, [r3, #0] - tx[1] = (iobuf[1] | 0x80); - 8002dd2: 4b92 ldr r3, [pc, #584] ; (800301c ) - 8002dd4: 785b ldrb r3, [r3, #1] - 8002dd6: 2280 movs r2, #128 ; 0x80 - 8002dd8: 4252 negs r2, r2 - 8002dda: 4313 orrs r3, r2 - 8002ddc: b2da uxtb r2, r3 - 8002dde: 4b8e ldr r3, [pc, #568] ; (8003018 ) - 8002de0: 705a strb r2, [r3, #1] - tx[2] = 0x03; - 8002de2: 4b8d ldr r3, [pc, #564] ; (8003018 ) - 8002de4: 2203 movs r2, #3 - 8002de6: 709a strb r2, [r3, #2] - strtOut(3); - 8002de8: 2003 movs r0, #3 - 8002dea: f7ff fc75 bl 80026d8 - break; - 8002dee: e032 b.n 8002e56 - f.fl = pardata.ACCEL; - 8002df0: 4b88 ldr r3, [pc, #544] ; (8003014 ) - 8002df2: 6a5b ldr r3, [r3, #36] ; 0x24 - 8002df4: 60bb str r3, [r7, #8] - tx[3] = f.ch[3]; - 8002df6: 2308 movs r3, #8 - 8002df8: 18fb adds r3, r7, r3 - 8002dfa: 78da ldrb r2, [r3, #3] - 8002dfc: 4b86 ldr r3, [pc, #536] ; (8003018 ) - 8002dfe: 70da strb r2, [r3, #3] - tx[4] = f.ch[2]; - 8002e00: 2308 movs r3, #8 - 8002e02: 18fb adds r3, r7, r3 - 8002e04: 789a ldrb r2, [r3, #2] - 8002e06: 4b84 ldr r3, [pc, #528] ; (8003018 ) - 8002e08: 711a strb r2, [r3, #4] - tx[5] = f.ch[1]; - 8002e0a: 2308 movs r3, #8 - 8002e0c: 18fb adds r3, r7, r3 - 8002e0e: 785a ldrb r2, [r3, #1] - 8002e10: 4b81 ldr r3, [pc, #516] ; (8003018 ) - 8002e12: 715a strb r2, [r3, #5] - tx[6] = f.ch[0]; - 8002e14: 2308 movs r3, #8 - 8002e16: 18fb adds r3, r7, r3 - 8002e18: 781a ldrb r2, [r3, #0] - 8002e1a: 4b7f ldr r3, [pc, #508] ; (8003018 ) - 8002e1c: 719a strb r2, [r3, #6] - strtOut(3 + tx[2]); - 8002e1e: 4b7e ldr r3, [pc, #504] ; (8003018 ) - 8002e20: 789b ldrb r3, [r3, #2] - 8002e22: b29b uxth r3, r3 - 8002e24: 3303 adds r3, #3 - 8002e26: b29b uxth r3, r3 - 8002e28: 0018 movs r0, r3 - 8002e2a: f7ff fc55 bl 80026d8 - break; - 8002e2e: e012 b.n 8002e56 - tx[0] = iobuf[0]; - 8002e30: 4b7a ldr r3, [pc, #488] ; (800301c ) - 8002e32: 781a ldrb r2, [r3, #0] - 8002e34: 4b78 ldr r3, [pc, #480] ; (8003018 ) - 8002e36: 701a strb r2, [r3, #0] tx[1] = (iobuf[1] | 0x80); - 8002e38: 4b78 ldr r3, [pc, #480] ; (800301c ) - 8002e3a: 785b ldrb r3, [r3, #1] - 8002e3c: 2280 movs r2, #128 ; 0x80 - 8002e3e: 4252 negs r2, r2 - 8002e40: 4313 orrs r3, r2 - 8002e42: b2da uxtb r2, r3 - 8002e44: 4b74 ldr r3, [pc, #464] ; (8003018 ) - 8002e46: 705a strb r2, [r3, #1] - tx[2] = 0x02; - 8002e48: 4b73 ldr r3, [pc, #460] ; (8003018 ) - 8002e4a: 2202 movs r2, #2 - 8002e4c: 709a strb r2, [r3, #2] + 8002a2e: 4b8a ldr r3, [pc, #552] ; (8002c58 ) + 8002a30: 785b ldrb r3, [r3, #1] + 8002a32: 2280 movs r2, #128 ; 0x80 + 8002a34: 4252 negs r2, r2 + 8002a36: 4313 orrs r3, r2 + 8002a38: b2da uxtb r2, r3 + 8002a3a: 4b89 ldr r3, [pc, #548] ; (8002c60 ) + 8002a3c: 705a strb r2, [r3, #1] + tx[2] = 0x03; + 8002a3e: 4b88 ldr r3, [pc, #544] ; (8002c60 ) + 8002a40: 2203 movs r2, #3 + 8002a42: 709a strb r2, [r3, #2] strtOut(3); - 8002e4e: 2003 movs r0, #3 - 8002e50: f7ff fc42 bl 80026d8 - break; - 8002e54: 46c0 nop ; (mov r8, r8) + 8002a44: 2003 movs r0, #3 + 8002a46: f7ff fe5b bl 8002700 break; - 8002e56: f000 fefe bl 8003c56 + 8002a4a: f001 f918 bl 8003c7e + tx[0] = iobuf[0]; + 8002a4e: 4b82 ldr r3, [pc, #520] ; (8002c58 ) + 8002a50: 781a ldrb r2, [r3, #0] + 8002a52: 4b83 ldr r3, [pc, #524] ; (8002c60 ) + 8002a54: 701a strb r2, [r3, #0] + tx[1] = iobuf[1]; + 8002a56: 4b80 ldr r3, [pc, #512] ; (8002c58 ) + 8002a58: 785a ldrb r2, [r3, #1] + 8002a5a: 4b81 ldr r3, [pc, #516] ; (8002c60 ) + 8002a5c: 705a strb r2, [r3, #1] + tx[2] = regs.ch[0] << 1; // êîë-ГўГ® áàéò + 8002a5e: 230c movs r3, #12 + 8002a60: 18fb adds r3, r7, r3 + 8002a62: 781b ldrb r3, [r3, #0] + 8002a64: 18db adds r3, r3, r3 + 8002a66: b2da uxtb r2, r3 + 8002a68: 4b7d ldr r3, [pc, #500] ; (8002c60 ) + 8002a6a: 709a strb r2, [r3, #2] + tx[3] = 0; + 8002a6c: 4b7c ldr r3, [pc, #496] ; (8002c60 ) + 8002a6e: 2200 movs r2, #0 + 8002a70: 70da strb r2, [r3, #3] + tx[4] = lo(AMP_STATUS); + 8002a72: 4b7c ldr r3, [pc, #496] ; (8002c64 ) + 8002a74: 881b ldrh r3, [r3, #0] + 8002a76: b29b uxth r3, r3 + 8002a78: b2da uxtb r2, r3 + 8002a7a: 4b79 ldr r3, [pc, #484] ; (8002c60 ) + 8002a7c: 711a strb r2, [r3, #4] + tx[5] = hi(AMP_STATUS); + 8002a7e: 4b79 ldr r3, [pc, #484] ; (8002c64 ) + 8002a80: 881b ldrh r3, [r3, #0] + 8002a82: b29b uxth r3, r3 + 8002a84: 0a1b lsrs r3, r3, #8 + 8002a86: b29b uxth r3, r3 + 8002a88: b2da uxtb r2, r3 + 8002a8a: 4b75 ldr r3, [pc, #468] ; (8002c60 ) + 8002a8c: 715a strb r2, [r3, #5] + strtOut(3 + tx[2]); + 8002a8e: 4b74 ldr r3, [pc, #464] ; (8002c60 ) + 8002a90: 789b ldrb r3, [r3, #2] + 8002a92: b29b uxth r3, r3 + 8002a94: 3303 adds r3, #3 + 8002a96: b29b uxth r3, r3 + 8002a98: 0018 movs r0, r3 + 8002a9a: f7ff fe31 bl 8002700 + break; + 8002a9e: f001 f8ee bl 8003c7e + switch(addr.sh) + 8002aa2: 2310 movs r3, #16 + 8002aa4: 18fb adds r3, r7, r3 + 8002aa6: 881b ldrh r3, [r3, #0] + 8002aa8: 4a6f ldr r2, [pc, #444] ; (8002c68 ) + 8002aaa: 4293 cmp r3, r2 + 8002aac: d100 bne.n 8002ab0 + 8002aae: e111 b.n 8002cd4 + 8002ab0: 4a6d ldr r2, [pc, #436] ; (8002c68 ) + 8002ab2: 4293 cmp r3, r2 + 8002ab4: dc0b bgt.n 8002ace + 8002ab6: 4a6d ldr r2, [pc, #436] ; (8002c6c ) + 8002ab8: 4293 cmp r3, r2 + 8002aba: da00 bge.n 8002abe + 8002abc: e1cc b.n 8002e58 + 8002abe: 4a6c ldr r2, [pc, #432] ; (8002c70 ) + 8002ac0: 4293 cmp r3, r2 + 8002ac2: dd19 ble.n 8002af8 + 8002ac4: 4a6b ldr r2, [pc, #428] ; (8002c74 ) + 8002ac6: 4293 cmp r3, r2 + 8002ac8: d100 bne.n 8002acc + 8002aca: e07a b.n 8002bc2 + 8002acc: e1c4 b.n 8002e58 + 8002ace: 4a6a ldr r2, [pc, #424] ; (8002c78 ) + 8002ad0: 4293 cmp r3, r2 + 8002ad2: d100 bne.n 8002ad6 + 8002ad4: e075 b.n 8002bc2 + 8002ad6: 4a68 ldr r2, [pc, #416] ; (8002c78 ) + 8002ad8: 4293 cmp r3, r2 + 8002ada: dc04 bgt.n 8002ae6 + 8002adc: 4a67 ldr r2, [pc, #412] ; (8002c7c ) + 8002ade: 4293 cmp r3, r2 + 8002ae0: d100 bne.n 8002ae4 + 8002ae2: e158 b.n 8002d96 + 8002ae4: e1b8 b.n 8002e58 + 8002ae6: 4a66 ldr r2, [pc, #408] ; (8002c80 ) + 8002ae8: 4293 cmp r3, r2 + 8002aea: d100 bne.n 8002aee + 8002aec: e0f2 b.n 8002cd4 + 8002aee: 4a65 ldr r2, [pc, #404] ; (8002c84 ) + 8002af0: 4293 cmp r3, r2 + 8002af2: d100 bne.n 8002af6 + 8002af4: e14f b.n 8002d96 + 8002af6: e1af b.n 8002e58 + if(regs.ch[0] > (5011 - addr.sh)) + 8002af8: 230c movs r3, #12 + 8002afa: 18fb adds r3, r7, r3 + 8002afc: 781b ldrb r3, [r3, #0] + 8002afe: 001a movs r2, r3 + 8002b00: 2310 movs r3, #16 + 8002b02: 18fb adds r3, r7, r3 + 8002b04: 881b ldrh r3, [r3, #0] + 8002b06: 0019 movs r1, r3 + 8002b08: 4b5f ldr r3, [pc, #380] ; (8002c88 ) + 8002b0a: 1a5b subs r3, r3, r1 + 8002b0c: 429a cmp r2, r3 + 8002b0e: dd12 ble.n 8002b36 + tx[0] = iobuf[0]; + 8002b10: 4b51 ldr r3, [pc, #324] ; (8002c58 ) + 8002b12: 781a ldrb r2, [r3, #0] + 8002b14: 4b52 ldr r3, [pc, #328] ; (8002c60 ) + 8002b16: 701a strb r2, [r3, #0] + tx[1] = (iobuf[1] | 0x80); + 8002b18: 4b4f ldr r3, [pc, #316] ; (8002c58 ) + 8002b1a: 785b ldrb r3, [r3, #1] + 8002b1c: 2280 movs r2, #128 ; 0x80 + 8002b1e: 4252 negs r2, r2 + 8002b20: 4313 orrs r3, r2 + 8002b22: b2da uxtb r2, r3 + 8002b24: 4b4e ldr r3, [pc, #312] ; (8002c60 ) + 8002b26: 705a strb r2, [r3, #1] + tx[2] = 0x03; + 8002b28: 4b4d ldr r3, [pc, #308] ; (8002c60 ) + 8002b2a: 2203 movs r2, #3 + 8002b2c: 709a strb r2, [r3, #2] + strtOut(3); + 8002b2e: 2003 movs r0, #3 + 8002b30: f7ff fde6 bl 8002700 + break; + 8002b34: e1a3 b.n 8002e7e + tx[0] = iobuf[0]; + 8002b36: 4b48 ldr r3, [pc, #288] ; (8002c58 ) + 8002b38: 781a ldrb r2, [r3, #0] + 8002b3a: 4b49 ldr r3, [pc, #292] ; (8002c60 ) + 8002b3c: 701a strb r2, [r3, #0] + tx[1] = iobuf[1]; + 8002b3e: 4b46 ldr r3, [pc, #280] ; (8002c58 ) + 8002b40: 785a ldrb r2, [r3, #1] + 8002b42: 4b47 ldr r3, [pc, #284] ; (8002c60 ) + 8002b44: 705a strb r2, [r3, #1] + tx[2] = regs.ch[0] << 1; + 8002b46: 230c movs r3, #12 + 8002b48: 18fb adds r3, r7, r3 + 8002b4a: 781b ldrb r3, [r3, #0] + 8002b4c: 18db adds r3, r3, r3 + 8002b4e: b2da uxtb r2, r3 + 8002b50: 4b43 ldr r3, [pc, #268] ; (8002c60 ) + 8002b52: 709a strb r2, [r3, #2] + pch = (uint8_t *) &pardata.IIN + ((addr.sh - 5001) << 1); + 8002b54: 2310 movs r3, #16 + 8002b56: 18fb adds r3, r7, r3 + 8002b58: 881b ldrh r3, [r3, #0] + 8002b5a: 4a4c ldr r2, [pc, #304] ; (8002c8c ) + 8002b5c: 4694 mov ip, r2 + 8002b5e: 4463 add r3, ip + 8002b60: 005b lsls r3, r3, #1 + 8002b62: 001a movs r2, r3 + 8002b64: 4b4a ldr r3, [pc, #296] ; (8002c90 ) + 8002b66: 18d3 adds r3, r2, r3 + 8002b68: 61bb str r3, [r7, #24] + for(j = 0; j < tx[2]; j++) + 8002b6a: 231f movs r3, #31 + 8002b6c: 18fb adds r3, r7, r3 + 8002b6e: 2200 movs r2, #0 + 8002b70: 701a strb r2, [r3, #0] + 8002b72: e016 b.n 8002ba2 + tx[j + 3] = *(pch + (j ^ 1)); + 8002b74: 231f movs r3, #31 + 8002b76: 18fb adds r3, r7, r3 + 8002b78: 781b ldrb r3, [r3, #0] + 8002b7a: 3303 adds r3, #3 + 8002b7c: 221f movs r2, #31 + 8002b7e: 18ba adds r2, r7, r2 + 8002b80: 7812 ldrb r2, [r2, #0] + 8002b82: 2101 movs r1, #1 + 8002b84: 404a eors r2, r1 + 8002b86: b2d2 uxtb r2, r2 + 8002b88: 0011 movs r1, r2 + 8002b8a: 69ba ldr r2, [r7, #24] + 8002b8c: 1852 adds r2, r2, r1 + 8002b8e: 7811 ldrb r1, [r2, #0] + 8002b90: 4a33 ldr r2, [pc, #204] ; (8002c60 ) + 8002b92: 54d1 strb r1, [r2, r3] + for(j = 0; j < tx[2]; j++) + 8002b94: 231f movs r3, #31 + 8002b96: 18fb adds r3, r7, r3 + 8002b98: 781a ldrb r2, [r3, #0] + 8002b9a: 231f movs r3, #31 + 8002b9c: 18fb adds r3, r7, r3 + 8002b9e: 3201 adds r2, #1 + 8002ba0: 701a strb r2, [r3, #0] + 8002ba2: 4b2f ldr r3, [pc, #188] ; (8002c60 ) + 8002ba4: 789b ldrb r3, [r3, #2] + 8002ba6: 221f movs r2, #31 + 8002ba8: 18ba adds r2, r7, r2 + 8002baa: 7812 ldrb r2, [r2, #0] + 8002bac: 429a cmp r2, r3 + 8002bae: d3e1 bcc.n 8002b74 + strtOut(3 + tx[2]); + 8002bb0: 4b2b ldr r3, [pc, #172] ; (8002c60 ) + 8002bb2: 789b ldrb r3, [r3, #2] + 8002bb4: b29b uxth r3, r3 + 8002bb6: 3303 adds r3, #3 + 8002bb8: b29b uxth r3, r3 + 8002bba: 0018 movs r0, r3 + 8002bbc: f7ff fda0 bl 8002700 + break; + 8002bc0: e15d b.n 8002e7e + tmp = 3; + 8002bc2: 231e movs r3, #30 + 8002bc4: 18fb adds r3, r7, r3 + 8002bc6: 2203 movs r2, #3 + 8002bc8: 701a strb r2, [r3, #0] + tx[0] = iobuf[0]; + 8002bca: 4b23 ldr r3, [pc, #140] ; (8002c58 ) + 8002bcc: 781a ldrb r2, [r3, #0] + 8002bce: 4b24 ldr r3, [pc, #144] ; (8002c60 ) + 8002bd0: 701a strb r2, [r3, #0] + tx[1] = iobuf[1]; + 8002bd2: 4b21 ldr r3, [pc, #132] ; (8002c58 ) + 8002bd4: 785a ldrb r2, [r3, #1] + 8002bd6: 4b22 ldr r3, [pc, #136] ; (8002c60 ) + 8002bd8: 705a strb r2, [r3, #1] + tx[2] = regs.ch[0] << 2; // êîë-ГўГ® áàéò äàííûõ + 8002bda: 230c movs r3, #12 + 8002bdc: 18fb adds r3, r7, r3 + 8002bde: 781b ldrb r3, [r3, #0] + 8002be0: 009b lsls r3, r3, #2 + 8002be2: b2da uxtb r2, r3 + 8002be4: 4b1e ldr r3, [pc, #120] ; (8002c60 ) + 8002be6: 709a strb r2, [r3, #2] + if(addr.sh == 7002) + 8002be8: 2310 movs r3, #16 + 8002bea: 18fb adds r3, r7, r3 + 8002bec: 881b ldrh r3, [r3, #0] + 8002bee: 4a21 ldr r2, [pc, #132] ; (8002c74 ) + 8002bf0: 4293 cmp r3, r2 + 8002bf2: d10c bne.n 8002c0e + tmp <<= 1; //tmp=6 + 8002bf4: 231e movs r3, #30 + 8002bf6: 18fa adds r2, r7, r3 + 8002bf8: 231e movs r3, #30 + 8002bfa: 18fb adds r3, r7, r3 + 8002bfc: 781b ldrb r3, [r3, #0] + 8002bfe: 18db adds r3, r3, r3 + 8002c00: 7013 strb r3, [r2, #0] + tx[2] >>= 1; //êîë-ГўГ® ñëîâ äàííûõ + 8002c02: 4b17 ldr r3, [pc, #92] ; (8002c60 ) + 8002c04: 789b ldrb r3, [r3, #2] + 8002c06: 085b lsrs r3, r3, #1 + 8002c08: b2da uxtb r2, r3 + 8002c0a: 4b15 ldr r3, [pc, #84] ; (8002c60 ) + 8002c0c: 709a strb r2, [r3, #2] + if(regs.ch[0] > tmp) + 8002c0e: 230c movs r3, #12 + 8002c10: 18fb adds r3, r7, r3 + 8002c12: 781b ldrb r3, [r3, #0] + 8002c14: 221e movs r2, #30 + 8002c16: 18ba adds r2, r7, r2 + 8002c18: 7812 ldrb r2, [r2, #0] + 8002c1a: 429a cmp r2, r3 + 8002c1c: d23a bcs.n 8002c94 + tx[0] = iobuf[0]; + 8002c1e: 4b0e ldr r3, [pc, #56] ; (8002c58 ) + 8002c20: 781a ldrb r2, [r3, #0] + 8002c22: 4b0f ldr r3, [pc, #60] ; (8002c60 ) + 8002c24: 701a strb r2, [r3, #0] + tx[1] = (iobuf[1] | 0x80); + 8002c26: 4b0c ldr r3, [pc, #48] ; (8002c58 ) + 8002c28: 785b ldrb r3, [r3, #1] + 8002c2a: 2280 movs r2, #128 ; 0x80 + 8002c2c: 4252 negs r2, r2 + 8002c2e: 4313 orrs r3, r2 + 8002c30: b2da uxtb r2, r3 + 8002c32: 4b0b ldr r3, [pc, #44] ; (8002c60 ) + 8002c34: 705a strb r2, [r3, #1] + tx[2] = 0x03; + 8002c36: 4b0a ldr r3, [pc, #40] ; (8002c60 ) + 8002c38: 2203 movs r2, #3 + 8002c3a: 709a strb r2, [r3, #2] + strtOut(3); + 8002c3c: 2003 movs r0, #3 + 8002c3e: f7ff fd5f bl 8002700 + break; + 8002c42: e11c b.n 8002e7e + 8002c44: 200000a0 .word 0x200000a0 + 8002c48: 08007444 .word 0x08007444 + 8002c4c: 20000290 .word 0x20000290 + 8002c50: 2000003d .word 0x2000003d + 8002c54: 40013800 .word 0x40013800 + 8002c58: 20000294 .word 0x20000294 + 8002c5c: 20000292 .word 0x20000292 + 8002c60: 20000190 .word 0x20000190 + 8002c64: 2000002c .word 0x2000002c + 8002c68: 00001b5c .word 0x00001b5c + 8002c6c: 00001389 .word 0x00001389 + 8002c70: 00001392 .word 0x00001392 + 8002c74: 00001b5a .word 0x00001b5a + 8002c78: 00001d4d .word 0x00001d4d + 8002c7c: 00001b5e .word 0x00001b5e + 8002c80: 00001d4e .word 0x00001d4e + 8002c84: 00001d4f .word 0x00001d4f + 8002c88: 00001393 .word 0x00001393 + 8002c8c: ffffec77 .word 0xffffec77 + 8002c90: 200000a6 .word 0x200000a6 + f.fl = pardata.KCOND; + 8002c94: 4be9 ldr r3, [pc, #932] ; (800303c ) + 8002c96: 69db ldr r3, [r3, #28] + 8002c98: 60bb str r3, [r7, #8] + tx[3] = f.ch[3]; + 8002c9a: 2308 movs r3, #8 + 8002c9c: 18fb adds r3, r7, r3 + 8002c9e: 78da ldrb r2, [r3, #3] + 8002ca0: 4be7 ldr r3, [pc, #924] ; (8003040 ) + 8002ca2: 70da strb r2, [r3, #3] + tx[4] = f.ch[2]; + 8002ca4: 2308 movs r3, #8 + 8002ca6: 18fb adds r3, r7, r3 + 8002ca8: 789a ldrb r2, [r3, #2] + 8002caa: 4be5 ldr r3, [pc, #916] ; (8003040 ) + 8002cac: 711a strb r2, [r3, #4] + tx[5] = f.ch[1]; + 8002cae: 2308 movs r3, #8 + 8002cb0: 18fb adds r3, r7, r3 + 8002cb2: 785a ldrb r2, [r3, #1] + 8002cb4: 4be2 ldr r3, [pc, #904] ; (8003040 ) + 8002cb6: 715a strb r2, [r3, #5] + tx[6] = f.ch[0]; + 8002cb8: 2308 movs r3, #8 + 8002cba: 18fb adds r3, r7, r3 + 8002cbc: 781a ldrb r2, [r3, #0] + 8002cbe: 4be0 ldr r3, [pc, #896] ; (8003040 ) + 8002cc0: 719a strb r2, [r3, #6] + strtOut(3 + tx[2]); + 8002cc2: 4bdf ldr r3, [pc, #892] ; (8003040 ) + 8002cc4: 789b ldrb r3, [r3, #2] + 8002cc6: b29b uxth r3, r3 + 8002cc8: 3303 adds r3, #3 + 8002cca: b29b uxth r3, r3 + 8002ccc: 0018 movs r0, r3 + 8002cce: f7ff fd17 bl 8002700 + break; + 8002cd2: e0d4 b.n 8002e7e + tmp = 2; + 8002cd4: 231e movs r3, #30 + 8002cd6: 18fb adds r3, r7, r3 + 8002cd8: 2202 movs r2, #2 + 8002cda: 701a strb r2, [r3, #0] + tx[0] = iobuf[0]; + 8002cdc: 4bd9 ldr r3, [pc, #868] ; (8003044 ) + 8002cde: 781a ldrb r2, [r3, #0] + 8002ce0: 4bd7 ldr r3, [pc, #860] ; (8003040 ) + 8002ce2: 701a strb r2, [r3, #0] + tx[1] = iobuf[1]; + 8002ce4: 4bd7 ldr r3, [pc, #860] ; (8003044 ) + 8002ce6: 785a ldrb r2, [r3, #1] + 8002ce8: 4bd5 ldr r3, [pc, #852] ; (8003040 ) + 8002cea: 705a strb r2, [r3, #1] + tx[2] = regs.ch[0] << 2; + 8002cec: 230c movs r3, #12 + 8002cee: 18fb adds r3, r7, r3 + 8002cf0: 781b ldrb r3, [r3, #0] + 8002cf2: 009b lsls r3, r3, #2 + 8002cf4: b2da uxtb r2, r3 + 8002cf6: 4bd2 ldr r3, [pc, #840] ; (8003040 ) + 8002cf8: 709a strb r2, [r3, #2] + if(addr.sh == 7004) + 8002cfa: 2310 movs r3, #16 + 8002cfc: 18fb adds r3, r7, r3 + 8002cfe: 881b ldrh r3, [r3, #0] + 8002d00: 4ad1 ldr r2, [pc, #836] ; (8003048 ) + 8002d02: 4293 cmp r3, r2 + 8002d04: d10c bne.n 8002d20 + tmp <<= 1; + 8002d06: 231e movs r3, #30 + 8002d08: 18fa adds r2, r7, r3 + 8002d0a: 231e movs r3, #30 + 8002d0c: 18fb adds r3, r7, r3 + 8002d0e: 781b ldrb r3, [r3, #0] + 8002d10: 18db adds r3, r3, r3 + 8002d12: 7013 strb r3, [r2, #0] + tx[2] >>= 1; + 8002d14: 4bca ldr r3, [pc, #808] ; (8003040 ) + 8002d16: 789b ldrb r3, [r3, #2] + 8002d18: 085b lsrs r3, r3, #1 + 8002d1a: b2da uxtb r2, r3 + 8002d1c: 4bc8 ldr r3, [pc, #800] ; (8003040 ) + 8002d1e: 709a strb r2, [r3, #2] + if(regs.ch[0] > tmp) + 8002d20: 230c movs r3, #12 + 8002d22: 18fb adds r3, r7, r3 + 8002d24: 781b ldrb r3, [r3, #0] + 8002d26: 221e movs r2, #30 + 8002d28: 18ba adds r2, r7, r2 + 8002d2a: 7812 ldrb r2, [r2, #0] + 8002d2c: 429a cmp r2, r3 + 8002d2e: d212 bcs.n 8002d56 + tx[0] = iobuf[0]; + 8002d30: 4bc4 ldr r3, [pc, #784] ; (8003044 ) + 8002d32: 781a ldrb r2, [r3, #0] + 8002d34: 4bc2 ldr r3, [pc, #776] ; (8003040 ) + 8002d36: 701a strb r2, [r3, #0] + tx[1] = (iobuf[1] | 0x80); + 8002d38: 4bc2 ldr r3, [pc, #776] ; (8003044 ) + 8002d3a: 785b ldrb r3, [r3, #1] + 8002d3c: 2280 movs r2, #128 ; 0x80 + 8002d3e: 4252 negs r2, r2 + 8002d40: 4313 orrs r3, r2 + 8002d42: b2da uxtb r2, r3 + 8002d44: 4bbe ldr r3, [pc, #760] ; (8003040 ) + 8002d46: 705a strb r2, [r3, #1] + tx[2] = 0x03; + 8002d48: 4bbd ldr r3, [pc, #756] ; (8003040 ) + 8002d4a: 2203 movs r2, #3 + 8002d4c: 709a strb r2, [r3, #2] + strtOut(3); + 8002d4e: 2003 movs r0, #3 + 8002d50: f7ff fcd6 bl 8002700 + break; + 8002d54: e093 b.n 8002e7e + f.fl = pardata.SENS; + 8002d56: 4bb9 ldr r3, [pc, #740] ; (800303c ) + 8002d58: 6a1b ldr r3, [r3, #32] + 8002d5a: 60bb str r3, [r7, #8] + tx[3] = f.ch[3]; + 8002d5c: 2308 movs r3, #8 + 8002d5e: 18fb adds r3, r7, r3 + 8002d60: 78da ldrb r2, [r3, #3] + 8002d62: 4bb7 ldr r3, [pc, #732] ; (8003040 ) + 8002d64: 70da strb r2, [r3, #3] + tx[4] = f.ch[2]; + 8002d66: 2308 movs r3, #8 + 8002d68: 18fb adds r3, r7, r3 + 8002d6a: 789a ldrb r2, [r3, #2] + 8002d6c: 4bb4 ldr r3, [pc, #720] ; (8003040 ) + 8002d6e: 711a strb r2, [r3, #4] + tx[5] = f.ch[1]; + 8002d70: 2308 movs r3, #8 + 8002d72: 18fb adds r3, r7, r3 + 8002d74: 785a ldrb r2, [r3, #1] + 8002d76: 4bb2 ldr r3, [pc, #712] ; (8003040 ) + 8002d78: 715a strb r2, [r3, #5] + tx[6] = f.ch[0]; + 8002d7a: 2308 movs r3, #8 + 8002d7c: 18fb adds r3, r7, r3 + 8002d7e: 781a ldrb r2, [r3, #0] + 8002d80: 4baf ldr r3, [pc, #700] ; (8003040 ) + 8002d82: 719a strb r2, [r3, #6] + strtOut(3 + tx[2]); + 8002d84: 4bae ldr r3, [pc, #696] ; (8003040 ) + 8002d86: 789b ldrb r3, [r3, #2] + 8002d88: b29b uxth r3, r3 + 8002d8a: 3303 adds r3, #3 + 8002d8c: b29b uxth r3, r3 + 8002d8e: 0018 movs r0, r3 + 8002d90: f7ff fcb6 bl 8002700 + break; + 8002d94: e073 b.n 8002e7e + tmp = 1; + 8002d96: 231e movs r3, #30 + 8002d98: 18fb adds r3, r7, r3 + 8002d9a: 2201 movs r2, #1 + 8002d9c: 701a strb r2, [r3, #0] + tx[0] = iobuf[0]; + 8002d9e: 4ba9 ldr r3, [pc, #676] ; (8003044 ) + 8002da0: 781a ldrb r2, [r3, #0] + 8002da2: 4ba7 ldr r3, [pc, #668] ; (8003040 ) + 8002da4: 701a strb r2, [r3, #0] + tx[1] = iobuf[1]; + 8002da6: 4ba7 ldr r3, [pc, #668] ; (8003044 ) + 8002da8: 785a ldrb r2, [r3, #1] + 8002daa: 4ba5 ldr r3, [pc, #660] ; (8003040 ) + 8002dac: 705a strb r2, [r3, #1] + tx[2] = regs.ch[0] << 2; + 8002dae: 230c movs r3, #12 + 8002db0: 18fb adds r3, r7, r3 + 8002db2: 781b ldrb r3, [r3, #0] + 8002db4: 009b lsls r3, r3, #2 + 8002db6: b2da uxtb r2, r3 + 8002db8: 4ba1 ldr r3, [pc, #644] ; (8003040 ) + 8002dba: 709a strb r2, [r3, #2] + if(addr.sh == 7006) + 8002dbc: 2310 movs r3, #16 + 8002dbe: 18fb adds r3, r7, r3 + 8002dc0: 881b ldrh r3, [r3, #0] + 8002dc2: 4aa2 ldr r2, [pc, #648] ; (800304c ) + 8002dc4: 4293 cmp r3, r2 + 8002dc6: d10c bne.n 8002de2 + tmp <<= 1; + 8002dc8: 231e movs r3, #30 + 8002dca: 18fa adds r2, r7, r3 + 8002dcc: 231e movs r3, #30 + 8002dce: 18fb adds r3, r7, r3 + 8002dd0: 781b ldrb r3, [r3, #0] + 8002dd2: 18db adds r3, r3, r3 + 8002dd4: 7013 strb r3, [r2, #0] + tx[2] >>= 1; + 8002dd6: 4b9a ldr r3, [pc, #616] ; (8003040 ) + 8002dd8: 789b ldrb r3, [r3, #2] + 8002dda: 085b lsrs r3, r3, #1 + 8002ddc: b2da uxtb r2, r3 + 8002dde: 4b98 ldr r3, [pc, #608] ; (8003040 ) + 8002de0: 709a strb r2, [r3, #2] + if(regs.ch[0] > tmp) + 8002de2: 230c movs r3, #12 + 8002de4: 18fb adds r3, r7, r3 + 8002de6: 781b ldrb r3, [r3, #0] + 8002de8: 221e movs r2, #30 + 8002dea: 18ba adds r2, r7, r2 + 8002dec: 7812 ldrb r2, [r2, #0] + 8002dee: 429a cmp r2, r3 + 8002df0: d212 bcs.n 8002e18 + tx[0] = iobuf[0]; + 8002df2: 4b94 ldr r3, [pc, #592] ; (8003044 ) + 8002df4: 781a ldrb r2, [r3, #0] + 8002df6: 4b92 ldr r3, [pc, #584] ; (8003040 ) + 8002df8: 701a strb r2, [r3, #0] + tx[1] = (iobuf[1] | 0x80); + 8002dfa: 4b92 ldr r3, [pc, #584] ; (8003044 ) + 8002dfc: 785b ldrb r3, [r3, #1] + 8002dfe: 2280 movs r2, #128 ; 0x80 + 8002e00: 4252 negs r2, r2 + 8002e02: 4313 orrs r3, r2 + 8002e04: b2da uxtb r2, r3 + 8002e06: 4b8e ldr r3, [pc, #568] ; (8003040 ) + 8002e08: 705a strb r2, [r3, #1] + tx[2] = 0x03; + 8002e0a: 4b8d ldr r3, [pc, #564] ; (8003040 ) + 8002e0c: 2203 movs r2, #3 + 8002e0e: 709a strb r2, [r3, #2] + strtOut(3); + 8002e10: 2003 movs r0, #3 + 8002e12: f7ff fc75 bl 8002700 + break; + 8002e16: e032 b.n 8002e7e + f.fl = pardata.ACCEL; + 8002e18: 4b88 ldr r3, [pc, #544] ; (800303c ) + 8002e1a: 6a5b ldr r3, [r3, #36] ; 0x24 + 8002e1c: 60bb str r3, [r7, #8] + tx[3] = f.ch[3]; + 8002e1e: 2308 movs r3, #8 + 8002e20: 18fb adds r3, r7, r3 + 8002e22: 78da ldrb r2, [r3, #3] + 8002e24: 4b86 ldr r3, [pc, #536] ; (8003040 ) + 8002e26: 70da strb r2, [r3, #3] + tx[4] = f.ch[2]; + 8002e28: 2308 movs r3, #8 + 8002e2a: 18fb adds r3, r7, r3 + 8002e2c: 789a ldrb r2, [r3, #2] + 8002e2e: 4b84 ldr r3, [pc, #528] ; (8003040 ) + 8002e30: 711a strb r2, [r3, #4] + tx[5] = f.ch[1]; + 8002e32: 2308 movs r3, #8 + 8002e34: 18fb adds r3, r7, r3 + 8002e36: 785a ldrb r2, [r3, #1] + 8002e38: 4b81 ldr r3, [pc, #516] ; (8003040 ) + 8002e3a: 715a strb r2, [r3, #5] + tx[6] = f.ch[0]; + 8002e3c: 2308 movs r3, #8 + 8002e3e: 18fb adds r3, r7, r3 + 8002e40: 781a ldrb r2, [r3, #0] + 8002e42: 4b7f ldr r3, [pc, #508] ; (8003040 ) + 8002e44: 719a strb r2, [r3, #6] + strtOut(3 + tx[2]); + 8002e46: 4b7e ldr r3, [pc, #504] ; (8003040 ) + 8002e48: 789b ldrb r3, [r3, #2] + 8002e4a: b29b uxth r3, r3 + 8002e4c: 3303 adds r3, #3 + 8002e4e: b29b uxth r3, r3 + 8002e50: 0018 movs r0, r3 + 8002e52: f7ff fc55 bl 8002700 + break; + 8002e56: e012 b.n 8002e7e + tx[0] = iobuf[0]; + 8002e58: 4b7a ldr r3, [pc, #488] ; (8003044 ) + 8002e5a: 781a ldrb r2, [r3, #0] + 8002e5c: 4b78 ldr r3, [pc, #480] ; (8003040 ) + 8002e5e: 701a strb r2, [r3, #0] + tx[1] = (iobuf[1] | 0x80); + 8002e60: 4b78 ldr r3, [pc, #480] ; (8003044 ) + 8002e62: 785b ldrb r3, [r3, #1] + 8002e64: 2280 movs r2, #128 ; 0x80 + 8002e66: 4252 negs r2, r2 + 8002e68: 4313 orrs r3, r2 + 8002e6a: b2da uxtb r2, r3 + 8002e6c: 4b74 ldr r3, [pc, #464] ; (8003040 ) + 8002e6e: 705a strb r2, [r3, #1] + tx[2] = 0x02; + 8002e70: 4b73 ldr r3, [pc, #460] ; (8003040 ) + 8002e72: 2202 movs r2, #2 + 8002e74: 709a strb r2, [r3, #2] + strtOut(3); + 8002e76: 2003 movs r0, #3 + 8002e78: f7ff fc42 bl 8002700 + break; + 8002e7c: 46c0 nop ; (mov r8, r8) + break; + 8002e7e: f000 fefe bl 8003c7e addr.ch[1] = iobuf[2]; - 8002e5a: 4b70 ldr r3, [pc, #448] ; (800301c ) - 8002e5c: 789a ldrb r2, [r3, #2] - 8002e5e: 2310 movs r3, #16 - 8002e60: 18fb adds r3, r7, r3 - 8002e62: 705a strb r2, [r3, #1] + 8002e82: 4b70 ldr r3, [pc, #448] ; (8003044 ) + 8002e84: 789a ldrb r2, [r3, #2] + 8002e86: 2310 movs r3, #16 + 8002e88: 18fb adds r3, r7, r3 + 8002e8a: 705a strb r2, [r3, #1] addr.ch[0] = iobuf[3]; - 8002e64: 4b6d ldr r3, [pc, #436] ; (800301c ) - 8002e66: 78da ldrb r2, [r3, #3] - 8002e68: 2310 movs r3, #16 - 8002e6a: 18fb adds r3, r7, r3 - 8002e6c: 701a strb r2, [r3, #0] + 8002e8c: 4b6d ldr r3, [pc, #436] ; (8003044 ) + 8002e8e: 78da ldrb r2, [r3, #3] + 8002e90: 2310 movs r3, #16 + 8002e92: 18fb adds r3, r7, r3 + 8002e94: 701a strb r2, [r3, #0] regs.ch[1] = iobuf[4]; - 8002e6e: 4b6b ldr r3, [pc, #428] ; (800301c ) - 8002e70: 791a ldrb r2, [r3, #4] - 8002e72: 230c movs r3, #12 - 8002e74: 18fb adds r3, r7, r3 - 8002e76: 705a strb r2, [r3, #1] + 8002e96: 4b6b ldr r3, [pc, #428] ; (8003044 ) + 8002e98: 791a ldrb r2, [r3, #4] + 8002e9a: 230c movs r3, #12 + 8002e9c: 18fb adds r3, r7, r3 + 8002e9e: 705a strb r2, [r3, #1] regs.ch[0] = iobuf[5]; - 8002e78: 4b68 ldr r3, [pc, #416] ; (800301c ) - 8002e7a: 795a ldrb r2, [r3, #5] - 8002e7c: 230c movs r3, #12 - 8002e7e: 18fb adds r3, r7, r3 - 8002e80: 701a strb r2, [r3, #0] + 8002ea0: 4b68 ldr r3, [pc, #416] ; (8003044 ) + 8002ea2: 795a ldrb r2, [r3, #5] + 8002ea4: 230c movs r3, #12 + 8002ea6: 18fb adds r3, r7, r3 + 8002ea8: 701a strb r2, [r3, #0] switch(addr.sh) // Запись pardata - 8002e82: 2310 movs r3, #16 - 8002e84: 18fb adds r3, r7, r3 - 8002e86: 881b ldrh r3, [r3, #0] - 8002e88: 4a67 ldr r2, [pc, #412] ; (8003028 ) - 8002e8a: 4293 cmp r3, r2 - 8002e8c: d101 bne.n 8002e92 - 8002e8e: f000 fba4 bl 80035da - 8002e92: 4a65 ldr r2, [pc, #404] ; (8003028 ) - 8002e94: 4293 cmp r3, r2 - 8002e96: dc13 bgt.n 8002ec0 - 8002e98: 4a64 ldr r2, [pc, #400] ; (800302c ) - 8002e9a: 4293 cmp r3, r2 - 8002e9c: dc08 bgt.n 8002eb0 - 8002e9e: 4a64 ldr r2, [pc, #400] ; (8003030 ) - 8002ea0: 4293 cmp r3, r2 - 8002ea2: db00 blt.n 8002ea6 - 8002ea4: e0d8 b.n 8003058 - 8002ea6: 4a63 ldr r2, [pc, #396] ; (8003034 ) - 8002ea8: 4293 cmp r3, r2 - 8002eaa: d029 beq.n 8002f00 - 8002eac: f000 feb4 bl 8003c18 - 8002eb0: 4a61 ldr r2, [pc, #388] ; (8003038 ) - 8002eb2: 4694 mov ip, r2 - 8002eb4: 4463 add r3, ip - 8002eb6: 2b09 cmp r3, #9 - 8002eb8: d901 bls.n 8002ebe - 8002eba: f000 fead bl 8003c18 - 8002ebe: e2ac b.n 800341a - 8002ec0: 4a5e ldr r2, [pc, #376] ; (800303c ) + 8002eaa: 2310 movs r3, #16 + 8002eac: 18fb adds r3, r7, r3 + 8002eae: 881b ldrh r3, [r3, #0] + 8002eb0: 4a67 ldr r2, [pc, #412] ; (8003050 ) + 8002eb2: 4293 cmp r3, r2 + 8002eb4: d101 bne.n 8002eba + 8002eb6: f000 fba4 bl 8003602 + 8002eba: 4a65 ldr r2, [pc, #404] ; (8003050 ) + 8002ebc: 4293 cmp r3, r2 + 8002ebe: dc13 bgt.n 8002ee8 + 8002ec0: 4a64 ldr r2, [pc, #400] ; (8003054 ) 8002ec2: 4293 cmp r3, r2 - 8002ec4: d101 bne.n 8002eca - 8002ec6: f000 fb88 bl 80035da - 8002eca: 4a5c ldr r2, [pc, #368] ; (800303c ) - 8002ecc: 4293 cmp r3, r2 - 8002ece: dc0b bgt.n 8002ee8 - 8002ed0: 4a53 ldr r2, [pc, #332] ; (8003020 ) - 8002ed2: 4293 cmp r3, r2 - 8002ed4: d101 bne.n 8002eda - 8002ed6: f000 fd03 bl 80038e0 - 8002eda: 4a52 ldr r2, [pc, #328] ; (8003024 ) - 8002edc: 4293 cmp r3, r2 - 8002ede: d101 bne.n 8002ee4 - 8002ee0: f000 fddc bl 8003a9c - 8002ee4: f000 fe98 bl 8003c18 - 8002ee8: 4a55 ldr r2, [pc, #340] ; (8003040 ) + 8002ec4: dc08 bgt.n 8002ed8 + 8002ec6: 4a64 ldr r2, [pc, #400] ; (8003058 ) + 8002ec8: 4293 cmp r3, r2 + 8002eca: db00 blt.n 8002ece + 8002ecc: e0d8 b.n 8003080 + 8002ece: 4a63 ldr r2, [pc, #396] ; (800305c ) + 8002ed0: 4293 cmp r3, r2 + 8002ed2: d029 beq.n 8002f28 + 8002ed4: f000 feb4 bl 8003c40 + 8002ed8: 4a61 ldr r2, [pc, #388] ; (8003060 ) + 8002eda: 4694 mov ip, r2 + 8002edc: 4463 add r3, ip + 8002ede: 2b09 cmp r3, #9 + 8002ee0: d901 bls.n 8002ee6 + 8002ee2: f000 fead bl 8003c40 + 8002ee6: e2ac b.n 8003442 + 8002ee8: 4a5e ldr r2, [pc, #376] ; (8003064 ) 8002eea: 4293 cmp r3, r2 - 8002eec: d101 bne.n 8002ef2 - 8002eee: f000 fcf7 bl 80038e0 - 8002ef2: 4a54 ldr r2, [pc, #336] ; (8003044 ) + 8002eec: d101 bne.n 8002ef2 + 8002eee: f000 fb88 bl 8003602 + 8002ef2: 4a5c ldr r2, [pc, #368] ; (8003064 ) 8002ef4: 4293 cmp r3, r2 - 8002ef6: d101 bne.n 8002efc - 8002ef8: f000 fdd0 bl 8003a9c - 8002efc: f000 fe8c bl 8003c18 + 8002ef6: dc0b bgt.n 8002f10 + 8002ef8: 4a53 ldr r2, [pc, #332] ; (8003048 ) + 8002efa: 4293 cmp r3, r2 + 8002efc: d101 bne.n 8002f02 + 8002efe: f000 fd03 bl 8003908 + 8002f02: 4a52 ldr r2, [pc, #328] ; (800304c ) + 8002f04: 4293 cmp r3, r2 + 8002f06: d101 bne.n 8002f0c + 8002f08: f000 fddc bl 8003ac4 + 8002f0c: f000 fe98 bl 8003c40 + 8002f10: 4a55 ldr r2, [pc, #340] ; (8003068 ) + 8002f12: 4293 cmp r3, r2 + 8002f14: d101 bne.n 8002f1a + 8002f16: f000 fcf7 bl 8003908 + 8002f1a: 4a54 ldr r2, [pc, #336] ; (800306c ) + 8002f1c: 4293 cmp r3, r2 + 8002f1e: d101 bne.n 8002f24 + 8002f20: f000 fdd0 bl 8003ac4 + 8002f24: f000 fe8c bl 8003c40 if((regs.ch[0] > 1) || (iobuf[6] != (regs.ch[0] << 1))) - 8002f00: 230c movs r3, #12 - 8002f02: 18fb adds r3, r7, r3 - 8002f04: 781b ldrb r3, [r3, #0] - 8002f06: 2b01 cmp r3, #1 - 8002f08: d808 bhi.n 8002f1c - 8002f0a: 4b44 ldr r3, [pc, #272] ; (800301c ) - 8002f0c: 799b ldrb r3, [r3, #6] - 8002f0e: 001a movs r2, r3 - 8002f10: 230c movs r3, #12 - 8002f12: 18fb adds r3, r7, r3 - 8002f14: 781b ldrb r3, [r3, #0] - 8002f16: 005b lsls r3, r3, #1 - 8002f18: 429a cmp r2, r3 - 8002f1a: d013 beq.n 8002f44 + 8002f28: 230c movs r3, #12 + 8002f2a: 18fb adds r3, r7, r3 + 8002f2c: 781b ldrb r3, [r3, #0] + 8002f2e: 2b01 cmp r3, #1 + 8002f30: d808 bhi.n 8002f44 + 8002f32: 4b44 ldr r3, [pc, #272] ; (8003044 ) + 8002f34: 799b ldrb r3, [r3, #6] + 8002f36: 001a movs r2, r3 + 8002f38: 230c movs r3, #12 + 8002f3a: 18fb adds r3, r7, r3 + 8002f3c: 781b ldrb r3, [r3, #0] + 8002f3e: 005b lsls r3, r3, #1 + 8002f40: 429a cmp r2, r3 + 8002f42: d013 beq.n 8002f6c tx[0] = iobuf[0]; - 8002f1c: 4b3f ldr r3, [pc, #252] ; (800301c ) - 8002f1e: 781a ldrb r2, [r3, #0] - 8002f20: 4b3d ldr r3, [pc, #244] ; (8003018 ) - 8002f22: 701a strb r2, [r3, #0] + 8002f44: 4b3f ldr r3, [pc, #252] ; (8003044 ) + 8002f46: 781a ldrb r2, [r3, #0] + 8002f48: 4b3d ldr r3, [pc, #244] ; (8003040 ) + 8002f4a: 701a strb r2, [r3, #0] tx[1] = (iobuf[1] | 0x80); - 8002f24: 4b3d ldr r3, [pc, #244] ; (800301c ) - 8002f26: 785b ldrb r3, [r3, #1] - 8002f28: 2280 movs r2, #128 ; 0x80 - 8002f2a: 4252 negs r2, r2 - 8002f2c: 4313 orrs r3, r2 - 8002f2e: b2da uxtb r2, r3 - 8002f30: 4b39 ldr r3, [pc, #228] ; (8003018 ) - 8002f32: 705a strb r2, [r3, #1] + 8002f4c: 4b3d ldr r3, [pc, #244] ; (8003044 ) + 8002f4e: 785b ldrb r3, [r3, #1] + 8002f50: 2280 movs r2, #128 ; 0x80 + 8002f52: 4252 negs r2, r2 + 8002f54: 4313 orrs r3, r2 + 8002f56: b2da uxtb r2, r3 + 8002f58: 4b39 ldr r3, [pc, #228] ; (8003040 ) + 8002f5a: 705a strb r2, [r3, #1] tx[2] = 0x03; - 8002f34: 4b38 ldr r3, [pc, #224] ; (8003018 ) - 8002f36: 2203 movs r2, #3 - 8002f38: 709a strb r2, [r3, #2] + 8002f5c: 4b38 ldr r3, [pc, #224] ; (8003040 ) + 8002f5e: 2203 movs r2, #3 + 8002f60: 709a strb r2, [r3, #2] strtOut(3); - 8002f3a: 2003 movs r0, #3 - 8002f3c: f7ff fbcc bl 80026d8 + 8002f62: 2003 movs r0, #3 + 8002f64: f7ff fbcc bl 8002700 break; - 8002f40: f000 fe7d bl 8003c3e + 8002f68: f000 fe7d bl 8003c66 j = 8 + iobuf[6]; - 8002f44: 4b35 ldr r3, [pc, #212] ; (800301c ) - 8002f46: 799a ldrb r2, [r3, #6] - 8002f48: 231f movs r3, #31 - 8002f4a: 18fb adds r3, r7, r3 - 8002f4c: 3208 adds r2, #8 - 8002f4e: 701a strb r2, [r3, #0] + 8002f6c: 4b35 ldr r3, [pc, #212] ; (8003044 ) + 8002f6e: 799a ldrb r2, [r3, #6] + 8002f70: 231f movs r3, #31 + 8002f72: 18fb adds r3, r7, r3 + 8002f74: 3208 adds r2, #8 + 8002f76: 701a strb r2, [r3, #0] if(iolen > j) - 8002f50: 4b3d ldr r3, [pc, #244] ; (8003048 ) - 8002f52: 781b ldrb r3, [r3, #0] - 8002f54: 221f movs r2, #31 - 8002f56: 18ba adds r2, r7, r2 - 8002f58: 7812 ldrb r2, [r2, #0] - 8002f5a: 429a cmp r2, r3 - 8002f5c: d301 bcc.n 8002f62 - 8002f5e: f000 fe6e bl 8003c3e + 8002f78: 4b3d ldr r3, [pc, #244] ; (8003070 ) + 8002f7a: 781b ldrb r3, [r3, #0] + 8002f7c: 221f movs r2, #31 + 8002f7e: 18ba adds r2, r7, r2 + 8002f80: 7812 ldrb r2, [r2, #0] + 8002f82: 429a cmp r2, r3 + 8002f84: d301 bcc.n 8002f8a + 8002f86: f000 fe6e bl 8003c66 iolen = 0; - 8002f62: 4b39 ldr r3, [pc, #228] ; (8003048 ) - 8002f64: 2200 movs r2, #0 - 8002f66: 701a strb r2, [r3, #0] + 8002f8a: 4b39 ldr r3, [pc, #228] ; (8003070 ) + 8002f8c: 2200 movs r2, #0 + 8002f8e: 701a strb r2, [r3, #0] crc.ch[0] = iobuf[j - 1]; - 8002f68: 231f movs r3, #31 - 8002f6a: 18fb adds r3, r7, r3 - 8002f6c: 781b ldrb r3, [r3, #0] - 8002f6e: 3b01 subs r3, #1 - 8002f70: 4a2a ldr r2, [pc, #168] ; (800301c ) - 8002f72: 5cd2 ldrb r2, [r2, r3] - 8002f74: 2314 movs r3, #20 - 8002f76: 18fb adds r3, r7, r3 - 8002f78: 701a strb r2, [r3, #0] - crc.ch[1] = iobuf[j]; - 8002f7a: 231f movs r3, #31 - 8002f7c: 18fb adds r3, r7, r3 - 8002f7e: 781b ldrb r3, [r3, #0] - 8002f80: 4a26 ldr r2, [pc, #152] ; (800301c ) - 8002f82: 5cd2 ldrb r2, [r2, r3] - 8002f84: 2314 movs r3, #20 - 8002f86: 18fb adds r3, r7, r3 - 8002f88: 705a strb r2, [r3, #1] - if(crc.sh == Crc16(j - 1)) - 8002f8a: 2314 movs r3, #20 - 8002f8c: 18fb adds r3, r7, r3 - 8002f8e: 881c ldrh r4, [r3, #0] 8002f90: 231f movs r3, #31 8002f92: 18fb adds r3, r7, r3 8002f94: 781b ldrb r3, [r3, #0] - 8002f96: b29b uxth r3, r3 - 8002f98: 3b01 subs r3, #1 - 8002f9a: b29b uxth r3, r3 - 8002f9c: 0018 movs r0, r3 - 8002f9e: f7ff fbe7 bl 8002770 - 8002fa2: 0003 movs r3, r0 - 8002fa4: 429c cmp r4, r3 - 8002fa6: d001 beq.n 8002fac - 8002fa8: f000 fe49 bl 8003c3e - if(!iobuf[8]) - 8002fac: 4b1b ldr r3, [pc, #108] ; (800301c ) - 8002fae: 7a1b ldrb r3, [r3, #8] - 8002fb0: 2b00 cmp r3, #0 - 8002fb2: d106 bne.n 8002fc2 - faseClbr = 0; - 8002fb4: 4b25 ldr r3, [pc, #148] ; (800304c ) - 8002fb6: 2200 movs r2, #0 - 8002fb8: 601a str r2, [r3, #0] - clbr = false; - 8002fba: 4b25 ldr r3, [pc, #148] ; (8003050 ) - 8002fbc: 2200 movs r2, #0 - 8002fbe: 701a strb r2, [r3, #0] - 8002fc0: e008 b.n 8002fd4 - needClbr = true; - 8002fc2: 4b24 ldr r3, [pc, #144] ; (8003054 ) - 8002fc4: 2201 movs r2, #1 - 8002fc6: 701a strb r2, [r3, #0] - faseClbr = iobuf[8] - 1; - 8002fc8: 4b14 ldr r3, [pc, #80] ; (800301c ) - 8002fca: 7a1b ldrb r3, [r3, #8] - 8002fcc: 3b01 subs r3, #1 - 8002fce: 001a movs r2, r3 - 8002fd0: 4b1e ldr r3, [pc, #120] ; (800304c ) - 8002fd2: 601a str r2, [r3, #0] - for(j = 0; j < 6; j++) { - 8002fd4: 231f movs r3, #31 - 8002fd6: 18fb adds r3, r7, r3 - 8002fd8: 2200 movs r2, #0 - 8002fda: 701a strb r2, [r3, #0] - 8002fdc: e010 b.n 8003000 - tx[j] = iobuf[j]; - 8002fde: 231f movs r3, #31 - 8002fe0: 18fb adds r3, r7, r3 - 8002fe2: 781b ldrb r3, [r3, #0] - 8002fe4: 221f movs r2, #31 - 8002fe6: 18ba adds r2, r7, r2 - 8002fe8: 7812 ldrb r2, [r2, #0] - 8002fea: 490c ldr r1, [pc, #48] ; (800301c ) - 8002fec: 5c89 ldrb r1, [r1, r2] - 8002fee: 4a0a ldr r2, [pc, #40] ; (8003018 ) - 8002ff0: 54d1 strb r1, [r2, r3] - for(j = 0; j < 6; j++) { - 8002ff2: 231f movs r3, #31 - 8002ff4: 18fb adds r3, r7, r3 - 8002ff6: 781a ldrb r2, [r3, #0] - 8002ff8: 231f movs r3, #31 - 8002ffa: 18fb adds r3, r7, r3 - 8002ffc: 3201 adds r2, #1 - 8002ffe: 701a strb r2, [r3, #0] - 8003000: 231f movs r3, #31 - 8003002: 18fb adds r3, r7, r3 - 8003004: 781b ldrb r3, [r3, #0] - 8003006: 2b05 cmp r3, #5 - 8003008: d9e9 bls.n 8002fde - strtOut(6); - 800300a: 2006 movs r0, #6 - 800300c: f7ff fb64 bl 80026d8 - break; - 8003010: f000 fe15 bl 8003c3e - 8003014: 20000098 .word 0x20000098 - 8003018: 20000188 .word 0x20000188 - 800301c: 2000028c .word 0x2000028c - 8003020: 00001b5c .word 0x00001b5c - 8003024: 00001b5e .word 0x00001b5e - 8003028: 00001b5a .word 0x00001b5a - 800302c: 00000bcf .word 0x00000bcf - 8003030: 00000bb9 .word 0x00000bb9 - 8003034: 00000bb8 .word 0x00000bb8 - 8003038: ffffec77 .word 0xffffec77 - 800303c: 00001d4d .word 0x00001d4d - 8003040: 00001d4e .word 0x00001d4e - 8003044: 00001d4f .word 0x00001d4f - 8003048: 20000035 .word 0x20000035 - 800304c: 20000030 .word 0x20000030 - 8003050: 20000034 .word 0x20000034 - 8003054: 2000002e .word 0x2000002e - if((regs.ch[0] > 1) || (iobuf[6] != (regs.ch[0] << 1))) - 8003058: 230c movs r3, #12 - 800305a: 18fb adds r3, r7, r3 - 800305c: 781b ldrb r3, [r3, #0] - 800305e: 2b01 cmp r3, #1 - 8003060: d808 bhi.n 8003074 - 8003062: 4bd7 ldr r3, [pc, #860] ; (80033c0 ) - 8003064: 799b ldrb r3, [r3, #6] - 8003066: 001a movs r2, r3 - 8003068: 230c movs r3, #12 - 800306a: 18fb adds r3, r7, r3 - 800306c: 781b ldrb r3, [r3, #0] - 800306e: 005b lsls r3, r3, #1 - 8003070: 429a cmp r2, r3 - 8003072: d013 beq.n 800309c - tx[0] = iobuf[0]; - 8003074: 4bd2 ldr r3, [pc, #840] ; (80033c0 ) - 8003076: 781a ldrb r2, [r3, #0] - 8003078: 4bd2 ldr r3, [pc, #840] ; (80033c4 ) - 800307a: 701a strb r2, [r3, #0] - tx[1] = (iobuf[1] | 0x80); - 800307c: 4bd0 ldr r3, [pc, #832] ; (80033c0 ) - 800307e: 785b ldrb r3, [r3, #1] - 8003080: 2280 movs r2, #128 ; 0x80 - 8003082: 4252 negs r2, r2 - 8003084: 4313 orrs r3, r2 - 8003086: b2da uxtb r2, r3 - 8003088: 4bce ldr r3, [pc, #824] ; (80033c4 ) - 800308a: 705a strb r2, [r3, #1] - tx[2] = 0x03; - 800308c: 4bcd ldr r3, [pc, #820] ; (80033c4 ) - 800308e: 2203 movs r2, #3 - 8003090: 709a strb r2, [r3, #2] - strtOut(3); - 8003092: 2003 movs r0, #3 - 8003094: f7ff fb20 bl 80026d8 - break; - 8003098: f000 fdd3 bl 8003c42 - j = 8 + iobuf[6]; - 800309c: 4bc8 ldr r3, [pc, #800] ; (80033c0 ) - 800309e: 799a ldrb r2, [r3, #6] - 80030a0: 231f movs r3, #31 - 80030a2: 18fb adds r3, r7, r3 - 80030a4: 3208 adds r2, #8 - 80030a6: 701a strb r2, [r3, #0] - if(iolen > j) - 80030a8: 4bc7 ldr r3, [pc, #796] ; (80033c8 ) - 80030aa: 781b ldrb r3, [r3, #0] - 80030ac: 221f movs r2, #31 - 80030ae: 18ba adds r2, r7, r2 - 80030b0: 7812 ldrb r2, [r2, #0] - 80030b2: 429a cmp r2, r3 - 80030b4: d301 bcc.n 80030ba - 80030b6: f000 fdc4 bl 8003c42 - iolen = 0; - 80030ba: 4bc3 ldr r3, [pc, #780] ; (80033c8 ) - 80030bc: 2200 movs r2, #0 - 80030be: 701a strb r2, [r3, #0] - crc.ch[0] = iobuf[j - 1]; - 80030c0: 231f movs r3, #31 - 80030c2: 18fb adds r3, r7, r3 - 80030c4: 781b ldrb r3, [r3, #0] - 80030c6: 3b01 subs r3, #1 - 80030c8: 4abd ldr r2, [pc, #756] ; (80033c0 ) - 80030ca: 5cd2 ldrb r2, [r2, r3] - 80030cc: 2314 movs r3, #20 - 80030ce: 18fb adds r3, r7, r3 - 80030d0: 701a strb r2, [r3, #0] + 8002f96: 3b01 subs r3, #1 + 8002f98: 4a2a ldr r2, [pc, #168] ; (8003044 ) + 8002f9a: 5cd2 ldrb r2, [r2, r3] + 8002f9c: 2314 movs r3, #20 + 8002f9e: 18fb adds r3, r7, r3 + 8002fa0: 701a strb r2, [r3, #0] crc.ch[1] = iobuf[j]; - 80030d2: 231f movs r3, #31 - 80030d4: 18fb adds r3, r7, r3 - 80030d6: 781b ldrb r3, [r3, #0] - 80030d8: 4ab9 ldr r2, [pc, #740] ; (80033c0 ) - 80030da: 5cd2 ldrb r2, [r2, r3] - 80030dc: 2314 movs r3, #20 - 80030de: 18fb adds r3, r7, r3 - 80030e0: 705a strb r2, [r3, #1] + 8002fa2: 231f movs r3, #31 + 8002fa4: 18fb adds r3, r7, r3 + 8002fa6: 781b ldrb r3, [r3, #0] + 8002fa8: 4a26 ldr r2, [pc, #152] ; (8003044 ) + 8002faa: 5cd2 ldrb r2, [r2, r3] + 8002fac: 2314 movs r3, #20 + 8002fae: 18fb adds r3, r7, r3 + 8002fb0: 705a strb r2, [r3, #1] if(crc.sh == Crc16(j - 1)) - 80030e2: 2314 movs r3, #20 - 80030e4: 18fb adds r3, r7, r3 - 80030e6: 881c ldrh r4, [r3, #0] + 8002fb2: 2314 movs r3, #20 + 8002fb4: 18fb adds r3, r7, r3 + 8002fb6: 881c ldrh r4, [r3, #0] + 8002fb8: 231f movs r3, #31 + 8002fba: 18fb adds r3, r7, r3 + 8002fbc: 781b ldrb r3, [r3, #0] + 8002fbe: b29b uxth r3, r3 + 8002fc0: 3b01 subs r3, #1 + 8002fc2: b29b uxth r3, r3 + 8002fc4: 0018 movs r0, r3 + 8002fc6: f7ff fbe7 bl 8002798 + 8002fca: 0003 movs r3, r0 + 8002fcc: 429c cmp r4, r3 + 8002fce: d001 beq.n 8002fd4 + 8002fd0: f000 fe49 bl 8003c66 + if(!iobuf[8]) + 8002fd4: 4b1b ldr r3, [pc, #108] ; (8003044 ) + 8002fd6: 7a1b ldrb r3, [r3, #8] + 8002fd8: 2b00 cmp r3, #0 + 8002fda: d106 bne.n 8002fea + faseClbr = 0; + 8002fdc: 4b25 ldr r3, [pc, #148] ; (8003074 ) + 8002fde: 2200 movs r2, #0 + 8002fe0: 601a str r2, [r3, #0] + clbr = false; + 8002fe2: 4b25 ldr r3, [pc, #148] ; (8003078 ) + 8002fe4: 2200 movs r2, #0 + 8002fe6: 701a strb r2, [r3, #0] + 8002fe8: e008 b.n 8002ffc + needClbr = true; + 8002fea: 4b24 ldr r3, [pc, #144] ; (800307c ) + 8002fec: 2201 movs r2, #1 + 8002fee: 701a strb r2, [r3, #0] + faseClbr = iobuf[8] - 1; + 8002ff0: 4b14 ldr r3, [pc, #80] ; (8003044 ) + 8002ff2: 7a1b ldrb r3, [r3, #8] + 8002ff4: 3b01 subs r3, #1 + 8002ff6: 001a movs r2, r3 + 8002ff8: 4b1e ldr r3, [pc, #120] ; (8003074 ) + 8002ffa: 601a str r2, [r3, #0] + for(j = 0; j < 6; j++) { + 8002ffc: 231f movs r3, #31 + 8002ffe: 18fb adds r3, r7, r3 + 8003000: 2200 movs r2, #0 + 8003002: 701a strb r2, [r3, #0] + 8003004: e010 b.n 8003028 + tx[j] = iobuf[j]; + 8003006: 231f movs r3, #31 + 8003008: 18fb adds r3, r7, r3 + 800300a: 781b ldrb r3, [r3, #0] + 800300c: 221f movs r2, #31 + 800300e: 18ba adds r2, r7, r2 + 8003010: 7812 ldrb r2, [r2, #0] + 8003012: 490c ldr r1, [pc, #48] ; (8003044 ) + 8003014: 5c89 ldrb r1, [r1, r2] + 8003016: 4a0a ldr r2, [pc, #40] ; (8003040 ) + 8003018: 54d1 strb r1, [r2, r3] + for(j = 0; j < 6; j++) { + 800301a: 231f movs r3, #31 + 800301c: 18fb adds r3, r7, r3 + 800301e: 781a ldrb r2, [r3, #0] + 8003020: 231f movs r3, #31 + 8003022: 18fb adds r3, r7, r3 + 8003024: 3201 adds r2, #1 + 8003026: 701a strb r2, [r3, #0] + 8003028: 231f movs r3, #31 + 800302a: 18fb adds r3, r7, r3 + 800302c: 781b ldrb r3, [r3, #0] + 800302e: 2b05 cmp r3, #5 + 8003030: d9e9 bls.n 8003006 + strtOut(6); + 8003032: 2006 movs r0, #6 + 8003034: f7ff fb64 bl 8002700 + break; + 8003038: f000 fe15 bl 8003c66 + 800303c: 200000a0 .word 0x200000a0 + 8003040: 20000190 .word 0x20000190 + 8003044: 20000294 .word 0x20000294 + 8003048: 00001b5c .word 0x00001b5c + 800304c: 00001b5e .word 0x00001b5e + 8003050: 00001b5a .word 0x00001b5a + 8003054: 00000bcf .word 0x00000bcf + 8003058: 00000bb9 .word 0x00000bb9 + 800305c: 00000bb8 .word 0x00000bb8 + 8003060: ffffec77 .word 0xffffec77 + 8003064: 00001d4d .word 0x00001d4d + 8003068: 00001d4e .word 0x00001d4e + 800306c: 00001d4f .word 0x00001d4f + 8003070: 2000003d .word 0x2000003d + 8003074: 20000038 .word 0x20000038 + 8003078: 2000003c .word 0x2000003c + 800307c: 20000034 .word 0x20000034 + if((regs.ch[0] > 1) || (iobuf[6] != (regs.ch[0] << 1))) + 8003080: 230c movs r3, #12 + 8003082: 18fb adds r3, r7, r3 + 8003084: 781b ldrb r3, [r3, #0] + 8003086: 2b01 cmp r3, #1 + 8003088: d808 bhi.n 800309c + 800308a: 4bd7 ldr r3, [pc, #860] ; (80033e8 ) + 800308c: 799b ldrb r3, [r3, #6] + 800308e: 001a movs r2, r3 + 8003090: 230c movs r3, #12 + 8003092: 18fb adds r3, r7, r3 + 8003094: 781b ldrb r3, [r3, #0] + 8003096: 005b lsls r3, r3, #1 + 8003098: 429a cmp r2, r3 + 800309a: d013 beq.n 80030c4 + tx[0] = iobuf[0]; + 800309c: 4bd2 ldr r3, [pc, #840] ; (80033e8 ) + 800309e: 781a ldrb r2, [r3, #0] + 80030a0: 4bd2 ldr r3, [pc, #840] ; (80033ec ) + 80030a2: 701a strb r2, [r3, #0] + tx[1] = (iobuf[1] | 0x80); + 80030a4: 4bd0 ldr r3, [pc, #832] ; (80033e8 ) + 80030a6: 785b ldrb r3, [r3, #1] + 80030a8: 2280 movs r2, #128 ; 0x80 + 80030aa: 4252 negs r2, r2 + 80030ac: 4313 orrs r3, r2 + 80030ae: b2da uxtb r2, r3 + 80030b0: 4bce ldr r3, [pc, #824] ; (80033ec ) + 80030b2: 705a strb r2, [r3, #1] + tx[2] = 0x03; + 80030b4: 4bcd ldr r3, [pc, #820] ; (80033ec ) + 80030b6: 2203 movs r2, #3 + 80030b8: 709a strb r2, [r3, #2] + strtOut(3); + 80030ba: 2003 movs r0, #3 + 80030bc: f7ff fb20 bl 8002700 + break; + 80030c0: f000 fdd3 bl 8003c6a + j = 8 + iobuf[6]; + 80030c4: 4bc8 ldr r3, [pc, #800] ; (80033e8 ) + 80030c6: 799a ldrb r2, [r3, #6] + 80030c8: 231f movs r3, #31 + 80030ca: 18fb adds r3, r7, r3 + 80030cc: 3208 adds r2, #8 + 80030ce: 701a strb r2, [r3, #0] + if(iolen > j) + 80030d0: 4bc7 ldr r3, [pc, #796] ; (80033f0 ) + 80030d2: 781b ldrb r3, [r3, #0] + 80030d4: 221f movs r2, #31 + 80030d6: 18ba adds r2, r7, r2 + 80030d8: 7812 ldrb r2, [r2, #0] + 80030da: 429a cmp r2, r3 + 80030dc: d301 bcc.n 80030e2 + 80030de: f000 fdc4 bl 8003c6a + iolen = 0; + 80030e2: 4bc3 ldr r3, [pc, #780] ; (80033f0 ) + 80030e4: 2200 movs r2, #0 + 80030e6: 701a strb r2, [r3, #0] + crc.ch[0] = iobuf[j - 1]; 80030e8: 231f movs r3, #31 80030ea: 18fb adds r3, r7, r3 80030ec: 781b ldrb r3, [r3, #0] - 80030ee: b29b uxth r3, r3 - 80030f0: 3b01 subs r3, #1 - 80030f2: b29b uxth r3, r3 - 80030f4: 0018 movs r0, r3 - 80030f6: f7ff fb3b bl 8002770 - 80030fa: 0003 movs r3, r0 - 80030fc: 429c cmp r4, r3 - 80030fe: d001 beq.n 8003104 - 8003100: f000 fd9f bl 8003c42 + 80030ee: 3b01 subs r3, #1 + 80030f0: 4abd ldr r2, [pc, #756] ; (80033e8 ) + 80030f2: 5cd2 ldrb r2, [r2, r3] + 80030f4: 2314 movs r3, #20 + 80030f6: 18fb adds r3, r7, r3 + 80030f8: 701a strb r2, [r3, #0] + crc.ch[1] = iobuf[j]; + 80030fa: 231f movs r3, #31 + 80030fc: 18fb adds r3, r7, r3 + 80030fe: 781b ldrb r3, [r3, #0] + 8003100: 4ab9 ldr r2, [pc, #740] ; (80033e8 ) + 8003102: 5cd2 ldrb r2, [r2, r3] + 8003104: 2314 movs r3, #20 + 8003106: 18fb adds r3, r7, r3 + 8003108: 705a strb r2, [r3, #1] + if(crc.sh == Crc16(j - 1)) + 800310a: 2314 movs r3, #20 + 800310c: 18fb adds r3, r7, r3 + 800310e: 881c ldrh r4, [r3, #0] + 8003110: 231f movs r3, #31 + 8003112: 18fb adds r3, r7, r3 + 8003114: 781b ldrb r3, [r3, #0] + 8003116: b29b uxth r3, r3 + 8003118: 3b01 subs r3, #1 + 800311a: b29b uxth r3, r3 + 800311c: 0018 movs r0, r3 + 800311e: f7ff fb3b bl 8002798 + 8003122: 0003 movs r3, r0 + 8003124: 429c cmp r4, r3 + 8003126: d001 beq.n 800312c + 8003128: f000 fd9f bl 8003c6a if(clbr) - 8003104: 4bb1 ldr r3, [pc, #708] ; (80033cc ) - 8003106: 781b ldrb r3, [r3, #0] - 8003108: b2db uxtb r3, r3 - 800310a: 2b00 cmp r3, #0 - 800310c: d100 bne.n 8003110 - 800310e: e152 b.n 80033b6 + 800312c: 4bb1 ldr r3, [pc, #708] ; (80033f4 ) + 800312e: 781b ldrb r3, [r3, #0] + 8003130: b2db uxtb r3, r3 + 8003132: 2b00 cmp r3, #0 + 8003134: d100 bne.n 8003138 + 8003136: e152 b.n 80033de switch(iobuf[8]) - 8003110: 4bab ldr r3, [pc, #684] ; (80033c0 ) - 8003112: 7a1b ldrb r3, [r3, #8] - 8003114: 2b64 cmp r3, #100 ; 0x64 - 8003116: d100 bne.n 800311a - 8003118: e0d9 b.n 80032ce - 800311a: dc05 bgt.n 8003128 - 800311c: 2b01 cmp r3, #1 - 800311e: d00c beq.n 800313a - 8003120: 2b0a cmp r3, #10 - 8003122: d100 bne.n 8003126 - 8003124: e06c b.n 8003200 - 8003126: e142 b.n 80033ae - 8003128: 2b8a cmp r3, #138 ; 0x8a - 800312a: d100 bne.n 800312e - 800312c: e09c b.n 8003268 - 800312e: 2be4 cmp r3, #228 ; 0xe4 - 8003130: d100 bne.n 8003134 - 8003132: e0ff b.n 8003334 - 8003134: 2b81 cmp r3, #129 ; 0x81 - 8003136: d032 beq.n 800319e - 8003138: e139 b.n 80033ae + 8003138: 4bab ldr r3, [pc, #684] ; (80033e8 ) + 800313a: 7a1b ldrb r3, [r3, #8] + 800313c: 2b64 cmp r3, #100 ; 0x64 + 800313e: d100 bne.n 8003142 + 8003140: e0d9 b.n 80032f6 + 8003142: dc05 bgt.n 8003150 + 8003144: 2b01 cmp r3, #1 + 8003146: d00c beq.n 8003162 + 8003148: 2b0a cmp r3, #10 + 800314a: d100 bne.n 800314e + 800314c: e06c b.n 8003228 + 800314e: e142 b.n 80033d6 + 8003150: 2b8a cmp r3, #138 ; 0x8a + 8003152: d100 bne.n 8003156 + 8003154: e09c b.n 8003290 + 8003156: 2be4 cmp r3, #228 ; 0xe4 + 8003158: d100 bne.n 800315c + 800315a: e0ff b.n 800335c + 800315c: 2b81 cmp r3, #129 ; 0x81 + 800315e: d032 beq.n 80031c6 + 8003160: e139 b.n 80033d6 if(CorrWord[pardata.IIN][pardata.IKU] < 4095) - 800313a: 4ba5 ldr r3, [pc, #660] ; (80033d0 ) - 800313c: 88db ldrh r3, [r3, #6] - 800313e: b29b uxth r3, r3 - 8003140: 0019 movs r1, r3 - 8003142: 4ba3 ldr r3, [pc, #652] ; (80033d0 ) - 8003144: 899b ldrh r3, [r3, #12] - 8003146: b29b uxth r3, r3 - 8003148: 0018 movs r0, r3 - 800314a: 4aa2 ldr r2, [pc, #648] ; (80033d4 ) - 800314c: 000b movs r3, r1 - 800314e: 009b lsls r3, r3, #2 - 8003150: 185b adds r3, r3, r1 - 8003152: 009b lsls r3, r3, #2 - 8003154: 181b adds r3, r3, r0 - 8003156: 005b lsls r3, r3, #1 - 8003158: 5a9b ldrh r3, [r3, r2] - 800315a: b29b uxth r3, r3 - 800315c: 4a9e ldr r2, [pc, #632] ; (80033d8 ) - 800315e: 4293 cmp r3, r2 - 8003160: d900 bls.n 8003164 - 8003162: e119 b.n 8003398 + 8003162: 4ba5 ldr r3, [pc, #660] ; (80033f8 ) + 8003164: 88db ldrh r3, [r3, #6] + 8003166: b29b uxth r3, r3 + 8003168: 0019 movs r1, r3 + 800316a: 4ba3 ldr r3, [pc, #652] ; (80033f8 ) + 800316c: 899b ldrh r3, [r3, #12] + 800316e: b29b uxth r3, r3 + 8003170: 0018 movs r0, r3 + 8003172: 4aa2 ldr r2, [pc, #648] ; (80033fc ) + 8003174: 000b movs r3, r1 + 8003176: 009b lsls r3, r3, #2 + 8003178: 185b adds r3, r3, r1 + 800317a: 009b lsls r3, r3, #2 + 800317c: 181b adds r3, r3, r0 + 800317e: 005b lsls r3, r3, #1 + 8003180: 5a9b ldrh r3, [r3, r2] + 8003182: b29b uxth r3, r3 + 8003184: 4a9e ldr r2, [pc, #632] ; (8003400 ) + 8003186: 4293 cmp r3, r2 + 8003188: d900 bls.n 800318c + 800318a: e119 b.n 80033c0 CorrWord[pardata.IIN][pardata.IKU]++; - 8003164: 4b9a ldr r3, [pc, #616] ; (80033d0 ) - 8003166: 88db ldrh r3, [r3, #6] - 8003168: b29b uxth r3, r3 - 800316a: 001a movs r2, r3 - 800316c: 4b98 ldr r3, [pc, #608] ; (80033d0 ) - 800316e: 899b ldrh r3, [r3, #12] - 8003170: b29b uxth r3, r3 - 8003172: 0019 movs r1, r3 - 8003174: 4897 ldr r0, [pc, #604] ; (80033d4 ) - 8003176: 0013 movs r3, r2 - 8003178: 009b lsls r3, r3, #2 - 800317a: 189b adds r3, r3, r2 - 800317c: 009b lsls r3, r3, #2 - 800317e: 185b adds r3, r3, r1 - 8003180: 005b lsls r3, r3, #1 - 8003182: 5a1b ldrh r3, [r3, r0] - 8003184: b29b uxth r3, r3 - 8003186: 3301 adds r3, #1 - 8003188: b29c uxth r4, r3 - 800318a: 4892 ldr r0, [pc, #584] ; (80033d4 ) - 800318c: 0013 movs r3, r2 - 800318e: 009b lsls r3, r3, #2 - 8003190: 189b adds r3, r3, r2 - 8003192: 009b lsls r3, r3, #2 - 8003194: 185b adds r3, r3, r1 - 8003196: 005b lsls r3, r3, #1 - 8003198: 1c22 adds r2, r4, #0 - 800319a: 521a strh r2, [r3, r0] - break; - 800319c: e0fc b.n 8003398 - if(CorrWord[pardata.IIN][pardata.IKU] > 0) - 800319e: 4b8c ldr r3, [pc, #560] ; (80033d0 ) - 80031a0: 88db ldrh r3, [r3, #6] - 80031a2: b29b uxth r3, r3 - 80031a4: 0019 movs r1, r3 - 80031a6: 4b8a ldr r3, [pc, #552] ; (80033d0 ) - 80031a8: 899b ldrh r3, [r3, #12] - 80031aa: b29b uxth r3, r3 - 80031ac: 0018 movs r0, r3 - 80031ae: 4a89 ldr r2, [pc, #548] ; (80033d4 ) - 80031b0: 000b movs r3, r1 - 80031b2: 009b lsls r3, r3, #2 - 80031b4: 185b adds r3, r3, r1 + 800318c: 4b9a ldr r3, [pc, #616] ; (80033f8 ) + 800318e: 88db ldrh r3, [r3, #6] + 8003190: b29b uxth r3, r3 + 8003192: 001a movs r2, r3 + 8003194: 4b98 ldr r3, [pc, #608] ; (80033f8 ) + 8003196: 899b ldrh r3, [r3, #12] + 8003198: b29b uxth r3, r3 + 800319a: 0019 movs r1, r3 + 800319c: 4897 ldr r0, [pc, #604] ; (80033fc ) + 800319e: 0013 movs r3, r2 + 80031a0: 009b lsls r3, r3, #2 + 80031a2: 189b adds r3, r3, r2 + 80031a4: 009b lsls r3, r3, #2 + 80031a6: 185b adds r3, r3, r1 + 80031a8: 005b lsls r3, r3, #1 + 80031aa: 5a1b ldrh r3, [r3, r0] + 80031ac: b29b uxth r3, r3 + 80031ae: 3301 adds r3, #1 + 80031b0: b29c uxth r4, r3 + 80031b2: 4892 ldr r0, [pc, #584] ; (80033fc ) + 80031b4: 0013 movs r3, r2 80031b6: 009b lsls r3, r3, #2 - 80031b8: 181b adds r3, r3, r0 - 80031ba: 005b lsls r3, r3, #1 - 80031bc: 5a9b ldrh r3, [r3, r2] - 80031be: b29b uxth r3, r3 - 80031c0: 2b00 cmp r3, #0 - 80031c2: d100 bne.n 80031c6 - 80031c4: e0ea b.n 800339c - CorrWord[pardata.IIN][pardata.IKU]--; - 80031c6: 4b82 ldr r3, [pc, #520] ; (80033d0 ) + 80031b8: 189b adds r3, r3, r2 + 80031ba: 009b lsls r3, r3, #2 + 80031bc: 185b adds r3, r3, r1 + 80031be: 005b lsls r3, r3, #1 + 80031c0: 1c22 adds r2, r4, #0 + 80031c2: 521a strh r2, [r3, r0] + break; + 80031c4: e0fc b.n 80033c0 + if(CorrWord[pardata.IIN][pardata.IKU] > 0) + 80031c6: 4b8c ldr r3, [pc, #560] ; (80033f8 ) 80031c8: 88db ldrh r3, [r3, #6] 80031ca: b29b uxth r3, r3 - 80031cc: 001a movs r2, r3 - 80031ce: 4b80 ldr r3, [pc, #512] ; (80033d0 ) + 80031cc: 0019 movs r1, r3 + 80031ce: 4b8a ldr r3, [pc, #552] ; (80033f8 ) 80031d0: 899b ldrh r3, [r3, #12] 80031d2: b29b uxth r3, r3 - 80031d4: 0019 movs r1, r3 - 80031d6: 487f ldr r0, [pc, #508] ; (80033d4 ) - 80031d8: 0013 movs r3, r2 + 80031d4: 0018 movs r0, r3 + 80031d6: 4a89 ldr r2, [pc, #548] ; (80033fc ) + 80031d8: 000b movs r3, r1 80031da: 009b lsls r3, r3, #2 - 80031dc: 189b adds r3, r3, r2 + 80031dc: 185b adds r3, r3, r1 80031de: 009b lsls r3, r3, #2 - 80031e0: 185b adds r3, r3, r1 + 80031e0: 181b adds r3, r3, r0 80031e2: 005b lsls r3, r3, #1 - 80031e4: 5a1b ldrh r3, [r3, r0] + 80031e4: 5a9b ldrh r3, [r3, r2] 80031e6: b29b uxth r3, r3 - 80031e8: 3b01 subs r3, #1 - 80031ea: b29c uxth r4, r3 - 80031ec: 4879 ldr r0, [pc, #484] ; (80033d4 ) - 80031ee: 0013 movs r3, r2 - 80031f0: 009b lsls r3, r3, #2 - 80031f2: 189b adds r3, r3, r2 - 80031f4: 009b lsls r3, r3, #2 - 80031f6: 185b adds r3, r3, r1 - 80031f8: 005b lsls r3, r3, #1 - 80031fa: 1c22 adds r2, r4, #0 - 80031fc: 521a strh r2, [r3, r0] - break; - 80031fe: e0cd b.n 800339c - if(CorrWord[pardata.IIN][pardata.IKU] < 4085) - 8003200: 4b73 ldr r3, [pc, #460] ; (80033d0 ) - 8003202: 88db ldrh r3, [r3, #6] - 8003204: b29b uxth r3, r3 - 8003206: 0019 movs r1, r3 - 8003208: 4b71 ldr r3, [pc, #452] ; (80033d0 ) - 800320a: 899b ldrh r3, [r3, #12] - 800320c: b29b uxth r3, r3 - 800320e: 0018 movs r0, r3 - 8003210: 4a70 ldr r2, [pc, #448] ; (80033d4 ) - 8003212: 000b movs r3, r1 - 8003214: 009b lsls r3, r3, #2 - 8003216: 185b adds r3, r3, r1 + 80031e8: 2b00 cmp r3, #0 + 80031ea: d100 bne.n 80031ee + 80031ec: e0ea b.n 80033c4 + CorrWord[pardata.IIN][pardata.IKU]--; + 80031ee: 4b82 ldr r3, [pc, #520] ; (80033f8 ) + 80031f0: 88db ldrh r3, [r3, #6] + 80031f2: b29b uxth r3, r3 + 80031f4: 001a movs r2, r3 + 80031f6: 4b80 ldr r3, [pc, #512] ; (80033f8 ) + 80031f8: 899b ldrh r3, [r3, #12] + 80031fa: b29b uxth r3, r3 + 80031fc: 0019 movs r1, r3 + 80031fe: 487f ldr r0, [pc, #508] ; (80033fc ) + 8003200: 0013 movs r3, r2 + 8003202: 009b lsls r3, r3, #2 + 8003204: 189b adds r3, r3, r2 + 8003206: 009b lsls r3, r3, #2 + 8003208: 185b adds r3, r3, r1 + 800320a: 005b lsls r3, r3, #1 + 800320c: 5a1b ldrh r3, [r3, r0] + 800320e: b29b uxth r3, r3 + 8003210: 3b01 subs r3, #1 + 8003212: b29c uxth r4, r3 + 8003214: 4879 ldr r0, [pc, #484] ; (80033fc ) + 8003216: 0013 movs r3, r2 8003218: 009b lsls r3, r3, #2 - 800321a: 181b adds r3, r3, r0 - 800321c: 005b lsls r3, r3, #1 - 800321e: 5a9b ldrh r3, [r3, r2] - 8003220: b29b uxth r3, r3 - 8003222: 4a6e ldr r2, [pc, #440] ; (80033dc ) - 8003224: 4293 cmp r3, r2 - 8003226: d900 bls.n 800322a - 8003228: e0ba b.n 80033a0 - CorrWord[pardata.IIN][pardata.IKU] += 10; - 800322a: 4b69 ldr r3, [pc, #420] ; (80033d0 ) - 800322c: 88db ldrh r3, [r3, #6] - 800322e: b29a uxth r2, r3 - 8003230: 0011 movs r1, r2 - 8003232: 4b67 ldr r3, [pc, #412] ; (80033d0 ) - 8003234: 899b ldrh r3, [r3, #12] - 8003236: b29b uxth r3, r3 - 8003238: 001c movs r4, r3 - 800323a: 0010 movs r0, r2 - 800323c: 001d movs r5, r3 - 800323e: 4a65 ldr r2, [pc, #404] ; (80033d4 ) - 8003240: 0003 movs r3, r0 - 8003242: 009b lsls r3, r3, #2 - 8003244: 181b adds r3, r3, r0 - 8003246: 009b lsls r3, r3, #2 - 8003248: 195b adds r3, r3, r5 - 800324a: 005b lsls r3, r3, #1 - 800324c: 5a9b ldrh r3, [r3, r2] - 800324e: b29b uxth r3, r3 - 8003250: 330a adds r3, #10 - 8003252: b298 uxth r0, r3 - 8003254: 4a5f ldr r2, [pc, #380] ; (80033d4 ) - 8003256: 000b movs r3, r1 - 8003258: 009b lsls r3, r3, #2 - 800325a: 185b adds r3, r3, r1 - 800325c: 009b lsls r3, r3, #2 - 800325e: 191b adds r3, r3, r4 - 8003260: 005b lsls r3, r3, #1 - 8003262: 1c01 adds r1, r0, #0 - 8003264: 5299 strh r1, [r3, r2] + 800321a: 189b adds r3, r3, r2 + 800321c: 009b lsls r3, r3, #2 + 800321e: 185b adds r3, r3, r1 + 8003220: 005b lsls r3, r3, #1 + 8003222: 1c22 adds r2, r4, #0 + 8003224: 521a strh r2, [r3, r0] break; - 8003266: e09b b.n 80033a0 - if(CorrWord[pardata.IIN][pardata.IKU] > 10) - 8003268: 4b59 ldr r3, [pc, #356] ; (80033d0 ) - 800326a: 88db ldrh r3, [r3, #6] - 800326c: b29b uxth r3, r3 - 800326e: 0019 movs r1, r3 - 8003270: 4b57 ldr r3, [pc, #348] ; (80033d0 ) - 8003272: 899b ldrh r3, [r3, #12] - 8003274: b29b uxth r3, r3 - 8003276: 0018 movs r0, r3 - 8003278: 4a56 ldr r2, [pc, #344] ; (80033d4 ) - 800327a: 000b movs r3, r1 - 800327c: 009b lsls r3, r3, #2 - 800327e: 185b adds r3, r3, r1 + 8003226: e0cd b.n 80033c4 + if(CorrWord[pardata.IIN][pardata.IKU] < 4085) + 8003228: 4b73 ldr r3, [pc, #460] ; (80033f8 ) + 800322a: 88db ldrh r3, [r3, #6] + 800322c: b29b uxth r3, r3 + 800322e: 0019 movs r1, r3 + 8003230: 4b71 ldr r3, [pc, #452] ; (80033f8 ) + 8003232: 899b ldrh r3, [r3, #12] + 8003234: b29b uxth r3, r3 + 8003236: 0018 movs r0, r3 + 8003238: 4a70 ldr r2, [pc, #448] ; (80033fc ) + 800323a: 000b movs r3, r1 + 800323c: 009b lsls r3, r3, #2 + 800323e: 185b adds r3, r3, r1 + 8003240: 009b lsls r3, r3, #2 + 8003242: 181b adds r3, r3, r0 + 8003244: 005b lsls r3, r3, #1 + 8003246: 5a9b ldrh r3, [r3, r2] + 8003248: b29b uxth r3, r3 + 800324a: 4a6e ldr r2, [pc, #440] ; (8003404 ) + 800324c: 4293 cmp r3, r2 + 800324e: d900 bls.n 8003252 + 8003250: e0ba b.n 80033c8 + CorrWord[pardata.IIN][pardata.IKU] += 10; + 8003252: 4b69 ldr r3, [pc, #420] ; (80033f8 ) + 8003254: 88db ldrh r3, [r3, #6] + 8003256: b29a uxth r2, r3 + 8003258: 0011 movs r1, r2 + 800325a: 4b67 ldr r3, [pc, #412] ; (80033f8 ) + 800325c: 899b ldrh r3, [r3, #12] + 800325e: b29b uxth r3, r3 + 8003260: 001c movs r4, r3 + 8003262: 0010 movs r0, r2 + 8003264: 001d movs r5, r3 + 8003266: 4a65 ldr r2, [pc, #404] ; (80033fc ) + 8003268: 0003 movs r3, r0 + 800326a: 009b lsls r3, r3, #2 + 800326c: 181b adds r3, r3, r0 + 800326e: 009b lsls r3, r3, #2 + 8003270: 195b adds r3, r3, r5 + 8003272: 005b lsls r3, r3, #1 + 8003274: 5a9b ldrh r3, [r3, r2] + 8003276: b29b uxth r3, r3 + 8003278: 330a adds r3, #10 + 800327a: b298 uxth r0, r3 + 800327c: 4a5f ldr r2, [pc, #380] ; (80033fc ) + 800327e: 000b movs r3, r1 8003280: 009b lsls r3, r3, #2 - 8003282: 181b adds r3, r3, r0 - 8003284: 005b lsls r3, r3, #1 - 8003286: 5a9b ldrh r3, [r3, r2] - 8003288: b29b uxth r3, r3 - 800328a: 2b0a cmp r3, #10 - 800328c: d800 bhi.n 8003290 - 800328e: e089 b.n 80033a4 - CorrWord[pardata.IIN][pardata.IKU] -= 10; - 8003290: 4b4f ldr r3, [pc, #316] ; (80033d0 ) + 8003282: 185b adds r3, r3, r1 + 8003284: 009b lsls r3, r3, #2 + 8003286: 191b adds r3, r3, r4 + 8003288: 005b lsls r3, r3, #1 + 800328a: 1c01 adds r1, r0, #0 + 800328c: 5299 strh r1, [r3, r2] + break; + 800328e: e09b b.n 80033c8 + if(CorrWord[pardata.IIN][pardata.IKU] > 10) + 8003290: 4b59 ldr r3, [pc, #356] ; (80033f8 ) 8003292: 88db ldrh r3, [r3, #6] - 8003294: b29a uxth r2, r3 - 8003296: 0011 movs r1, r2 - 8003298: 4b4d ldr r3, [pc, #308] ; (80033d0 ) + 8003294: b29b uxth r3, r3 + 8003296: 0019 movs r1, r3 + 8003298: 4b57 ldr r3, [pc, #348] ; (80033f8 ) 800329a: 899b ldrh r3, [r3, #12] 800329c: b29b uxth r3, r3 - 800329e: 001c movs r4, r3 - 80032a0: 0010 movs r0, r2 - 80032a2: 001d movs r5, r3 - 80032a4: 4a4b ldr r2, [pc, #300] ; (80033d4 ) - 80032a6: 0003 movs r3, r0 + 800329e: 0018 movs r0, r3 + 80032a0: 4a56 ldr r2, [pc, #344] ; (80033fc ) + 80032a2: 000b movs r3, r1 + 80032a4: 009b lsls r3, r3, #2 + 80032a6: 185b adds r3, r3, r1 80032a8: 009b lsls r3, r3, #2 80032aa: 181b adds r3, r3, r0 - 80032ac: 009b lsls r3, r3, #2 - 80032ae: 195b adds r3, r3, r5 - 80032b0: 005b lsls r3, r3, #1 - 80032b2: 5a9b ldrh r3, [r3, r2] - 80032b4: b29b uxth r3, r3 - 80032b6: 3b0a subs r3, #10 - 80032b8: b298 uxth r0, r3 - 80032ba: 4a46 ldr r2, [pc, #280] ; (80033d4 ) - 80032bc: 000b movs r3, r1 - 80032be: 009b lsls r3, r3, #2 - 80032c0: 185b adds r3, r3, r1 - 80032c2: 009b lsls r3, r3, #2 - 80032c4: 191b adds r3, r3, r4 - 80032c6: 005b lsls r3, r3, #1 - 80032c8: 1c01 adds r1, r0, #0 - 80032ca: 5299 strh r1, [r3, r2] - break; - 80032cc: e06a b.n 80033a4 - if(CorrWord[pardata.IIN][pardata.IKU] < 3995) - 80032ce: 4b40 ldr r3, [pc, #256] ; (80033d0 ) - 80032d0: 88db ldrh r3, [r3, #6] - 80032d2: b29b uxth r3, r3 - 80032d4: 0019 movs r1, r3 - 80032d6: 4b3e ldr r3, [pc, #248] ; (80033d0 ) - 80032d8: 899b ldrh r3, [r3, #12] - 80032da: b29b uxth r3, r3 - 80032dc: 0018 movs r0, r3 - 80032de: 4a3d ldr r2, [pc, #244] ; (80033d4 ) - 80032e0: 000b movs r3, r1 - 80032e2: 009b lsls r3, r3, #2 - 80032e4: 185b adds r3, r3, r1 + 80032ac: 005b lsls r3, r3, #1 + 80032ae: 5a9b ldrh r3, [r3, r2] + 80032b0: b29b uxth r3, r3 + 80032b2: 2b0a cmp r3, #10 + 80032b4: d800 bhi.n 80032b8 + 80032b6: e089 b.n 80033cc + CorrWord[pardata.IIN][pardata.IKU] -= 10; + 80032b8: 4b4f ldr r3, [pc, #316] ; (80033f8 ) + 80032ba: 88db ldrh r3, [r3, #6] + 80032bc: b29a uxth r2, r3 + 80032be: 0011 movs r1, r2 + 80032c0: 4b4d ldr r3, [pc, #308] ; (80033f8 ) + 80032c2: 899b ldrh r3, [r3, #12] + 80032c4: b29b uxth r3, r3 + 80032c6: 001c movs r4, r3 + 80032c8: 0010 movs r0, r2 + 80032ca: 001d movs r5, r3 + 80032cc: 4a4b ldr r2, [pc, #300] ; (80033fc ) + 80032ce: 0003 movs r3, r0 + 80032d0: 009b lsls r3, r3, #2 + 80032d2: 181b adds r3, r3, r0 + 80032d4: 009b lsls r3, r3, #2 + 80032d6: 195b adds r3, r3, r5 + 80032d8: 005b lsls r3, r3, #1 + 80032da: 5a9b ldrh r3, [r3, r2] + 80032dc: b29b uxth r3, r3 + 80032de: 3b0a subs r3, #10 + 80032e0: b298 uxth r0, r3 + 80032e2: 4a46 ldr r2, [pc, #280] ; (80033fc ) + 80032e4: 000b movs r3, r1 80032e6: 009b lsls r3, r3, #2 - 80032e8: 181b adds r3, r3, r0 - 80032ea: 005b lsls r3, r3, #1 - 80032ec: 5a9b ldrh r3, [r3, r2] - 80032ee: b29b uxth r3, r3 - 80032f0: 4a3b ldr r2, [pc, #236] ; (80033e0 ) - 80032f2: 4293 cmp r3, r2 - 80032f4: d858 bhi.n 80033a8 - CorrWord[pardata.IIN][pardata.IKU] += 100; - 80032f6: 4b36 ldr r3, [pc, #216] ; (80033d0 ) + 80032e8: 185b adds r3, r3, r1 + 80032ea: 009b lsls r3, r3, #2 + 80032ec: 191b adds r3, r3, r4 + 80032ee: 005b lsls r3, r3, #1 + 80032f0: 1c01 adds r1, r0, #0 + 80032f2: 5299 strh r1, [r3, r2] + break; + 80032f4: e06a b.n 80033cc + if(CorrWord[pardata.IIN][pardata.IKU] < 3995) + 80032f6: 4b40 ldr r3, [pc, #256] ; (80033f8 ) 80032f8: 88db ldrh r3, [r3, #6] - 80032fa: b29a uxth r2, r3 - 80032fc: 0011 movs r1, r2 - 80032fe: 4b34 ldr r3, [pc, #208] ; (80033d0 ) + 80032fa: b29b uxth r3, r3 + 80032fc: 0019 movs r1, r3 + 80032fe: 4b3e ldr r3, [pc, #248] ; (80033f8 ) 8003300: 899b ldrh r3, [r3, #12] 8003302: b29b uxth r3, r3 - 8003304: 001c movs r4, r3 - 8003306: 0010 movs r0, r2 - 8003308: 001d movs r5, r3 - 800330a: 4a32 ldr r2, [pc, #200] ; (80033d4 ) - 800330c: 0003 movs r3, r0 + 8003304: 0018 movs r0, r3 + 8003306: 4a3d ldr r2, [pc, #244] ; (80033fc ) + 8003308: 000b movs r3, r1 + 800330a: 009b lsls r3, r3, #2 + 800330c: 185b adds r3, r3, r1 800330e: 009b lsls r3, r3, #2 8003310: 181b adds r3, r3, r0 - 8003312: 009b lsls r3, r3, #2 - 8003314: 195b adds r3, r3, r5 - 8003316: 005b lsls r3, r3, #1 - 8003318: 5a9b ldrh r3, [r3, r2] - 800331a: b29b uxth r3, r3 - 800331c: 3364 adds r3, #100 ; 0x64 - 800331e: b298 uxth r0, r3 - 8003320: 4a2c ldr r2, [pc, #176] ; (80033d4 ) - 8003322: 000b movs r3, r1 - 8003324: 009b lsls r3, r3, #2 - 8003326: 185b adds r3, r3, r1 - 8003328: 009b lsls r3, r3, #2 - 800332a: 191b adds r3, r3, r4 - 800332c: 005b lsls r3, r3, #1 - 800332e: 1c01 adds r1, r0, #0 - 8003330: 5299 strh r1, [r3, r2] - break; - 8003332: e039 b.n 80033a8 - if(CorrWord[pardata.IIN][pardata.IKU] > 100) - 8003334: 4b26 ldr r3, [pc, #152] ; (80033d0 ) - 8003336: 88db ldrh r3, [r3, #6] - 8003338: b29b uxth r3, r3 - 800333a: 0019 movs r1, r3 - 800333c: 4b24 ldr r3, [pc, #144] ; (80033d0 ) - 800333e: 899b ldrh r3, [r3, #12] - 8003340: b29b uxth r3, r3 - 8003342: 0018 movs r0, r3 - 8003344: 4a23 ldr r2, [pc, #140] ; (80033d4 ) - 8003346: 000b movs r3, r1 - 8003348: 009b lsls r3, r3, #2 - 800334a: 185b adds r3, r3, r1 + 8003312: 005b lsls r3, r3, #1 + 8003314: 5a9b ldrh r3, [r3, r2] + 8003316: b29b uxth r3, r3 + 8003318: 4a3b ldr r2, [pc, #236] ; (8003408 ) + 800331a: 4293 cmp r3, r2 + 800331c: d858 bhi.n 80033d0 + CorrWord[pardata.IIN][pardata.IKU] += 100; + 800331e: 4b36 ldr r3, [pc, #216] ; (80033f8 ) + 8003320: 88db ldrh r3, [r3, #6] + 8003322: b29a uxth r2, r3 + 8003324: 0011 movs r1, r2 + 8003326: 4b34 ldr r3, [pc, #208] ; (80033f8 ) + 8003328: 899b ldrh r3, [r3, #12] + 800332a: b29b uxth r3, r3 + 800332c: 001c movs r4, r3 + 800332e: 0010 movs r0, r2 + 8003330: 001d movs r5, r3 + 8003332: 4a32 ldr r2, [pc, #200] ; (80033fc ) + 8003334: 0003 movs r3, r0 + 8003336: 009b lsls r3, r3, #2 + 8003338: 181b adds r3, r3, r0 + 800333a: 009b lsls r3, r3, #2 + 800333c: 195b adds r3, r3, r5 + 800333e: 005b lsls r3, r3, #1 + 8003340: 5a9b ldrh r3, [r3, r2] + 8003342: b29b uxth r3, r3 + 8003344: 3364 adds r3, #100 ; 0x64 + 8003346: b298 uxth r0, r3 + 8003348: 4a2c ldr r2, [pc, #176] ; (80033fc ) + 800334a: 000b movs r3, r1 800334c: 009b lsls r3, r3, #2 - 800334e: 181b adds r3, r3, r0 - 8003350: 005b lsls r3, r3, #1 - 8003352: 5a9b ldrh r3, [r3, r2] - 8003354: b29b uxth r3, r3 - 8003356: 2b64 cmp r3, #100 ; 0x64 - 8003358: d928 bls.n 80033ac + 800334e: 185b adds r3, r3, r1 + 8003350: 009b lsls r3, r3, #2 + 8003352: 191b adds r3, r3, r4 + 8003354: 005b lsls r3, r3, #1 + 8003356: 1c01 adds r1, r0, #0 + 8003358: 5299 strh r1, [r3, r2] + break; + 800335a: e039 b.n 80033d0 + if(CorrWord[pardata.IIN][pardata.IKU] > 100) + 800335c: 4b26 ldr r3, [pc, #152] ; (80033f8 ) + 800335e: 88db ldrh r3, [r3, #6] + 8003360: b29b uxth r3, r3 + 8003362: 0019 movs r1, r3 + 8003364: 4b24 ldr r3, [pc, #144] ; (80033f8 ) + 8003366: 899b ldrh r3, [r3, #12] + 8003368: b29b uxth r3, r3 + 800336a: 0018 movs r0, r3 + 800336c: 4a23 ldr r2, [pc, #140] ; (80033fc ) + 800336e: 000b movs r3, r1 + 8003370: 009b lsls r3, r3, #2 + 8003372: 185b adds r3, r3, r1 + 8003374: 009b lsls r3, r3, #2 + 8003376: 181b adds r3, r3, r0 + 8003378: 005b lsls r3, r3, #1 + 800337a: 5a9b ldrh r3, [r3, r2] + 800337c: b29b uxth r3, r3 + 800337e: 2b64 cmp r3, #100 ; 0x64 + 8003380: d928 bls.n 80033d4 CorrWord[pardata.IIN][pardata.IKU] -= 100; - 800335a: 4b1d ldr r3, [pc, #116] ; (80033d0 ) - 800335c: 88db ldrh r3, [r3, #6] - 800335e: b29a uxth r2, r3 - 8003360: 0011 movs r1, r2 - 8003362: 4b1b ldr r3, [pc, #108] ; (80033d0 ) - 8003364: 899b ldrh r3, [r3, #12] - 8003366: b29b uxth r3, r3 - 8003368: 001c movs r4, r3 - 800336a: 0010 movs r0, r2 - 800336c: 001d movs r5, r3 - 800336e: 4a19 ldr r2, [pc, #100] ; (80033d4 ) - 8003370: 0003 movs r3, r0 - 8003372: 009b lsls r3, r3, #2 - 8003374: 181b adds r3, r3, r0 - 8003376: 009b lsls r3, r3, #2 - 8003378: 195b adds r3, r3, r5 - 800337a: 005b lsls r3, r3, #1 - 800337c: 5a9b ldrh r3, [r3, r2] - 800337e: b29b uxth r3, r3 - 8003380: 3b64 subs r3, #100 ; 0x64 - 8003382: b298 uxth r0, r3 - 8003384: 4a13 ldr r2, [pc, #76] ; (80033d4 ) - 8003386: 000b movs r3, r1 - 8003388: 009b lsls r3, r3, #2 - 800338a: 185b adds r3, r3, r1 - 800338c: 009b lsls r3, r3, #2 - 800338e: 191b adds r3, r3, r4 - 8003390: 005b lsls r3, r3, #1 - 8003392: 1c01 adds r1, r0, #0 - 8003394: 5299 strh r1, [r3, r2] + 8003382: 4b1d ldr r3, [pc, #116] ; (80033f8 ) + 8003384: 88db ldrh r3, [r3, #6] + 8003386: b29a uxth r2, r3 + 8003388: 0011 movs r1, r2 + 800338a: 4b1b ldr r3, [pc, #108] ; (80033f8 ) + 800338c: 899b ldrh r3, [r3, #12] + 800338e: b29b uxth r3, r3 + 8003390: 001c movs r4, r3 + 8003392: 0010 movs r0, r2 + 8003394: 001d movs r5, r3 + 8003396: 4a19 ldr r2, [pc, #100] ; (80033fc ) + 8003398: 0003 movs r3, r0 + 800339a: 009b lsls r3, r3, #2 + 800339c: 181b adds r3, r3, r0 + 800339e: 009b lsls r3, r3, #2 + 80033a0: 195b adds r3, r3, r5 + 80033a2: 005b lsls r3, r3, #1 + 80033a4: 5a9b ldrh r3, [r3, r2] + 80033a6: b29b uxth r3, r3 + 80033a8: 3b64 subs r3, #100 ; 0x64 + 80033aa: b298 uxth r0, r3 + 80033ac: 4a13 ldr r2, [pc, #76] ; (80033fc ) + 80033ae: 000b movs r3, r1 + 80033b0: 009b lsls r3, r3, #2 + 80033b2: 185b adds r3, r3, r1 + 80033b4: 009b lsls r3, r3, #2 + 80033b6: 191b adds r3, r3, r4 + 80033b8: 005b lsls r3, r3, #1 + 80033ba: 1c01 adds r1, r0, #0 + 80033bc: 5299 strh r1, [r3, r2] break; - 8003396: e009 b.n 80033ac + 80033be: e009 b.n 80033d4 break; - 8003398: 46c0 nop ; (mov r8, r8) - 800339a: e008 b.n 80033ae + 80033c0: 46c0 nop ; (mov r8, r8) + 80033c2: e008 b.n 80033d6 break; - 800339c: 46c0 nop ; (mov r8, r8) - 800339e: e006 b.n 80033ae + 80033c4: 46c0 nop ; (mov r8, r8) + 80033c6: e006 b.n 80033d6 break; - 80033a0: 46c0 nop ; (mov r8, r8) - 80033a2: e004 b.n 80033ae + 80033c8: 46c0 nop ; (mov r8, r8) + 80033ca: e004 b.n 80033d6 break; - 80033a4: 46c0 nop ; (mov r8, r8) - 80033a6: e002 b.n 80033ae + 80033cc: 46c0 nop ; (mov r8, r8) + 80033ce: e002 b.n 80033d6 break; - 80033a8: 46c0 nop ; (mov r8, r8) - 80033aa: e000 b.n 80033ae + 80033d0: 46c0 nop ; (mov r8, r8) + 80033d2: e000 b.n 80033d6 break; - 80033ac: 46c0 nop ; (mov r8, r8) + 80033d4: 46c0 nop ; (mov r8, r8) SetAndCorrect(); - 80033ae: f7fd ff5f bl 8001270 + 80033d6: f7fd ff4b bl 8001270 wrCorr(); - 80033b2: f7fe fcdb bl 8001d6c + 80033da: f7fe fcc7 bl 8001d6c for(j = 0; j < 6; j++) { - 80033b6: 231f movs r3, #31 - 80033b8: 18fb adds r3, r7, r3 - 80033ba: 2200 movs r2, #0 - 80033bc: 701a strb r2, [r3, #0] - 80033be: e022 b.n 8003406 - 80033c0: 2000028c .word 0x2000028c - 80033c4: 20000188 .word 0x20000188 - 80033c8: 20000035 .word 0x20000035 - 80033cc: 20000034 .word 0x20000034 - 80033d0: 20000098 .word 0x20000098 - 80033d4: 20000048 .word 0x20000048 - 80033d8: 00000ffe .word 0x00000ffe - 80033dc: 00000ff4 .word 0x00000ff4 - 80033e0: 00000f9a .word 0x00000f9a + 80033de: 231f movs r3, #31 + 80033e0: 18fb adds r3, r7, r3 + 80033e2: 2200 movs r2, #0 + 80033e4: 701a strb r2, [r3, #0] + 80033e6: e022 b.n 800342e + 80033e8: 20000294 .word 0x20000294 + 80033ec: 20000190 .word 0x20000190 + 80033f0: 2000003d .word 0x2000003d + 80033f4: 2000003c .word 0x2000003c + 80033f8: 200000a0 .word 0x200000a0 + 80033fc: 20000050 .word 0x20000050 + 8003400: 00000ffe .word 0x00000ffe + 8003404: 00000ff4 .word 0x00000ff4 + 8003408: 00000f9a .word 0x00000f9a tx[j] = iobuf[j]; - 80033e4: 231f movs r3, #31 - 80033e6: 18fb adds r3, r7, r3 - 80033e8: 781b ldrb r3, [r3, #0] - 80033ea: 221f movs r2, #31 - 80033ec: 18ba adds r2, r7, r2 - 80033ee: 7812 ldrb r2, [r2, #0] - 80033f0: 49de ldr r1, [pc, #888] ; (800376c ) - 80033f2: 5c89 ldrb r1, [r1, r2] - 80033f4: 4ade ldr r2, [pc, #888] ; (8003770 ) - 80033f6: 54d1 strb r1, [r2, r3] + 800340c: 231f movs r3, #31 + 800340e: 18fb adds r3, r7, r3 + 8003410: 781b ldrb r3, [r3, #0] + 8003412: 221f movs r2, #31 + 8003414: 18ba adds r2, r7, r2 + 8003416: 7812 ldrb r2, [r2, #0] + 8003418: 49de ldr r1, [pc, #888] ; (8003794 ) + 800341a: 5c89 ldrb r1, [r1, r2] + 800341c: 4ade ldr r2, [pc, #888] ; (8003798 ) + 800341e: 54d1 strb r1, [r2, r3] for(j = 0; j < 6; j++) { - 80033f8: 231f movs r3, #31 - 80033fa: 18fb adds r3, r7, r3 - 80033fc: 781a ldrb r2, [r3, #0] - 80033fe: 231f movs r3, #31 - 8003400: 18fb adds r3, r7, r3 - 8003402: 3201 adds r2, #1 - 8003404: 701a strb r2, [r3, #0] - 8003406: 231f movs r3, #31 - 8003408: 18fb adds r3, r7, r3 - 800340a: 781b ldrb r3, [r3, #0] - 800340c: 2b05 cmp r3, #5 - 800340e: d9e9 bls.n 80033e4 + 8003420: 231f movs r3, #31 + 8003422: 18fb adds r3, r7, r3 + 8003424: 781a ldrb r2, [r3, #0] + 8003426: 231f movs r3, #31 + 8003428: 18fb adds r3, r7, r3 + 800342a: 3201 adds r2, #1 + 800342c: 701a strb r2, [r3, #0] + 800342e: 231f movs r3, #31 + 8003430: 18fb adds r3, r7, r3 + 8003432: 781b ldrb r3, [r3, #0] + 8003434: 2b05 cmp r3, #5 + 8003436: d9e9 bls.n 800340c strtOut(6); - 8003410: 2006 movs r0, #6 - 8003412: f7ff f961 bl 80026d8 + 8003438: 2006 movs r0, #6 + 800343a: f7ff f961 bl 8002700 break; - 8003416: f000 fc14 bl 8003c42 + 800343e: f000 fc14 bl 8003c6a if((regs.ch[0] > (5011 - addr.sh)) || (iobuf[6] != (regs.ch[0] << 1))) - 800341a: 230c movs r3, #12 - 800341c: 18fb adds r3, r7, r3 - 800341e: 781b ldrb r3, [r3, #0] - 8003420: 001a movs r2, r3 - 8003422: 2310 movs r3, #16 - 8003424: 18fb adds r3, r7, r3 - 8003426: 881b ldrh r3, [r3, #0] - 8003428: 0019 movs r1, r3 - 800342a: 4bd2 ldr r3, [pc, #840] ; (8003774 ) - 800342c: 1a5b subs r3, r3, r1 - 800342e: 429a cmp r2, r3 - 8003430: dc08 bgt.n 8003444 - 8003432: 4bce ldr r3, [pc, #824] ; (800376c ) - 8003434: 799b ldrb r3, [r3, #6] - 8003436: 001a movs r2, r3 - 8003438: 230c movs r3, #12 - 800343a: 18fb adds r3, r7, r3 - 800343c: 781b ldrb r3, [r3, #0] - 800343e: 005b lsls r3, r3, #1 - 8003440: 429a cmp r2, r3 - 8003442: d012 beq.n 800346a + 8003442: 230c movs r3, #12 + 8003444: 18fb adds r3, r7, r3 + 8003446: 781b ldrb r3, [r3, #0] + 8003448: 001a movs r2, r3 + 800344a: 2310 movs r3, #16 + 800344c: 18fb adds r3, r7, r3 + 800344e: 881b ldrh r3, [r3, #0] + 8003450: 0019 movs r1, r3 + 8003452: 4bd2 ldr r3, [pc, #840] ; (800379c ) + 8003454: 1a5b subs r3, r3, r1 + 8003456: 429a cmp r2, r3 + 8003458: dc08 bgt.n 800346c + 800345a: 4bce ldr r3, [pc, #824] ; (8003794 ) + 800345c: 799b ldrb r3, [r3, #6] + 800345e: 001a movs r2, r3 + 8003460: 230c movs r3, #12 + 8003462: 18fb adds r3, r7, r3 + 8003464: 781b ldrb r3, [r3, #0] + 8003466: 005b lsls r3, r3, #1 + 8003468: 429a cmp r2, r3 + 800346a: d012 beq.n 8003492 tx[0] = iobuf[0]; - 8003444: 4bc9 ldr r3, [pc, #804] ; (800376c ) - 8003446: 781a ldrb r2, [r3, #0] - 8003448: 4bc9 ldr r3, [pc, #804] ; (8003770 ) - 800344a: 701a strb r2, [r3, #0] + 800346c: 4bc9 ldr r3, [pc, #804] ; (8003794 ) + 800346e: 781a ldrb r2, [r3, #0] + 8003470: 4bc9 ldr r3, [pc, #804] ; (8003798 ) + 8003472: 701a strb r2, [r3, #0] tx[1] = (iobuf[1] | 0x80); - 800344c: 4bc7 ldr r3, [pc, #796] ; (800376c ) - 800344e: 785b ldrb r3, [r3, #1] - 8003450: 2280 movs r2, #128 ; 0x80 - 8003452: 4252 negs r2, r2 - 8003454: 4313 orrs r3, r2 - 8003456: b2da uxtb r2, r3 - 8003458: 4bc5 ldr r3, [pc, #788] ; (8003770 ) - 800345a: 705a strb r2, [r3, #1] + 8003474: 4bc7 ldr r3, [pc, #796] ; (8003794 ) + 8003476: 785b ldrb r3, [r3, #1] + 8003478: 2280 movs r2, #128 ; 0x80 + 800347a: 4252 negs r2, r2 + 800347c: 4313 orrs r3, r2 + 800347e: b2da uxtb r2, r3 + 8003480: 4bc5 ldr r3, [pc, #788] ; (8003798 ) + 8003482: 705a strb r2, [r3, #1] tx[2] = 0x03; - 800345c: 4bc4 ldr r3, [pc, #784] ; (8003770 ) - 800345e: 2203 movs r2, #3 - 8003460: 709a strb r2, [r3, #2] + 8003484: 4bc4 ldr r3, [pc, #784] ; (8003798 ) + 8003486: 2203 movs r2, #3 + 8003488: 709a strb r2, [r3, #2] strtOut(3); - 8003462: 2003 movs r0, #3 - 8003464: f7ff f938 bl 80026d8 - 8003468: e0b6 b.n 80035d8 + 800348a: 2003 movs r0, #3 + 800348c: f7ff f938 bl 8002700 + 8003490: e0b6 b.n 8003600 j = 8 + iobuf[6]; - 800346a: 4bc0 ldr r3, [pc, #768] ; (800376c ) - 800346c: 799a ldrb r2, [r3, #6] - 800346e: 231f movs r3, #31 - 8003470: 18fb adds r3, r7, r3 - 8003472: 3208 adds r2, #8 - 8003474: 701a strb r2, [r3, #0] + 8003492: 4bc0 ldr r3, [pc, #768] ; (8003794 ) + 8003494: 799a ldrb r2, [r3, #6] + 8003496: 231f movs r3, #31 + 8003498: 18fb adds r3, r7, r3 + 800349a: 3208 adds r2, #8 + 800349c: 701a strb r2, [r3, #0] if(iolen > j) - 8003476: 4bc0 ldr r3, [pc, #768] ; (8003778 ) - 8003478: 781b ldrb r3, [r3, #0] - 800347a: 221f movs r2, #31 - 800347c: 18ba adds r2, r7, r2 - 800347e: 7812 ldrb r2, [r2, #0] - 8003480: 429a cmp r2, r3 - 8003482: d301 bcc.n 8003488 - 8003484: f000 fbdf bl 8003c46 + 800349e: 4bc0 ldr r3, [pc, #768] ; (80037a0 ) + 80034a0: 781b ldrb r3, [r3, #0] + 80034a2: 221f movs r2, #31 + 80034a4: 18ba adds r2, r7, r2 + 80034a6: 7812 ldrb r2, [r2, #0] + 80034a8: 429a cmp r2, r3 + 80034aa: d301 bcc.n 80034b0 + 80034ac: f000 fbdf bl 8003c6e iolen = 0; - 8003488: 4bbb ldr r3, [pc, #748] ; (8003778 ) - 800348a: 2200 movs r2, #0 - 800348c: 701a strb r2, [r3, #0] + 80034b0: 4bbb ldr r3, [pc, #748] ; (80037a0 ) + 80034b2: 2200 movs r2, #0 + 80034b4: 701a strb r2, [r3, #0] crc.ch[0] = iobuf[j - 1]; - 800348e: 231f movs r3, #31 - 8003490: 18fb adds r3, r7, r3 - 8003492: 781b ldrb r3, [r3, #0] - 8003494: 3b01 subs r3, #1 - 8003496: 4ab5 ldr r2, [pc, #724] ; (800376c ) - 8003498: 5cd2 ldrb r2, [r2, r3] - 800349a: 2314 movs r3, #20 - 800349c: 18fb adds r3, r7, r3 - 800349e: 701a strb r2, [r3, #0] - crc.ch[1] = iobuf[j]; - 80034a0: 231f movs r3, #31 - 80034a2: 18fb adds r3, r7, r3 - 80034a4: 781b ldrb r3, [r3, #0] - 80034a6: 4ab1 ldr r2, [pc, #708] ; (800376c ) - 80034a8: 5cd2 ldrb r2, [r2, r3] - 80034aa: 2314 movs r3, #20 - 80034ac: 18fb adds r3, r7, r3 - 80034ae: 705a strb r2, [r3, #1] - if(crc.sh == Crc16(j - 1)) - 80034b0: 2314 movs r3, #20 - 80034b2: 18fb adds r3, r7, r3 - 80034b4: 881c ldrh r4, [r3, #0] 80034b6: 231f movs r3, #31 80034b8: 18fb adds r3, r7, r3 80034ba: 781b ldrb r3, [r3, #0] - 80034bc: b29b uxth r3, r3 - 80034be: 3b01 subs r3, #1 - 80034c0: b29b uxth r3, r3 - 80034c2: 0018 movs r0, r3 - 80034c4: f7ff f954 bl 8002770 - 80034c8: 0003 movs r3, r0 - 80034ca: 429c cmp r4, r3 - 80034cc: d001 beq.n 80034d2 - 80034ce: f000 fbba bl 8003c46 - pch = (uint8_t *) &pardata.IIN + ((addr.sh - 5001) << 1); - 80034d2: 2310 movs r3, #16 + 80034bc: 3b01 subs r3, #1 + 80034be: 4ab5 ldr r2, [pc, #724] ; (8003794 ) + 80034c0: 5cd2 ldrb r2, [r2, r3] + 80034c2: 2314 movs r3, #20 + 80034c4: 18fb adds r3, r7, r3 + 80034c6: 701a strb r2, [r3, #0] + crc.ch[1] = iobuf[j]; + 80034c8: 231f movs r3, #31 + 80034ca: 18fb adds r3, r7, r3 + 80034cc: 781b ldrb r3, [r3, #0] + 80034ce: 4ab1 ldr r2, [pc, #708] ; (8003794 ) + 80034d0: 5cd2 ldrb r2, [r2, r3] + 80034d2: 2314 movs r3, #20 80034d4: 18fb adds r3, r7, r3 - 80034d6: 881b ldrh r3, [r3, #0] - 80034d8: 4aa8 ldr r2, [pc, #672] ; (800377c ) - 80034da: 4694 mov ip, r2 - 80034dc: 4463 add r3, ip - 80034de: 005b lsls r3, r3, #1 - 80034e0: 001a movs r2, r3 - 80034e2: 4ba7 ldr r3, [pc, #668] ; (8003780 ) - 80034e4: 18d3 adds r3, r2, r3 - 80034e6: 61bb str r3, [r7, #24] + 80034d6: 705a strb r2, [r3, #1] + if(crc.sh == Crc16(j - 1)) + 80034d8: 2314 movs r3, #20 + 80034da: 18fb adds r3, r7, r3 + 80034dc: 881c ldrh r4, [r3, #0] + 80034de: 231f movs r3, #31 + 80034e0: 18fb adds r3, r7, r3 + 80034e2: 781b ldrb r3, [r3, #0] + 80034e4: b29b uxth r3, r3 + 80034e6: 3b01 subs r3, #1 + 80034e8: b29b uxth r3, r3 + 80034ea: 0018 movs r0, r3 + 80034ec: f7ff f954 bl 8002798 + 80034f0: 0003 movs r3, r0 + 80034f2: 429c cmp r4, r3 + 80034f4: d001 beq.n 80034fa + 80034f6: f000 fbba bl 8003c6e + pch = (uint8_t *) &pardata.IIN + ((addr.sh - 5001) << 1); + 80034fa: 2310 movs r3, #16 + 80034fc: 18fb adds r3, r7, r3 + 80034fe: 881b ldrh r3, [r3, #0] + 8003500: 4aa8 ldr r2, [pc, #672] ; (80037a4 ) + 8003502: 4694 mov ip, r2 + 8003504: 4463 add r3, ip + 8003506: 005b lsls r3, r3, #1 + 8003508: 001a movs r2, r3 + 800350a: 4ba7 ldr r3, [pc, #668] ; (80037a8 ) + 800350c: 18d3 adds r3, r2, r3 + 800350e: 61bb str r3, [r7, #24] for(j = 0; j < iobuf[6]; j++) - 80034e8: 231f movs r3, #31 - 80034ea: 18fb adds r3, r7, r3 - 80034ec: 2200 movs r2, #0 - 80034ee: 701a strb r2, [r3, #0] - 80034f0: e016 b.n 8003520 + 8003510: 231f movs r3, #31 + 8003512: 18fb adds r3, r7, r3 + 8003514: 2200 movs r2, #0 + 8003516: 701a strb r2, [r3, #0] + 8003518: e016 b.n 8003548 *(pch + (j ^ 1)) = iobuf[j + 7]; - 80034f2: 231f movs r3, #31 - 80034f4: 18fb adds r3, r7, r3 - 80034f6: 781b ldrb r3, [r3, #0] - 80034f8: 2201 movs r2, #1 - 80034fa: 4053 eors r3, r2 - 80034fc: b2db uxtb r3, r3 - 80034fe: 001a movs r2, r3 - 8003500: 69bb ldr r3, [r7, #24] - 8003502: 189b adds r3, r3, r2 - 8003504: 221f movs r2, #31 - 8003506: 18ba adds r2, r7, r2 - 8003508: 7812 ldrb r2, [r2, #0] - 800350a: 3207 adds r2, #7 - 800350c: 4997 ldr r1, [pc, #604] ; (800376c ) - 800350e: 5c8a ldrb r2, [r1, r2] - 8003510: 701a strb r2, [r3, #0] + 800351a: 231f movs r3, #31 + 800351c: 18fb adds r3, r7, r3 + 800351e: 781b ldrb r3, [r3, #0] + 8003520: 2201 movs r2, #1 + 8003522: 4053 eors r3, r2 + 8003524: b2db uxtb r3, r3 + 8003526: 001a movs r2, r3 + 8003528: 69bb ldr r3, [r7, #24] + 800352a: 189b adds r3, r3, r2 + 800352c: 221f movs r2, #31 + 800352e: 18ba adds r2, r7, r2 + 8003530: 7812 ldrb r2, [r2, #0] + 8003532: 3207 adds r2, #7 + 8003534: 4997 ldr r1, [pc, #604] ; (8003794 ) + 8003536: 5c8a ldrb r2, [r1, r2] + 8003538: 701a strb r2, [r3, #0] for(j = 0; j < iobuf[6]; j++) - 8003512: 231f movs r3, #31 - 8003514: 18fb adds r3, r7, r3 - 8003516: 781a ldrb r2, [r3, #0] - 8003518: 231f movs r3, #31 - 800351a: 18fb adds r3, r7, r3 - 800351c: 3201 adds r2, #1 - 800351e: 701a strb r2, [r3, #0] - 8003520: 4b92 ldr r3, [pc, #584] ; (800376c ) - 8003522: 799b ldrb r3, [r3, #6] - 8003524: 221f movs r2, #31 - 8003526: 18ba adds r2, r7, r2 - 8003528: 7812 ldrb r2, [r2, #0] - 800352a: 429a cmp r2, r3 - 800352c: d3e1 bcc.n 80034f2 + 800353a: 231f movs r3, #31 + 800353c: 18fb adds r3, r7, r3 + 800353e: 781a ldrb r2, [r3, #0] + 8003540: 231f movs r3, #31 + 8003542: 18fb adds r3, r7, r3 + 8003544: 3201 adds r2, #1 + 8003546: 701a strb r2, [r3, #0] + 8003548: 4b92 ldr r3, [pc, #584] ; (8003794 ) + 800354a: 799b ldrb r3, [r3, #6] + 800354c: 221f movs r2, #31 + 800354e: 18ba adds r2, r7, r2 + 8003550: 7812 ldrb r2, [r2, #0] + 8003552: 429a cmp r2, r3 + 8003554: d3e1 bcc.n 800351a if((pardata.IIN > ICP) || (pardata.IKU > Ku1000) || (pardata.IFV > Hp10) || (pardata.IFN > Lp100000) || (pardata.VAL > mV)) - 800352e: 4b95 ldr r3, [pc, #596] ; (8003784 ) - 8003530: 88db ldrh r3, [r3, #6] - 8003532: b29b uxth r3, r3 - 8003534: 2b01 cmp r3, #1 - 8003536: d813 bhi.n 8003560 - 8003538: 4b92 ldr r3, [pc, #584] ; (8003784 ) - 800353a: 899b ldrh r3, [r3, #12] - 800353c: b29b uxth r3, r3 - 800353e: 2b0c cmp r3, #12 - 8003540: d80e bhi.n 8003560 - 8003542: 4b90 ldr r3, [pc, #576] ; (8003784 ) - 8003544: 891b ldrh r3, [r3, #8] - 8003546: b29b uxth r3, r3 - 8003548: 2b04 cmp r3, #4 - 800354a: d809 bhi.n 8003560 - 800354c: 4b8d ldr r3, [pc, #564] ; (8003784 ) - 800354e: 895b ldrh r3, [r3, #10] - 8003550: b29b uxth r3, r3 - 8003552: 2b07 cmp r3, #7 - 8003554: d804 bhi.n 8003560 - 8003556: 4b8b ldr r3, [pc, #556] ; (8003784 ) - 8003558: 8b1b ldrh r3, [r3, #24] + 8003556: 4b95 ldr r3, [pc, #596] ; (80037ac ) + 8003558: 88db ldrh r3, [r3, #6] 800355a: b29b uxth r3, r3 - 800355c: 2b08 cmp r3, #8 - 800355e: d914 bls.n 800358a + 800355c: 2b01 cmp r3, #1 + 800355e: d813 bhi.n 8003588 + 8003560: 4b92 ldr r3, [pc, #584] ; (80037ac ) + 8003562: 899b ldrh r3, [r3, #12] + 8003564: b29b uxth r3, r3 + 8003566: 2b0c cmp r3, #12 + 8003568: d80e bhi.n 8003588 + 800356a: 4b90 ldr r3, [pc, #576] ; (80037ac ) + 800356c: 891b ldrh r3, [r3, #8] + 800356e: b29b uxth r3, r3 + 8003570: 2b04 cmp r3, #4 + 8003572: d809 bhi.n 8003588 + 8003574: 4b8d ldr r3, [pc, #564] ; (80037ac ) + 8003576: 895b ldrh r3, [r3, #10] + 8003578: b29b uxth r3, r3 + 800357a: 2b07 cmp r3, #7 + 800357c: d804 bhi.n 8003588 + 800357e: 4b8b ldr r3, [pc, #556] ; (80037ac ) + 8003580: 8b1b ldrh r3, [r3, #24] + 8003582: b29b uxth r3, r3 + 8003584: 2b08 cmp r3, #8 + 8003586: d914 bls.n 80035b2 rdCorr(); - 8003560: f7fe fc62 bl 8001e28 + 8003588: f7fe fc4e bl 8001e28 tx[0] = iobuf[0]; - 8003564: 4b81 ldr r3, [pc, #516] ; (800376c ) - 8003566: 781a ldrb r2, [r3, #0] - 8003568: 4b81 ldr r3, [pc, #516] ; (8003770 ) - 800356a: 701a strb r2, [r3, #0] + 800358c: 4b81 ldr r3, [pc, #516] ; (8003794 ) + 800358e: 781a ldrb r2, [r3, #0] + 8003590: 4b81 ldr r3, [pc, #516] ; (8003798 ) + 8003592: 701a strb r2, [r3, #0] tx[1] = (iobuf[1] | 0x80); - 800356c: 4b7f ldr r3, [pc, #508] ; (800376c ) - 800356e: 785b ldrb r3, [r3, #1] - 8003570: 2280 movs r2, #128 ; 0x80 - 8003572: 4252 negs r2, r2 - 8003574: 4313 orrs r3, r2 - 8003576: b2da uxtb r2, r3 - 8003578: 4b7d ldr r3, [pc, #500] ; (8003770 ) - 800357a: 705a strb r2, [r3, #1] + 8003594: 4b7f ldr r3, [pc, #508] ; (8003794 ) + 8003596: 785b ldrb r3, [r3, #1] + 8003598: 2280 movs r2, #128 ; 0x80 + 800359a: 4252 negs r2, r2 + 800359c: 4313 orrs r3, r2 + 800359e: b2da uxtb r2, r3 + 80035a0: 4b7d ldr r3, [pc, #500] ; (8003798 ) + 80035a2: 705a strb r2, [r3, #1] tx[2] = 0x03; - 800357c: 4b7c ldr r3, [pc, #496] ; (8003770 ) - 800357e: 2203 movs r2, #3 - 8003580: 709a strb r2, [r3, #2] + 80035a4: 4b7c ldr r3, [pc, #496] ; (8003798 ) + 80035a6: 2203 movs r2, #3 + 80035a8: 709a strb r2, [r3, #2] strtOut(3); - 8003582: 2003 movs r0, #3 - 8003584: f7ff f8a8 bl 80026d8 - 8003588: e026 b.n 80035d8 + 80035aa: 2003 movs r0, #3 + 80035ac: f7ff f8a8 bl 8002700 + 80035b0: e026 b.n 8003600 needSave = true; - 800358a: 4b7f ldr r3, [pc, #508] ; (8003788 ) - 800358c: 2201 movs r2, #1 - 800358e: 701a strb r2, [r3, #0] + 80035b2: 4b7f ldr r3, [pc, #508] ; (80037b0 ) + 80035b4: 2201 movs r2, #1 + 80035b6: 701a strb r2, [r3, #0] if(iobuf[0]) - 8003590: 4b76 ldr r3, [pc, #472] ; (800376c ) - 8003592: 781b ldrb r3, [r3, #0] - 8003594: 2b00 cmp r3, #0 - 8003596: d100 bne.n 800359a - 8003598: e355 b.n 8003c46 + 80035b8: 4b76 ldr r3, [pc, #472] ; (8003794 ) + 80035ba: 781b ldrb r3, [r3, #0] + 80035bc: 2b00 cmp r3, #0 + 80035be: d100 bne.n 80035c2 + 80035c0: e355 b.n 8003c6e for(j = 0; j < 6; j++) { - 800359a: 231f movs r3, #31 - 800359c: 18fb adds r3, r7, r3 - 800359e: 2200 movs r2, #0 - 80035a0: 701a strb r2, [r3, #0] - 80035a2: e010 b.n 80035c6 + 80035c2: 231f movs r3, #31 + 80035c4: 18fb adds r3, r7, r3 + 80035c6: 2200 movs r2, #0 + 80035c8: 701a strb r2, [r3, #0] + 80035ca: e010 b.n 80035ee tx[j] = iobuf[j]; - 80035a4: 231f movs r3, #31 - 80035a6: 18fb adds r3, r7, r3 - 80035a8: 781b ldrb r3, [r3, #0] - 80035aa: 221f movs r2, #31 - 80035ac: 18ba adds r2, r7, r2 - 80035ae: 7812 ldrb r2, [r2, #0] - 80035b0: 496e ldr r1, [pc, #440] ; (800376c ) - 80035b2: 5c89 ldrb r1, [r1, r2] - 80035b4: 4a6e ldr r2, [pc, #440] ; (8003770 ) - 80035b6: 54d1 strb r1, [r2, r3] + 80035cc: 231f movs r3, #31 + 80035ce: 18fb adds r3, r7, r3 + 80035d0: 781b ldrb r3, [r3, #0] + 80035d2: 221f movs r2, #31 + 80035d4: 18ba adds r2, r7, r2 + 80035d6: 7812 ldrb r2, [r2, #0] + 80035d8: 496e ldr r1, [pc, #440] ; (8003794 ) + 80035da: 5c89 ldrb r1, [r1, r2] + 80035dc: 4a6e ldr r2, [pc, #440] ; (8003798 ) + 80035de: 54d1 strb r1, [r2, r3] for(j = 0; j < 6; j++) { - 80035b8: 231f movs r3, #31 - 80035ba: 18fb adds r3, r7, r3 - 80035bc: 781a ldrb r2, [r3, #0] - 80035be: 231f movs r3, #31 - 80035c0: 18fb adds r3, r7, r3 - 80035c2: 3201 adds r2, #1 - 80035c4: 701a strb r2, [r3, #0] - 80035c6: 231f movs r3, #31 - 80035c8: 18fb adds r3, r7, r3 - 80035ca: 781b ldrb r3, [r3, #0] - 80035cc: 2b05 cmp r3, #5 - 80035ce: d9e9 bls.n 80035a4 + 80035e0: 231f movs r3, #31 + 80035e2: 18fb adds r3, r7, r3 + 80035e4: 781a ldrb r2, [r3, #0] + 80035e6: 231f movs r3, #31 + 80035e8: 18fb adds r3, r7, r3 + 80035ea: 3201 adds r2, #1 + 80035ec: 701a strb r2, [r3, #0] + 80035ee: 231f movs r3, #31 + 80035f0: 18fb adds r3, r7, r3 + 80035f2: 781b ldrb r3, [r3, #0] + 80035f4: 2b05 cmp r3, #5 + 80035f6: d9e9 bls.n 80035cc strtOut(6); - 80035d0: 2006 movs r0, #6 - 80035d2: f7ff f881 bl 80026d8 + 80035f8: 2006 movs r0, #6 + 80035fa: f7ff f881 bl 8002700 break; - 80035d6: e336 b.n 8003c46 - 80035d8: e335 b.n 8003c46 + 80035fe: e336 b.n 8003c6e + 8003600: e335 b.n 8003c6e tmp = 3; - 80035da: 231e movs r3, #30 - 80035dc: 18fb adds r3, r7, r3 - 80035de: 2203 movs r2, #3 - 80035e0: 701a strb r2, [r3, #0] + 8003602: 231e movs r3, #30 + 8003604: 18fb adds r3, r7, r3 + 8003606: 2203 movs r2, #3 + 8003608: 701a strb r2, [r3, #0] tmp1 = 2; - 80035e2: 231d movs r3, #29 - 80035e4: 18fb adds r3, r7, r3 - 80035e6: 2202 movs r2, #2 - 80035e8: 701a strb r2, [r3, #0] + 800360a: 231d movs r3, #29 + 800360c: 18fb adds r3, r7, r3 + 800360e: 2202 movs r2, #2 + 8003610: 701a strb r2, [r3, #0] if(addr.sh == 7002) - 80035ea: 2310 movs r3, #16 - 80035ec: 18fb adds r3, r7, r3 - 80035ee: 881b ldrh r3, [r3, #0] - 80035f0: 4a66 ldr r2, [pc, #408] ; (800378c ) - 80035f2: 4293 cmp r3, r2 - 80035f4: d10a bne.n 800360c + 8003612: 2310 movs r3, #16 + 8003614: 18fb adds r3, r7, r3 + 8003616: 881b ldrh r3, [r3, #0] + 8003618: 4a66 ldr r2, [pc, #408] ; (80037b4 ) + 800361a: 4293 cmp r3, r2 + 800361c: d10a bne.n 8003634 tmp <<= 1; - 80035f6: 231e movs r3, #30 - 80035f8: 18fa adds r2, r7, r3 - 80035fa: 231e movs r3, #30 - 80035fc: 18fb adds r3, r7, r3 - 80035fe: 781b ldrb r3, [r3, #0] - 8003600: 18db adds r3, r3, r3 - 8003602: 7013 strb r3, [r2, #0] - tmp1 = 1; - 8003604: 231d movs r3, #29 - 8003606: 18fb adds r3, r7, r3 - 8003608: 2201 movs r2, #1 - 800360a: 701a strb r2, [r3, #0] - if((regs.ch[0] > tmp) || (iobuf[6] != (regs.ch[0] << tmp1))) - 800360c: 230c movs r3, #12 - 800360e: 18fb adds r3, r7, r3 - 8003610: 781b ldrb r3, [r3, #0] - 8003612: 221e movs r2, #30 - 8003614: 18ba adds r2, r7, r2 - 8003616: 7812 ldrb r2, [r2, #0] - 8003618: 429a cmp r2, r3 - 800361a: d30d bcc.n 8003638 - 800361c: 4b53 ldr r3, [pc, #332] ; (800376c ) - 800361e: 799b ldrb r3, [r3, #6] - 8003620: 001a movs r2, r3 - 8003622: 230c movs r3, #12 + 800361e: 231e movs r3, #30 + 8003620: 18fa adds r2, r7, r3 + 8003622: 231e movs r3, #30 8003624: 18fb adds r3, r7, r3 8003626: 781b ldrb r3, [r3, #0] - 8003628: 0019 movs r1, r3 - 800362a: 231d movs r3, #29 - 800362c: 18fb adds r3, r7, r3 - 800362e: 781b ldrb r3, [r3, #0] - 8003630: 4099 lsls r1, r3 - 8003632: 000b movs r3, r1 - 8003634: 429a cmp r2, r3 - 8003636: d012 beq.n 800365e + 8003628: 18db adds r3, r3, r3 + 800362a: 7013 strb r3, [r2, #0] + tmp1 = 1; + 800362c: 231d movs r3, #29 + 800362e: 18fb adds r3, r7, r3 + 8003630: 2201 movs r2, #1 + 8003632: 701a strb r2, [r3, #0] + if((regs.ch[0] > tmp) || (iobuf[6] != (regs.ch[0] << tmp1))) + 8003634: 230c movs r3, #12 + 8003636: 18fb adds r3, r7, r3 + 8003638: 781b ldrb r3, [r3, #0] + 800363a: 221e movs r2, #30 + 800363c: 18ba adds r2, r7, r2 + 800363e: 7812 ldrb r2, [r2, #0] + 8003640: 429a cmp r2, r3 + 8003642: d30d bcc.n 8003660 + 8003644: 4b53 ldr r3, [pc, #332] ; (8003794 ) + 8003646: 799b ldrb r3, [r3, #6] + 8003648: 001a movs r2, r3 + 800364a: 230c movs r3, #12 + 800364c: 18fb adds r3, r7, r3 + 800364e: 781b ldrb r3, [r3, #0] + 8003650: 0019 movs r1, r3 + 8003652: 231d movs r3, #29 + 8003654: 18fb adds r3, r7, r3 + 8003656: 781b ldrb r3, [r3, #0] + 8003658: 4099 lsls r1, r3 + 800365a: 000b movs r3, r1 + 800365c: 429a cmp r2, r3 + 800365e: d012 beq.n 8003686 tx[0] = iobuf[0]; - 8003638: 4b4c ldr r3, [pc, #304] ; (800376c ) - 800363a: 781a ldrb r2, [r3, #0] - 800363c: 4b4c ldr r3, [pc, #304] ; (8003770 ) - 800363e: 701a strb r2, [r3, #0] + 8003660: 4b4c ldr r3, [pc, #304] ; (8003794 ) + 8003662: 781a ldrb r2, [r3, #0] + 8003664: 4b4c ldr r3, [pc, #304] ; (8003798 ) + 8003666: 701a strb r2, [r3, #0] tx[1] |= 0x80; //модификация РєРѕРґР° функции РЅР° ошибку - 8003640: 4b4b ldr r3, [pc, #300] ; (8003770 ) - 8003642: 785b ldrb r3, [r3, #1] - 8003644: 2280 movs r2, #128 ; 0x80 - 8003646: 4252 negs r2, r2 - 8003648: 4313 orrs r3, r2 - 800364a: b2da uxtb r2, r3 - 800364c: 4b48 ldr r3, [pc, #288] ; (8003770 ) - 800364e: 705a strb r2, [r3, #1] + 8003668: 4b4b ldr r3, [pc, #300] ; (8003798 ) + 800366a: 785b ldrb r3, [r3, #1] + 800366c: 2280 movs r2, #128 ; 0x80 + 800366e: 4252 negs r2, r2 + 8003670: 4313 orrs r3, r2 + 8003672: b2da uxtb r2, r3 + 8003674: 4b48 ldr r3, [pc, #288] ; (8003798 ) + 8003676: 705a strb r2, [r3, #1] tx[2] = 0x03; //Адрес данных указанный РІ запросе РЅРµ доступен - 8003650: 4b47 ldr r3, [pc, #284] ; (8003770 ) - 8003652: 2203 movs r2, #3 - 8003654: 709a strb r2, [r3, #2] + 8003678: 4b47 ldr r3, [pc, #284] ; (8003798 ) + 800367a: 2203 movs r2, #3 + 800367c: 709a strb r2, [r3, #2] strtOut(3); - 8003656: 2003 movs r0, #3 - 8003658: f7ff f83e bl 80026d8 + 800367e: 2003 movs r0, #3 + 8003680: f7ff f83e bl 8002700 break; - 800365c: e2f5 b.n 8003c4a + 8003684: e2f5 b.n 8003c72 j = 8 + iobuf[6]; - 800365e: 4b43 ldr r3, [pc, #268] ; (800376c ) - 8003660: 799a ldrb r2, [r3, #6] - 8003662: 231f movs r3, #31 - 8003664: 18fb adds r3, r7, r3 - 8003666: 3208 adds r2, #8 - 8003668: 701a strb r2, [r3, #0] + 8003686: 4b43 ldr r3, [pc, #268] ; (8003794 ) + 8003688: 799a ldrb r2, [r3, #6] + 800368a: 231f movs r3, #31 + 800368c: 18fb adds r3, r7, r3 + 800368e: 3208 adds r2, #8 + 8003690: 701a strb r2, [r3, #0] if(iolen > j) - 800366a: 4b43 ldr r3, [pc, #268] ; (8003778 ) - 800366c: 781b ldrb r3, [r3, #0] - 800366e: 221f movs r2, #31 - 8003670: 18ba adds r2, r7, r2 - 8003672: 7812 ldrb r2, [r2, #0] - 8003674: 429a cmp r2, r3 - 8003676: d300 bcc.n 800367a - 8003678: e2e7 b.n 8003c4a + 8003692: 4b43 ldr r3, [pc, #268] ; (80037a0 ) + 8003694: 781b ldrb r3, [r3, #0] + 8003696: 221f movs r2, #31 + 8003698: 18ba adds r2, r7, r2 + 800369a: 7812 ldrb r2, [r2, #0] + 800369c: 429a cmp r2, r3 + 800369e: d300 bcc.n 80036a2 + 80036a0: e2e7 b.n 8003c72 crc.ch[0] = iobuf[j - 1]; - 800367a: 231f movs r3, #31 - 800367c: 18fb adds r3, r7, r3 - 800367e: 781b ldrb r3, [r3, #0] - 8003680: 3b01 subs r3, #1 - 8003682: 4a3a ldr r2, [pc, #232] ; (800376c ) - 8003684: 5cd2 ldrb r2, [r2, r3] - 8003686: 2314 movs r3, #20 - 8003688: 18fb adds r3, r7, r3 - 800368a: 701a strb r2, [r3, #0] - crc.ch[1] = iobuf[j]; - 800368c: 231f movs r3, #31 - 800368e: 18fb adds r3, r7, r3 - 8003690: 781b ldrb r3, [r3, #0] - 8003692: 4a36 ldr r2, [pc, #216] ; (800376c ) - 8003694: 5cd2 ldrb r2, [r2, r3] - 8003696: 2314 movs r3, #20 - 8003698: 18fb adds r3, r7, r3 - 800369a: 705a strb r2, [r3, #1] - if(crc.sh == Crc16(j - 1)) - 800369c: 2314 movs r3, #20 - 800369e: 18fb adds r3, r7, r3 - 80036a0: 881c ldrh r4, [r3, #0] 80036a2: 231f movs r3, #31 80036a4: 18fb adds r3, r7, r3 80036a6: 781b ldrb r3, [r3, #0] - 80036a8: b29b uxth r3, r3 - 80036aa: 3b01 subs r3, #1 - 80036ac: b29b uxth r3, r3 - 80036ae: 0018 movs r0, r3 - 80036b0: f7ff f85e bl 8002770 - 80036b4: 0003 movs r3, r0 - 80036b6: 429c cmp r4, r3 - 80036b8: d000 beq.n 80036bc - 80036ba: e2c6 b.n 8003c4a - if(iobuf[6] == 4) - 80036bc: 4b2b ldr r3, [pc, #172] ; (800376c ) - 80036be: 799b ldrb r3, [r3, #6] - 80036c0: 2b04 cmp r3, #4 - 80036c2: d128 bne.n 8003716 - for(j = 0; j < 4; j++) - 80036c4: 231f movs r3, #31 + 80036a8: 3b01 subs r3, #1 + 80036aa: 4a3a ldr r2, [pc, #232] ; (8003794 ) + 80036ac: 5cd2 ldrb r2, [r2, r3] + 80036ae: 2314 movs r3, #20 + 80036b0: 18fb adds r3, r7, r3 + 80036b2: 701a strb r2, [r3, #0] + crc.ch[1] = iobuf[j]; + 80036b4: 231f movs r3, #31 + 80036b6: 18fb adds r3, r7, r3 + 80036b8: 781b ldrb r3, [r3, #0] + 80036ba: 4a36 ldr r2, [pc, #216] ; (8003794 ) + 80036bc: 5cd2 ldrb r2, [r2, r3] + 80036be: 2314 movs r3, #20 + 80036c0: 18fb adds r3, r7, r3 + 80036c2: 705a strb r2, [r3, #1] + if(crc.sh == Crc16(j - 1)) + 80036c4: 2314 movs r3, #20 80036c6: 18fb adds r3, r7, r3 - 80036c8: 2200 movs r2, #0 - 80036ca: 701a strb r2, [r3, #0] - 80036cc: e014 b.n 80036f8 - f.ch[3 - j] = iobuf[7 + j]; - 80036ce: 231f movs r3, #31 - 80036d0: 18fb adds r3, r7, r3 - 80036d2: 781b ldrb r3, [r3, #0] - 80036d4: 2203 movs r2, #3 - 80036d6: 1ad3 subs r3, r2, r3 - 80036d8: 221f movs r2, #31 - 80036da: 18ba adds r2, r7, r2 - 80036dc: 7812 ldrb r2, [r2, #0] - 80036de: 3207 adds r2, #7 - 80036e0: 4922 ldr r1, [pc, #136] ; (800376c ) - 80036e2: 5c89 ldrb r1, [r1, r2] - 80036e4: 2208 movs r2, #8 - 80036e6: 18ba adds r2, r7, r2 - 80036e8: 54d1 strb r1, [r2, r3] + 80036c8: 881c ldrh r4, [r3, #0] + 80036ca: 231f movs r3, #31 + 80036cc: 18fb adds r3, r7, r3 + 80036ce: 781b ldrb r3, [r3, #0] + 80036d0: b29b uxth r3, r3 + 80036d2: 3b01 subs r3, #1 + 80036d4: b29b uxth r3, r3 + 80036d6: 0018 movs r0, r3 + 80036d8: f7ff f85e bl 8002798 + 80036dc: 0003 movs r3, r0 + 80036de: 429c cmp r4, r3 + 80036e0: d000 beq.n 80036e4 + 80036e2: e2c6 b.n 8003c72 + if(iobuf[6] == 4) + 80036e4: 4b2b ldr r3, [pc, #172] ; (8003794 ) + 80036e6: 799b ldrb r3, [r3, #6] + 80036e8: 2b04 cmp r3, #4 + 80036ea: d128 bne.n 800373e for(j = 0; j < 4; j++) - 80036ea: 231f movs r3, #31 - 80036ec: 18fb adds r3, r7, r3 - 80036ee: 781a ldrb r2, [r3, #0] - 80036f0: 231f movs r3, #31 - 80036f2: 18fb adds r3, r7, r3 - 80036f4: 3201 adds r2, #1 - 80036f6: 701a strb r2, [r3, #0] - 80036f8: 231f movs r3, #31 - 80036fa: 18fb adds r3, r7, r3 - 80036fc: 781b ldrb r3, [r3, #0] - 80036fe: 2b03 cmp r3, #3 - 8003700: d9e5 bls.n 80036ce + 80036ec: 231f movs r3, #31 + 80036ee: 18fb adds r3, r7, r3 + 80036f0: 2200 movs r2, #0 + 80036f2: 701a strb r2, [r3, #0] + 80036f4: e014 b.n 8003720 + f.ch[3 - j] = iobuf[7 + j]; + 80036f6: 231f movs r3, #31 + 80036f8: 18fb adds r3, r7, r3 + 80036fa: 781b ldrb r3, [r3, #0] + 80036fc: 2203 movs r2, #3 + 80036fe: 1ad3 subs r3, r2, r3 + 8003700: 221f movs r2, #31 + 8003702: 18ba adds r2, r7, r2 + 8003704: 7812 ldrb r2, [r2, #0] + 8003706: 3207 adds r2, #7 + 8003708: 4922 ldr r1, [pc, #136] ; (8003794 ) + 800370a: 5c89 ldrb r1, [r1, r2] + 800370c: 2208 movs r2, #8 + 800370e: 18ba adds r2, r7, r2 + 8003710: 54d1 strb r1, [r2, r3] + for(j = 0; j < 4; j++) + 8003712: 231f movs r3, #31 + 8003714: 18fb adds r3, r7, r3 + 8003716: 781a ldrb r2, [r3, #0] + 8003718: 231f movs r3, #31 + 800371a: 18fb adds r3, r7, r3 + 800371c: 3201 adds r2, #1 + 800371e: 701a strb r2, [r3, #0] + 8003720: 231f movs r3, #31 + 8003722: 18fb adds r3, r7, r3 + 8003724: 781b ldrb r3, [r3, #0] + 8003726: 2b03 cmp r3, #3 + 8003728: d9e5 bls.n 80036f6 pardata.KCOND = f.fl; - 8003702: 68ba ldr r2, [r7, #8] - 8003704: 4b1f ldr r3, [pc, #124] ; (8003784 ) - 8003706: 61da str r2, [r3, #28] + 800372a: 68ba ldr r2, [r7, #8] + 800372c: 4b1f ldr r3, [pc, #124] ; (80037ac ) + 800372e: 61da str r2, [r3, #28] needSave = true; - 8003708: 4b1f ldr r3, [pc, #124] ; (8003788 ) - 800370a: 2201 movs r2, #1 - 800370c: 701a strb r2, [r3, #0] + 8003730: 4b1f ldr r3, [pc, #124] ; (80037b0 ) + 8003732: 2201 movs r2, #1 + 8003734: 701a strb r2, [r3, #0] strtOut(6); - 800370e: 2006 movs r0, #6 - 8003710: f7fe ffe2 bl 80026d8 + 8003736: 2006 movs r0, #6 + 8003738: f7fe ffe2 bl 8002700 break; - 8003714: e299 b.n 8003c4a + 800373c: e299 b.n 8003c72 if(iobuf[6] == 8) - 8003716: 4b15 ldr r3, [pc, #84] ; (800376c ) - 8003718: 799b ldrb r3, [r3, #6] - 800371a: 2b08 cmp r3, #8 - 800371c: d15c bne.n 80037d8 + 800373e: 4b15 ldr r3, [pc, #84] ; (8003794 ) + 8003740: 799b ldrb r3, [r3, #6] + 8003742: 2b08 cmp r3, #8 + 8003744: d15c bne.n 8003800 for(j = 0; j < 4; j++) - 800371e: 231f movs r3, #31 - 8003720: 18fb adds r3, r7, r3 - 8003722: 2200 movs r2, #0 - 8003724: 701a strb r2, [r3, #0] - 8003726: e014 b.n 8003752 + 8003746: 231f movs r3, #31 + 8003748: 18fb adds r3, r7, r3 + 800374a: 2200 movs r2, #0 + 800374c: 701a strb r2, [r3, #0] + 800374e: e014 b.n 800377a f.ch[3 - j] = iobuf[7 + j]; - 8003728: 231f movs r3, #31 - 800372a: 18fb adds r3, r7, r3 - 800372c: 781b ldrb r3, [r3, #0] - 800372e: 2203 movs r2, #3 - 8003730: 1ad3 subs r3, r2, r3 - 8003732: 221f movs r2, #31 - 8003734: 18ba adds r2, r7, r2 - 8003736: 7812 ldrb r2, [r2, #0] - 8003738: 3207 adds r2, #7 - 800373a: 490c ldr r1, [pc, #48] ; (800376c ) - 800373c: 5c89 ldrb r1, [r1, r2] - 800373e: 2208 movs r2, #8 - 8003740: 18ba adds r2, r7, r2 - 8003742: 54d1 strb r1, [r2, r3] + 8003750: 231f movs r3, #31 + 8003752: 18fb adds r3, r7, r3 + 8003754: 781b ldrb r3, [r3, #0] + 8003756: 2203 movs r2, #3 + 8003758: 1ad3 subs r3, r2, r3 + 800375a: 221f movs r2, #31 + 800375c: 18ba adds r2, r7, r2 + 800375e: 7812 ldrb r2, [r2, #0] + 8003760: 3207 adds r2, #7 + 8003762: 490c ldr r1, [pc, #48] ; (8003794 ) + 8003764: 5c89 ldrb r1, [r1, r2] + 8003766: 2208 movs r2, #8 + 8003768: 18ba adds r2, r7, r2 + 800376a: 54d1 strb r1, [r2, r3] for(j = 0; j < 4; j++) - 8003744: 231f movs r3, #31 - 8003746: 18fb adds r3, r7, r3 - 8003748: 781a ldrb r2, [r3, #0] - 800374a: 231f movs r3, #31 - 800374c: 18fb adds r3, r7, r3 - 800374e: 3201 adds r2, #1 - 8003750: 701a strb r2, [r3, #0] - 8003752: 231f movs r3, #31 - 8003754: 18fb adds r3, r7, r3 - 8003756: 781b ldrb r3, [r3, #0] - 8003758: 2b03 cmp r3, #3 - 800375a: d9e5 bls.n 8003728 + 800376c: 231f movs r3, #31 + 800376e: 18fb adds r3, r7, r3 + 8003770: 781a ldrb r2, [r3, #0] + 8003772: 231f movs r3, #31 + 8003774: 18fb adds r3, r7, r3 + 8003776: 3201 adds r2, #1 + 8003778: 701a strb r2, [r3, #0] + 800377a: 231f movs r3, #31 + 800377c: 18fb adds r3, r7, r3 + 800377e: 781b ldrb r3, [r3, #0] + 8003780: 2b03 cmp r3, #3 + 8003782: d9e5 bls.n 8003750 pardata.KCOND = f.fl; - 800375c: 68ba ldr r2, [r7, #8] - 800375e: 4b09 ldr r3, [pc, #36] ; (8003784 ) - 8003760: 61da str r2, [r3, #28] + 8003784: 68ba ldr r2, [r7, #8] + 8003786: 4b09 ldr r3, [pc, #36] ; (80037ac ) + 8003788: 61da str r2, [r3, #28] for(j = 0; j < 4; j++) - 8003762: 231f movs r3, #31 - 8003764: 18fb adds r3, r7, r3 - 8003766: 2200 movs r2, #0 - 8003768: 701a strb r2, [r3, #0] - 800376a: e026 b.n 80037ba - 800376c: 2000028c .word 0x2000028c - 8003770: 20000188 .word 0x20000188 - 8003774: 00001393 .word 0x00001393 - 8003778: 20000035 .word 0x20000035 - 800377c: ffffec77 .word 0xffffec77 - 8003780: 2000009e .word 0x2000009e - 8003784: 20000098 .word 0x20000098 - 8003788: 20000037 .word 0x20000037 - 800378c: 00001b5a .word 0x00001b5a + 800378a: 231f movs r3, #31 + 800378c: 18fb adds r3, r7, r3 + 800378e: 2200 movs r2, #0 + 8003790: 701a strb r2, [r3, #0] + 8003792: e026 b.n 80037e2 + 8003794: 20000294 .word 0x20000294 + 8003798: 20000190 .word 0x20000190 + 800379c: 00001393 .word 0x00001393 + 80037a0: 2000003d .word 0x2000003d + 80037a4: ffffec77 .word 0xffffec77 + 80037a8: 200000a6 .word 0x200000a6 + 80037ac: 200000a0 .word 0x200000a0 + 80037b0: 2000003f .word 0x2000003f + 80037b4: 00001b5a .word 0x00001b5a f.ch[3 - j] = iobuf[11 + j]; - 8003790: 231f movs r3, #31 - 8003792: 18fb adds r3, r7, r3 - 8003794: 781b ldrb r3, [r3, #0] - 8003796: 2203 movs r2, #3 - 8003798: 1ad3 subs r3, r2, r3 - 800379a: 221f movs r2, #31 - 800379c: 18ba adds r2, r7, r2 - 800379e: 7812 ldrb r2, [r2, #0] - 80037a0: 320b adds r2, #11 - 80037a2: 49df ldr r1, [pc, #892] ; (8003b20 ) - 80037a4: 5c89 ldrb r1, [r1, r2] - 80037a6: 2208 movs r2, #8 - 80037a8: 18ba adds r2, r7, r2 - 80037aa: 54d1 strb r1, [r2, r3] + 80037b8: 231f movs r3, #31 + 80037ba: 18fb adds r3, r7, r3 + 80037bc: 781b ldrb r3, [r3, #0] + 80037be: 2203 movs r2, #3 + 80037c0: 1ad3 subs r3, r2, r3 + 80037c2: 221f movs r2, #31 + 80037c4: 18ba adds r2, r7, r2 + 80037c6: 7812 ldrb r2, [r2, #0] + 80037c8: 320b adds r2, #11 + 80037ca: 49df ldr r1, [pc, #892] ; (8003b48 ) + 80037cc: 5c89 ldrb r1, [r1, r2] + 80037ce: 2208 movs r2, #8 + 80037d0: 18ba adds r2, r7, r2 + 80037d2: 54d1 strb r1, [r2, r3] for(j = 0; j < 4; j++) - 80037ac: 231f movs r3, #31 - 80037ae: 18fb adds r3, r7, r3 - 80037b0: 781a ldrb r2, [r3, #0] - 80037b2: 231f movs r3, #31 - 80037b4: 18fb adds r3, r7, r3 - 80037b6: 3201 adds r2, #1 - 80037b8: 701a strb r2, [r3, #0] - 80037ba: 231f movs r3, #31 - 80037bc: 18fb adds r3, r7, r3 - 80037be: 781b ldrb r3, [r3, #0] - 80037c0: 2b03 cmp r3, #3 - 80037c2: d9e5 bls.n 8003790 + 80037d4: 231f movs r3, #31 + 80037d6: 18fb adds r3, r7, r3 + 80037d8: 781a ldrb r2, [r3, #0] + 80037da: 231f movs r3, #31 + 80037dc: 18fb adds r3, r7, r3 + 80037de: 3201 adds r2, #1 + 80037e0: 701a strb r2, [r3, #0] + 80037e2: 231f movs r3, #31 + 80037e4: 18fb adds r3, r7, r3 + 80037e6: 781b ldrb r3, [r3, #0] + 80037e8: 2b03 cmp r3, #3 + 80037ea: d9e5 bls.n 80037b8 pardata.SENS = f.fl; - 80037c4: 68ba ldr r2, [r7, #8] - 80037c6: 4bd7 ldr r3, [pc, #860] ; (8003b24 ) - 80037c8: 621a str r2, [r3, #32] + 80037ec: 68ba ldr r2, [r7, #8] + 80037ee: 4bd7 ldr r3, [pc, #860] ; (8003b4c ) + 80037f0: 621a str r2, [r3, #32] needSave = true; - 80037ca: 4bd7 ldr r3, [pc, #860] ; (8003b28 ) - 80037cc: 2201 movs r2, #1 - 80037ce: 701a strb r2, [r3, #0] + 80037f2: 4bd7 ldr r3, [pc, #860] ; (8003b50 ) + 80037f4: 2201 movs r2, #1 + 80037f6: 701a strb r2, [r3, #0] strtOut(6); - 80037d0: 2006 movs r0, #6 - 80037d2: f7fe ff81 bl 80026d8 + 80037f8: 2006 movs r0, #6 + 80037fa: f7fe ff81 bl 8002700 break; - 80037d6: e238 b.n 8003c4a + 80037fe: e238 b.n 8003c72 if(iobuf[6] == 12) - 80037d8: 4bd1 ldr r3, [pc, #836] ; (8003b20 ) - 80037da: 799b ldrb r3, [r3, #6] - 80037dc: 2b0c cmp r3, #12 - 80037de: d16c bne.n 80038ba + 8003800: 4bd1 ldr r3, [pc, #836] ; (8003b48 ) + 8003802: 799b ldrb r3, [r3, #6] + 8003804: 2b0c cmp r3, #12 + 8003806: d16c bne.n 80038e2 for(j = 0; j < 4; j++) - 80037e0: 231f movs r3, #31 - 80037e2: 18fb adds r3, r7, r3 - 80037e4: 2200 movs r2, #0 - 80037e6: 701a strb r2, [r3, #0] - 80037e8: e014 b.n 8003814 + 8003808: 231f movs r3, #31 + 800380a: 18fb adds r3, r7, r3 + 800380c: 2200 movs r2, #0 + 800380e: 701a strb r2, [r3, #0] + 8003810: e014 b.n 800383c f.ch[3 - j] = iobuf[7 + j]; - 80037ea: 231f movs r3, #31 - 80037ec: 18fb adds r3, r7, r3 - 80037ee: 781b ldrb r3, [r3, #0] - 80037f0: 2203 movs r2, #3 - 80037f2: 1ad3 subs r3, r2, r3 - 80037f4: 221f movs r2, #31 - 80037f6: 18ba adds r2, r7, r2 - 80037f8: 7812 ldrb r2, [r2, #0] - 80037fa: 3207 adds r2, #7 - 80037fc: 49c8 ldr r1, [pc, #800] ; (8003b20 ) - 80037fe: 5c89 ldrb r1, [r1, r2] - 8003800: 2208 movs r2, #8 - 8003802: 18ba adds r2, r7, r2 - 8003804: 54d1 strb r1, [r2, r3] + 8003812: 231f movs r3, #31 + 8003814: 18fb adds r3, r7, r3 + 8003816: 781b ldrb r3, [r3, #0] + 8003818: 2203 movs r2, #3 + 800381a: 1ad3 subs r3, r2, r3 + 800381c: 221f movs r2, #31 + 800381e: 18ba adds r2, r7, r2 + 8003820: 7812 ldrb r2, [r2, #0] + 8003822: 3207 adds r2, #7 + 8003824: 49c8 ldr r1, [pc, #800] ; (8003b48 ) + 8003826: 5c89 ldrb r1, [r1, r2] + 8003828: 2208 movs r2, #8 + 800382a: 18ba adds r2, r7, r2 + 800382c: 54d1 strb r1, [r2, r3] for(j = 0; j < 4; j++) - 8003806: 231f movs r3, #31 - 8003808: 18fb adds r3, r7, r3 - 800380a: 781a ldrb r2, [r3, #0] - 800380c: 231f movs r3, #31 - 800380e: 18fb adds r3, r7, r3 - 8003810: 3201 adds r2, #1 - 8003812: 701a strb r2, [r3, #0] - 8003814: 231f movs r3, #31 - 8003816: 18fb adds r3, r7, r3 - 8003818: 781b ldrb r3, [r3, #0] - 800381a: 2b03 cmp r3, #3 - 800381c: d9e5 bls.n 80037ea - pardata.KCOND = f.fl; - 800381e: 68ba ldr r2, [r7, #8] - 8003820: 4bc0 ldr r3, [pc, #768] ; (8003b24 ) - 8003822: 61da str r2, [r3, #28] - for(j = 0; j < 4; j++) - 8003824: 231f movs r3, #31 - 8003826: 18fb adds r3, r7, r3 - 8003828: 2200 movs r2, #0 - 800382a: 701a strb r2, [r3, #0] - 800382c: e014 b.n 8003858 - f.ch[3 - j] = iobuf[11 + j]; 800382e: 231f movs r3, #31 8003830: 18fb adds r3, r7, r3 - 8003832: 781b ldrb r3, [r3, #0] - 8003834: 2203 movs r2, #3 - 8003836: 1ad3 subs r3, r2, r3 - 8003838: 221f movs r2, #31 - 800383a: 18ba adds r2, r7, r2 - 800383c: 7812 ldrb r2, [r2, #0] - 800383e: 320b adds r2, #11 - 8003840: 49b7 ldr r1, [pc, #732] ; (8003b20 ) - 8003842: 5c89 ldrb r1, [r1, r2] - 8003844: 2208 movs r2, #8 - 8003846: 18ba adds r2, r7, r2 - 8003848: 54d1 strb r1, [r2, r3] + 8003832: 781a ldrb r2, [r3, #0] + 8003834: 231f movs r3, #31 + 8003836: 18fb adds r3, r7, r3 + 8003838: 3201 adds r2, #1 + 800383a: 701a strb r2, [r3, #0] + 800383c: 231f movs r3, #31 + 800383e: 18fb adds r3, r7, r3 + 8003840: 781b ldrb r3, [r3, #0] + 8003842: 2b03 cmp r3, #3 + 8003844: d9e5 bls.n 8003812 + pardata.KCOND = f.fl; + 8003846: 68ba ldr r2, [r7, #8] + 8003848: 4bc0 ldr r3, [pc, #768] ; (8003b4c ) + 800384a: 61da str r2, [r3, #28] for(j = 0; j < 4; j++) - 800384a: 231f movs r3, #31 - 800384c: 18fb adds r3, r7, r3 - 800384e: 781a ldrb r2, [r3, #0] - 8003850: 231f movs r3, #31 - 8003852: 18fb adds r3, r7, r3 - 8003854: 3201 adds r2, #1 - 8003856: 701a strb r2, [r3, #0] - 8003858: 231f movs r3, #31 - 800385a: 18fb adds r3, r7, r3 - 800385c: 781b ldrb r3, [r3, #0] - 800385e: 2b03 cmp r3, #3 - 8003860: d9e5 bls.n 800382e - pardata.SENS = f.fl; - 8003862: 68ba ldr r2, [r7, #8] - 8003864: 4baf ldr r3, [pc, #700] ; (8003b24 ) - 8003866: 621a str r2, [r3, #32] + 800384c: 231f movs r3, #31 + 800384e: 18fb adds r3, r7, r3 + 8003850: 2200 movs r2, #0 + 8003852: 701a strb r2, [r3, #0] + 8003854: e014 b.n 8003880 + f.ch[3 - j] = iobuf[11 + j]; + 8003856: 231f movs r3, #31 + 8003858: 18fb adds r3, r7, r3 + 800385a: 781b ldrb r3, [r3, #0] + 800385c: 2203 movs r2, #3 + 800385e: 1ad3 subs r3, r2, r3 + 8003860: 221f movs r2, #31 + 8003862: 18ba adds r2, r7, r2 + 8003864: 7812 ldrb r2, [r2, #0] + 8003866: 320b adds r2, #11 + 8003868: 49b7 ldr r1, [pc, #732] ; (8003b48 ) + 800386a: 5c89 ldrb r1, [r1, r2] + 800386c: 2208 movs r2, #8 + 800386e: 18ba adds r2, r7, r2 + 8003870: 54d1 strb r1, [r2, r3] for(j = 0; j < 4; j++) - 8003868: 231f movs r3, #31 - 800386a: 18fb adds r3, r7, r3 - 800386c: 2200 movs r2, #0 - 800386e: 701a strb r2, [r3, #0] - 8003870: e014 b.n 800389c - f.ch[3 - j] = iobuf[15 + j]; 8003872: 231f movs r3, #31 8003874: 18fb adds r3, r7, r3 - 8003876: 781b ldrb r3, [r3, #0] - 8003878: 2203 movs r2, #3 - 800387a: 1ad3 subs r3, r2, r3 - 800387c: 221f movs r2, #31 - 800387e: 18ba adds r2, r7, r2 - 8003880: 7812 ldrb r2, [r2, #0] - 8003882: 320f adds r2, #15 - 8003884: 49a6 ldr r1, [pc, #664] ; (8003b20 ) - 8003886: 5c89 ldrb r1, [r1, r2] - 8003888: 2208 movs r2, #8 - 800388a: 18ba adds r2, r7, r2 - 800388c: 54d1 strb r1, [r2, r3] + 8003876: 781a ldrb r2, [r3, #0] + 8003878: 231f movs r3, #31 + 800387a: 18fb adds r3, r7, r3 + 800387c: 3201 adds r2, #1 + 800387e: 701a strb r2, [r3, #0] + 8003880: 231f movs r3, #31 + 8003882: 18fb adds r3, r7, r3 + 8003884: 781b ldrb r3, [r3, #0] + 8003886: 2b03 cmp r3, #3 + 8003888: d9e5 bls.n 8003856 + pardata.SENS = f.fl; + 800388a: 68ba ldr r2, [r7, #8] + 800388c: 4baf ldr r3, [pc, #700] ; (8003b4c ) + 800388e: 621a str r2, [r3, #32] for(j = 0; j < 4; j++) - 800388e: 231f movs r3, #31 - 8003890: 18fb adds r3, r7, r3 - 8003892: 781a ldrb r2, [r3, #0] - 8003894: 231f movs r3, #31 - 8003896: 18fb adds r3, r7, r3 - 8003898: 3201 adds r2, #1 - 800389a: 701a strb r2, [r3, #0] - 800389c: 231f movs r3, #31 - 800389e: 18fb adds r3, r7, r3 - 80038a0: 781b ldrb r3, [r3, #0] - 80038a2: 2b03 cmp r3, #3 - 80038a4: d9e5 bls.n 8003872 + 8003890: 231f movs r3, #31 + 8003892: 18fb adds r3, r7, r3 + 8003894: 2200 movs r2, #0 + 8003896: 701a strb r2, [r3, #0] + 8003898: e014 b.n 80038c4 + f.ch[3 - j] = iobuf[15 + j]; + 800389a: 231f movs r3, #31 + 800389c: 18fb adds r3, r7, r3 + 800389e: 781b ldrb r3, [r3, #0] + 80038a0: 2203 movs r2, #3 + 80038a2: 1ad3 subs r3, r2, r3 + 80038a4: 221f movs r2, #31 + 80038a6: 18ba adds r2, r7, r2 + 80038a8: 7812 ldrb r2, [r2, #0] + 80038aa: 320f adds r2, #15 + 80038ac: 49a6 ldr r1, [pc, #664] ; (8003b48 ) + 80038ae: 5c89 ldrb r1, [r1, r2] + 80038b0: 2208 movs r2, #8 + 80038b2: 18ba adds r2, r7, r2 + 80038b4: 54d1 strb r1, [r2, r3] + for(j = 0; j < 4; j++) + 80038b6: 231f movs r3, #31 + 80038b8: 18fb adds r3, r7, r3 + 80038ba: 781a ldrb r2, [r3, #0] + 80038bc: 231f movs r3, #31 + 80038be: 18fb adds r3, r7, r3 + 80038c0: 3201 adds r2, #1 + 80038c2: 701a strb r2, [r3, #0] + 80038c4: 231f movs r3, #31 + 80038c6: 18fb adds r3, r7, r3 + 80038c8: 781b ldrb r3, [r3, #0] + 80038ca: 2b03 cmp r3, #3 + 80038cc: d9e5 bls.n 800389a pardata.ACCEL = f.fl; - 80038a6: 68ba ldr r2, [r7, #8] - 80038a8: 4b9e ldr r3, [pc, #632] ; (8003b24 ) - 80038aa: 625a str r2, [r3, #36] ; 0x24 + 80038ce: 68ba ldr r2, [r7, #8] + 80038d0: 4b9e ldr r3, [pc, #632] ; (8003b4c ) + 80038d2: 625a str r2, [r3, #36] ; 0x24 needSave = true; - 80038ac: 4b9e ldr r3, [pc, #632] ; (8003b28 ) - 80038ae: 2201 movs r2, #1 - 80038b0: 701a strb r2, [r3, #0] + 80038d4: 4b9e ldr r3, [pc, #632] ; (8003b50 ) + 80038d6: 2201 movs r2, #1 + 80038d8: 701a strb r2, [r3, #0] strtOut(6); - 80038b2: 2006 movs r0, #6 - 80038b4: f7fe ff10 bl 80026d8 + 80038da: 2006 movs r0, #6 + 80038dc: f7fe ff10 bl 8002700 break; - 80038b8: e1c7 b.n 8003c4a + 80038e0: e1c7 b.n 8003c72 tx[0] = iobuf[0]; - 80038ba: 4b99 ldr r3, [pc, #612] ; (8003b20 ) - 80038bc: 781a ldrb r2, [r3, #0] - 80038be: 4b9b ldr r3, [pc, #620] ; (8003b2c ) - 80038c0: 701a strb r2, [r3, #0] + 80038e2: 4b99 ldr r3, [pc, #612] ; (8003b48 ) + 80038e4: 781a ldrb r2, [r3, #0] + 80038e6: 4b9b ldr r3, [pc, #620] ; (8003b54 ) + 80038e8: 701a strb r2, [r3, #0] tx[1] |= 0x80; //модификация РєРѕРґР° функции РЅР° ошибку - 80038c2: 4b9a ldr r3, [pc, #616] ; (8003b2c ) - 80038c4: 785b ldrb r3, [r3, #1] - 80038c6: 2280 movs r2, #128 ; 0x80 - 80038c8: 4252 negs r2, r2 - 80038ca: 4313 orrs r3, r2 - 80038cc: b2da uxtb r2, r3 - 80038ce: 4b97 ldr r3, [pc, #604] ; (8003b2c ) - 80038d0: 705a strb r2, [r3, #1] + 80038ea: 4b9a ldr r3, [pc, #616] ; (8003b54 ) + 80038ec: 785b ldrb r3, [r3, #1] + 80038ee: 2280 movs r2, #128 ; 0x80 + 80038f0: 4252 negs r2, r2 + 80038f2: 4313 orrs r3, r2 + 80038f4: b2da uxtb r2, r3 + 80038f6: 4b97 ldr r3, [pc, #604] ; (8003b54 ) + 80038f8: 705a strb r2, [r3, #1] tx[2] = 0x03; //Адрес данных указанный РІ запросе РЅРµ доступен - 80038d2: 4b96 ldr r3, [pc, #600] ; (8003b2c ) - 80038d4: 2203 movs r2, #3 - 80038d6: 709a strb r2, [r3, #2] + 80038fa: 4b96 ldr r3, [pc, #600] ; (8003b54 ) + 80038fc: 2203 movs r2, #3 + 80038fe: 709a strb r2, [r3, #2] strtOut(3); - 80038d8: 2003 movs r0, #3 - 80038da: f7fe fefd bl 80026d8 + 8003900: 2003 movs r0, #3 + 8003902: f7fe fefd bl 8002700 break; - 80038de: e1b4 b.n 8003c4a + 8003906: e1b4 b.n 8003c72 tmp = 2; - 80038e0: 231e movs r3, #30 - 80038e2: 18fb adds r3, r7, r3 - 80038e4: 2202 movs r2, #2 - 80038e6: 701a strb r2, [r3, #0] + 8003908: 231e movs r3, #30 + 800390a: 18fb adds r3, r7, r3 + 800390c: 2202 movs r2, #2 + 800390e: 701a strb r2, [r3, #0] tmp1 = 2; - 80038e8: 231d movs r3, #29 - 80038ea: 18fb adds r3, r7, r3 - 80038ec: 2202 movs r2, #2 - 80038ee: 701a strb r2, [r3, #0] + 8003910: 231d movs r3, #29 + 8003912: 18fb adds r3, r7, r3 + 8003914: 2202 movs r2, #2 + 8003916: 701a strb r2, [r3, #0] if(addr.sh == 7004) - 80038f0: 2310 movs r3, #16 - 80038f2: 18fb adds r3, r7, r3 - 80038f4: 881b ldrh r3, [r3, #0] - 80038f6: 4a8e ldr r2, [pc, #568] ; (8003b30 ) - 80038f8: 4293 cmp r3, r2 - 80038fa: d10a bne.n 8003912 + 8003918: 2310 movs r3, #16 + 800391a: 18fb adds r3, r7, r3 + 800391c: 881b ldrh r3, [r3, #0] + 800391e: 4a8e ldr r2, [pc, #568] ; (8003b58 ) + 8003920: 4293 cmp r3, r2 + 8003922: d10a bne.n 800393a tmp <<= 1; - 80038fc: 231e movs r3, #30 - 80038fe: 18fa adds r2, r7, r3 - 8003900: 231e movs r3, #30 - 8003902: 18fb adds r3, r7, r3 - 8003904: 781b ldrb r3, [r3, #0] - 8003906: 18db adds r3, r3, r3 - 8003908: 7013 strb r3, [r2, #0] - tmp1 = 1; - 800390a: 231d movs r3, #29 - 800390c: 18fb adds r3, r7, r3 - 800390e: 2201 movs r2, #1 - 8003910: 701a strb r2, [r3, #0] - if((regs.ch[0] > tmp) || (iobuf[6] != (regs.ch[0] << tmp1))) - 8003912: 230c movs r3, #12 - 8003914: 18fb adds r3, r7, r3 - 8003916: 781b ldrb r3, [r3, #0] - 8003918: 221e movs r2, #30 - 800391a: 18ba adds r2, r7, r2 - 800391c: 7812 ldrb r2, [r2, #0] - 800391e: 429a cmp r2, r3 - 8003920: d30d bcc.n 800393e - 8003922: 4b7f ldr r3, [pc, #508] ; (8003b20 ) - 8003924: 799b ldrb r3, [r3, #6] - 8003926: 001a movs r2, r3 - 8003928: 230c movs r3, #12 + 8003924: 231e movs r3, #30 + 8003926: 18fa adds r2, r7, r3 + 8003928: 231e movs r3, #30 800392a: 18fb adds r3, r7, r3 800392c: 781b ldrb r3, [r3, #0] - 800392e: 0019 movs r1, r3 - 8003930: 231d movs r3, #29 - 8003932: 18fb adds r3, r7, r3 - 8003934: 781b ldrb r3, [r3, #0] - 8003936: 4099 lsls r1, r3 - 8003938: 000b movs r3, r1 - 800393a: 429a cmp r2, r3 - 800393c: d012 beq.n 8003964 + 800392e: 18db adds r3, r3, r3 + 8003930: 7013 strb r3, [r2, #0] + tmp1 = 1; + 8003932: 231d movs r3, #29 + 8003934: 18fb adds r3, r7, r3 + 8003936: 2201 movs r2, #1 + 8003938: 701a strb r2, [r3, #0] + if((regs.ch[0] > tmp) || (iobuf[6] != (regs.ch[0] << tmp1))) + 800393a: 230c movs r3, #12 + 800393c: 18fb adds r3, r7, r3 + 800393e: 781b ldrb r3, [r3, #0] + 8003940: 221e movs r2, #30 + 8003942: 18ba adds r2, r7, r2 + 8003944: 7812 ldrb r2, [r2, #0] + 8003946: 429a cmp r2, r3 + 8003948: d30d bcc.n 8003966 + 800394a: 4b7f ldr r3, [pc, #508] ; (8003b48 ) + 800394c: 799b ldrb r3, [r3, #6] + 800394e: 001a movs r2, r3 + 8003950: 230c movs r3, #12 + 8003952: 18fb adds r3, r7, r3 + 8003954: 781b ldrb r3, [r3, #0] + 8003956: 0019 movs r1, r3 + 8003958: 231d movs r3, #29 + 800395a: 18fb adds r3, r7, r3 + 800395c: 781b ldrb r3, [r3, #0] + 800395e: 4099 lsls r1, r3 + 8003960: 000b movs r3, r1 + 8003962: 429a cmp r2, r3 + 8003964: d012 beq.n 800398c tx[0] = iobuf[0]; - 800393e: 4b78 ldr r3, [pc, #480] ; (8003b20 ) - 8003940: 781a ldrb r2, [r3, #0] - 8003942: 4b7a ldr r3, [pc, #488] ; (8003b2c ) - 8003944: 701a strb r2, [r3, #0] + 8003966: 4b78 ldr r3, [pc, #480] ; (8003b48 ) + 8003968: 781a ldrb r2, [r3, #0] + 800396a: 4b7a ldr r3, [pc, #488] ; (8003b54 ) + 800396c: 701a strb r2, [r3, #0] tx[1] |= 0x80; //модификация РєРѕРґР° функции РЅР° ошибку - 8003946: 4b79 ldr r3, [pc, #484] ; (8003b2c ) - 8003948: 785b ldrb r3, [r3, #1] - 800394a: 2280 movs r2, #128 ; 0x80 - 800394c: 4252 negs r2, r2 - 800394e: 4313 orrs r3, r2 - 8003950: b2da uxtb r2, r3 - 8003952: 4b76 ldr r3, [pc, #472] ; (8003b2c ) - 8003954: 705a strb r2, [r3, #1] + 800396e: 4b79 ldr r3, [pc, #484] ; (8003b54 ) + 8003970: 785b ldrb r3, [r3, #1] + 8003972: 2280 movs r2, #128 ; 0x80 + 8003974: 4252 negs r2, r2 + 8003976: 4313 orrs r3, r2 + 8003978: b2da uxtb r2, r3 + 800397a: 4b76 ldr r3, [pc, #472] ; (8003b54 ) + 800397c: 705a strb r2, [r3, #1] tx[2] = 0x03; //Адрес данных указанный РІ запросе РЅРµ доступен - 8003956: 4b75 ldr r3, [pc, #468] ; (8003b2c ) - 8003958: 2203 movs r2, #3 - 800395a: 709a strb r2, [r3, #2] + 800397e: 4b75 ldr r3, [pc, #468] ; (8003b54 ) + 8003980: 2203 movs r2, #3 + 8003982: 709a strb r2, [r3, #2] strtOut(3); - 800395c: 2003 movs r0, #3 - 800395e: f7fe febb bl 80026d8 + 8003984: 2003 movs r0, #3 + 8003986: f7fe febb bl 8002700 break; - 8003962: e174 b.n 8003c4e + 800398a: e174 b.n 8003c76 j = 8 + iobuf[6]; - 8003964: 4b6e ldr r3, [pc, #440] ; (8003b20 ) - 8003966: 799a ldrb r2, [r3, #6] - 8003968: 231f movs r3, #31 - 800396a: 18fb adds r3, r7, r3 - 800396c: 3208 adds r2, #8 - 800396e: 701a strb r2, [r3, #0] + 800398c: 4b6e ldr r3, [pc, #440] ; (8003b48 ) + 800398e: 799a ldrb r2, [r3, #6] + 8003990: 231f movs r3, #31 + 8003992: 18fb adds r3, r7, r3 + 8003994: 3208 adds r2, #8 + 8003996: 701a strb r2, [r3, #0] if(iolen > j) - 8003970: 4b70 ldr r3, [pc, #448] ; (8003b34 ) - 8003972: 781b ldrb r3, [r3, #0] - 8003974: 221f movs r2, #31 - 8003976: 18ba adds r2, r7, r2 - 8003978: 7812 ldrb r2, [r2, #0] - 800397a: 429a cmp r2, r3 - 800397c: d300 bcc.n 8003980 - 800397e: e166 b.n 8003c4e + 8003998: 4b70 ldr r3, [pc, #448] ; (8003b5c ) + 800399a: 781b ldrb r3, [r3, #0] + 800399c: 221f movs r2, #31 + 800399e: 18ba adds r2, r7, r2 + 80039a0: 7812 ldrb r2, [r2, #0] + 80039a2: 429a cmp r2, r3 + 80039a4: d300 bcc.n 80039a8 + 80039a6: e166 b.n 8003c76 crc.ch[0] = iobuf[j - 1]; - 8003980: 231f movs r3, #31 - 8003982: 18fb adds r3, r7, r3 - 8003984: 781b ldrb r3, [r3, #0] - 8003986: 3b01 subs r3, #1 - 8003988: 4a65 ldr r2, [pc, #404] ; (8003b20 ) - 800398a: 5cd2 ldrb r2, [r2, r3] - 800398c: 2314 movs r3, #20 - 800398e: 18fb adds r3, r7, r3 - 8003990: 701a strb r2, [r3, #0] - crc.ch[1] = iobuf[j]; - 8003992: 231f movs r3, #31 - 8003994: 18fb adds r3, r7, r3 - 8003996: 781b ldrb r3, [r3, #0] - 8003998: 4a61 ldr r2, [pc, #388] ; (8003b20 ) - 800399a: 5cd2 ldrb r2, [r2, r3] - 800399c: 2314 movs r3, #20 - 800399e: 18fb adds r3, r7, r3 - 80039a0: 705a strb r2, [r3, #1] - if(crc.sh == Crc16(j - 1)) - 80039a2: 2314 movs r3, #20 - 80039a4: 18fb adds r3, r7, r3 - 80039a6: 881c ldrh r4, [r3, #0] 80039a8: 231f movs r3, #31 80039aa: 18fb adds r3, r7, r3 80039ac: 781b ldrb r3, [r3, #0] - 80039ae: b29b uxth r3, r3 - 80039b0: 3b01 subs r3, #1 - 80039b2: b29b uxth r3, r3 - 80039b4: 0018 movs r0, r3 - 80039b6: f7fe fedb bl 8002770 - 80039ba: 0003 movs r3, r0 - 80039bc: 429c cmp r4, r3 - 80039be: d000 beq.n 80039c2 - 80039c0: e145 b.n 8003c4e - if(iobuf[6] == 4) - 80039c2: 4b57 ldr r3, [pc, #348] ; (8003b20 ) - 80039c4: 799b ldrb r3, [r3, #6] - 80039c6: 2b04 cmp r3, #4 - 80039c8: d128 bne.n 8003a1c - for(j = 0; j < 4; j++) - 80039ca: 231f movs r3, #31 + 80039ae: 3b01 subs r3, #1 + 80039b0: 4a65 ldr r2, [pc, #404] ; (8003b48 ) + 80039b2: 5cd2 ldrb r2, [r2, r3] + 80039b4: 2314 movs r3, #20 + 80039b6: 18fb adds r3, r7, r3 + 80039b8: 701a strb r2, [r3, #0] + crc.ch[1] = iobuf[j]; + 80039ba: 231f movs r3, #31 + 80039bc: 18fb adds r3, r7, r3 + 80039be: 781b ldrb r3, [r3, #0] + 80039c0: 4a61 ldr r2, [pc, #388] ; (8003b48 ) + 80039c2: 5cd2 ldrb r2, [r2, r3] + 80039c4: 2314 movs r3, #20 + 80039c6: 18fb adds r3, r7, r3 + 80039c8: 705a strb r2, [r3, #1] + if(crc.sh == Crc16(j - 1)) + 80039ca: 2314 movs r3, #20 80039cc: 18fb adds r3, r7, r3 - 80039ce: 2200 movs r2, #0 - 80039d0: 701a strb r2, [r3, #0] - 80039d2: e014 b.n 80039fe - f.ch[3 - j] = iobuf[7 + j]; - 80039d4: 231f movs r3, #31 - 80039d6: 18fb adds r3, r7, r3 - 80039d8: 781b ldrb r3, [r3, #0] - 80039da: 2203 movs r2, #3 - 80039dc: 1ad3 subs r3, r2, r3 - 80039de: 221f movs r2, #31 - 80039e0: 18ba adds r2, r7, r2 - 80039e2: 7812 ldrb r2, [r2, #0] - 80039e4: 3207 adds r2, #7 - 80039e6: 494e ldr r1, [pc, #312] ; (8003b20 ) - 80039e8: 5c89 ldrb r1, [r1, r2] - 80039ea: 2208 movs r2, #8 - 80039ec: 18ba adds r2, r7, r2 - 80039ee: 54d1 strb r1, [r2, r3] + 80039ce: 881c ldrh r4, [r3, #0] + 80039d0: 231f movs r3, #31 + 80039d2: 18fb adds r3, r7, r3 + 80039d4: 781b ldrb r3, [r3, #0] + 80039d6: b29b uxth r3, r3 + 80039d8: 3b01 subs r3, #1 + 80039da: b29b uxth r3, r3 + 80039dc: 0018 movs r0, r3 + 80039de: f7fe fedb bl 8002798 + 80039e2: 0003 movs r3, r0 + 80039e4: 429c cmp r4, r3 + 80039e6: d000 beq.n 80039ea + 80039e8: e145 b.n 8003c76 + if(iobuf[6] == 4) + 80039ea: 4b57 ldr r3, [pc, #348] ; (8003b48 ) + 80039ec: 799b ldrb r3, [r3, #6] + 80039ee: 2b04 cmp r3, #4 + 80039f0: d128 bne.n 8003a44 for(j = 0; j < 4; j++) - 80039f0: 231f movs r3, #31 - 80039f2: 18fb adds r3, r7, r3 - 80039f4: 781a ldrb r2, [r3, #0] - 80039f6: 231f movs r3, #31 - 80039f8: 18fb adds r3, r7, r3 - 80039fa: 3201 adds r2, #1 - 80039fc: 701a strb r2, [r3, #0] - 80039fe: 231f movs r3, #31 - 8003a00: 18fb adds r3, r7, r3 - 8003a02: 781b ldrb r3, [r3, #0] - 8003a04: 2b03 cmp r3, #3 - 8003a06: d9e5 bls.n 80039d4 + 80039f2: 231f movs r3, #31 + 80039f4: 18fb adds r3, r7, r3 + 80039f6: 2200 movs r2, #0 + 80039f8: 701a strb r2, [r3, #0] + 80039fa: e014 b.n 8003a26 + f.ch[3 - j] = iobuf[7 + j]; + 80039fc: 231f movs r3, #31 + 80039fe: 18fb adds r3, r7, r3 + 8003a00: 781b ldrb r3, [r3, #0] + 8003a02: 2203 movs r2, #3 + 8003a04: 1ad3 subs r3, r2, r3 + 8003a06: 221f movs r2, #31 + 8003a08: 18ba adds r2, r7, r2 + 8003a0a: 7812 ldrb r2, [r2, #0] + 8003a0c: 3207 adds r2, #7 + 8003a0e: 494e ldr r1, [pc, #312] ; (8003b48 ) + 8003a10: 5c89 ldrb r1, [r1, r2] + 8003a12: 2208 movs r2, #8 + 8003a14: 18ba adds r2, r7, r2 + 8003a16: 54d1 strb r1, [r2, r3] + for(j = 0; j < 4; j++) + 8003a18: 231f movs r3, #31 + 8003a1a: 18fb adds r3, r7, r3 + 8003a1c: 781a ldrb r2, [r3, #0] + 8003a1e: 231f movs r3, #31 + 8003a20: 18fb adds r3, r7, r3 + 8003a22: 3201 adds r2, #1 + 8003a24: 701a strb r2, [r3, #0] + 8003a26: 231f movs r3, #31 + 8003a28: 18fb adds r3, r7, r3 + 8003a2a: 781b ldrb r3, [r3, #0] + 8003a2c: 2b03 cmp r3, #3 + 8003a2e: d9e5 bls.n 80039fc pardata.SENS = f.fl; - 8003a08: 68ba ldr r2, [r7, #8] - 8003a0a: 4b46 ldr r3, [pc, #280] ; (8003b24 ) - 8003a0c: 621a str r2, [r3, #32] + 8003a30: 68ba ldr r2, [r7, #8] + 8003a32: 4b46 ldr r3, [pc, #280] ; (8003b4c ) + 8003a34: 621a str r2, [r3, #32] needSave = true; - 8003a0e: 4b46 ldr r3, [pc, #280] ; (8003b28 ) - 8003a10: 2201 movs r2, #1 - 8003a12: 701a strb r2, [r3, #0] + 8003a36: 4b46 ldr r3, [pc, #280] ; (8003b50 ) + 8003a38: 2201 movs r2, #1 + 8003a3a: 701a strb r2, [r3, #0] strtOut(6); - 8003a14: 2006 movs r0, #6 - 8003a16: f7fe fe5f bl 80026d8 + 8003a3c: 2006 movs r0, #6 + 8003a3e: f7fe fe5f bl 8002700 break; - 8003a1a: e118 b.n 8003c4e + 8003a42: e118 b.n 8003c76 if(iobuf[6] == 8) - 8003a1c: 4b40 ldr r3, [pc, #256] ; (8003b20 ) - 8003a1e: 799b ldrb r3, [r3, #6] - 8003a20: 2b08 cmp r3, #8 - 8003a22: d128 bne.n 8003a76 + 8003a44: 4b40 ldr r3, [pc, #256] ; (8003b48 ) + 8003a46: 799b ldrb r3, [r3, #6] + 8003a48: 2b08 cmp r3, #8 + 8003a4a: d128 bne.n 8003a9e for(j = 0; j < 4; j++) - 8003a24: 231f movs r3, #31 - 8003a26: 18fb adds r3, r7, r3 - 8003a28: 2200 movs r2, #0 - 8003a2a: 701a strb r2, [r3, #0] - 8003a2c: e014 b.n 8003a58 + 8003a4c: 231f movs r3, #31 + 8003a4e: 18fb adds r3, r7, r3 + 8003a50: 2200 movs r2, #0 + 8003a52: 701a strb r2, [r3, #0] + 8003a54: e014 b.n 8003a80 f.ch[3 - j] = iobuf[7 + j]; - 8003a2e: 231f movs r3, #31 - 8003a30: 18fb adds r3, r7, r3 - 8003a32: 781b ldrb r3, [r3, #0] - 8003a34: 2203 movs r2, #3 - 8003a36: 1ad3 subs r3, r2, r3 - 8003a38: 221f movs r2, #31 - 8003a3a: 18ba adds r2, r7, r2 - 8003a3c: 7812 ldrb r2, [r2, #0] - 8003a3e: 3207 adds r2, #7 - 8003a40: 4937 ldr r1, [pc, #220] ; (8003b20 ) - 8003a42: 5c89 ldrb r1, [r1, r2] - 8003a44: 2208 movs r2, #8 - 8003a46: 18ba adds r2, r7, r2 - 8003a48: 54d1 strb r1, [r2, r3] + 8003a56: 231f movs r3, #31 + 8003a58: 18fb adds r3, r7, r3 + 8003a5a: 781b ldrb r3, [r3, #0] + 8003a5c: 2203 movs r2, #3 + 8003a5e: 1ad3 subs r3, r2, r3 + 8003a60: 221f movs r2, #31 + 8003a62: 18ba adds r2, r7, r2 + 8003a64: 7812 ldrb r2, [r2, #0] + 8003a66: 3207 adds r2, #7 + 8003a68: 4937 ldr r1, [pc, #220] ; (8003b48 ) + 8003a6a: 5c89 ldrb r1, [r1, r2] + 8003a6c: 2208 movs r2, #8 + 8003a6e: 18ba adds r2, r7, r2 + 8003a70: 54d1 strb r1, [r2, r3] for(j = 0; j < 4; j++) - 8003a4a: 231f movs r3, #31 - 8003a4c: 18fb adds r3, r7, r3 - 8003a4e: 781a ldrb r2, [r3, #0] - 8003a50: 231f movs r3, #31 - 8003a52: 18fb adds r3, r7, r3 - 8003a54: 3201 adds r2, #1 - 8003a56: 701a strb r2, [r3, #0] - 8003a58: 231f movs r3, #31 - 8003a5a: 18fb adds r3, r7, r3 - 8003a5c: 781b ldrb r3, [r3, #0] - 8003a5e: 2b03 cmp r3, #3 - 8003a60: d9e5 bls.n 8003a2e + 8003a72: 231f movs r3, #31 + 8003a74: 18fb adds r3, r7, r3 + 8003a76: 781a ldrb r2, [r3, #0] + 8003a78: 231f movs r3, #31 + 8003a7a: 18fb adds r3, r7, r3 + 8003a7c: 3201 adds r2, #1 + 8003a7e: 701a strb r2, [r3, #0] + 8003a80: 231f movs r3, #31 + 8003a82: 18fb adds r3, r7, r3 + 8003a84: 781b ldrb r3, [r3, #0] + 8003a86: 2b03 cmp r3, #3 + 8003a88: d9e5 bls.n 8003a56 pardata.ACCEL = f.fl; - 8003a62: 68ba ldr r2, [r7, #8] - 8003a64: 4b2f ldr r3, [pc, #188] ; (8003b24 ) - 8003a66: 625a str r2, [r3, #36] ; 0x24 + 8003a8a: 68ba ldr r2, [r7, #8] + 8003a8c: 4b2f ldr r3, [pc, #188] ; (8003b4c ) + 8003a8e: 625a str r2, [r3, #36] ; 0x24 needSave = true; - 8003a68: 4b2f ldr r3, [pc, #188] ; (8003b28 ) - 8003a6a: 2201 movs r2, #1 - 8003a6c: 701a strb r2, [r3, #0] + 8003a90: 4b2f ldr r3, [pc, #188] ; (8003b50 ) + 8003a92: 2201 movs r2, #1 + 8003a94: 701a strb r2, [r3, #0] strtOut(6); - 8003a6e: 2006 movs r0, #6 - 8003a70: f7fe fe32 bl 80026d8 + 8003a96: 2006 movs r0, #6 + 8003a98: f7fe fe32 bl 8002700 break; - 8003a74: e0eb b.n 8003c4e + 8003a9c: e0eb b.n 8003c76 tx[0] = iobuf[0]; - 8003a76: 4b2a ldr r3, [pc, #168] ; (8003b20 ) - 8003a78: 781a ldrb r2, [r3, #0] - 8003a7a: 4b2c ldr r3, [pc, #176] ; (8003b2c ) - 8003a7c: 701a strb r2, [r3, #0] + 8003a9e: 4b2a ldr r3, [pc, #168] ; (8003b48 ) + 8003aa0: 781a ldrb r2, [r3, #0] + 8003aa2: 4b2c ldr r3, [pc, #176] ; (8003b54 ) + 8003aa4: 701a strb r2, [r3, #0] tx[1] |= 0x80; //модификация РєРѕРґР° функции РЅР° ошибку - 8003a7e: 4b2b ldr r3, [pc, #172] ; (8003b2c ) - 8003a80: 785b ldrb r3, [r3, #1] - 8003a82: 2280 movs r2, #128 ; 0x80 - 8003a84: 4252 negs r2, r2 - 8003a86: 4313 orrs r3, r2 - 8003a88: b2da uxtb r2, r3 - 8003a8a: 4b28 ldr r3, [pc, #160] ; (8003b2c ) - 8003a8c: 705a strb r2, [r3, #1] + 8003aa6: 4b2b ldr r3, [pc, #172] ; (8003b54 ) + 8003aa8: 785b ldrb r3, [r3, #1] + 8003aaa: 2280 movs r2, #128 ; 0x80 + 8003aac: 4252 negs r2, r2 + 8003aae: 4313 orrs r3, r2 + 8003ab0: b2da uxtb r2, r3 + 8003ab2: 4b28 ldr r3, [pc, #160] ; (8003b54 ) + 8003ab4: 705a strb r2, [r3, #1] tx[2] = 0x03; //Адрес данных указанный РІ запросе РЅРµ доступен - 8003a8e: 4b27 ldr r3, [pc, #156] ; (8003b2c ) - 8003a90: 2203 movs r2, #3 - 8003a92: 709a strb r2, [r3, #2] + 8003ab6: 4b27 ldr r3, [pc, #156] ; (8003b54 ) + 8003ab8: 2203 movs r2, #3 + 8003aba: 709a strb r2, [r3, #2] strtOut(3); - 8003a94: 2003 movs r0, #3 - 8003a96: f7fe fe1f bl 80026d8 + 8003abc: 2003 movs r0, #3 + 8003abe: f7fe fe1f bl 8002700 break; - 8003a9a: e0d8 b.n 8003c4e + 8003ac2: e0d8 b.n 8003c76 tmp = 1; - 8003a9c: 231e movs r3, #30 - 8003a9e: 18fb adds r3, r7, r3 - 8003aa0: 2201 movs r2, #1 - 8003aa2: 701a strb r2, [r3, #0] + 8003ac4: 231e movs r3, #30 + 8003ac6: 18fb adds r3, r7, r3 + 8003ac8: 2201 movs r2, #1 + 8003aca: 701a strb r2, [r3, #0] tmp1 = 2; - 8003aa4: 231d movs r3, #29 - 8003aa6: 18fb adds r3, r7, r3 - 8003aa8: 2202 movs r2, #2 - 8003aaa: 701a strb r2, [r3, #0] + 8003acc: 231d movs r3, #29 + 8003ace: 18fb adds r3, r7, r3 + 8003ad0: 2202 movs r2, #2 + 8003ad2: 701a strb r2, [r3, #0] if(addr.sh == 7006) - 8003aac: 2310 movs r3, #16 - 8003aae: 18fb adds r3, r7, r3 - 8003ab0: 881b ldrh r3, [r3, #0] - 8003ab2: 4a21 ldr r2, [pc, #132] ; (8003b38 ) - 8003ab4: 4293 cmp r3, r2 - 8003ab6: d10a bne.n 8003ace + 8003ad4: 2310 movs r3, #16 + 8003ad6: 18fb adds r3, r7, r3 + 8003ad8: 881b ldrh r3, [r3, #0] + 8003ada: 4a21 ldr r2, [pc, #132] ; (8003b60 ) + 8003adc: 4293 cmp r3, r2 + 8003ade: d10a bne.n 8003af6 tmp <<= 1; - 8003ab8: 231e movs r3, #30 - 8003aba: 18fa adds r2, r7, r3 - 8003abc: 231e movs r3, #30 - 8003abe: 18fb adds r3, r7, r3 - 8003ac0: 781b ldrb r3, [r3, #0] - 8003ac2: 18db adds r3, r3, r3 - 8003ac4: 7013 strb r3, [r2, #0] - tmp1 = 1; - 8003ac6: 231d movs r3, #29 - 8003ac8: 18fb adds r3, r7, r3 - 8003aca: 2201 movs r2, #1 - 8003acc: 701a strb r2, [r3, #0] - if((regs.ch[0] > tmp) || (iobuf[6] != (regs.ch[0] << tmp1))) - 8003ace: 230c movs r3, #12 - 8003ad0: 18fb adds r3, r7, r3 - 8003ad2: 781b ldrb r3, [r3, #0] - 8003ad4: 221e movs r2, #30 - 8003ad6: 18ba adds r2, r7, r2 - 8003ad8: 7812 ldrb r2, [r2, #0] - 8003ada: 429a cmp r2, r3 - 8003adc: d30d bcc.n 8003afa - 8003ade: 4b10 ldr r3, [pc, #64] ; (8003b20 ) - 8003ae0: 799b ldrb r3, [r3, #6] - 8003ae2: 001a movs r2, r3 - 8003ae4: 230c movs r3, #12 + 8003ae0: 231e movs r3, #30 + 8003ae2: 18fa adds r2, r7, r3 + 8003ae4: 231e movs r3, #30 8003ae6: 18fb adds r3, r7, r3 8003ae8: 781b ldrb r3, [r3, #0] - 8003aea: 0019 movs r1, r3 - 8003aec: 231d movs r3, #29 - 8003aee: 18fb adds r3, r7, r3 - 8003af0: 781b ldrb r3, [r3, #0] - 8003af2: 4099 lsls r1, r3 - 8003af4: 000b movs r3, r1 - 8003af6: 429a cmp r2, r3 - 8003af8: d020 beq.n 8003b3c + 8003aea: 18db adds r3, r3, r3 + 8003aec: 7013 strb r3, [r2, #0] + tmp1 = 1; + 8003aee: 231d movs r3, #29 + 8003af0: 18fb adds r3, r7, r3 + 8003af2: 2201 movs r2, #1 + 8003af4: 701a strb r2, [r3, #0] + if((regs.ch[0] > tmp) || (iobuf[6] != (regs.ch[0] << tmp1))) + 8003af6: 230c movs r3, #12 + 8003af8: 18fb adds r3, r7, r3 + 8003afa: 781b ldrb r3, [r3, #0] + 8003afc: 221e movs r2, #30 + 8003afe: 18ba adds r2, r7, r2 + 8003b00: 7812 ldrb r2, [r2, #0] + 8003b02: 429a cmp r2, r3 + 8003b04: d30d bcc.n 8003b22 + 8003b06: 4b10 ldr r3, [pc, #64] ; (8003b48 ) + 8003b08: 799b ldrb r3, [r3, #6] + 8003b0a: 001a movs r2, r3 + 8003b0c: 230c movs r3, #12 + 8003b0e: 18fb adds r3, r7, r3 + 8003b10: 781b ldrb r3, [r3, #0] + 8003b12: 0019 movs r1, r3 + 8003b14: 231d movs r3, #29 + 8003b16: 18fb adds r3, r7, r3 + 8003b18: 781b ldrb r3, [r3, #0] + 8003b1a: 4099 lsls r1, r3 + 8003b1c: 000b movs r3, r1 + 8003b1e: 429a cmp r2, r3 + 8003b20: d020 beq.n 8003b64 tx[0] = iobuf[0]; - 8003afa: 4b09 ldr r3, [pc, #36] ; (8003b20 ) - 8003afc: 781a ldrb r2, [r3, #0] - 8003afe: 4b0b ldr r3, [pc, #44] ; (8003b2c ) - 8003b00: 701a strb r2, [r3, #0] + 8003b22: 4b09 ldr r3, [pc, #36] ; (8003b48 ) + 8003b24: 781a ldrb r2, [r3, #0] + 8003b26: 4b0b ldr r3, [pc, #44] ; (8003b54 ) + 8003b28: 701a strb r2, [r3, #0] tx[1] |= 0x80; //модификация РєРѕРґР° функции РЅР° ошибку - 8003b02: 4b0a ldr r3, [pc, #40] ; (8003b2c ) - 8003b04: 785b ldrb r3, [r3, #1] - 8003b06: 2280 movs r2, #128 ; 0x80 - 8003b08: 4252 negs r2, r2 - 8003b0a: 4313 orrs r3, r2 - 8003b0c: b2da uxtb r2, r3 - 8003b0e: 4b07 ldr r3, [pc, #28] ; (8003b2c ) - 8003b10: 705a strb r2, [r3, #1] + 8003b2a: 4b0a ldr r3, [pc, #40] ; (8003b54 ) + 8003b2c: 785b ldrb r3, [r3, #1] + 8003b2e: 2280 movs r2, #128 ; 0x80 + 8003b30: 4252 negs r2, r2 + 8003b32: 4313 orrs r3, r2 + 8003b34: b2da uxtb r2, r3 + 8003b36: 4b07 ldr r3, [pc, #28] ; (8003b54 ) + 8003b38: 705a strb r2, [r3, #1] tx[2] = 0x03; //Адрес данных указанный РІ запросе РЅРµ доступен - 8003b12: 4b06 ldr r3, [pc, #24] ; (8003b2c ) - 8003b14: 2203 movs r2, #3 - 8003b16: 709a strb r2, [r3, #2] + 8003b3a: 4b06 ldr r3, [pc, #24] ; (8003b54 ) + 8003b3c: 2203 movs r2, #3 + 8003b3e: 709a strb r2, [r3, #2] strtOut(3); - 8003b18: 2003 movs r0, #3 - 8003b1a: f7fe fddd bl 80026d8 + 8003b40: 2003 movs r0, #3 + 8003b42: f7fe fddd bl 8002700 break; - 8003b1e: e098 b.n 8003c52 - 8003b20: 2000028c .word 0x2000028c - 8003b24: 20000098 .word 0x20000098 - 8003b28: 20000037 .word 0x20000037 - 8003b2c: 20000188 .word 0x20000188 - 8003b30: 00001b5c .word 0x00001b5c - 8003b34: 20000035 .word 0x20000035 - 8003b38: 00001b5e .word 0x00001b5e + 8003b46: e098 b.n 8003c7a + 8003b48: 20000294 .word 0x20000294 + 8003b4c: 200000a0 .word 0x200000a0 + 8003b50: 2000003f .word 0x2000003f + 8003b54: 20000190 .word 0x20000190 + 8003b58: 00001b5c .word 0x00001b5c + 8003b5c: 2000003d .word 0x2000003d + 8003b60: 00001b5e .word 0x00001b5e j = 8 + iobuf[6]; - 8003b3c: 4b48 ldr r3, [pc, #288] ; (8003c60 ) - 8003b3e: 799a ldrb r2, [r3, #6] - 8003b40: 231f movs r3, #31 - 8003b42: 18fb adds r3, r7, r3 - 8003b44: 3208 adds r2, #8 - 8003b46: 701a strb r2, [r3, #0] + 8003b64: 4b48 ldr r3, [pc, #288] ; (8003c88 ) + 8003b66: 799a ldrb r2, [r3, #6] + 8003b68: 231f movs r3, #31 + 8003b6a: 18fb adds r3, r7, r3 + 8003b6c: 3208 adds r2, #8 + 8003b6e: 701a strb r2, [r3, #0] if(iolen > j) - 8003b48: 4b46 ldr r3, [pc, #280] ; (8003c64 ) - 8003b4a: 781b ldrb r3, [r3, #0] - 8003b4c: 221f movs r2, #31 - 8003b4e: 18ba adds r2, r7, r2 - 8003b50: 7812 ldrb r2, [r2, #0] - 8003b52: 429a cmp r2, r3 - 8003b54: d300 bcc.n 8003b58 - 8003b56: e07c b.n 8003c52 + 8003b70: 4b46 ldr r3, [pc, #280] ; (8003c8c ) + 8003b72: 781b ldrb r3, [r3, #0] + 8003b74: 221f movs r2, #31 + 8003b76: 18ba adds r2, r7, r2 + 8003b78: 7812 ldrb r2, [r2, #0] + 8003b7a: 429a cmp r2, r3 + 8003b7c: d300 bcc.n 8003b80 + 8003b7e: e07c b.n 8003c7a crc.ch[0] = iobuf[j - 1]; - 8003b58: 231f movs r3, #31 - 8003b5a: 18fb adds r3, r7, r3 - 8003b5c: 781b ldrb r3, [r3, #0] - 8003b5e: 3b01 subs r3, #1 - 8003b60: 4a3f ldr r2, [pc, #252] ; (8003c60 ) - 8003b62: 5cd2 ldrb r2, [r2, r3] - 8003b64: 2314 movs r3, #20 - 8003b66: 18fb adds r3, r7, r3 - 8003b68: 701a strb r2, [r3, #0] - crc.ch[1] = iobuf[j]; - 8003b6a: 231f movs r3, #31 - 8003b6c: 18fb adds r3, r7, r3 - 8003b6e: 781b ldrb r3, [r3, #0] - 8003b70: 4a3b ldr r2, [pc, #236] ; (8003c60 ) - 8003b72: 5cd2 ldrb r2, [r2, r3] - 8003b74: 2314 movs r3, #20 - 8003b76: 18fb adds r3, r7, r3 - 8003b78: 705a strb r2, [r3, #1] - if(crc.sh == Crc16(j - 1)) - 8003b7a: 2314 movs r3, #20 - 8003b7c: 18fb adds r3, r7, r3 - 8003b7e: 881c ldrh r4, [r3, #0] 8003b80: 231f movs r3, #31 8003b82: 18fb adds r3, r7, r3 8003b84: 781b ldrb r3, [r3, #0] - 8003b86: b29b uxth r3, r3 - 8003b88: 3b01 subs r3, #1 - 8003b8a: b29b uxth r3, r3 - 8003b8c: 0018 movs r0, r3 - 8003b8e: f7fe fdef bl 8002770 - 8003b92: 0003 movs r3, r0 - 8003b94: 429c cmp r4, r3 - 8003b96: d15c bne.n 8003c52 + 8003b86: 3b01 subs r3, #1 + 8003b88: 4a3f ldr r2, [pc, #252] ; (8003c88 ) + 8003b8a: 5cd2 ldrb r2, [r2, r3] + 8003b8c: 2314 movs r3, #20 + 8003b8e: 18fb adds r3, r7, r3 + 8003b90: 701a strb r2, [r3, #0] + crc.ch[1] = iobuf[j]; + 8003b92: 231f movs r3, #31 + 8003b94: 18fb adds r3, r7, r3 + 8003b96: 781b ldrb r3, [r3, #0] + 8003b98: 4a3b ldr r2, [pc, #236] ; (8003c88 ) + 8003b9a: 5cd2 ldrb r2, [r2, r3] + 8003b9c: 2314 movs r3, #20 + 8003b9e: 18fb adds r3, r7, r3 + 8003ba0: 705a strb r2, [r3, #1] + if(crc.sh == Crc16(j - 1)) + 8003ba2: 2314 movs r3, #20 + 8003ba4: 18fb adds r3, r7, r3 + 8003ba6: 881c ldrh r4, [r3, #0] + 8003ba8: 231f movs r3, #31 + 8003baa: 18fb adds r3, r7, r3 + 8003bac: 781b ldrb r3, [r3, #0] + 8003bae: b29b uxth r3, r3 + 8003bb0: 3b01 subs r3, #1 + 8003bb2: b29b uxth r3, r3 + 8003bb4: 0018 movs r0, r3 + 8003bb6: f7fe fdef bl 8002798 + 8003bba: 0003 movs r3, r0 + 8003bbc: 429c cmp r4, r3 + 8003bbe: d15c bne.n 8003c7a if(iobuf[6] == 4) - 8003b98: 4b31 ldr r3, [pc, #196] ; (8003c60 ) - 8003b9a: 799b ldrb r3, [r3, #6] - 8003b9c: 2b04 cmp r3, #4 - 8003b9e: d128 bne.n 8003bf2 + 8003bc0: 4b31 ldr r3, [pc, #196] ; (8003c88 ) + 8003bc2: 799b ldrb r3, [r3, #6] + 8003bc4: 2b04 cmp r3, #4 + 8003bc6: d128 bne.n 8003c1a for(j = 0; j < 4; j++) - 8003ba0: 231f movs r3, #31 - 8003ba2: 18fb adds r3, r7, r3 - 8003ba4: 2200 movs r2, #0 - 8003ba6: 701a strb r2, [r3, #0] - 8003ba8: e014 b.n 8003bd4 + 8003bc8: 231f movs r3, #31 + 8003bca: 18fb adds r3, r7, r3 + 8003bcc: 2200 movs r2, #0 + 8003bce: 701a strb r2, [r3, #0] + 8003bd0: e014 b.n 8003bfc f.ch[3 - j] = iobuf[3 + j]; - 8003baa: 231f movs r3, #31 - 8003bac: 18fb adds r3, r7, r3 - 8003bae: 781b ldrb r3, [r3, #0] - 8003bb0: 2203 movs r2, #3 - 8003bb2: 1ad3 subs r3, r2, r3 - 8003bb4: 221f movs r2, #31 - 8003bb6: 18ba adds r2, r7, r2 - 8003bb8: 7812 ldrb r2, [r2, #0] - 8003bba: 3203 adds r2, #3 - 8003bbc: 4928 ldr r1, [pc, #160] ; (8003c60 ) - 8003bbe: 5c89 ldrb r1, [r1, r2] - 8003bc0: 2208 movs r2, #8 - 8003bc2: 18ba adds r2, r7, r2 - 8003bc4: 54d1 strb r1, [r2, r3] + 8003bd2: 231f movs r3, #31 + 8003bd4: 18fb adds r3, r7, r3 + 8003bd6: 781b ldrb r3, [r3, #0] + 8003bd8: 2203 movs r2, #3 + 8003bda: 1ad3 subs r3, r2, r3 + 8003bdc: 221f movs r2, #31 + 8003bde: 18ba adds r2, r7, r2 + 8003be0: 7812 ldrb r2, [r2, #0] + 8003be2: 3203 adds r2, #3 + 8003be4: 4928 ldr r1, [pc, #160] ; (8003c88 ) + 8003be6: 5c89 ldrb r1, [r1, r2] + 8003be8: 2208 movs r2, #8 + 8003bea: 18ba adds r2, r7, r2 + 8003bec: 54d1 strb r1, [r2, r3] for(j = 0; j < 4; j++) - 8003bc6: 231f movs r3, #31 - 8003bc8: 18fb adds r3, r7, r3 - 8003bca: 781a ldrb r2, [r3, #0] - 8003bcc: 231f movs r3, #31 - 8003bce: 18fb adds r3, r7, r3 - 8003bd0: 3201 adds r2, #1 - 8003bd2: 701a strb r2, [r3, #0] - 8003bd4: 231f movs r3, #31 - 8003bd6: 18fb adds r3, r7, r3 - 8003bd8: 781b ldrb r3, [r3, #0] - 8003bda: 2b03 cmp r3, #3 - 8003bdc: d9e5 bls.n 8003baa + 8003bee: 231f movs r3, #31 + 8003bf0: 18fb adds r3, r7, r3 + 8003bf2: 781a ldrb r2, [r3, #0] + 8003bf4: 231f movs r3, #31 + 8003bf6: 18fb adds r3, r7, r3 + 8003bf8: 3201 adds r2, #1 + 8003bfa: 701a strb r2, [r3, #0] + 8003bfc: 231f movs r3, #31 + 8003bfe: 18fb adds r3, r7, r3 + 8003c00: 781b ldrb r3, [r3, #0] + 8003c02: 2b03 cmp r3, #3 + 8003c04: d9e5 bls.n 8003bd2 pardata.ACCEL = f.fl; - 8003bde: 68ba ldr r2, [r7, #8] - 8003be0: 4b21 ldr r3, [pc, #132] ; (8003c68 ) - 8003be2: 625a str r2, [r3, #36] ; 0x24 + 8003c06: 68ba ldr r2, [r7, #8] + 8003c08: 4b21 ldr r3, [pc, #132] ; (8003c90 ) + 8003c0a: 625a str r2, [r3, #36] ; 0x24 needSave = true; - 8003be4: 4b21 ldr r3, [pc, #132] ; (8003c6c ) - 8003be6: 2201 movs r2, #1 - 8003be8: 701a strb r2, [r3, #0] + 8003c0c: 4b21 ldr r3, [pc, #132] ; (8003c94 ) + 8003c0e: 2201 movs r2, #1 + 8003c10: 701a strb r2, [r3, #0] strtOut(6); - 8003bea: 2006 movs r0, #6 - 8003bec: f7fe fd74 bl 80026d8 + 8003c12: 2006 movs r0, #6 + 8003c14: f7fe fd74 bl 8002700 break; - 8003bf0: e02f b.n 8003c52 + 8003c18: e02f b.n 8003c7a tx[0] = iobuf[0]; - 8003bf2: 4b1b ldr r3, [pc, #108] ; (8003c60 ) - 8003bf4: 781a ldrb r2, [r3, #0] - 8003bf6: 4b1e ldr r3, [pc, #120] ; (8003c70 ) - 8003bf8: 701a strb r2, [r3, #0] + 8003c1a: 4b1b ldr r3, [pc, #108] ; (8003c88 ) + 8003c1c: 781a ldrb r2, [r3, #0] + 8003c1e: 4b1e ldr r3, [pc, #120] ; (8003c98 ) + 8003c20: 701a strb r2, [r3, #0] tx[1] |= 0x80; //модификация РєРѕРґР° функции РЅР° ошибку - 8003bfa: 4b1d ldr r3, [pc, #116] ; (8003c70 ) - 8003bfc: 785b ldrb r3, [r3, #1] - 8003bfe: 2280 movs r2, #128 ; 0x80 - 8003c00: 4252 negs r2, r2 - 8003c02: 4313 orrs r3, r2 - 8003c04: b2da uxtb r2, r3 - 8003c06: 4b1a ldr r3, [pc, #104] ; (8003c70 ) - 8003c08: 705a strb r2, [r3, #1] + 8003c22: 4b1d ldr r3, [pc, #116] ; (8003c98 ) + 8003c24: 785b ldrb r3, [r3, #1] + 8003c26: 2280 movs r2, #128 ; 0x80 + 8003c28: 4252 negs r2, r2 + 8003c2a: 4313 orrs r3, r2 + 8003c2c: b2da uxtb r2, r3 + 8003c2e: 4b1a ldr r3, [pc, #104] ; (8003c98 ) + 8003c30: 705a strb r2, [r3, #1] tx[2] = 0x03; //Адрес данных указанный РІ запросе РЅРµ доступен - 8003c0a: 4b19 ldr r3, [pc, #100] ; (8003c70 ) - 8003c0c: 2203 movs r2, #3 - 8003c0e: 709a strb r2, [r3, #2] + 8003c32: 4b19 ldr r3, [pc, #100] ; (8003c98 ) + 8003c34: 2203 movs r2, #3 + 8003c36: 709a strb r2, [r3, #2] strtOut(3); - 8003c10: 2003 movs r0, #3 - 8003c12: f7fe fd61 bl 80026d8 + 8003c38: 2003 movs r0, #3 + 8003c3a: f7fe fd61 bl 8002700 break; - 8003c16: e01c b.n 8003c52 + 8003c3e: e01c b.n 8003c7a tx[0] = iobuf[0]; - 8003c18: 4b11 ldr r3, [pc, #68] ; (8003c60 ) - 8003c1a: 781a ldrb r2, [r3, #0] - 8003c1c: 4b14 ldr r3, [pc, #80] ; (8003c70 ) - 8003c1e: 701a strb r2, [r3, #0] + 8003c40: 4b11 ldr r3, [pc, #68] ; (8003c88 ) + 8003c42: 781a ldrb r2, [r3, #0] + 8003c44: 4b14 ldr r3, [pc, #80] ; (8003c98 ) + 8003c46: 701a strb r2, [r3, #0] tx[1] |= 0x80; //модификация РєРѕРґР° функции РЅР° ошибку - 8003c20: 4b13 ldr r3, [pc, #76] ; (8003c70 ) - 8003c22: 785b ldrb r3, [r3, #1] - 8003c24: 2280 movs r2, #128 ; 0x80 - 8003c26: 4252 negs r2, r2 - 8003c28: 4313 orrs r3, r2 - 8003c2a: b2da uxtb r2, r3 - 8003c2c: 4b10 ldr r3, [pc, #64] ; (8003c70 ) - 8003c2e: 705a strb r2, [r3, #1] + 8003c48: 4b13 ldr r3, [pc, #76] ; (8003c98 ) + 8003c4a: 785b ldrb r3, [r3, #1] + 8003c4c: 2280 movs r2, #128 ; 0x80 + 8003c4e: 4252 negs r2, r2 + 8003c50: 4313 orrs r3, r2 + 8003c52: b2da uxtb r2, r3 + 8003c54: 4b10 ldr r3, [pc, #64] ; (8003c98 ) + 8003c56: 705a strb r2, [r3, #1] tx[2] = 0x02; //Адрес данных указанный РІ запросе РЅРµ доступен - 8003c30: 4b0f ldr r3, [pc, #60] ; (8003c70 ) - 8003c32: 2202 movs r2, #2 - 8003c34: 709a strb r2, [r3, #2] + 8003c58: 4b0f ldr r3, [pc, #60] ; (8003c98 ) + 8003c5a: 2202 movs r2, #2 + 8003c5c: 709a strb r2, [r3, #2] strtOut(3); - 8003c36: 2003 movs r0, #3 - 8003c38: f7fe fd4e bl 80026d8 + 8003c5e: 2003 movs r0, #3 + 8003c60: f7fe fd4e bl 8002700 break; - 8003c3c: e00a b.n 8003c54 + 8003c64: e00a b.n 8003c7c break; - 8003c3e: 46c0 nop ; (mov r8, r8) - 8003c40: e00a b.n 8003c58 + 8003c66: 46c0 nop ; (mov r8, r8) + 8003c68: e00a b.n 8003c80 break; - 8003c42: 46c0 nop ; (mov r8, r8) - 8003c44: e008 b.n 8003c58 + 8003c6a: 46c0 nop ; (mov r8, r8) + 8003c6c: e008 b.n 8003c80 break; - 8003c46: 46c0 nop ; (mov r8, r8) - 8003c48: e006 b.n 8003c58 + 8003c6e: 46c0 nop ; (mov r8, r8) + 8003c70: e006 b.n 8003c80 break; - 8003c4a: 46c0 nop ; (mov r8, r8) - 8003c4c: e004 b.n 8003c58 + 8003c72: 46c0 nop ; (mov r8, r8) + 8003c74: e004 b.n 8003c80 break; - 8003c4e: 46c0 nop ; (mov r8, r8) - 8003c50: e002 b.n 8003c58 + 8003c76: 46c0 nop ; (mov r8, r8) + 8003c78: e002 b.n 8003c80 break; - 8003c52: 46c0 nop ; (mov r8, r8) + 8003c7a: 46c0 nop ; (mov r8, r8) break; - 8003c54: e000 b.n 8003c58 + 8003c7c: e000 b.n 8003c80 break; - 8003c56: 46c0 nop ; (mov r8, r8) + 8003c7e: 46c0 nop ; (mov r8, r8) } - 8003c58: 46c0 nop ; (mov r8, r8) - 8003c5a: 46bd mov sp, r7 - 8003c5c: b008 add sp, #32 - 8003c5e: bdb0 pop {r4, r5, r7, pc} - 8003c60: 2000028c .word 0x2000028c - 8003c64: 20000035 .word 0x20000035 - 8003c68: 20000098 .word 0x20000098 - 8003c6c: 20000037 .word 0x20000037 - 8003c70: 20000188 .word 0x20000188 + 8003c80: 46c0 nop ; (mov r8, r8) + 8003c82: 46bd mov sp, r7 + 8003c84: b008 add sp, #32 + 8003c86: bdb0 pop {r4, r5, r7, pc} + 8003c88: 20000294 .word 0x20000294 + 8003c8c: 2000003d .word 0x2000003d + 8003c90: 200000a0 .word 0x200000a0 + 8003c94: 2000003f .word 0x2000003f + 8003c98: 20000190 .word 0x20000190 -08003c74 : +08003c9c : void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart) { - 8003c74: b580 push {r7, lr} - 8003c76: b084 sub sp, #16 - 8003c78: af00 add r7, sp, #0 - 8003c7a: 6078 str r0, [r7, #4] + 8003c9c: b580 push {r7, lr} + 8003c9e: b084 sub sp, #16 + 8003ca0: af00 add r7, sp, #0 + 8003ca2: 6078 str r0, [r7, #4] __IO uint16_t a; a = delayREDE; - 8003c7c: 4b2a ldr r3, [pc, #168] ; (8003d28 ) - 8003c7e: 881b ldrh r3, [r3, #0] - 8003c80: b29a uxth r2, r3 - 8003c82: 230e movs r3, #14 - 8003c84: 18fb adds r3, r7, r3 - 8003c86: 801a strh r2, [r3, #0] + 8003ca4: 4b2a ldr r3, [pc, #168] ; (8003d50 ) + 8003ca6: 881b ldrh r3, [r3, #0] + 8003ca8: b29a uxth r2, r3 + 8003caa: 230e movs r3, #14 + 8003cac: 18fb adds r3, r7, r3 + 8003cae: 801a strh r2, [r3, #0] while(a) - 8003c88: e02c b.n 8003ce4 + 8003cb0: e02c b.n 8003d0c { a--; a++; a--; a++; a--; - 8003c8a: 230e movs r3, #14 - 8003c8c: 18fb adds r3, r7, r3 - 8003c8e: 881b ldrh r3, [r3, #0] - 8003c90: b29b uxth r3, r3 - 8003c92: 3b01 subs r3, #1 - 8003c94: b29a uxth r2, r3 - 8003c96: 230e movs r3, #14 - 8003c98: 18fb adds r3, r7, r3 - 8003c9a: 801a strh r2, [r3, #0] - 8003c9c: 230e movs r3, #14 - 8003c9e: 18fb adds r3, r7, r3 - 8003ca0: 881b ldrh r3, [r3, #0] - 8003ca2: b29b uxth r3, r3 - 8003ca4: 3301 adds r3, #1 - 8003ca6: b29a uxth r2, r3 - 8003ca8: 230e movs r3, #14 - 8003caa: 18fb adds r3, r7, r3 - 8003cac: 801a strh r2, [r3, #0] - 8003cae: 230e movs r3, #14 - 8003cb0: 18fb adds r3, r7, r3 - 8003cb2: 881b ldrh r3, [r3, #0] - 8003cb4: b29b uxth r3, r3 - 8003cb6: 3b01 subs r3, #1 - 8003cb8: b29a uxth r2, r3 - 8003cba: 230e movs r3, #14 - 8003cbc: 18fb adds r3, r7, r3 - 8003cbe: 801a strh r2, [r3, #0] - 8003cc0: 230e movs r3, #14 - 8003cc2: 18fb adds r3, r7, r3 - 8003cc4: 881b ldrh r3, [r3, #0] - 8003cc6: b29b uxth r3, r3 - 8003cc8: 3301 adds r3, #1 - 8003cca: b29a uxth r2, r3 - 8003ccc: 230e movs r3, #14 - 8003cce: 18fb adds r3, r7, r3 - 8003cd0: 801a strh r2, [r3, #0] - 8003cd2: 230e movs r3, #14 - 8003cd4: 18fb adds r3, r7, r3 - 8003cd6: 881b ldrh r3, [r3, #0] - 8003cd8: b29b uxth r3, r3 - 8003cda: 3b01 subs r3, #1 - 8003cdc: b29a uxth r2, r3 - 8003cde: 230e movs r3, #14 - 8003ce0: 18fb adds r3, r7, r3 - 8003ce2: 801a strh r2, [r3, #0] + 8003cb2: 230e movs r3, #14 + 8003cb4: 18fb adds r3, r7, r3 + 8003cb6: 881b ldrh r3, [r3, #0] + 8003cb8: b29b uxth r3, r3 + 8003cba: 3b01 subs r3, #1 + 8003cbc: b29a uxth r2, r3 + 8003cbe: 230e movs r3, #14 + 8003cc0: 18fb adds r3, r7, r3 + 8003cc2: 801a strh r2, [r3, #0] + 8003cc4: 230e movs r3, #14 + 8003cc6: 18fb adds r3, r7, r3 + 8003cc8: 881b ldrh r3, [r3, #0] + 8003cca: b29b uxth r3, r3 + 8003ccc: 3301 adds r3, #1 + 8003cce: b29a uxth r2, r3 + 8003cd0: 230e movs r3, #14 + 8003cd2: 18fb adds r3, r7, r3 + 8003cd4: 801a strh r2, [r3, #0] + 8003cd6: 230e movs r3, #14 + 8003cd8: 18fb adds r3, r7, r3 + 8003cda: 881b ldrh r3, [r3, #0] + 8003cdc: b29b uxth r3, r3 + 8003cde: 3b01 subs r3, #1 + 8003ce0: b29a uxth r2, r3 + 8003ce2: 230e movs r3, #14 + 8003ce4: 18fb adds r3, r7, r3 + 8003ce6: 801a strh r2, [r3, #0] + 8003ce8: 230e movs r3, #14 + 8003cea: 18fb adds r3, r7, r3 + 8003cec: 881b ldrh r3, [r3, #0] + 8003cee: b29b uxth r3, r3 + 8003cf0: 3301 adds r3, #1 + 8003cf2: b29a uxth r2, r3 + 8003cf4: 230e movs r3, #14 + 8003cf6: 18fb adds r3, r7, r3 + 8003cf8: 801a strh r2, [r3, #0] + 8003cfa: 230e movs r3, #14 + 8003cfc: 18fb adds r3, r7, r3 + 8003cfe: 881b ldrh r3, [r3, #0] + 8003d00: b29b uxth r3, r3 + 8003d02: 3b01 subs r3, #1 + 8003d04: b29a uxth r2, r3 + 8003d06: 230e movs r3, #14 + 8003d08: 18fb adds r3, r7, r3 + 8003d0a: 801a strh r2, [r3, #0] while(a) - 8003ce4: 230e movs r3, #14 - 8003ce6: 18fb adds r3, r7, r3 - 8003ce8: 881b ldrh r3, [r3, #0] - 8003cea: b29b uxth r3, r3 - 8003cec: 2b00 cmp r3, #0 - 8003cee: d1cc bne.n 8003c8a + 8003d0c: 230e movs r3, #14 + 8003d0e: 18fb adds r3, r7, r3 + 8003d10: 881b ldrh r3, [r3, #0] + 8003d12: b29b uxth r3, r3 + 8003d14: 2b00 cmp r3, #0 + 8003d16: d1cc bne.n 8003cb2 } if(setbaud) - 8003cf0: 4b0e ldr r3, [pc, #56] ; (8003d2c ) - 8003cf2: 781b ldrb r3, [r3, #0] - 8003cf4: 2b00 cmp r3, #0 - 8003cf6: d007 beq.n 8003d08 + 8003d18: 4b0e ldr r3, [pc, #56] ; (8003d54 ) + 8003d1a: 781b ldrb r3, [r3, #0] + 8003d1c: 2b00 cmp r3, #0 + 8003d1e: d007 beq.n 8003d30 { setbaud = false; - 8003cf8: 4b0c ldr r3, [pc, #48] ; (8003d2c ) - 8003cfa: 2200 movs r2, #0 - 8003cfc: 701a strb r2, [r3, #0] + 8003d20: 4b0c ldr r3, [pc, #48] ; (8003d54 ) + 8003d22: 2200 movs r2, #0 + 8003d24: 701a strb r2, [r3, #0] needSave = true; - 8003cfe: 4b0c ldr r3, [pc, #48] ; (8003d30 ) - 8003d00: 2201 movs r2, #1 - 8003d02: 701a strb r2, [r3, #0] + 8003d26: 4b0c ldr r3, [pc, #48] ; (8003d58 ) + 8003d28: 2201 movs r2, #1 + 8003d2a: 701a strb r2, [r3, #0] SetBaudRate(); - 8003d04: f7fe fdb4 bl 8002870 + 8003d2c: f7fe fdb4 bl 8002898 } __HAL_UART_CLEAR_FLAG(&huart1, UART_FLAG_TC); - 8003d08: 4b0a ldr r3, [pc, #40] ; (8003d34 ) - 8003d0a: 681b ldr r3, [r3, #0] - 8003d0c: 2240 movs r2, #64 ; 0x40 - 8003d0e: 621a str r2, [r3, #32] + 8003d30: 4b0a ldr r3, [pc, #40] ; (8003d5c ) + 8003d32: 681b ldr r3, [r3, #0] + 8003d34: 2240 movs r2, #64 ; 0x40 + 8003d36: 621a str r2, [r3, #32] HAL_GPIO_WritePin(RE_GPIO_Port, RE_Pin, GPIO_PIN_RESET); - 8003d10: 2380 movs r3, #128 ; 0x80 - 8003d12: 0059 lsls r1, r3, #1 - 8003d14: 23a0 movs r3, #160 ; 0xa0 - 8003d16: 05db lsls r3, r3, #23 - 8003d18: 2200 movs r2, #0 - 8003d1a: 0018 movs r0, r3 - 8003d1c: f000 fef7 bl 8004b0e + 8003d38: 2380 movs r3, #128 ; 0x80 + 8003d3a: 0059 lsls r1, r3, #1 + 8003d3c: 23a0 movs r3, #160 ; 0xa0 + 8003d3e: 05db lsls r3, r3, #23 + 8003d40: 2200 movs r2, #0 + 8003d42: 0018 movs r0, r3 + 8003d44: f000 ff01 bl 8004b4a } - 8003d20: 46c0 nop ; (mov r8, r8) - 8003d22: 46bd mov sp, r7 - 8003d24: b004 add sp, #16 - 8003d26: bd80 pop {r7, pc} - 8003d28: 20000102 .word 0x20000102 - 8003d2c: 20000004 .word 0x20000004 - 8003d30: 20000037 .word 0x20000037 - 8003d34: 20000104 .word 0x20000104 + 8003d48: 46c0 nop ; (mov r8, r8) + 8003d4a: 46bd mov sp, r7 + 8003d4c: b004 add sp, #16 + 8003d4e: bd80 pop {r7, pc} + 8003d50: 2000010a .word 0x2000010a + 8003d54: 20000004 .word 0x20000004 + 8003d58: 2000003f .word 0x2000003f + 8003d5c: 2000010c .word 0x2000010c -08003d38 : +08003d60 : void StartTransfer(void) { - 8003d38: b580 push {r7, lr} - 8003d3a: b082 sub sp, #8 - 8003d3c: af00 add r7, sp, #0 + 8003d60: b580 push {r7, lr} + 8003d62: b082 sub sp, #8 + 8003d64: af00 add r7, sp, #0 while(a) { a--; a++; a--; a++; a--; }*/ HAL_UART_Transmit_IT(&huart1, tx, lastbyte); - 8003d3e: 4b05 ldr r3, [pc, #20] ; (8003d54 ) - 8003d40: 881a ldrh r2, [r3, #0] - 8003d42: 4905 ldr r1, [pc, #20] ; (8003d58 ) - 8003d44: 4b05 ldr r3, [pc, #20] ; (8003d5c ) - 8003d46: 0018 movs r0, r3 - 8003d48: f002 f942 bl 8005fd0 + 8003d66: 4b05 ldr r3, [pc, #20] ; (8003d7c ) + 8003d68: 881a ldrh r2, [r3, #0] + 8003d6a: 4905 ldr r1, [pc, #20] ; (8003d80 ) + 8003d6c: 4b05 ldr r3, [pc, #20] ; (8003d84 ) + 8003d6e: 0018 movs r0, r3 + 8003d70: f002 f94c bl 800600c } - 8003d4c: 46c0 nop ; (mov r8, r8) - 8003d4e: 46bd mov sp, r7 - 8003d50: b002 add sp, #8 - 8003d52: bd80 pop {r7, pc} - 8003d54: 2000028a .word 0x2000028a - 8003d58: 20000188 .word 0x20000188 - 8003d5c: 20000104 .word 0x20000104 + 8003d74: 46c0 nop ; (mov r8, r8) + 8003d76: 46bd mov sp, r7 + 8003d78: b002 add sp, #8 + 8003d7a: bd80 pop {r7, pc} + 8003d7c: 20000292 .word 0x20000292 + 8003d80: 20000190 .word 0x20000190 + 8003d84: 2000010c .word 0x2000010c -08003d60 : +08003d88 : void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin) { - 8003d60: b580 push {r7, lr} - 8003d62: b082 sub sp, #8 - 8003d64: af00 add r7, sp, #0 - 8003d66: 0002 movs r2, r0 - 8003d68: 1dbb adds r3, r7, #6 - 8003d6a: 801a strh r2, [r3, #0] + 8003d88: b580 push {r7, lr} + 8003d8a: b082 sub sp, #8 + 8003d8c: af00 add r7, sp, #0 + 8003d8e: 0002 movs r2, r0 + 8003d90: 1dbb adds r3, r7, #6 + 8003d92: 801a strh r2, [r3, #0] - if(GPIO_Pin == UPER_Pin) // Overdrive - 8003d6c: 1dbb adds r3, r7, #6 - 8003d6e: 881b ldrh r3, [r3, #0] - 8003d70: 2b01 cmp r3, #1 - 8003d72: d12a bne.n 8003dca +// if(GPIO_Pin == UPER_Pin) // Overdrive { - __HAL_GPIO_EXTI_CLEAR_FLAG(UPER_Pin); - 8003d74: 4b38 ldr r3, [pc, #224] ; (8003e58 ) - 8003d76: 2201 movs r2, #1 - 8003d78: 615a str r2, [r3, #20] + // __HAL_GPIO_EXTI_CLEAR_FLAG(UPER_Pin); if(HAL_GPIO_ReadPin(GPIOA, UPER_Pin) == GPIO_PIN_SET) - 8003d7a: 23a0 movs r3, #160 ; 0xa0 - 8003d7c: 05db lsls r3, r3, #23 - 8003d7e: 2101 movs r1, #1 - 8003d80: 0018 movs r0, r3 - 8003d82: f000 fea7 bl 8004ad4 - 8003d86: 0003 movs r3, r0 - 8003d88: 2b01 cmp r3, #1 - 8003d8a: d10f bne.n 8003dac + 8003d94: 23a0 movs r3, #160 ; 0xa0 + 8003d96: 05db lsls r3, r3, #23 + 8003d98: 2101 movs r1, #1 + 8003d9a: 0018 movs r0, r3 + 8003d9c: f000 feb8 bl 8004b10 + 8003da0: 0003 movs r3, r0 + 8003da2: 2b01 cmp r3, #1 + 8003da4: d113 bne.n 8003dce { - //timerUPER = 1000; + timerUPER = 1000; + 8003da6: 4b39 ldr r3, [pc, #228] ; (8003e8c ) + 8003da8: 22fa movs r2, #250 ; 0xfa + 8003daa: 0092 lsls r2, r2, #2 + 8003dac: 801a strh r2, [r3, #0] HAL_GPIO_WritePin(GPIOA, PER_Pin, GPIO_PIN_SET); - 8003d8c: 23a0 movs r3, #160 ; 0xa0 - 8003d8e: 05db lsls r3, r3, #23 - 8003d90: 2201 movs r2, #1 - 8003d92: 2110 movs r1, #16 - 8003d94: 0018 movs r0, r3 - 8003d96: f000 feba bl 8004b0e + 8003dae: 23a0 movs r3, #160 ; 0xa0 + 8003db0: 05db lsls r3, r3, #23 + 8003db2: 2201 movs r2, #1 + 8003db4: 2110 movs r1, #16 + 8003db6: 0018 movs r0, r3 + 8003db8: f000 fec7 bl 8004b4a AMP_STATUS |= UPER_Pin; - 8003d9a: 4b30 ldr r3, [pc, #192] ; (8003e5c ) - 8003d9c: 881b ldrh r3, [r3, #0] - 8003d9e: b29b uxth r3, r3 - 8003da0: 2201 movs r2, #1 - 8003da2: 4313 orrs r3, r2 - 8003da4: b29a uxth r2, r3 - 8003da6: 4b2d ldr r3, [pc, #180] ; (8003e5c ) - 8003da8: 801a strh r2, [r3, #0] - 8003daa: e00e b.n 8003dca + 8003dbc: 4b34 ldr r3, [pc, #208] ; (8003e90 ) + 8003dbe: 881b ldrh r3, [r3, #0] + 8003dc0: b29b uxth r3, r3 + 8003dc2: 2201 movs r2, #1 + 8003dc4: 4313 orrs r3, r2 + 8003dc6: b29a uxth r2, r3 + 8003dc8: 4b31 ldr r3, [pc, #196] ; (8003e90 ) + 8003dca: 801a strh r2, [r3, #0] + 8003dcc: e013 b.n 8003df6 } else { + if(timerUPER==0){ + 8003dce: 4b2f ldr r3, [pc, #188] ; (8003e8c ) + 8003dd0: 881b ldrh r3, [r3, #0] + 8003dd2: b29b uxth r3, r3 + 8003dd4: 2b00 cmp r3, #0 + 8003dd6: d10e bne.n 8003df6 AMP_STATUS &= ~UPER_Pin; - 8003dac: 4b2b ldr r3, [pc, #172] ; (8003e5c ) - 8003dae: 881b ldrh r3, [r3, #0] - 8003db0: b29b uxth r3, r3 - 8003db2: 2201 movs r2, #1 - 8003db4: 4393 bics r3, r2 - 8003db6: b29a uxth r2, r3 - 8003db8: 4b28 ldr r3, [pc, #160] ; (8003e5c ) - 8003dba: 801a strh r2, [r3, #0] + 8003dd8: 4b2d ldr r3, [pc, #180] ; (8003e90 ) + 8003dda: 881b ldrh r3, [r3, #0] + 8003ddc: b29b uxth r3, r3 + 8003dde: 2201 movs r2, #1 + 8003de0: 4393 bics r3, r2 + 8003de2: b29a uxth r2, r3 + 8003de4: 4b2a ldr r3, [pc, #168] ; (8003e90 ) + 8003de6: 801a strh r2, [r3, #0] HAL_GPIO_WritePin(GPIOA, PER_Pin, GPIO_PIN_RESET); - 8003dbc: 23a0 movs r3, #160 ; 0xa0 - 8003dbe: 05db lsls r3, r3, #23 - 8003dc0: 2200 movs r2, #0 - 8003dc2: 2110 movs r1, #16 - 8003dc4: 0018 movs r0, r3 - 8003dc6: f000 fea2 bl 8004b0e - } - } + 8003de8: 23a0 movs r3, #160 ; 0xa0 + 8003dea: 05db lsls r3, r3, #23 + 8003dec: 2200 movs r2, #0 + 8003dee: 2110 movs r1, #16 + 8003df0: 0018 movs r0, r3 + 8003df2: f000 feaa bl 8004b4a - - - if(GPIO_Pin == OP_Pin) // OP - 8003dca: 1dbb adds r3, r7, #6 - 8003dcc: 881b ldrh r3, [r3, #0] - 8003dce: 2b02 cmp r3, #2 - 8003dd0: d11c bne.n 8003e0c +// if(GPIO_Pin == OP_Pin) // OP { - __HAL_GPIO_EXTI_CLEAR_FLAG(OP_Pin); - 8003dd2: 4b21 ldr r3, [pc, #132] ; (8003e58 ) - 8003dd4: 2202 movs r2, #2 - 8003dd6: 615a str r2, [r3, #20] + // __HAL_GPIO_EXTI_CLEAR_FLAG(OP_Pin); if(HAL_GPIO_ReadPin(GPIOA, OP_Pin) == GPIO_PIN_SET) - 8003dd8: 23a0 movs r3, #160 ; 0xa0 - 8003dda: 05db lsls r3, r3, #23 - 8003ddc: 2102 movs r1, #2 - 8003dde: 0018 movs r0, r3 - 8003de0: f000 fe78 bl 8004ad4 - 8003de4: 0003 movs r3, r0 - 8003de6: 2b01 cmp r3, #1 - 8003de8: d108 bne.n 8003dfc + 8003df6: 23a0 movs r3, #160 ; 0xa0 + 8003df8: 05db lsls r3, r3, #23 + 8003dfa: 2102 movs r1, #2 + 8003dfc: 0018 movs r0, r3 + 8003dfe: f000 fe87 bl 8004b10 + 8003e02: 0003 movs r3, r0 + 8003e04: 2b01 cmp r3, #1 + 8003e06: d10c bne.n 8003e22 { - //timerOP = 1000; + timerOP = 1000; + 8003e08: 4b22 ldr r3, [pc, #136] ; (8003e94 ) + 8003e0a: 22fa movs r2, #250 ; 0xfa + 8003e0c: 0092 lsls r2, r2, #2 + 8003e0e: 801a strh r2, [r3, #0] AMP_STATUS |= OP_Pin; - 8003dea: 4b1c ldr r3, [pc, #112] ; (8003e5c ) - 8003dec: 881b ldrh r3, [r3, #0] - 8003dee: b29b uxth r3, r3 - 8003df0: 2202 movs r2, #2 - 8003df2: 4313 orrs r3, r2 - 8003df4: b29a uxth r2, r3 - 8003df6: 4b19 ldr r3, [pc, #100] ; (8003e5c ) - 8003df8: 801a strh r2, [r3, #0] - 8003dfa: e007 b.n 8003e0c + 8003e10: 4b1f ldr r3, [pc, #124] ; (8003e90 ) + 8003e12: 881b ldrh r3, [r3, #0] + 8003e14: b29b uxth r3, r3 + 8003e16: 2202 movs r2, #2 + 8003e18: 4313 orrs r3, r2 + 8003e1a: b29a uxth r2, r3 + 8003e1c: 4b1c ldr r3, [pc, #112] ; (8003e90 ) + 8003e1e: 801a strh r2, [r3, #0] + 8003e20: e00c b.n 8003e3c } else { + if(timerOP==0){ + 8003e22: 4b1c ldr r3, [pc, #112] ; (8003e94 ) + 8003e24: 881b ldrh r3, [r3, #0] + 8003e26: b29b uxth r3, r3 + 8003e28: 2b00 cmp r3, #0 + 8003e2a: d107 bne.n 8003e3c AMP_STATUS &= ~OP_Pin; - 8003dfc: 4b17 ldr r3, [pc, #92] ; (8003e5c ) - 8003dfe: 881b ldrh r3, [r3, #0] - 8003e00: b29b uxth r3, r3 - 8003e02: 2202 movs r2, #2 - 8003e04: 4393 bics r3, r2 - 8003e06: b29a uxth r2, r3 - 8003e08: 4b14 ldr r3, [pc, #80] ; (8003e5c ) - 8003e0a: 801a strh r2, [r3, #0] - } - } - - - - if(GPIO_Pin == KZ_Pin) // KZ - 8003e0c: 1dbb adds r3, r7, #6 - 8003e0e: 881b ldrh r3, [r3, #0] - 8003e10: 2b04 cmp r3, #4 - 8003e12: d11c bne.n 8003e4e - { - __HAL_GPIO_EXTI_CLEAR_FLAG(KZ_Pin); - 8003e14: 4b10 ldr r3, [pc, #64] ; (8003e58 ) - 8003e16: 2204 movs r2, #4 - 8003e18: 615a str r2, [r3, #20] - - if(HAL_GPIO_ReadPin(GPIOA, KZ_Pin) == GPIO_PIN_SET) - 8003e1a: 23a0 movs r3, #160 ; 0xa0 - 8003e1c: 05db lsls r3, r3, #23 - 8003e1e: 2104 movs r1, #4 - 8003e20: 0018 movs r0, r3 - 8003e22: f000 fe57 bl 8004ad4 - 8003e26: 0003 movs r3, r0 - 8003e28: 2b01 cmp r3, #1 - 8003e2a: d108 bne.n 8003e3e - { - //timerKZ = 1000; - AMP_STATUS |= KZ_Pin; - 8003e2c: 4b0b ldr r3, [pc, #44] ; (8003e5c ) + 8003e2c: 4b18 ldr r3, [pc, #96] ; (8003e90 ) 8003e2e: 881b ldrh r3, [r3, #0] 8003e30: b29b uxth r3, r3 - 8003e32: 2204 movs r2, #4 - 8003e34: 4313 orrs r3, r2 + 8003e32: 2202 movs r2, #2 + 8003e34: 4393 bics r3, r2 8003e36: b29a uxth r2, r3 - 8003e38: 4b08 ldr r3, [pc, #32] ; (8003e5c ) + 8003e38: 4b15 ldr r3, [pc, #84] ; (8003e90 ) 8003e3a: 801a strh r2, [r3, #0] - else + +// if(GPIO_Pin == KZ_Pin) // KZ + { +// __HAL_GPIO_EXTI_CLEAR_FLAG(KZ_Pin); + + if(HAL_GPIO_ReadPin(GPIOA, KZ_Pin) == GPIO_PIN_SET) + 8003e3c: 23a0 movs r3, #160 ; 0xa0 + 8003e3e: 05db lsls r3, r3, #23 + 8003e40: 2104 movs r1, #4 + 8003e42: 0018 movs r0, r3 + 8003e44: f000 fe64 bl 8004b10 + 8003e48: 0003 movs r3, r0 + 8003e4a: 2b01 cmp r3, #1 + 8003e4c: d10c bne.n 8003e68 { + timerKZ = 1000; + 8003e4e: 4b12 ldr r3, [pc, #72] ; (8003e98 ) + 8003e50: 22fa movs r2, #250 ; 0xfa + 8003e52: 0092 lsls r2, r2, #2 + 8003e54: 801a strh r2, [r3, #0] + AMP_STATUS |= KZ_Pin; + 8003e56: 4b0e ldr r3, [pc, #56] ; (8003e90 ) + 8003e58: 881b ldrh r3, [r3, #0] + 8003e5a: b29b uxth r3, r3 + 8003e5c: 2204 movs r2, #4 + 8003e5e: 4313 orrs r3, r2 + 8003e60: b29a uxth r2, r3 + 8003e62: 4b0b ldr r3, [pc, #44] ; (8003e90 ) + 8003e64: 801a strh r2, [r3, #0] + if(timerKZ==0){ AMP_STATUS &= ~KZ_Pin; + } } } } - 8003e3c: e007 b.n 8003e4e + 8003e66: e00c b.n 8003e82 + if(timerKZ==0){ + 8003e68: 4b0b ldr r3, [pc, #44] ; (8003e98 ) + 8003e6a: 881b ldrh r3, [r3, #0] + 8003e6c: b29b uxth r3, r3 + 8003e6e: 2b00 cmp r3, #0 + 8003e70: d107 bne.n 8003e82 AMP_STATUS &= ~KZ_Pin; - 8003e3e: 4b07 ldr r3, [pc, #28] ; (8003e5c ) - 8003e40: 881b ldrh r3, [r3, #0] - 8003e42: b29b uxth r3, r3 - 8003e44: 2204 movs r2, #4 - 8003e46: 4393 bics r3, r2 - 8003e48: b29a uxth r2, r3 - 8003e4a: 4b04 ldr r3, [pc, #16] ; (8003e5c ) - 8003e4c: 801a strh r2, [r3, #0] + 8003e72: 4b07 ldr r3, [pc, #28] ; (8003e90 ) + 8003e74: 881b ldrh r3, [r3, #0] + 8003e76: b29b uxth r3, r3 + 8003e78: 2204 movs r2, #4 + 8003e7a: 4393 bics r3, r2 + 8003e7c: b29a uxth r2, r3 + 8003e7e: 4b04 ldr r3, [pc, #16] ; (8003e90 ) + 8003e80: 801a strh r2, [r3, #0] } - 8003e4e: 46c0 nop ; (mov r8, r8) - 8003e50: 46bd mov sp, r7 - 8003e52: b002 add sp, #8 - 8003e54: bd80 pop {r7, pc} - 8003e56: 46c0 nop ; (mov r8, r8) - 8003e58: 40010400 .word 0x40010400 - 8003e5c: 2000002c .word 0x2000002c + 8003e82: 46c0 nop ; (mov r8, r8) + 8003e84: 46bd mov sp, r7 + 8003e86: b002 add sp, #8 + 8003e88: bd80 pop {r7, pc} + 8003e8a: 46c0 nop ; (mov r8, r8) + 8003e8c: 2000002e .word 0x2000002e + 8003e90: 2000002c .word 0x2000002c + 8003e94: 20000030 .word 0x20000030 + 8003e98: 20000032 .word 0x20000032 -08003e60 : +08003e9c : * In the default implementation,Systick is used as source of time base. * the tick variable is incremented each 1ms in its ISR. * @retval HAL status */ HAL_StatusTypeDef HAL_Init(void) { - 8003e60: b580 push {r7, lr} - 8003e62: b082 sub sp, #8 - 8003e64: af00 add r7, sp, #0 + 8003e9c: b580 push {r7, lr} + 8003e9e: b082 sub sp, #8 + 8003ea0: af00 add r7, sp, #0 HAL_StatusTypeDef status = HAL_OK; - 8003e66: 1dfb adds r3, r7, #7 - 8003e68: 2200 movs r2, #0 - 8003e6a: 701a strb r2, [r3, #0] + 8003ea2: 1dfb adds r3, r7, #7 + 8003ea4: 2200 movs r2, #0 + 8003ea6: 701a strb r2, [r3, #0] #if (BUFFER_CACHE_DISABLE != 0) __HAL_FLASH_BUFFER_CACHE_DISABLE(); #endif /* BUFFER_CACHE_DISABLE */ #if (PREREAD_ENABLE != 0) __HAL_FLASH_PREREAD_BUFFER_ENABLE(); - 8003e6c: 4b0b ldr r3, [pc, #44] ; (8003e9c ) - 8003e6e: 4a0b ldr r2, [pc, #44] ; (8003e9c ) - 8003e70: 6812 ldr r2, [r2, #0] - 8003e72: 2140 movs r1, #64 ; 0x40 - 8003e74: 430a orrs r2, r1 - 8003e76: 601a str r2, [r3, #0] + 8003ea8: 4b0b ldr r3, [pc, #44] ; (8003ed8 ) + 8003eaa: 4a0b ldr r2, [pc, #44] ; (8003ed8 ) + 8003eac: 6812 ldr r2, [r2, #0] + 8003eae: 2140 movs r1, #64 ; 0x40 + 8003eb0: 430a orrs r2, r1 + 8003eb2: 601a str r2, [r3, #0] #if (PREFETCH_ENABLE != 0) __HAL_FLASH_PREFETCH_BUFFER_ENABLE(); #endif /* PREFETCH_ENABLE */ /* Use SysTick as time base source and configure 1ms tick (default clock after Reset is MSI) */ if (HAL_InitTick(TICK_INT_PRIORITY) != HAL_OK) - 8003e78: 2000 movs r0, #0 - 8003e7a: f000 f811 bl 8003ea0 - 8003e7e: 1e03 subs r3, r0, #0 - 8003e80: d003 beq.n 8003e8a + 8003eb4: 2000 movs r0, #0 + 8003eb6: f000 f811 bl 8003edc + 8003eba: 1e03 subs r3, r0, #0 + 8003ebc: d003 beq.n 8003ec6 { status = HAL_ERROR; - 8003e82: 1dfb adds r3, r7, #7 - 8003e84: 2201 movs r2, #1 - 8003e86: 701a strb r2, [r3, #0] - 8003e88: e001 b.n 8003e8e + 8003ebe: 1dfb adds r3, r7, #7 + 8003ec0: 2201 movs r2, #1 + 8003ec2: 701a strb r2, [r3, #0] + 8003ec4: e001 b.n 8003eca } else { /* Init the low level hardware */ HAL_MspInit(); - 8003e8a: f7fe f9b3 bl 80021f4 + 8003ec6: f7fe f985 bl 80021d4 } /* Return function status */ return status; - 8003e8e: 1dfb adds r3, r7, #7 - 8003e90: 781b ldrb r3, [r3, #0] + 8003eca: 1dfb adds r3, r7, #7 + 8003ecc: 781b ldrb r3, [r3, #0] } - 8003e92: 0018 movs r0, r3 - 8003e94: 46bd mov sp, r7 - 8003e96: b002 add sp, #8 - 8003e98: bd80 pop {r7, pc} - 8003e9a: 46c0 nop ; (mov r8, r8) - 8003e9c: 40022000 .word 0x40022000 + 8003ece: 0018 movs r0, r3 + 8003ed0: 46bd mov sp, r7 + 8003ed2: b002 add sp, #8 + 8003ed4: bd80 pop {r7, pc} + 8003ed6: 46c0 nop ; (mov r8, r8) + 8003ed8: 40022000 .word 0x40022000 -08003ea0 : +08003edc : * implementation in user file. * @param TickPriority Tick interrupt priority. * @retval HAL status */ __weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority) { - 8003ea0: b590 push {r4, r7, lr} - 8003ea2: b083 sub sp, #12 - 8003ea4: af00 add r7, sp, #0 - 8003ea6: 6078 str r0, [r7, #4] + 8003edc: b590 push {r4, r7, lr} + 8003ede: b083 sub sp, #12 + 8003ee0: af00 add r7, sp, #0 + 8003ee2: 6078 str r0, [r7, #4] /* Configure the SysTick to have interrupt in 1ms time basis*/ if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U) - 8003ea8: 4b14 ldr r3, [pc, #80] ; (8003efc ) - 8003eaa: 681c ldr r4, [r3, #0] - 8003eac: 4b14 ldr r3, [pc, #80] ; (8003f00 ) - 8003eae: 781b ldrb r3, [r3, #0] - 8003eb0: 0019 movs r1, r3 - 8003eb2: 23fa movs r3, #250 ; 0xfa - 8003eb4: 0098 lsls r0, r3, #2 - 8003eb6: f7fc f927 bl 8000108 <__udivsi3> - 8003eba: 0003 movs r3, r0 - 8003ebc: 0019 movs r1, r3 - 8003ebe: 0020 movs r0, r4 - 8003ec0: f7fc f922 bl 8000108 <__udivsi3> - 8003ec4: 0003 movs r3, r0 - 8003ec6: 0018 movs r0, r3 - 8003ec8: f000 f93c bl 8004144 - 8003ecc: 1e03 subs r3, r0, #0 - 8003ece: d001 beq.n 8003ed4 + 8003ee4: 4b14 ldr r3, [pc, #80] ; (8003f38 ) + 8003ee6: 681c ldr r4, [r3, #0] + 8003ee8: 4b14 ldr r3, [pc, #80] ; (8003f3c ) + 8003eea: 781b ldrb r3, [r3, #0] + 8003eec: 0019 movs r1, r3 + 8003eee: 23fa movs r3, #250 ; 0xfa + 8003ef0: 0098 lsls r0, r3, #2 + 8003ef2: f7fc f909 bl 8000108 <__udivsi3> + 8003ef6: 0003 movs r3, r0 + 8003ef8: 0019 movs r1, r3 + 8003efa: 0020 movs r0, r4 + 8003efc: f7fc f904 bl 8000108 <__udivsi3> + 8003f00: 0003 movs r3, r0 + 8003f02: 0018 movs r0, r3 + 8003f04: f000 f93c bl 8004180 + 8003f08: 1e03 subs r3, r0, #0 + 8003f0a: d001 beq.n 8003f10 { return HAL_ERROR; - 8003ed0: 2301 movs r3, #1 - 8003ed2: e00f b.n 8003ef4 + 8003f0c: 2301 movs r3, #1 + 8003f0e: e00f b.n 8003f30 } /* Configure the SysTick IRQ priority */ if (TickPriority < (1UL << __NVIC_PRIO_BITS)) - 8003ed4: 687b ldr r3, [r7, #4] - 8003ed6: 2b03 cmp r3, #3 - 8003ed8: d80b bhi.n 8003ef2 + 8003f10: 687b ldr r3, [r7, #4] + 8003f12: 2b03 cmp r3, #3 + 8003f14: d80b bhi.n 8003f2e { HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U); - 8003eda: 6879 ldr r1, [r7, #4] - 8003edc: 2301 movs r3, #1 - 8003ede: 425b negs r3, r3 - 8003ee0: 2200 movs r2, #0 - 8003ee2: 0018 movs r0, r3 - 8003ee4: f000 f8f8 bl 80040d8 + 8003f16: 6879 ldr r1, [r7, #4] + 8003f18: 2301 movs r3, #1 + 8003f1a: 425b negs r3, r3 + 8003f1c: 2200 movs r2, #0 + 8003f1e: 0018 movs r0, r3 + 8003f20: f000 f8f8 bl 8004114 uwTickPrio = TickPriority; - 8003ee8: 4b06 ldr r3, [pc, #24] ; (8003f04 ) - 8003eea: 687a ldr r2, [r7, #4] - 8003eec: 601a str r2, [r3, #0] + 8003f24: 4b06 ldr r3, [pc, #24] ; (8003f40 ) + 8003f26: 687a ldr r2, [r7, #4] + 8003f28: 601a str r2, [r3, #0] { return HAL_ERROR; } /* Return function status */ return HAL_OK; - 8003eee: 2300 movs r3, #0 - 8003ef0: e000 b.n 8003ef4 + 8003f2a: 2300 movs r3, #0 + 8003f2c: e000 b.n 8003f30 return HAL_ERROR; - 8003ef2: 2301 movs r3, #1 + 8003f2e: 2301 movs r3, #1 } - 8003ef4: 0018 movs r0, r3 - 8003ef6: 46bd mov sp, r7 - 8003ef8: b003 add sp, #12 - 8003efa: bd90 pop {r4, r7, pc} - 8003efc: 20000000 .word 0x20000000 - 8003f00: 2000000c .word 0x2000000c - 8003f04: 20000008 .word 0x20000008 + 8003f30: 0018 movs r0, r3 + 8003f32: 46bd mov sp, r7 + 8003f34: b003 add sp, #12 + 8003f36: bd90 pop {r4, r7, pc} + 8003f38: 20000000 .word 0x20000000 + 8003f3c: 2000000c .word 0x2000000c + 8003f40: 20000008 .word 0x20000008 -08003f08 : +08003f44 : * @note This function is declared as __weak to be overwritten in case of other * implementations in user file. * @retval None */ __weak void HAL_IncTick(void) { - 8003f08: b580 push {r7, lr} - 8003f0a: af00 add r7, sp, #0 + 8003f44: b580 push {r7, lr} + 8003f46: af00 add r7, sp, #0 uwTick += uwTickFreq; - 8003f0c: 4b05 ldr r3, [pc, #20] ; (8003f24 ) - 8003f0e: 781b ldrb r3, [r3, #0] - 8003f10: 001a movs r2, r3 - 8003f12: 4b05 ldr r3, [pc, #20] ; (8003f28 ) - 8003f14: 681b ldr r3, [r3, #0] - 8003f16: 18d2 adds r2, r2, r3 - 8003f18: 4b03 ldr r3, [pc, #12] ; (8003f28 ) - 8003f1a: 601a str r2, [r3, #0] + 8003f48: 4b05 ldr r3, [pc, #20] ; (8003f60 ) + 8003f4a: 781b ldrb r3, [r3, #0] + 8003f4c: 001a movs r2, r3 + 8003f4e: 4b05 ldr r3, [pc, #20] ; (8003f64 ) + 8003f50: 681b ldr r3, [r3, #0] + 8003f52: 18d2 adds r2, r2, r3 + 8003f54: 4b03 ldr r3, [pc, #12] ; (8003f64 ) + 8003f56: 601a str r2, [r3, #0] } - 8003f1c: 46c0 nop ; (mov r8, r8) - 8003f1e: 46bd mov sp, r7 - 8003f20: bd80 pop {r7, pc} - 8003f22: 46c0 nop ; (mov r8, r8) - 8003f24: 2000000c .word 0x2000000c - 8003f28: 2000038c .word 0x2000038c + 8003f58: 46c0 nop ; (mov r8, r8) + 8003f5a: 46bd mov sp, r7 + 8003f5c: bd80 pop {r7, pc} + 8003f5e: 46c0 nop ; (mov r8, r8) + 8003f60: 2000000c .word 0x2000000c + 8003f64: 20000394 .word 0x20000394 -08003f2c : +08003f68 : * @note This function is declared as __weak to be overwritten in case of other * implementations in user file. * @retval tick value */ __weak uint32_t HAL_GetTick(void) { - 8003f2c: b580 push {r7, lr} - 8003f2e: af00 add r7, sp, #0 + 8003f68: b580 push {r7, lr} + 8003f6a: af00 add r7, sp, #0 return uwTick; - 8003f30: 4b02 ldr r3, [pc, #8] ; (8003f3c ) - 8003f32: 681b ldr r3, [r3, #0] + 8003f6c: 4b02 ldr r3, [pc, #8] ; (8003f78 ) + 8003f6e: 681b ldr r3, [r3, #0] } - 8003f34: 0018 movs r0, r3 - 8003f36: 46bd mov sp, r7 - 8003f38: bd80 pop {r7, pc} - 8003f3a: 46c0 nop ; (mov r8, r8) - 8003f3c: 2000038c .word 0x2000038c + 8003f70: 0018 movs r0, r3 + 8003f72: 46bd mov sp, r7 + 8003f74: bd80 pop {r7, pc} + 8003f76: 46c0 nop ; (mov r8, r8) + 8003f78: 20000394 .word 0x20000394 -08003f40 <__NVIC_EnableIRQ>: +08003f7c <__NVIC_EnableIRQ>: \details Enables a device specific interrupt in the NVIC interrupt controller. \param [in] IRQn Device specific interrupt number. \note IRQn must not be negative. */ __STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn) { - 8003f40: b580 push {r7, lr} - 8003f42: b082 sub sp, #8 - 8003f44: af00 add r7, sp, #0 - 8003f46: 0002 movs r2, r0 - 8003f48: 1dfb adds r3, r7, #7 - 8003f4a: 701a strb r2, [r3, #0] + 8003f7c: b580 push {r7, lr} + 8003f7e: b082 sub sp, #8 + 8003f80: af00 add r7, sp, #0 + 8003f82: 0002 movs r2, r0 + 8003f84: 1dfb adds r3, r7, #7 + 8003f86: 701a strb r2, [r3, #0] if ((int32_t)(IRQn) >= 0) - 8003f4c: 1dfb adds r3, r7, #7 - 8003f4e: 781b ldrb r3, [r3, #0] - 8003f50: 2b7f cmp r3, #127 ; 0x7f - 8003f52: d809 bhi.n 8003f68 <__NVIC_EnableIRQ+0x28> + 8003f88: 1dfb adds r3, r7, #7 + 8003f8a: 781b ldrb r3, [r3, #0] + 8003f8c: 2b7f cmp r3, #127 ; 0x7f + 8003f8e: d809 bhi.n 8003fa4 <__NVIC_EnableIRQ+0x28> { NVIC->ISER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - 8003f54: 4b06 ldr r3, [pc, #24] ; (8003f70 <__NVIC_EnableIRQ+0x30>) - 8003f56: 1dfa adds r2, r7, #7 - 8003f58: 7812 ldrb r2, [r2, #0] - 8003f5a: 0011 movs r1, r2 - 8003f5c: 221f movs r2, #31 - 8003f5e: 400a ands r2, r1 - 8003f60: 2101 movs r1, #1 - 8003f62: 4091 lsls r1, r2 - 8003f64: 000a movs r2, r1 - 8003f66: 601a str r2, [r3, #0] + 8003f90: 4b06 ldr r3, [pc, #24] ; (8003fac <__NVIC_EnableIRQ+0x30>) + 8003f92: 1dfa adds r2, r7, #7 + 8003f94: 7812 ldrb r2, [r2, #0] + 8003f96: 0011 movs r1, r2 + 8003f98: 221f movs r2, #31 + 8003f9a: 400a ands r2, r1 + 8003f9c: 2101 movs r1, #1 + 8003f9e: 4091 lsls r1, r2 + 8003fa0: 000a movs r2, r1 + 8003fa2: 601a str r2, [r3, #0] } } - 8003f68: 46c0 nop ; (mov r8, r8) - 8003f6a: 46bd mov sp, r7 - 8003f6c: b002 add sp, #8 - 8003f6e: bd80 pop {r7, pc} - 8003f70: e000e100 .word 0xe000e100 + 8003fa4: 46c0 nop ; (mov r8, r8) + 8003fa6: 46bd mov sp, r7 + 8003fa8: b002 add sp, #8 + 8003faa: bd80 pop {r7, pc} + 8003fac: e000e100 .word 0xe000e100 -08003f74 <__NVIC_DisableIRQ>: +08003fb0 <__NVIC_DisableIRQ>: \details Disables a device specific interrupt in the NVIC interrupt controller. \param [in] IRQn Device specific interrupt number. \note IRQn must not be negative. */ __STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn) { - 8003f74: b580 push {r7, lr} - 8003f76: b082 sub sp, #8 - 8003f78: af00 add r7, sp, #0 - 8003f7a: 0002 movs r2, r0 - 8003f7c: 1dfb adds r3, r7, #7 - 8003f7e: 701a strb r2, [r3, #0] + 8003fb0: b580 push {r7, lr} + 8003fb2: b082 sub sp, #8 + 8003fb4: af00 add r7, sp, #0 + 8003fb6: 0002 movs r2, r0 + 8003fb8: 1dfb adds r3, r7, #7 + 8003fba: 701a strb r2, [r3, #0] if ((int32_t)(IRQn) >= 0) - 8003f80: 1dfb adds r3, r7, #7 - 8003f82: 781b ldrb r3, [r3, #0] - 8003f84: 2b7f cmp r3, #127 ; 0x7f - 8003f86: d80e bhi.n 8003fa6 <__NVIC_DisableIRQ+0x32> + 8003fbc: 1dfb adds r3, r7, #7 + 8003fbe: 781b ldrb r3, [r3, #0] + 8003fc0: 2b7f cmp r3, #127 ; 0x7f + 8003fc2: d80e bhi.n 8003fe2 <__NVIC_DisableIRQ+0x32> { NVIC->ICER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - 8003f88: 4909 ldr r1, [pc, #36] ; (8003fb0 <__NVIC_DisableIRQ+0x3c>) - 8003f8a: 1dfb adds r3, r7, #7 - 8003f8c: 781b ldrb r3, [r3, #0] - 8003f8e: 001a movs r2, r3 - 8003f90: 231f movs r3, #31 - 8003f92: 4013 ands r3, r2 - 8003f94: 2201 movs r2, #1 - 8003f96: 409a lsls r2, r3 - 8003f98: 0013 movs r3, r2 - 8003f9a: 2280 movs r2, #128 ; 0x80 - 8003f9c: 508b str r3, [r1, r2] + 8003fc4: 4909 ldr r1, [pc, #36] ; (8003fec <__NVIC_DisableIRQ+0x3c>) + 8003fc6: 1dfb adds r3, r7, #7 + 8003fc8: 781b ldrb r3, [r3, #0] + 8003fca: 001a movs r2, r3 + 8003fcc: 231f movs r3, #31 + 8003fce: 4013 ands r3, r2 + 8003fd0: 2201 movs r2, #1 + 8003fd2: 409a lsls r2, r3 + 8003fd4: 0013 movs r3, r2 + 8003fd6: 2280 movs r2, #128 ; 0x80 + 8003fd8: 508b str r3, [r1, r2] \details Acts as a special kind of Data Memory Barrier. It completes when all explicit memory accesses before this instruction complete. */ __STATIC_FORCEINLINE void __DSB(void) { __ASM volatile ("dsb 0xF":::"memory"); - 8003f9e: f3bf 8f4f dsb sy + 8003fda: f3bf 8f4f dsb sy __ASM volatile ("isb 0xF":::"memory"); - 8003fa2: f3bf 8f6f isb sy + 8003fde: f3bf 8f6f isb sy __DSB(); __ISB(); } } - 8003fa6: 46c0 nop ; (mov r8, r8) - 8003fa8: 46bd mov sp, r7 - 8003faa: b002 add sp, #8 - 8003fac: bd80 pop {r7, pc} - 8003fae: 46c0 nop ; (mov r8, r8) - 8003fb0: e000e100 .word 0xe000e100 + 8003fe2: 46c0 nop ; (mov r8, r8) + 8003fe4: 46bd mov sp, r7 + 8003fe6: b002 add sp, #8 + 8003fe8: bd80 pop {r7, pc} + 8003fea: 46c0 nop ; (mov r8, r8) + 8003fec: e000e100 .word 0xe000e100 -08003fb4 <__NVIC_SetPriority>: +08003ff0 <__NVIC_SetPriority>: \param [in] IRQn Interrupt number. \param [in] priority Priority to set. \note The priority cannot be set for every processor exception. */ __STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) { - 8003fb4: b5b0 push {r4, r5, r7, lr} - 8003fb6: b082 sub sp, #8 - 8003fb8: af00 add r7, sp, #0 - 8003fba: 0002 movs r2, r0 - 8003fbc: 6039 str r1, [r7, #0] - 8003fbe: 1dfb adds r3, r7, #7 - 8003fc0: 701a strb r2, [r3, #0] + 8003ff0: b5b0 push {r4, r5, r7, lr} + 8003ff2: b082 sub sp, #8 + 8003ff4: af00 add r7, sp, #0 + 8003ff6: 0002 movs r2, r0 + 8003ff8: 6039 str r1, [r7, #0] + 8003ffa: 1dfb adds r3, r7, #7 + 8003ffc: 701a strb r2, [r3, #0] if ((int32_t)(IRQn) >= 0) - 8003fc2: 1dfb adds r3, r7, #7 - 8003fc4: 781b ldrb r3, [r3, #0] - 8003fc6: 2b7f cmp r3, #127 ; 0x7f - 8003fc8: d828 bhi.n 800401c <__NVIC_SetPriority+0x68> + 8003ffe: 1dfb adds r3, r7, #7 + 8004000: 781b ldrb r3, [r3, #0] + 8004002: 2b7f cmp r3, #127 ; 0x7f + 8004004: d828 bhi.n 8004058 <__NVIC_SetPriority+0x68> { NVIC->IP[_IP_IDX(IRQn)] = ((uint32_t)(NVIC->IP[_IP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | - 8003fca: 4c2f ldr r4, [pc, #188] ; (8004088 <__NVIC_SetPriority+0xd4>) - 8003fcc: 1dfb adds r3, r7, #7 - 8003fce: 781b ldrb r3, [r3, #0] - 8003fd0: b25b sxtb r3, r3 - 8003fd2: 089b lsrs r3, r3, #2 - 8003fd4: 492c ldr r1, [pc, #176] ; (8004088 <__NVIC_SetPriority+0xd4>) - 8003fd6: 1dfa adds r2, r7, #7 - 8003fd8: 7812 ldrb r2, [r2, #0] - 8003fda: b252 sxtb r2, r2 - 8003fdc: 0892 lsrs r2, r2, #2 - 8003fde: 32c0 adds r2, #192 ; 0xc0 - 8003fe0: 0092 lsls r2, r2, #2 - 8003fe2: 5852 ldr r2, [r2, r1] - 8003fe4: 1df9 adds r1, r7, #7 - 8003fe6: 7809 ldrb r1, [r1, #0] - 8003fe8: 0008 movs r0, r1 - 8003fea: 2103 movs r1, #3 - 8003fec: 4001 ands r1, r0 - 8003fee: 00c9 lsls r1, r1, #3 - 8003ff0: 20ff movs r0, #255 ; 0xff - 8003ff2: 4088 lsls r0, r1 - 8003ff4: 0001 movs r1, r0 - 8003ff6: 43c9 mvns r1, r1 - 8003ff8: 4011 ands r1, r2 + 8004006: 4c2f ldr r4, [pc, #188] ; (80040c4 <__NVIC_SetPriority+0xd4>) + 8004008: 1dfb adds r3, r7, #7 + 800400a: 781b ldrb r3, [r3, #0] + 800400c: b25b sxtb r3, r3 + 800400e: 089b lsrs r3, r3, #2 + 8004010: 492c ldr r1, [pc, #176] ; (80040c4 <__NVIC_SetPriority+0xd4>) + 8004012: 1dfa adds r2, r7, #7 + 8004014: 7812 ldrb r2, [r2, #0] + 8004016: b252 sxtb r2, r2 + 8004018: 0892 lsrs r2, r2, #2 + 800401a: 32c0 adds r2, #192 ; 0xc0 + 800401c: 0092 lsls r2, r2, #2 + 800401e: 5852 ldr r2, [r2, r1] + 8004020: 1df9 adds r1, r7, #7 + 8004022: 7809 ldrb r1, [r1, #0] + 8004024: 0008 movs r0, r1 + 8004026: 2103 movs r1, #3 + 8004028: 4001 ands r1, r0 + 800402a: 00c9 lsls r1, r1, #3 + 800402c: 20ff movs r0, #255 ; 0xff + 800402e: 4088 lsls r0, r1 + 8004030: 0001 movs r1, r0 + 8004032: 43c9 mvns r1, r1 + 8004034: 4011 ands r1, r2 (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); - 8003ffa: 683a ldr r2, [r7, #0] - 8003ffc: 0192 lsls r2, r2, #6 - 8003ffe: 20ff movs r0, #255 ; 0xff - 8004000: 4010 ands r0, r2 - 8004002: 1dfa adds r2, r7, #7 - 8004004: 7812 ldrb r2, [r2, #0] - 8004006: 0015 movs r5, r2 - 8004008: 2203 movs r2, #3 - 800400a: 402a ands r2, r5 - 800400c: 00d2 lsls r2, r2, #3 - 800400e: 4090 lsls r0, r2 - 8004010: 0002 movs r2, r0 + 8004036: 683a ldr r2, [r7, #0] + 8004038: 0192 lsls r2, r2, #6 + 800403a: 20ff movs r0, #255 ; 0xff + 800403c: 4010 ands r0, r2 + 800403e: 1dfa adds r2, r7, #7 + 8004040: 7812 ldrb r2, [r2, #0] + 8004042: 0015 movs r5, r2 + 8004044: 2203 movs r2, #3 + 8004046: 402a ands r2, r5 + 8004048: 00d2 lsls r2, r2, #3 + 800404a: 4090 lsls r0, r2 + 800404c: 0002 movs r2, r0 NVIC->IP[_IP_IDX(IRQn)] = ((uint32_t)(NVIC->IP[_IP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | - 8004012: 430a orrs r2, r1 - 8004014: 33c0 adds r3, #192 ; 0xc0 - 8004016: 009b lsls r3, r3, #2 - 8004018: 511a str r2, [r3, r4] + 800404e: 430a orrs r2, r1 + 8004050: 33c0 adds r3, #192 ; 0xc0 + 8004052: 009b lsls r3, r3, #2 + 8004054: 511a str r2, [r3, r4] else { SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); } } - 800401a: e031 b.n 8004080 <__NVIC_SetPriority+0xcc> + 8004056: e031 b.n 80040bc <__NVIC_SetPriority+0xcc> SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | - 800401c: 4c1b ldr r4, [pc, #108] ; (800408c <__NVIC_SetPriority+0xd8>) - 800401e: 1dfb adds r3, r7, #7 - 8004020: 781b ldrb r3, [r3, #0] - 8004022: 001a movs r2, r3 - 8004024: 230f movs r3, #15 - 8004026: 4013 ands r3, r2 - 8004028: 3b08 subs r3, #8 - 800402a: 0899 lsrs r1, r3, #2 - 800402c: 4a17 ldr r2, [pc, #92] ; (800408c <__NVIC_SetPriority+0xd8>) - 800402e: 1dfb adds r3, r7, #7 - 8004030: 781b ldrb r3, [r3, #0] - 8004032: 0018 movs r0, r3 - 8004034: 230f movs r3, #15 - 8004036: 4003 ands r3, r0 - 8004038: 3b08 subs r3, #8 - 800403a: 089b lsrs r3, r3, #2 - 800403c: 3306 adds r3, #6 - 800403e: 009b lsls r3, r3, #2 - 8004040: 18d3 adds r3, r2, r3 - 8004042: 3304 adds r3, #4 - 8004044: 681b ldr r3, [r3, #0] - 8004046: 1dfa adds r2, r7, #7 - 8004048: 7812 ldrb r2, [r2, #0] - 800404a: 0010 movs r0, r2 - 800404c: 2203 movs r2, #3 - 800404e: 4002 ands r2, r0 - 8004050: 00d2 lsls r2, r2, #3 - 8004052: 20ff movs r0, #255 ; 0xff - 8004054: 4090 lsls r0, r2 - 8004056: 0002 movs r2, r0 - 8004058: 43d2 mvns r2, r2 - 800405a: 401a ands r2, r3 + 8004058: 4c1b ldr r4, [pc, #108] ; (80040c8 <__NVIC_SetPriority+0xd8>) + 800405a: 1dfb adds r3, r7, #7 + 800405c: 781b ldrb r3, [r3, #0] + 800405e: 001a movs r2, r3 + 8004060: 230f movs r3, #15 + 8004062: 4013 ands r3, r2 + 8004064: 3b08 subs r3, #8 + 8004066: 0899 lsrs r1, r3, #2 + 8004068: 4a17 ldr r2, [pc, #92] ; (80040c8 <__NVIC_SetPriority+0xd8>) + 800406a: 1dfb adds r3, r7, #7 + 800406c: 781b ldrb r3, [r3, #0] + 800406e: 0018 movs r0, r3 + 8004070: 230f movs r3, #15 + 8004072: 4003 ands r3, r0 + 8004074: 3b08 subs r3, #8 + 8004076: 089b lsrs r3, r3, #2 + 8004078: 3306 adds r3, #6 + 800407a: 009b lsls r3, r3, #2 + 800407c: 18d3 adds r3, r2, r3 + 800407e: 3304 adds r3, #4 + 8004080: 681b ldr r3, [r3, #0] + 8004082: 1dfa adds r2, r7, #7 + 8004084: 7812 ldrb r2, [r2, #0] + 8004086: 0010 movs r0, r2 + 8004088: 2203 movs r2, #3 + 800408a: 4002 ands r2, r0 + 800408c: 00d2 lsls r2, r2, #3 + 800408e: 20ff movs r0, #255 ; 0xff + 8004090: 4090 lsls r0, r2 + 8004092: 0002 movs r2, r0 + 8004094: 43d2 mvns r2, r2 + 8004096: 401a ands r2, r3 (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); - 800405c: 683b ldr r3, [r7, #0] - 800405e: 019b lsls r3, r3, #6 - 8004060: 20ff movs r0, #255 ; 0xff - 8004062: 4018 ands r0, r3 - 8004064: 1dfb adds r3, r7, #7 - 8004066: 781b ldrb r3, [r3, #0] - 8004068: 001d movs r5, r3 - 800406a: 2303 movs r3, #3 - 800406c: 402b ands r3, r5 - 800406e: 00db lsls r3, r3, #3 - 8004070: 4098 lsls r0, r3 - 8004072: 0003 movs r3, r0 + 8004098: 683b ldr r3, [r7, #0] + 800409a: 019b lsls r3, r3, #6 + 800409c: 20ff movs r0, #255 ; 0xff + 800409e: 4018 ands r0, r3 + 80040a0: 1dfb adds r3, r7, #7 + 80040a2: 781b ldrb r3, [r3, #0] + 80040a4: 001d movs r5, r3 + 80040a6: 2303 movs r3, #3 + 80040a8: 402b ands r3, r5 + 80040aa: 00db lsls r3, r3, #3 + 80040ac: 4098 lsls r0, r3 + 80040ae: 0003 movs r3, r0 SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | - 8004074: 431a orrs r2, r3 - 8004076: 1d8b adds r3, r1, #6 - 8004078: 009b lsls r3, r3, #2 - 800407a: 18e3 adds r3, r4, r3 - 800407c: 3304 adds r3, #4 - 800407e: 601a str r2, [r3, #0] + 80040b0: 431a orrs r2, r3 + 80040b2: 1d8b adds r3, r1, #6 + 80040b4: 009b lsls r3, r3, #2 + 80040b6: 18e3 adds r3, r4, r3 + 80040b8: 3304 adds r3, #4 + 80040ba: 601a str r2, [r3, #0] } - 8004080: 46c0 nop ; (mov r8, r8) - 8004082: 46bd mov sp, r7 - 8004084: b002 add sp, #8 - 8004086: bdb0 pop {r4, r5, r7, pc} - 8004088: e000e100 .word 0xe000e100 - 800408c: e000ed00 .word 0xe000ed00 + 80040bc: 46c0 nop ; (mov r8, r8) + 80040be: 46bd mov sp, r7 + 80040c0: b002 add sp, #8 + 80040c2: bdb0 pop {r4, r5, r7, pc} + 80040c4: e000e100 .word 0xe000e100 + 80040c8: e000ed00 .word 0xe000ed00 -08004090 : +080040cc : \note When the variable __Vendor_SysTickConfig is set to 1, then the function SysTick_Config is not included. In this case, the file device.h must contain a vendor-specific implementation of this function. */ __STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) { - 8004090: b580 push {r7, lr} - 8004092: b082 sub sp, #8 - 8004094: af00 add r7, sp, #0 - 8004096: 6078 str r0, [r7, #4] + 80040cc: b580 push {r7, lr} + 80040ce: b082 sub sp, #8 + 80040d0: af00 add r7, sp, #0 + 80040d2: 6078 str r0, [r7, #4] if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) - 8004098: 687b ldr r3, [r7, #4] - 800409a: 3b01 subs r3, #1 - 800409c: 4a0c ldr r2, [pc, #48] ; (80040d0 ) - 800409e: 4293 cmp r3, r2 - 80040a0: d901 bls.n 80040a6 + 80040d4: 687b ldr r3, [r7, #4] + 80040d6: 3b01 subs r3, #1 + 80040d8: 4a0c ldr r2, [pc, #48] ; (800410c ) + 80040da: 4293 cmp r3, r2 + 80040dc: d901 bls.n 80040e2 { return (1UL); /* Reload value impossible */ - 80040a2: 2301 movs r3, #1 - 80040a4: e010 b.n 80040c8 + 80040de: 2301 movs r3, #1 + 80040e0: e010 b.n 8004104 } SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ - 80040a6: 4b0b ldr r3, [pc, #44] ; (80040d4 ) - 80040a8: 687a ldr r2, [r7, #4] - 80040aa: 3a01 subs r2, #1 - 80040ac: 605a str r2, [r3, #4] + 80040e2: 4b0b ldr r3, [pc, #44] ; (8004110 ) + 80040e4: 687a ldr r2, [r7, #4] + 80040e6: 3a01 subs r2, #1 + 80040e8: 605a str r2, [r3, #4] NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ - 80040ae: 2301 movs r3, #1 - 80040b0: 425b negs r3, r3 - 80040b2: 2103 movs r1, #3 - 80040b4: 0018 movs r0, r3 - 80040b6: f7ff ff7d bl 8003fb4 <__NVIC_SetPriority> + 80040ea: 2301 movs r3, #1 + 80040ec: 425b negs r3, r3 + 80040ee: 2103 movs r1, #3 + 80040f0: 0018 movs r0, r3 + 80040f2: f7ff ff7d bl 8003ff0 <__NVIC_SetPriority> SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ - 80040ba: 4b06 ldr r3, [pc, #24] ; (80040d4 ) - 80040bc: 2200 movs r2, #0 - 80040be: 609a str r2, [r3, #8] + 80040f6: 4b06 ldr r3, [pc, #24] ; (8004110 ) + 80040f8: 2200 movs r2, #0 + 80040fa: 609a str r2, [r3, #8] SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | - 80040c0: 4b04 ldr r3, [pc, #16] ; (80040d4 ) - 80040c2: 2207 movs r2, #7 - 80040c4: 601a str r2, [r3, #0] + 80040fc: 4b04 ldr r3, [pc, #16] ; (8004110 ) + 80040fe: 2207 movs r2, #7 + 8004100: 601a str r2, [r3, #0] SysTick_CTRL_TICKINT_Msk | SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ return (0UL); /* Function successful */ - 80040c6: 2300 movs r3, #0 + 8004102: 2300 movs r3, #0 } - 80040c8: 0018 movs r0, r3 - 80040ca: 46bd mov sp, r7 - 80040cc: b002 add sp, #8 - 80040ce: bd80 pop {r7, pc} - 80040d0: 00ffffff .word 0x00ffffff - 80040d4: e000e010 .word 0xe000e010 + 8004104: 0018 movs r0, r3 + 8004106: 46bd mov sp, r7 + 8004108: b002 add sp, #8 + 800410a: bd80 pop {r7, pc} + 800410c: 00ffffff .word 0x00ffffff + 8004110: e000e010 .word 0xe000e010 -080040d8 : +08004114 : * with stm32l0xx devices, this parameter is a dummy value and it is ignored, because * no subpriority supported in Cortex M0+ based products. * @retval None */ void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority) { - 80040d8: b580 push {r7, lr} - 80040da: b084 sub sp, #16 - 80040dc: af00 add r7, sp, #0 - 80040de: 60b9 str r1, [r7, #8] - 80040e0: 607a str r2, [r7, #4] - 80040e2: 230f movs r3, #15 - 80040e4: 18fb adds r3, r7, r3 - 80040e6: 1c02 adds r2, r0, #0 - 80040e8: 701a strb r2, [r3, #0] + 8004114: b580 push {r7, lr} + 8004116: b084 sub sp, #16 + 8004118: af00 add r7, sp, #0 + 800411a: 60b9 str r1, [r7, #8] + 800411c: 607a str r2, [r7, #4] + 800411e: 230f movs r3, #15 + 8004120: 18fb adds r3, r7, r3 + 8004122: 1c02 adds r2, r0, #0 + 8004124: 701a strb r2, [r3, #0] /* Check the parameters */ assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority)); NVIC_SetPriority(IRQn,PreemptPriority); - 80040ea: 68ba ldr r2, [r7, #8] - 80040ec: 230f movs r3, #15 - 80040ee: 18fb adds r3, r7, r3 - 80040f0: 781b ldrb r3, [r3, #0] - 80040f2: b25b sxtb r3, r3 - 80040f4: 0011 movs r1, r2 - 80040f6: 0018 movs r0, r3 - 80040f8: f7ff ff5c bl 8003fb4 <__NVIC_SetPriority> + 8004126: 68ba ldr r2, [r7, #8] + 8004128: 230f movs r3, #15 + 800412a: 18fb adds r3, r7, r3 + 800412c: 781b ldrb r3, [r3, #0] + 800412e: b25b sxtb r3, r3 + 8004130: 0011 movs r1, r2 + 8004132: 0018 movs r0, r3 + 8004134: f7ff ff5c bl 8003ff0 <__NVIC_SetPriority> } - 80040fc: 46c0 nop ; (mov r8, r8) - 80040fe: 46bd mov sp, r7 - 8004100: b004 add sp, #16 - 8004102: bd80 pop {r7, pc} + 8004138: 46c0 nop ; (mov r8, r8) + 800413a: 46bd mov sp, r7 + 800413c: b004 add sp, #16 + 800413e: bd80 pop {r7, pc} -08004104 : +08004140 : * This parameter can be an enumerator of IRQn_Type enumeration * (For the complete STM32 Devices IRQ Channels list, please refer to stm32l0xx.h file) * @retval None */ void HAL_NVIC_EnableIRQ(IRQn_Type IRQn) { - 8004104: b580 push {r7, lr} - 8004106: b082 sub sp, #8 - 8004108: af00 add r7, sp, #0 - 800410a: 0002 movs r2, r0 - 800410c: 1dfb adds r3, r7, #7 - 800410e: 701a strb r2, [r3, #0] + 8004140: b580 push {r7, lr} + 8004142: b082 sub sp, #8 + 8004144: af00 add r7, sp, #0 + 8004146: 0002 movs r2, r0 + 8004148: 1dfb adds r3, r7, #7 + 800414a: 701a strb r2, [r3, #0] /* Check the parameters */ assert_param(IS_NVIC_DEVICE_IRQ(IRQn)); /* Enable interrupt */ NVIC_EnableIRQ(IRQn); - 8004110: 1dfb adds r3, r7, #7 - 8004112: 781b ldrb r3, [r3, #0] - 8004114: b25b sxtb r3, r3 - 8004116: 0018 movs r0, r3 - 8004118: f7ff ff12 bl 8003f40 <__NVIC_EnableIRQ> + 800414c: 1dfb adds r3, r7, #7 + 800414e: 781b ldrb r3, [r3, #0] + 8004150: b25b sxtb r3, r3 + 8004152: 0018 movs r0, r3 + 8004154: f7ff ff12 bl 8003f7c <__NVIC_EnableIRQ> } - 800411c: 46c0 nop ; (mov r8, r8) - 800411e: 46bd mov sp, r7 - 8004120: b002 add sp, #8 - 8004122: bd80 pop {r7, pc} + 8004158: 46c0 nop ; (mov r8, r8) + 800415a: 46bd mov sp, r7 + 800415c: b002 add sp, #8 + 800415e: bd80 pop {r7, pc} -08004124 : +08004160 : * This parameter can be an enumerator of IRQn_Type enumeration * (For the complete STM32 Devices IRQ Channels list, please refer to stm32l0xx.h file) * @retval None */ void HAL_NVIC_DisableIRQ(IRQn_Type IRQn) { - 8004124: b580 push {r7, lr} - 8004126: b082 sub sp, #8 - 8004128: af00 add r7, sp, #0 - 800412a: 0002 movs r2, r0 - 800412c: 1dfb adds r3, r7, #7 - 800412e: 701a strb r2, [r3, #0] + 8004160: b580 push {r7, lr} + 8004162: b082 sub sp, #8 + 8004164: af00 add r7, sp, #0 + 8004166: 0002 movs r2, r0 + 8004168: 1dfb adds r3, r7, #7 + 800416a: 701a strb r2, [r3, #0] /* Check the parameters */ assert_param(IS_NVIC_DEVICE_IRQ(IRQn)); /* Disable interrupt */ NVIC_DisableIRQ(IRQn); - 8004130: 1dfb adds r3, r7, #7 - 8004132: 781b ldrb r3, [r3, #0] - 8004134: b25b sxtb r3, r3 - 8004136: 0018 movs r0, r3 - 8004138: f7ff ff1c bl 8003f74 <__NVIC_DisableIRQ> + 800416c: 1dfb adds r3, r7, #7 + 800416e: 781b ldrb r3, [r3, #0] + 8004170: b25b sxtb r3, r3 + 8004172: 0018 movs r0, r3 + 8004174: f7ff ff1c bl 8003fb0 <__NVIC_DisableIRQ> } - 800413c: 46c0 nop ; (mov r8, r8) - 800413e: 46bd mov sp, r7 - 8004140: b002 add sp, #8 - 8004142: bd80 pop {r7, pc} + 8004178: 46c0 nop ; (mov r8, r8) + 800417a: 46bd mov sp, r7 + 800417c: b002 add sp, #8 + 800417e: bd80 pop {r7, pc} -08004144 : +08004180 : * @param TicksNumb Specifies the ticks Number of ticks between two interrupts. * @retval status: - 0 Function succeeded. * - 1 Function failed. */ uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb) { - 8004144: b580 push {r7, lr} - 8004146: b082 sub sp, #8 - 8004148: af00 add r7, sp, #0 - 800414a: 6078 str r0, [r7, #4] + 8004180: b580 push {r7, lr} + 8004182: b082 sub sp, #8 + 8004184: af00 add r7, sp, #0 + 8004186: 6078 str r0, [r7, #4] return SysTick_Config(TicksNumb); - 800414c: 687b ldr r3, [r7, #4] - 800414e: 0018 movs r0, r3 - 8004150: f7ff ff9e bl 8004090 - 8004154: 0003 movs r3, r0 + 8004188: 687b ldr r3, [r7, #4] + 800418a: 0018 movs r0, r3 + 800418c: f7ff ff9e bl 80040cc + 8004190: 0003 movs r3, r0 } - 8004156: 0018 movs r0, r3 - 8004158: 46bd mov sp, r7 - 800415a: b002 add sp, #8 - 800415c: bd80 pop {r7, pc} + 8004192: 0018 movs r0, r3 + 8004194: 46bd mov sp, r7 + 8004196: b002 add sp, #8 + 8004198: bd80 pop {r7, pc} -0800415e : +0800419a : * @param hdma pointer to a DMA_HandleTypeDef structure that contains * the configuration information for the specified DMA Channel. * @retval HAL status */ HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma) { - 800415e: b580 push {r7, lr} - 8004160: b084 sub sp, #16 - 8004162: af00 add r7, sp, #0 - 8004164: 6078 str r0, [r7, #4] + 800419a: b580 push {r7, lr} + 800419c: b084 sub sp, #16 + 800419e: af00 add r7, sp, #0 + 80041a0: 6078 str r0, [r7, #4] HAL_StatusTypeDef status = HAL_OK; - 8004166: 230f movs r3, #15 - 8004168: 18fb adds r3, r7, r3 - 800416a: 2200 movs r2, #0 - 800416c: 701a strb r2, [r3, #0] + 80041a2: 230f movs r3, #15 + 80041a4: 18fb adds r3, r7, r3 + 80041a6: 2200 movs r2, #0 + 80041a8: 701a strb r2, [r3, #0] /* Check the DMA peripheral state */ if(hdma->State != HAL_DMA_STATE_BUSY) - 800416e: 687b ldr r3, [r7, #4] - 8004170: 2225 movs r2, #37 ; 0x25 - 8004172: 5c9b ldrb r3, [r3, r2] - 8004174: b2db uxtb r3, r3 - 8004176: 2b02 cmp r3, #2 - 8004178: d008 beq.n 800418c + 80041aa: 687b ldr r3, [r7, #4] + 80041ac: 2225 movs r2, #37 ; 0x25 + 80041ae: 5c9b ldrb r3, [r3, r2] + 80041b0: b2db uxtb r3, r3 + 80041b2: 2b02 cmp r3, #2 + 80041b4: d008 beq.n 80041c8 { hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER; - 800417a: 687b ldr r3, [r7, #4] - 800417c: 2204 movs r2, #4 - 800417e: 63da str r2, [r3, #60] ; 0x3c + 80041b6: 687b ldr r3, [r7, #4] + 80041b8: 2204 movs r2, #4 + 80041ba: 63da str r2, [r3, #60] ; 0x3c /* Process Unlocked */ __HAL_UNLOCK(hdma); - 8004180: 687b ldr r3, [r7, #4] - 8004182: 2224 movs r2, #36 ; 0x24 - 8004184: 2100 movs r1, #0 - 8004186: 5499 strb r1, [r3, r2] + 80041bc: 687b ldr r3, [r7, #4] + 80041be: 2224 movs r2, #36 ; 0x24 + 80041c0: 2100 movs r1, #0 + 80041c2: 5499 strb r1, [r3, r2] return HAL_ERROR; - 8004188: 2301 movs r3, #1 - 800418a: e024 b.n 80041d6 + 80041c4: 2301 movs r3, #1 + 80041c6: e024 b.n 8004212 } else { /* Disable DMA IT */ __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)); - 800418c: 687b ldr r3, [r7, #4] - 800418e: 681b ldr r3, [r3, #0] - 8004190: 687a ldr r2, [r7, #4] - 8004192: 6812 ldr r2, [r2, #0] - 8004194: 6812 ldr r2, [r2, #0] - 8004196: 210e movs r1, #14 - 8004198: 438a bics r2, r1 - 800419a: 601a str r2, [r3, #0] + 80041c8: 687b ldr r3, [r7, #4] + 80041ca: 681b ldr r3, [r3, #0] + 80041cc: 687a ldr r2, [r7, #4] + 80041ce: 6812 ldr r2, [r2, #0] + 80041d0: 6812 ldr r2, [r2, #0] + 80041d2: 210e movs r1, #14 + 80041d4: 438a bics r2, r1 + 80041d6: 601a str r2, [r3, #0] /* Disable the channel */ __HAL_DMA_DISABLE(hdma); - 800419c: 687b ldr r3, [r7, #4] - 800419e: 681b ldr r3, [r3, #0] - 80041a0: 687a ldr r2, [r7, #4] - 80041a2: 6812 ldr r2, [r2, #0] - 80041a4: 6812 ldr r2, [r2, #0] - 80041a6: 2101 movs r1, #1 - 80041a8: 438a bics r2, r1 - 80041aa: 601a str r2, [r3, #0] + 80041d8: 687b ldr r3, [r7, #4] + 80041da: 681b ldr r3, [r3, #0] + 80041dc: 687a ldr r2, [r7, #4] + 80041de: 6812 ldr r2, [r2, #0] + 80041e0: 6812 ldr r2, [r2, #0] + 80041e2: 2101 movs r1, #1 + 80041e4: 438a bics r2, r1 + 80041e6: 601a str r2, [r3, #0] /* Clear all flags */ hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x1cU)); - 80041ac: 687b ldr r3, [r7, #4] - 80041ae: 6c1b ldr r3, [r3, #64] ; 0x40 - 80041b0: 687a ldr r2, [r7, #4] - 80041b2: 6c52 ldr r2, [r2, #68] ; 0x44 - 80041b4: 211c movs r1, #28 - 80041b6: 400a ands r2, r1 - 80041b8: 2101 movs r1, #1 - 80041ba: 4091 lsls r1, r2 - 80041bc: 000a movs r2, r1 - 80041be: 605a str r2, [r3, #4] + 80041e8: 687b ldr r3, [r7, #4] + 80041ea: 6c1b ldr r3, [r3, #64] ; 0x40 + 80041ec: 687a ldr r2, [r7, #4] + 80041ee: 6c52 ldr r2, [r2, #68] ; 0x44 + 80041f0: 211c movs r1, #28 + 80041f2: 400a ands r2, r1 + 80041f4: 2101 movs r1, #1 + 80041f6: 4091 lsls r1, r2 + 80041f8: 000a movs r2, r1 + 80041fa: 605a str r2, [r3, #4] /* Change the DMA state */ hdma->State = HAL_DMA_STATE_READY; - 80041c0: 687b ldr r3, [r7, #4] - 80041c2: 2225 movs r2, #37 ; 0x25 - 80041c4: 2101 movs r1, #1 - 80041c6: 5499 strb r1, [r3, r2] + 80041fc: 687b ldr r3, [r7, #4] + 80041fe: 2225 movs r2, #37 ; 0x25 + 8004200: 2101 movs r1, #1 + 8004202: 5499 strb r1, [r3, r2] /* Process Unlocked */ __HAL_UNLOCK(hdma); - 80041c8: 687b ldr r3, [r7, #4] - 80041ca: 2224 movs r2, #36 ; 0x24 - 80041cc: 2100 movs r1, #0 - 80041ce: 5499 strb r1, [r3, r2] + 8004204: 687b ldr r3, [r7, #4] + 8004206: 2224 movs r2, #36 ; 0x24 + 8004208: 2100 movs r1, #0 + 800420a: 5499 strb r1, [r3, r2] return status; - 80041d0: 230f movs r3, #15 - 80041d2: 18fb adds r3, r7, r3 - 80041d4: 781b ldrb r3, [r3, #0] + 800420c: 230f movs r3, #15 + 800420e: 18fb adds r3, r7, r3 + 8004210: 781b ldrb r3, [r3, #0] } } - 80041d6: 0018 movs r0, r3 - 80041d8: 46bd mov sp, r7 - 80041da: b004 add sp, #16 - 80041dc: bd80 pop {r7, pc} + 8004212: 0018 movs r0, r3 + 8004214: 46bd mov sp, r7 + 8004216: b004 add sp, #16 + 8004218: bd80 pop {r7, pc} -080041de : +0800421a : * @param hdma pointer to a DMA_HandleTypeDef structure that contains * the configuration information for the specified DMA Channel. * @retval HAL status */ HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma) { - 80041de: b580 push {r7, lr} - 80041e0: b084 sub sp, #16 - 80041e2: af00 add r7, sp, #0 - 80041e4: 6078 str r0, [r7, #4] + 800421a: b580 push {r7, lr} + 800421c: b084 sub sp, #16 + 800421e: af00 add r7, sp, #0 + 8004220: 6078 str r0, [r7, #4] HAL_StatusTypeDef status = HAL_OK; - 80041e6: 230f movs r3, #15 - 80041e8: 18fb adds r3, r7, r3 - 80041ea: 2200 movs r2, #0 - 80041ec: 701a strb r2, [r3, #0] + 8004222: 230f movs r3, #15 + 8004224: 18fb adds r3, r7, r3 + 8004226: 2200 movs r2, #0 + 8004228: 701a strb r2, [r3, #0] if(HAL_DMA_STATE_BUSY != hdma->State) - 80041ee: 687b ldr r3, [r7, #4] - 80041f0: 2225 movs r2, #37 ; 0x25 - 80041f2: 5c9b ldrb r3, [r3, r2] - 80041f4: b2db uxtb r3, r3 - 80041f6: 2b02 cmp r3, #2 - 80041f8: d007 beq.n 800420a + 800422a: 687b ldr r3, [r7, #4] + 800422c: 2225 movs r2, #37 ; 0x25 + 800422e: 5c9b ldrb r3, [r3, r2] + 8004230: b2db uxtb r3, r3 + 8004232: 2b02 cmp r3, #2 + 8004234: d007 beq.n 8004246 { /* no transfer ongoing */ hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER; - 80041fa: 687b ldr r3, [r7, #4] - 80041fc: 2204 movs r2, #4 - 80041fe: 63da str r2, [r3, #60] ; 0x3c + 8004236: 687b ldr r3, [r7, #4] + 8004238: 2204 movs r2, #4 + 800423a: 63da str r2, [r3, #60] ; 0x3c status = HAL_ERROR; - 8004200: 230f movs r3, #15 - 8004202: 18fb adds r3, r7, r3 - 8004204: 2201 movs r2, #1 - 8004206: 701a strb r2, [r3, #0] - 8004208: e02a b.n 8004260 + 800423c: 230f movs r3, #15 + 800423e: 18fb adds r3, r7, r3 + 8004240: 2201 movs r2, #1 + 8004242: 701a strb r2, [r3, #0] + 8004244: e02a b.n 800429c } else { /* Disable DMA IT */ __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)); - 800420a: 687b ldr r3, [r7, #4] - 800420c: 681b ldr r3, [r3, #0] - 800420e: 687a ldr r2, [r7, #4] - 8004210: 6812 ldr r2, [r2, #0] - 8004212: 6812 ldr r2, [r2, #0] - 8004214: 210e movs r1, #14 - 8004216: 438a bics r2, r1 - 8004218: 601a str r2, [r3, #0] + 8004246: 687b ldr r3, [r7, #4] + 8004248: 681b ldr r3, [r3, #0] + 800424a: 687a ldr r2, [r7, #4] + 800424c: 6812 ldr r2, [r2, #0] + 800424e: 6812 ldr r2, [r2, #0] + 8004250: 210e movs r1, #14 + 8004252: 438a bics r2, r1 + 8004254: 601a str r2, [r3, #0] /* Disable the channel */ __HAL_DMA_DISABLE(hdma); - 800421a: 687b ldr r3, [r7, #4] - 800421c: 681b ldr r3, [r3, #0] - 800421e: 687a ldr r2, [r7, #4] - 8004220: 6812 ldr r2, [r2, #0] - 8004222: 6812 ldr r2, [r2, #0] - 8004224: 2101 movs r1, #1 - 8004226: 438a bics r2, r1 - 8004228: 601a str r2, [r3, #0] + 8004256: 687b ldr r3, [r7, #4] + 8004258: 681b ldr r3, [r3, #0] + 800425a: 687a ldr r2, [r7, #4] + 800425c: 6812 ldr r2, [r2, #0] + 800425e: 6812 ldr r2, [r2, #0] + 8004260: 2101 movs r1, #1 + 8004262: 438a bics r2, r1 + 8004264: 601a str r2, [r3, #0] /* Clear all flags */ hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x1cU)); - 800422a: 687b ldr r3, [r7, #4] - 800422c: 6c1b ldr r3, [r3, #64] ; 0x40 - 800422e: 687a ldr r2, [r7, #4] - 8004230: 6c52 ldr r2, [r2, #68] ; 0x44 - 8004232: 211c movs r1, #28 - 8004234: 400a ands r2, r1 - 8004236: 2101 movs r1, #1 - 8004238: 4091 lsls r1, r2 - 800423a: 000a movs r2, r1 - 800423c: 605a str r2, [r3, #4] + 8004266: 687b ldr r3, [r7, #4] + 8004268: 6c1b ldr r3, [r3, #64] ; 0x40 + 800426a: 687a ldr r2, [r7, #4] + 800426c: 6c52 ldr r2, [r2, #68] ; 0x44 + 800426e: 211c movs r1, #28 + 8004270: 400a ands r2, r1 + 8004272: 2101 movs r1, #1 + 8004274: 4091 lsls r1, r2 + 8004276: 000a movs r2, r1 + 8004278: 605a str r2, [r3, #4] /* Change the DMA state */ hdma->State = HAL_DMA_STATE_READY; - 800423e: 687b ldr r3, [r7, #4] - 8004240: 2225 movs r2, #37 ; 0x25 - 8004242: 2101 movs r1, #1 - 8004244: 5499 strb r1, [r3, r2] + 800427a: 687b ldr r3, [r7, #4] + 800427c: 2225 movs r2, #37 ; 0x25 + 800427e: 2101 movs r1, #1 + 8004280: 5499 strb r1, [r3, r2] /* Process Unlocked */ __HAL_UNLOCK(hdma); - 8004246: 687b ldr r3, [r7, #4] - 8004248: 2224 movs r2, #36 ; 0x24 - 800424a: 2100 movs r1, #0 - 800424c: 5499 strb r1, [r3, r2] + 8004282: 687b ldr r3, [r7, #4] + 8004284: 2224 movs r2, #36 ; 0x24 + 8004286: 2100 movs r1, #0 + 8004288: 5499 strb r1, [r3, r2] /* Call User Abort callback */ if(hdma->XferAbortCallback != NULL) - 800424e: 687b ldr r3, [r7, #4] - 8004250: 6b9b ldr r3, [r3, #56] ; 0x38 - 8004252: 2b00 cmp r3, #0 - 8004254: d004 beq.n 8004260 + 800428a: 687b ldr r3, [r7, #4] + 800428c: 6b9b ldr r3, [r3, #56] ; 0x38 + 800428e: 2b00 cmp r3, #0 + 8004290: d004 beq.n 800429c { hdma->XferAbortCallback(hdma); - 8004256: 687b ldr r3, [r7, #4] - 8004258: 6b9b ldr r3, [r3, #56] ; 0x38 - 800425a: 687a ldr r2, [r7, #4] - 800425c: 0010 movs r0, r2 - 800425e: 4798 blx r3 + 8004292: 687b ldr r3, [r7, #4] + 8004294: 6b9b ldr r3, [r3, #56] ; 0x38 + 8004296: 687a ldr r2, [r7, #4] + 8004298: 0010 movs r0, r2 + 800429a: 4798 blx r3 } } return status; - 8004260: 230f movs r3, #15 - 8004262: 18fb adds r3, r7, r3 - 8004264: 781b ldrb r3, [r3, #0] + 800429c: 230f movs r3, #15 + 800429e: 18fb adds r3, r7, r3 + 80042a0: 781b ldrb r3, [r3, #0] } - 8004266: 0018 movs r0, r3 - 8004268: 46bd mov sp, r7 - 800426a: b004 add sp, #16 - 800426c: bd80 pop {r7, pc} + 80042a2: 0018 movs r0, r3 + 80042a4: 46bd mov sp, r7 + 80042a6: b004 add sp, #16 + 80042a8: bd80 pop {r7, pc} ... -08004270 : +080042ac : * @param Data Specifie the data to be programmed * * @retval HAL_StatusTypeDef HAL Status */ HAL_StatusTypeDef HAL_FLASH_Program(uint32_t TypeProgram, uint32_t Address, uint32_t Data) { - 8004270: b590 push {r4, r7, lr} - 8004272: b087 sub sp, #28 - 8004274: af00 add r7, sp, #0 - 8004276: 60f8 str r0, [r7, #12] - 8004278: 60b9 str r1, [r7, #8] - 800427a: 607a str r2, [r7, #4] + 80042ac: b590 push {r4, r7, lr} + 80042ae: b087 sub sp, #28 + 80042b0: af00 add r7, sp, #0 + 80042b2: 60f8 str r0, [r7, #12] + 80042b4: 60b9 str r1, [r7, #8] + 80042b6: 607a str r2, [r7, #4] HAL_StatusTypeDef status = HAL_ERROR; - 800427c: 2317 movs r3, #23 - 800427e: 18fb adds r3, r7, r3 - 8004280: 2201 movs r2, #1 - 8004282: 701a strb r2, [r3, #0] + 80042b8: 2317 movs r3, #23 + 80042ba: 18fb adds r3, r7, r3 + 80042bc: 2201 movs r2, #1 + 80042be: 701a strb r2, [r3, #0] /* Process Locked */ __HAL_LOCK(&pFlash); - 8004284: 4b16 ldr r3, [pc, #88] ; (80042e0 ) - 8004286: 7c1b ldrb r3, [r3, #16] - 8004288: 2b01 cmp r3, #1 - 800428a: d101 bne.n 8004290 - 800428c: 2302 movs r3, #2 - 800428e: e023 b.n 80042d8 - 8004290: 4b13 ldr r3, [pc, #76] ; (80042e0 ) - 8004292: 2201 movs r2, #1 - 8004294: 741a strb r2, [r3, #16] + 80042c0: 4b16 ldr r3, [pc, #88] ; (800431c ) + 80042c2: 7c1b ldrb r3, [r3, #16] + 80042c4: 2b01 cmp r3, #1 + 80042c6: d101 bne.n 80042cc + 80042c8: 2302 movs r3, #2 + 80042ca: e023 b.n 8004314 + 80042cc: 4b13 ldr r3, [pc, #76] ; (800431c ) + 80042ce: 2201 movs r2, #1 + 80042d0: 741a strb r2, [r3, #16] /* Check the parameters */ assert_param(IS_FLASH_TYPEPROGRAM(TypeProgram)); assert_param(IS_FLASH_PROGRAM_ADDRESS(Address)); /* Wait for last operation to be completed */ status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE); - 8004296: 2317 movs r3, #23 - 8004298: 18fc adds r4, r7, r3 - 800429a: 4b12 ldr r3, [pc, #72] ; (80042e4 ) - 800429c: 0018 movs r0, r3 - 800429e: f000 f887 bl 80043b0 - 80042a2: 0003 movs r3, r0 - 80042a4: 7023 strb r3, [r4, #0] + 80042d2: 2317 movs r3, #23 + 80042d4: 18fc adds r4, r7, r3 + 80042d6: 4b12 ldr r3, [pc, #72] ; (8004320 ) + 80042d8: 0018 movs r0, r3 + 80042da: f000 f887 bl 80043ec + 80042de: 0003 movs r3, r0 + 80042e0: 7023 strb r3, [r4, #0] if(status == HAL_OK) - 80042a6: 2317 movs r3, #23 - 80042a8: 18fb adds r3, r7, r3 - 80042aa: 781b ldrb r3, [r3, #0] - 80042ac: 2b00 cmp r3, #0 - 80042ae: d10d bne.n 80042cc + 80042e2: 2317 movs r3, #23 + 80042e4: 18fb adds r3, r7, r3 + 80042e6: 781b ldrb r3, [r3, #0] + 80042e8: 2b00 cmp r3, #0 + 80042ea: d10d bne.n 8004308 { /* Clean the error context */ pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; - 80042b0: 4b0b ldr r3, [pc, #44] ; (80042e0 ) - 80042b2: 2200 movs r2, #0 - 80042b4: 615a str r2, [r3, #20] + 80042ec: 4b0b ldr r3, [pc, #44] ; (800431c ) + 80042ee: 2200 movs r2, #0 + 80042f0: 615a str r2, [r3, #20] /*Program word (32-bit) at a specified address.*/ *(__IO uint32_t *)Address = Data; - 80042b6: 68bb ldr r3, [r7, #8] - 80042b8: 687a ldr r2, [r7, #4] - 80042ba: 601a str r2, [r3, #0] + 80042f2: 68bb ldr r3, [r7, #8] + 80042f4: 687a ldr r2, [r7, #4] + 80042f6: 601a str r2, [r3, #0] /* Wait for last operation to be completed */ status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE); - 80042bc: 2317 movs r3, #23 - 80042be: 18fc adds r4, r7, r3 - 80042c0: 4b08 ldr r3, [pc, #32] ; (80042e4 ) - 80042c2: 0018 movs r0, r3 - 80042c4: f000 f874 bl 80043b0 - 80042c8: 0003 movs r3, r0 - 80042ca: 7023 strb r3, [r4, #0] + 80042f8: 2317 movs r3, #23 + 80042fa: 18fc adds r4, r7, r3 + 80042fc: 4b08 ldr r3, [pc, #32] ; (8004320 ) + 80042fe: 0018 movs r0, r3 + 8004300: f000 f874 bl 80043ec + 8004304: 0003 movs r3, r0 + 8004306: 7023 strb r3, [r4, #0] } /* Process Unlocked */ __HAL_UNLOCK(&pFlash); - 80042cc: 4b04 ldr r3, [pc, #16] ; (80042e0 ) - 80042ce: 2200 movs r2, #0 - 80042d0: 741a strb r2, [r3, #16] + 8004308: 4b04 ldr r3, [pc, #16] ; (800431c ) + 800430a: 2200 movs r2, #0 + 800430c: 741a strb r2, [r3, #16] return status; - 80042d2: 2317 movs r3, #23 - 80042d4: 18fb adds r3, r7, r3 - 80042d6: 781b ldrb r3, [r3, #0] + 800430e: 2317 movs r3, #23 + 8004310: 18fb adds r3, r7, r3 + 8004312: 781b ldrb r3, [r3, #0] } - 80042d8: 0018 movs r0, r3 - 80042da: 46bd mov sp, r7 - 80042dc: b007 add sp, #28 - 80042de: bd90 pop {r4, r7, pc} - 80042e0: 20000390 .word 0x20000390 - 80042e4: 0000c350 .word 0x0000c350 + 8004314: 0018 movs r0, r3 + 8004316: 46bd mov sp, r7 + 8004318: b007 add sp, #28 + 800431a: bd90 pop {r4, r7, pc} + 800431c: 20000398 .word 0x20000398 + 8004320: 0000c350 .word 0x0000c350 -080042e8 : +08004324 : /** * @brief Unlock the FLASH control register access * @retval HAL Status */ HAL_StatusTypeDef HAL_FLASH_Unlock(void) { - 80042e8: b580 push {r7, lr} - 80042ea: b086 sub sp, #24 - 80042ec: af00 add r7, sp, #0 + 8004324: b580 push {r7, lr} + 8004326: b086 sub sp, #24 + 8004328: af00 add r7, sp, #0 uint32_t primask_bit; /* Unlocking FLASH_PECR register access*/ if(HAL_IS_BIT_SET(FLASH->PECR, FLASH_PECR_PELOCK)) - 80042ee: 4b21 ldr r3, [pc, #132] ; (8004374 ) - 80042f0: 685b ldr r3, [r3, #4] - 80042f2: 2201 movs r2, #1 - 80042f4: 4013 ands r3, r2 - 80042f6: 2b01 cmp r3, #1 - 80042f8: d118 bne.n 800432c + 800432a: 4b21 ldr r3, [pc, #132] ; (80043b0 ) + 800432c: 685b ldr r3, [r3, #4] + 800432e: 2201 movs r2, #1 + 8004330: 4013 ands r3, r2 + 8004332: 2b01 cmp r3, #1 + 8004334: d118 bne.n 8004368 __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory"); - 80042fa: f3ef 8310 mrs r3, PRIMASK - 80042fe: 60fb str r3, [r7, #12] + 8004336: f3ef 8310 mrs r3, PRIMASK + 800433a: 60fb str r3, [r7, #12] return(result); - 8004300: 68fb ldr r3, [r7, #12] + 800433c: 68fb ldr r3, [r7, #12] { /* Disable interrupts to avoid any interruption during unlock sequence */ primask_bit = __get_PRIMASK(); - 8004302: 617b str r3, [r7, #20] + 800433e: 617b str r3, [r7, #20] __ASM volatile ("cpsid i" : : : "memory"); - 8004304: b672 cpsid i + 8004340: b672 cpsid i __disable_irq(); WRITE_REG(FLASH->PEKEYR, FLASH_PEKEY1); - 8004306: 4b1b ldr r3, [pc, #108] ; (8004374 ) - 8004308: 4a1b ldr r2, [pc, #108] ; (8004378 ) - 800430a: 60da str r2, [r3, #12] + 8004342: 4b1b ldr r3, [pc, #108] ; (80043b0 ) + 8004344: 4a1b ldr r2, [pc, #108] ; (80043b4 ) + 8004346: 60da str r2, [r3, #12] WRITE_REG(FLASH->PEKEYR, FLASH_PEKEY2); - 800430c: 4b19 ldr r3, [pc, #100] ; (8004374 ) - 800430e: 4a1b ldr r2, [pc, #108] ; (800437c ) - 8004310: 60da str r2, [r3, #12] - 8004312: 697b ldr r3, [r7, #20] - 8004314: 613b str r3, [r7, #16] + 8004348: 4b19 ldr r3, [pc, #100] ; (80043b0 ) + 800434a: 4a1b ldr r2, [pc, #108] ; (80043b8 ) + 800434c: 60da str r2, [r3, #12] + 800434e: 697b ldr r3, [r7, #20] + 8004350: 613b str r3, [r7, #16] __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); - 8004316: 693b ldr r3, [r7, #16] - 8004318: f383 8810 msr PRIMASK, r3 + 8004352: 693b ldr r3, [r7, #16] + 8004354: f383 8810 msr PRIMASK, r3 /* Re-enable the interrupts: restore previous priority mask */ __set_PRIMASK(primask_bit); if(HAL_IS_BIT_SET(FLASH->PECR, FLASH_PECR_PELOCK)) - 800431c: 4b15 ldr r3, [pc, #84] ; (8004374 ) - 800431e: 685b ldr r3, [r3, #4] - 8004320: 2201 movs r2, #1 - 8004322: 4013 ands r3, r2 - 8004324: 2b01 cmp r3, #1 - 8004326: d101 bne.n 800432c + 8004358: 4b15 ldr r3, [pc, #84] ; (80043b0 ) + 800435a: 685b ldr r3, [r3, #4] + 800435c: 2201 movs r2, #1 + 800435e: 4013 ands r3, r2 + 8004360: 2b01 cmp r3, #1 + 8004362: d101 bne.n 8004368 { return HAL_ERROR; - 8004328: 2301 movs r3, #1 - 800432a: e01f b.n 800436c + 8004364: 2301 movs r3, #1 + 8004366: e01f b.n 80043a8 } } if (HAL_IS_BIT_SET(FLASH->PECR, FLASH_PECR_PRGLOCK)) - 800432c: 4b11 ldr r3, [pc, #68] ; (8004374 ) - 800432e: 685b ldr r3, [r3, #4] - 8004330: 2202 movs r2, #2 - 8004332: 4013 ands r3, r2 - 8004334: 2b02 cmp r3, #2 - 8004336: d118 bne.n 800436a + 8004368: 4b11 ldr r3, [pc, #68] ; (80043b0 ) + 800436a: 685b ldr r3, [r3, #4] + 800436c: 2202 movs r2, #2 + 800436e: 4013 ands r3, r2 + 8004370: 2b02 cmp r3, #2 + 8004372: d118 bne.n 80043a6 __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory"); - 8004338: f3ef 8310 mrs r3, PRIMASK - 800433c: 607b str r3, [r7, #4] + 8004374: f3ef 8310 mrs r3, PRIMASK + 8004378: 607b str r3, [r7, #4] return(result); - 800433e: 687b ldr r3, [r7, #4] + 800437a: 687b ldr r3, [r7, #4] { /* Disable interrupts to avoid any interruption during unlock sequence */ primask_bit = __get_PRIMASK(); - 8004340: 617b str r3, [r7, #20] + 800437c: 617b str r3, [r7, #20] __ASM volatile ("cpsid i" : : : "memory"); - 8004342: b672 cpsid i + 800437e: b672 cpsid i __disable_irq(); /* Unlocking the program memory access */ WRITE_REG(FLASH->PRGKEYR, FLASH_PRGKEY1); - 8004344: 4b0b ldr r3, [pc, #44] ; (8004374 ) - 8004346: 4a0e ldr r2, [pc, #56] ; (8004380 ) - 8004348: 611a str r2, [r3, #16] + 8004380: 4b0b ldr r3, [pc, #44] ; (80043b0 ) + 8004382: 4a0e ldr r2, [pc, #56] ; (80043bc ) + 8004384: 611a str r2, [r3, #16] WRITE_REG(FLASH->PRGKEYR, FLASH_PRGKEY2); - 800434a: 4b0a ldr r3, [pc, #40] ; (8004374 ) - 800434c: 4a0d ldr r2, [pc, #52] ; (8004384 ) - 800434e: 611a str r2, [r3, #16] - 8004350: 697b ldr r3, [r7, #20] - 8004352: 60bb str r3, [r7, #8] + 8004386: 4b0a ldr r3, [pc, #40] ; (80043b0 ) + 8004388: 4a0d ldr r2, [pc, #52] ; (80043c0 ) + 800438a: 611a str r2, [r3, #16] + 800438c: 697b ldr r3, [r7, #20] + 800438e: 60bb str r3, [r7, #8] __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); - 8004354: 68bb ldr r3, [r7, #8] - 8004356: f383 8810 msr PRIMASK, r3 + 8004390: 68bb ldr r3, [r7, #8] + 8004392: f383 8810 msr PRIMASK, r3 /* Re-enable the interrupts: restore previous priority mask */ __set_PRIMASK(primask_bit); if (HAL_IS_BIT_SET(FLASH->PECR, FLASH_PECR_PRGLOCK)) - 800435a: 4b06 ldr r3, [pc, #24] ; (8004374 ) - 800435c: 685b ldr r3, [r3, #4] - 800435e: 2202 movs r2, #2 - 8004360: 4013 ands r3, r2 - 8004362: 2b02 cmp r3, #2 - 8004364: d101 bne.n 800436a + 8004396: 4b06 ldr r3, [pc, #24] ; (80043b0 ) + 8004398: 685b ldr r3, [r3, #4] + 800439a: 2202 movs r2, #2 + 800439c: 4013 ands r3, r2 + 800439e: 2b02 cmp r3, #2 + 80043a0: d101 bne.n 80043a6 { return HAL_ERROR; - 8004366: 2301 movs r3, #1 - 8004368: e000 b.n 800436c + 80043a2: 2301 movs r3, #1 + 80043a4: e000 b.n 80043a8 } } return HAL_OK; - 800436a: 2300 movs r3, #0 + 80043a6: 2300 movs r3, #0 } - 800436c: 0018 movs r0, r3 - 800436e: 46bd mov sp, r7 - 8004370: b006 add sp, #24 - 8004372: bd80 pop {r7, pc} - 8004374: 40022000 .word 0x40022000 - 8004378: 89abcdef .word 0x89abcdef - 800437c: 02030405 .word 0x02030405 - 8004380: 8c9daebf .word 0x8c9daebf - 8004384: 13141516 .word 0x13141516 + 80043a8: 0018 movs r0, r3 + 80043aa: 46bd mov sp, r7 + 80043ac: b006 add sp, #24 + 80043ae: bd80 pop {r7, pc} + 80043b0: 40022000 .word 0x40022000 + 80043b4: 89abcdef .word 0x89abcdef + 80043b8: 02030405 .word 0x02030405 + 80043bc: 8c9daebf .word 0x8c9daebf + 80043c0: 13141516 .word 0x13141516 -08004388 : +080043c4 : /** * @brief Locks the FLASH control register access * @retval HAL Status */ HAL_StatusTypeDef HAL_FLASH_Lock(void) { - 8004388: b580 push {r7, lr} - 800438a: af00 add r7, sp, #0 + 80043c4: b580 push {r7, lr} + 80043c6: af00 add r7, sp, #0 /* Set the PRGLOCK Bit to lock the FLASH Registers access */ SET_BIT(FLASH->PECR, FLASH_PECR_PRGLOCK); - 800438c: 4b07 ldr r3, [pc, #28] ; (80043ac ) - 800438e: 4a07 ldr r2, [pc, #28] ; (80043ac ) - 8004390: 6852 ldr r2, [r2, #4] - 8004392: 2102 movs r1, #2 - 8004394: 430a orrs r2, r1 - 8004396: 605a str r2, [r3, #4] + 80043c8: 4b07 ldr r3, [pc, #28] ; (80043e8 ) + 80043ca: 4a07 ldr r2, [pc, #28] ; (80043e8 ) + 80043cc: 6852 ldr r2, [r2, #4] + 80043ce: 2102 movs r1, #2 + 80043d0: 430a orrs r2, r1 + 80043d2: 605a str r2, [r3, #4] /* Set the PELOCK Bit to lock the PECR Register access */ SET_BIT(FLASH->PECR, FLASH_PECR_PELOCK); - 8004398: 4b04 ldr r3, [pc, #16] ; (80043ac ) - 800439a: 4a04 ldr r2, [pc, #16] ; (80043ac ) - 800439c: 6852 ldr r2, [r2, #4] - 800439e: 2101 movs r1, #1 - 80043a0: 430a orrs r2, r1 - 80043a2: 605a str r2, [r3, #4] + 80043d4: 4b04 ldr r3, [pc, #16] ; (80043e8 ) + 80043d6: 4a04 ldr r2, [pc, #16] ; (80043e8 ) + 80043d8: 6852 ldr r2, [r2, #4] + 80043da: 2101 movs r1, #1 + 80043dc: 430a orrs r2, r1 + 80043de: 605a str r2, [r3, #4] return HAL_OK; - 80043a4: 2300 movs r3, #0 + 80043e0: 2300 movs r3, #0 } - 80043a6: 0018 movs r0, r3 - 80043a8: 46bd mov sp, r7 - 80043aa: bd80 pop {r7, pc} - 80043ac: 40022000 .word 0x40022000 + 80043e2: 0018 movs r0, r3 + 80043e4: 46bd mov sp, r7 + 80043e6: bd80 pop {r7, pc} + 80043e8: 40022000 .word 0x40022000 -080043b0 : +080043ec : * @brief Wait for a FLASH operation to complete. * @param Timeout maximum flash operation timeout * @retval HAL Status */ HAL_StatusTypeDef FLASH_WaitForLastOperation(uint32_t Timeout) { - 80043b0: b580 push {r7, lr} - 80043b2: b084 sub sp, #16 - 80043b4: af00 add r7, sp, #0 - 80043b6: 6078 str r0, [r7, #4] + 80043ec: b580 push {r7, lr} + 80043ee: b084 sub sp, #16 + 80043f0: af00 add r7, sp, #0 + 80043f2: 6078 str r0, [r7, #4] /* Wait for the FLASH operation to complete by polling on BUSY flag to be reset. Even if the FLASH operation fails, the BUSY flag will be reset and an error flag will be set */ uint32_t tickstart = HAL_GetTick(); - 80043b8: f7ff fdb8 bl 8003f2c - 80043bc: 0003 movs r3, r0 - 80043be: 60fb str r3, [r7, #12] + 80043f4: f7ff fdb8 bl 8003f68 + 80043f8: 0003 movs r3, r0 + 80043fa: 60fb str r3, [r7, #12] while(__HAL_FLASH_GET_FLAG(FLASH_FLAG_BSY)) - 80043c0: e00f b.n 80043e2 + 80043fc: e00f b.n 800441e { if (Timeout != HAL_MAX_DELAY) - 80043c2: 687b ldr r3, [r7, #4] - 80043c4: 3301 adds r3, #1 - 80043c6: d00c beq.n 80043e2 + 80043fe: 687b ldr r3, [r7, #4] + 8004400: 3301 adds r3, #1 + 8004402: d00c beq.n 800441e { if((Timeout == 0U) || ((HAL_GetTick()-tickstart) > Timeout)) - 80043c8: 687b ldr r3, [r7, #4] - 80043ca: 2b00 cmp r3, #0 - 80043cc: d007 beq.n 80043de - 80043ce: f7ff fdad bl 8003f2c - 80043d2: 0002 movs r2, r0 - 80043d4: 68fb ldr r3, [r7, #12] - 80043d6: 1ad2 subs r2, r2, r3 - 80043d8: 687b ldr r3, [r7, #4] - 80043da: 429a cmp r2, r3 - 80043dc: d901 bls.n 80043e2 + 8004404: 687b ldr r3, [r7, #4] + 8004406: 2b00 cmp r3, #0 + 8004408: d007 beq.n 800441a + 800440a: f7ff fdad bl 8003f68 + 800440e: 0002 movs r2, r0 + 8004410: 68fb ldr r3, [r7, #12] + 8004412: 1ad2 subs r2, r2, r3 + 8004414: 687b ldr r3, [r7, #4] + 8004416: 429a cmp r2, r3 + 8004418: d901 bls.n 800441e { return HAL_TIMEOUT; - 80043de: 2303 movs r3, #3 - 80043e0: e052 b.n 8004488 + 800441a: 2303 movs r3, #3 + 800441c: e052 b.n 80044c4 while(__HAL_FLASH_GET_FLAG(FLASH_FLAG_BSY)) - 80043e2: 4b2b ldr r3, [pc, #172] ; (8004490 ) - 80043e4: 699b ldr r3, [r3, #24] - 80043e6: 2201 movs r2, #1 - 80043e8: 4013 ands r3, r2 - 80043ea: 2b01 cmp r3, #1 - 80043ec: d0e9 beq.n 80043c2 + 800441e: 4b2b ldr r3, [pc, #172] ; (80044cc ) + 8004420: 699b ldr r3, [r3, #24] + 8004422: 2201 movs r2, #1 + 8004424: 4013 ands r3, r2 + 8004426: 2b01 cmp r3, #1 + 8004428: d0e9 beq.n 80043fe } } } /* Check FLASH End of Operation flag */ if (__HAL_FLASH_GET_FLAG(FLASH_FLAG_EOP)) - 80043ee: 4b28 ldr r3, [pc, #160] ; (8004490 ) - 80043f0: 699b ldr r3, [r3, #24] - 80043f2: 2202 movs r2, #2 - 80043f4: 4013 ands r3, r2 - 80043f6: 2b02 cmp r3, #2 - 80043f8: d102 bne.n 8004400 + 800442a: 4b28 ldr r3, [pc, #160] ; (80044cc ) + 800442c: 699b ldr r3, [r3, #24] + 800442e: 2202 movs r2, #2 + 8004430: 4013 ands r3, r2 + 8004432: 2b02 cmp r3, #2 + 8004434: d102 bne.n 800443c { /* Clear FLASH End of Operation pending bit */ __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP); - 80043fa: 4b25 ldr r3, [pc, #148] ; (8004490 ) - 80043fc: 2202 movs r2, #2 - 80043fe: 619a str r2, [r3, #24] + 8004436: 4b25 ldr r3, [pc, #148] ; (80044cc ) + 8004438: 2202 movs r2, #2 + 800443a: 619a str r2, [r3, #24] } if( __HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) || - 8004400: 4b23 ldr r3, [pc, #140] ; (8004490 ) - 8004402: 699a ldr r2, [r3, #24] - 8004404: 2380 movs r3, #128 ; 0x80 - 8004406: 005b lsls r3, r3, #1 - 8004408: 401a ands r2, r3 - 800440a: 2380 movs r3, #128 ; 0x80 - 800440c: 005b lsls r3, r3, #1 - 800440e: 429a cmp r2, r3 - 8004410: d035 beq.n 800447e - __HAL_FLASH_GET_FLAG(FLASH_FLAG_PGAERR) || - 8004412: 4b1f ldr r3, [pc, #124] ; (8004490 ) - 8004414: 699a ldr r2, [r3, #24] - 8004416: 2380 movs r3, #128 ; 0x80 - 8004418: 009b lsls r3, r3, #2 - 800441a: 401a ands r2, r3 - if( __HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) || - 800441c: 2380 movs r3, #128 ; 0x80 - 800441e: 009b lsls r3, r3, #2 - 8004420: 429a cmp r2, r3 - 8004422: d02c beq.n 800447e - __HAL_FLASH_GET_FLAG(FLASH_FLAG_SIZERR) || - 8004424: 4b1a ldr r3, [pc, #104] ; (8004490 ) - 8004426: 699a ldr r2, [r3, #24] - 8004428: 2380 movs r3, #128 ; 0x80 - 800442a: 00db lsls r3, r3, #3 - 800442c: 401a ands r2, r3 - __HAL_FLASH_GET_FLAG(FLASH_FLAG_PGAERR) || - 800442e: 2380 movs r3, #128 ; 0x80 - 8004430: 00db lsls r3, r3, #3 - 8004432: 429a cmp r2, r3 - 8004434: d023 beq.n 800447e - __HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR) || - 8004436: 4b16 ldr r3, [pc, #88] ; (8004490 ) - 8004438: 699a ldr r2, [r3, #24] - 800443a: 2380 movs r3, #128 ; 0x80 - 800443c: 011b lsls r3, r3, #4 - 800443e: 401a ands r2, r3 - __HAL_FLASH_GET_FLAG(FLASH_FLAG_SIZERR) || + 800443c: 4b23 ldr r3, [pc, #140] ; (80044cc ) + 800443e: 699a ldr r2, [r3, #24] 8004440: 2380 movs r3, #128 ; 0x80 - 8004442: 011b lsls r3, r3, #4 - 8004444: 429a cmp r2, r3 - 8004446: d01a beq.n 800447e - __HAL_FLASH_GET_FLAG(FLASH_FLAG_RDERR) || - 8004448: 4b11 ldr r3, [pc, #68] ; (8004490 ) - 800444a: 699a ldr r2, [r3, #24] - 800444c: 2380 movs r3, #128 ; 0x80 - 800444e: 019b lsls r3, r3, #6 - 8004450: 401a ands r2, r3 - __HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR) || + 8004442: 005b lsls r3, r3, #1 + 8004444: 401a ands r2, r3 + 8004446: 2380 movs r3, #128 ; 0x80 + 8004448: 005b lsls r3, r3, #1 + 800444a: 429a cmp r2, r3 + 800444c: d035 beq.n 80044ba + __HAL_FLASH_GET_FLAG(FLASH_FLAG_PGAERR) || + 800444e: 4b1f ldr r3, [pc, #124] ; (80044cc ) + 8004450: 699a ldr r2, [r3, #24] 8004452: 2380 movs r3, #128 ; 0x80 - 8004454: 019b lsls r3, r3, #6 - 8004456: 429a cmp r2, r3 - 8004458: d011 beq.n 800447e - __HAL_FLASH_GET_FLAG(FLASH_FLAG_FWWERR) || - 800445a: 4b0d ldr r3, [pc, #52] ; (8004490 ) - 800445c: 699a ldr r2, [r3, #24] - 800445e: 2380 movs r3, #128 ; 0x80 - 8004460: 029b lsls r3, r3, #10 - 8004462: 401a ands r2, r3 - __HAL_FLASH_GET_FLAG(FLASH_FLAG_RDERR) || + 8004454: 009b lsls r3, r3, #2 + 8004456: 401a ands r2, r3 + if( __HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) || + 8004458: 2380 movs r3, #128 ; 0x80 + 800445a: 009b lsls r3, r3, #2 + 800445c: 429a cmp r2, r3 + 800445e: d02c beq.n 80044ba + __HAL_FLASH_GET_FLAG(FLASH_FLAG_SIZERR) || + 8004460: 4b1a ldr r3, [pc, #104] ; (80044cc ) + 8004462: 699a ldr r2, [r3, #24] 8004464: 2380 movs r3, #128 ; 0x80 - 8004466: 029b lsls r3, r3, #10 - 8004468: 429a cmp r2, r3 - 800446a: d008 beq.n 800447e - __HAL_FLASH_GET_FLAG(FLASH_FLAG_NOTZEROERR) ) - 800446c: 4b08 ldr r3, [pc, #32] ; (8004490 ) - 800446e: 699a ldr r2, [r3, #24] - 8004470: 2380 movs r3, #128 ; 0x80 - 8004472: 025b lsls r3, r3, #9 - 8004474: 401a ands r2, r3 - __HAL_FLASH_GET_FLAG(FLASH_FLAG_FWWERR) || + 8004466: 00db lsls r3, r3, #3 + 8004468: 401a ands r2, r3 + __HAL_FLASH_GET_FLAG(FLASH_FLAG_PGAERR) || + 800446a: 2380 movs r3, #128 ; 0x80 + 800446c: 00db lsls r3, r3, #3 + 800446e: 429a cmp r2, r3 + 8004470: d023 beq.n 80044ba + __HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR) || + 8004472: 4b16 ldr r3, [pc, #88] ; (80044cc ) + 8004474: 699a ldr r2, [r3, #24] 8004476: 2380 movs r3, #128 ; 0x80 - 8004478: 025b lsls r3, r3, #9 - 800447a: 429a cmp r2, r3 - 800447c: d103 bne.n 8004486 + 8004478: 011b lsls r3, r3, #4 + 800447a: 401a ands r2, r3 + __HAL_FLASH_GET_FLAG(FLASH_FLAG_SIZERR) || + 800447c: 2380 movs r3, #128 ; 0x80 + 800447e: 011b lsls r3, r3, #4 + 8004480: 429a cmp r2, r3 + 8004482: d01a beq.n 80044ba + __HAL_FLASH_GET_FLAG(FLASH_FLAG_RDERR) || + 8004484: 4b11 ldr r3, [pc, #68] ; (80044cc ) + 8004486: 699a ldr r2, [r3, #24] + 8004488: 2380 movs r3, #128 ; 0x80 + 800448a: 019b lsls r3, r3, #6 + 800448c: 401a ands r2, r3 + __HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR) || + 800448e: 2380 movs r3, #128 ; 0x80 + 8004490: 019b lsls r3, r3, #6 + 8004492: 429a cmp r2, r3 + 8004494: d011 beq.n 80044ba + __HAL_FLASH_GET_FLAG(FLASH_FLAG_FWWERR) || + 8004496: 4b0d ldr r3, [pc, #52] ; (80044cc ) + 8004498: 699a ldr r2, [r3, #24] + 800449a: 2380 movs r3, #128 ; 0x80 + 800449c: 029b lsls r3, r3, #10 + 800449e: 401a ands r2, r3 + __HAL_FLASH_GET_FLAG(FLASH_FLAG_RDERR) || + 80044a0: 2380 movs r3, #128 ; 0x80 + 80044a2: 029b lsls r3, r3, #10 + 80044a4: 429a cmp r2, r3 + 80044a6: d008 beq.n 80044ba + __HAL_FLASH_GET_FLAG(FLASH_FLAG_NOTZEROERR) ) + 80044a8: 4b08 ldr r3, [pc, #32] ; (80044cc ) + 80044aa: 699a ldr r2, [r3, #24] + 80044ac: 2380 movs r3, #128 ; 0x80 + 80044ae: 025b lsls r3, r3, #9 + 80044b0: 401a ands r2, r3 + __HAL_FLASH_GET_FLAG(FLASH_FLAG_FWWERR) || + 80044b2: 2380 movs r3, #128 ; 0x80 + 80044b4: 025b lsls r3, r3, #9 + 80044b6: 429a cmp r2, r3 + 80044b8: d103 bne.n 80044c2 * cut of the STM32L031xx device or the first cut of the STM32L041xx * device, this error should be ignored. The revId of the device * can be retrieved via the HAL_GetREVID() function. * */ FLASH_SetErrorCode(); - 800447e: f000 f809 bl 8004494 + 80044ba: f000 f809 bl 80044d0 return HAL_ERROR; - 8004482: 2301 movs r3, #1 - 8004484: e000 b.n 8004488 + 80044be: 2301 movs r3, #1 + 80044c0: e000 b.n 80044c4 } /* There is no error flag set */ return HAL_OK; - 8004486: 2300 movs r3, #0 + 80044c2: 2300 movs r3, #0 } - 8004488: 0018 movs r0, r3 - 800448a: 46bd mov sp, r7 - 800448c: b004 add sp, #16 - 800448e: bd80 pop {r7, pc} - 8004490: 40022000 .word 0x40022000 + 80044c4: 0018 movs r0, r3 + 80044c6: 46bd mov sp, r7 + 80044c8: b004 add sp, #16 + 80044ca: bd80 pop {r7, pc} + 80044cc: 40022000 .word 0x40022000 -08004494 : +080044d0 : /** * @brief Set the specific FLASH error flag. * @retval None */ static void FLASH_SetErrorCode(void) { - 8004494: b580 push {r7, lr} - 8004496: b082 sub sp, #8 - 8004498: af00 add r7, sp, #0 + 80044d0: b580 push {r7, lr} + 80044d2: b082 sub sp, #8 + 80044d4: af00 add r7, sp, #0 uint32_t flags = 0; - 800449a: 2300 movs r3, #0 - 800449c: 607b str r3, [r7, #4] + 80044d6: 2300 movs r3, #0 + 80044d8: 607b str r3, [r7, #4] if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR)) - 800449e: 4b49 ldr r3, [pc, #292] ; (80045c4 ) - 80044a0: 699a ldr r2, [r3, #24] - 80044a2: 2380 movs r3, #128 ; 0x80 - 80044a4: 005b lsls r3, r3, #1 - 80044a6: 401a ands r2, r3 - 80044a8: 2380 movs r3, #128 ; 0x80 - 80044aa: 005b lsls r3, r3, #1 - 80044ac: 429a cmp r2, r3 - 80044ae: d10a bne.n 80044c6 + 80044da: 4b49 ldr r3, [pc, #292] ; (8004600 ) + 80044dc: 699a ldr r2, [r3, #24] + 80044de: 2380 movs r3, #128 ; 0x80 + 80044e0: 005b lsls r3, r3, #1 + 80044e2: 401a ands r2, r3 + 80044e4: 2380 movs r3, #128 ; 0x80 + 80044e6: 005b lsls r3, r3, #1 + 80044e8: 429a cmp r2, r3 + 80044ea: d10a bne.n 8004502 { pFlash.ErrorCode |= HAL_FLASH_ERROR_WRP; - 80044b0: 4b45 ldr r3, [pc, #276] ; (80045c8 ) - 80044b2: 695b ldr r3, [r3, #20] - 80044b4: 2202 movs r2, #2 - 80044b6: 431a orrs r2, r3 - 80044b8: 4b43 ldr r3, [pc, #268] ; (80045c8 ) - 80044ba: 615a str r2, [r3, #20] + 80044ec: 4b45 ldr r3, [pc, #276] ; (8004604 ) + 80044ee: 695b ldr r3, [r3, #20] + 80044f0: 2202 movs r2, #2 + 80044f2: 431a orrs r2, r3 + 80044f4: 4b43 ldr r3, [pc, #268] ; (8004604 ) + 80044f6: 615a str r2, [r3, #20] flags |= FLASH_FLAG_WRPERR; - 80044bc: 687b ldr r3, [r7, #4] - 80044be: 2280 movs r2, #128 ; 0x80 - 80044c0: 0052 lsls r2, r2, #1 - 80044c2: 4313 orrs r3, r2 - 80044c4: 607b str r3, [r7, #4] + 80044f8: 687b ldr r3, [r7, #4] + 80044fa: 2280 movs r2, #128 ; 0x80 + 80044fc: 0052 lsls r2, r2, #1 + 80044fe: 4313 orrs r3, r2 + 8004500: 607b str r3, [r7, #4] } if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGAERR)) - 80044c6: 4b3f ldr r3, [pc, #252] ; (80045c4 ) - 80044c8: 699a ldr r2, [r3, #24] - 80044ca: 2380 movs r3, #128 ; 0x80 - 80044cc: 009b lsls r3, r3, #2 - 80044ce: 401a ands r2, r3 - 80044d0: 2380 movs r3, #128 ; 0x80 - 80044d2: 009b lsls r3, r3, #2 - 80044d4: 429a cmp r2, r3 - 80044d6: d10a bne.n 80044ee + 8004502: 4b3f ldr r3, [pc, #252] ; (8004600 ) + 8004504: 699a ldr r2, [r3, #24] + 8004506: 2380 movs r3, #128 ; 0x80 + 8004508: 009b lsls r3, r3, #2 + 800450a: 401a ands r2, r3 + 800450c: 2380 movs r3, #128 ; 0x80 + 800450e: 009b lsls r3, r3, #2 + 8004510: 429a cmp r2, r3 + 8004512: d10a bne.n 800452a { pFlash.ErrorCode |= HAL_FLASH_ERROR_PGA; - 80044d8: 4b3b ldr r3, [pc, #236] ; (80045c8 ) - 80044da: 695b ldr r3, [r3, #20] - 80044dc: 2201 movs r2, #1 - 80044de: 431a orrs r2, r3 - 80044e0: 4b39 ldr r3, [pc, #228] ; (80045c8 ) - 80044e2: 615a str r2, [r3, #20] + 8004514: 4b3b ldr r3, [pc, #236] ; (8004604 ) + 8004516: 695b ldr r3, [r3, #20] + 8004518: 2201 movs r2, #1 + 800451a: 431a orrs r2, r3 + 800451c: 4b39 ldr r3, [pc, #228] ; (8004604 ) + 800451e: 615a str r2, [r3, #20] flags |= FLASH_FLAG_PGAERR; - 80044e4: 687b ldr r3, [r7, #4] - 80044e6: 2280 movs r2, #128 ; 0x80 - 80044e8: 0092 lsls r2, r2, #2 - 80044ea: 4313 orrs r3, r2 - 80044ec: 607b str r3, [r7, #4] + 8004520: 687b ldr r3, [r7, #4] + 8004522: 2280 movs r2, #128 ; 0x80 + 8004524: 0092 lsls r2, r2, #2 + 8004526: 4313 orrs r3, r2 + 8004528: 607b str r3, [r7, #4] } if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_SIZERR)) - 80044ee: 4b35 ldr r3, [pc, #212] ; (80045c4 ) - 80044f0: 699a ldr r2, [r3, #24] - 80044f2: 2380 movs r3, #128 ; 0x80 - 80044f4: 00db lsls r3, r3, #3 - 80044f6: 401a ands r2, r3 - 80044f8: 2380 movs r3, #128 ; 0x80 - 80044fa: 00db lsls r3, r3, #3 - 80044fc: 429a cmp r2, r3 - 80044fe: d10a bne.n 8004516 + 800452a: 4b35 ldr r3, [pc, #212] ; (8004600 ) + 800452c: 699a ldr r2, [r3, #24] + 800452e: 2380 movs r3, #128 ; 0x80 + 8004530: 00db lsls r3, r3, #3 + 8004532: 401a ands r2, r3 + 8004534: 2380 movs r3, #128 ; 0x80 + 8004536: 00db lsls r3, r3, #3 + 8004538: 429a cmp r2, r3 + 800453a: d10a bne.n 8004552 { pFlash.ErrorCode |= HAL_FLASH_ERROR_SIZE; - 8004500: 4b31 ldr r3, [pc, #196] ; (80045c8 ) - 8004502: 695b ldr r3, [r3, #20] - 8004504: 2208 movs r2, #8 - 8004506: 431a orrs r2, r3 - 8004508: 4b2f ldr r3, [pc, #188] ; (80045c8 ) - 800450a: 615a str r2, [r3, #20] + 800453c: 4b31 ldr r3, [pc, #196] ; (8004604 ) + 800453e: 695b ldr r3, [r3, #20] + 8004540: 2208 movs r2, #8 + 8004542: 431a orrs r2, r3 + 8004544: 4b2f ldr r3, [pc, #188] ; (8004604 ) + 8004546: 615a str r2, [r3, #20] flags |= FLASH_FLAG_SIZERR; - 800450c: 687b ldr r3, [r7, #4] - 800450e: 2280 movs r2, #128 ; 0x80 - 8004510: 00d2 lsls r2, r2, #3 - 8004512: 4313 orrs r3, r2 - 8004514: 607b str r3, [r7, #4] + 8004548: 687b ldr r3, [r7, #4] + 800454a: 2280 movs r2, #128 ; 0x80 + 800454c: 00d2 lsls r2, r2, #3 + 800454e: 4313 orrs r3, r2 + 8004550: 607b str r3, [r7, #4] } if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR)) - 8004516: 4b2b ldr r3, [pc, #172] ; (80045c4 ) - 8004518: 699a ldr r2, [r3, #24] - 800451a: 2380 movs r3, #128 ; 0x80 - 800451c: 011b lsls r3, r3, #4 - 800451e: 401a ands r2, r3 - 8004520: 2380 movs r3, #128 ; 0x80 - 8004522: 011b lsls r3, r3, #4 - 8004524: 429a cmp r2, r3 - 8004526: d10a bne.n 800453e + 8004552: 4b2b ldr r3, [pc, #172] ; (8004600 ) + 8004554: 699a ldr r2, [r3, #24] + 8004556: 2380 movs r3, #128 ; 0x80 + 8004558: 011b lsls r3, r3, #4 + 800455a: 401a ands r2, r3 + 800455c: 2380 movs r3, #128 ; 0x80 + 800455e: 011b lsls r3, r3, #4 + 8004560: 429a cmp r2, r3 + 8004562: d10a bne.n 800457a * cut of the STM32L031xx device or the first cut of the STM32L041xx * device, this error should be ignored. The revId of the device * can be retrieved via the HAL_GetREVID() function. * */ pFlash.ErrorCode |= HAL_FLASH_ERROR_OPTV; - 8004528: 4b27 ldr r3, [pc, #156] ; (80045c8 ) - 800452a: 695b ldr r3, [r3, #20] - 800452c: 2204 movs r2, #4 - 800452e: 431a orrs r2, r3 - 8004530: 4b25 ldr r3, [pc, #148] ; (80045c8 ) - 8004532: 615a str r2, [r3, #20] + 8004564: 4b27 ldr r3, [pc, #156] ; (8004604 ) + 8004566: 695b ldr r3, [r3, #20] + 8004568: 2204 movs r2, #4 + 800456a: 431a orrs r2, r3 + 800456c: 4b25 ldr r3, [pc, #148] ; (8004604 ) + 800456e: 615a str r2, [r3, #20] flags |= FLASH_FLAG_OPTVERR; - 8004534: 687b ldr r3, [r7, #4] - 8004536: 2280 movs r2, #128 ; 0x80 - 8004538: 0112 lsls r2, r2, #4 - 800453a: 4313 orrs r3, r2 - 800453c: 607b str r3, [r7, #4] + 8004570: 687b ldr r3, [r7, #4] + 8004572: 2280 movs r2, #128 ; 0x80 + 8004574: 0112 lsls r2, r2, #4 + 8004576: 4313 orrs r3, r2 + 8004578: 607b str r3, [r7, #4] } if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_RDERR)) - 800453e: 4b21 ldr r3, [pc, #132] ; (80045c4 ) - 8004540: 699a ldr r2, [r3, #24] - 8004542: 2380 movs r3, #128 ; 0x80 - 8004544: 019b lsls r3, r3, #6 - 8004546: 401a ands r2, r3 - 8004548: 2380 movs r3, #128 ; 0x80 - 800454a: 019b lsls r3, r3, #6 - 800454c: 429a cmp r2, r3 - 800454e: d10a bne.n 8004566 + 800457a: 4b21 ldr r3, [pc, #132] ; (8004600 ) + 800457c: 699a ldr r2, [r3, #24] + 800457e: 2380 movs r3, #128 ; 0x80 + 8004580: 019b lsls r3, r3, #6 + 8004582: 401a ands r2, r3 + 8004584: 2380 movs r3, #128 ; 0x80 + 8004586: 019b lsls r3, r3, #6 + 8004588: 429a cmp r2, r3 + 800458a: d10a bne.n 80045a2 { pFlash.ErrorCode |= HAL_FLASH_ERROR_RD; - 8004550: 4b1d ldr r3, [pc, #116] ; (80045c8 ) - 8004552: 695b ldr r3, [r3, #20] - 8004554: 2210 movs r2, #16 - 8004556: 431a orrs r2, r3 - 8004558: 4b1b ldr r3, [pc, #108] ; (80045c8 ) - 800455a: 615a str r2, [r3, #20] + 800458c: 4b1d ldr r3, [pc, #116] ; (8004604 ) + 800458e: 695b ldr r3, [r3, #20] + 8004590: 2210 movs r2, #16 + 8004592: 431a orrs r2, r3 + 8004594: 4b1b ldr r3, [pc, #108] ; (8004604 ) + 8004596: 615a str r2, [r3, #20] flags |= FLASH_FLAG_RDERR; - 800455c: 687b ldr r3, [r7, #4] - 800455e: 2280 movs r2, #128 ; 0x80 - 8004560: 0192 lsls r2, r2, #6 - 8004562: 4313 orrs r3, r2 - 8004564: 607b str r3, [r7, #4] + 8004598: 687b ldr r3, [r7, #4] + 800459a: 2280 movs r2, #128 ; 0x80 + 800459c: 0192 lsls r2, r2, #6 + 800459e: 4313 orrs r3, r2 + 80045a0: 607b str r3, [r7, #4] } if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_FWWERR)) - 8004566: 4b17 ldr r3, [pc, #92] ; (80045c4 ) - 8004568: 699a ldr r2, [r3, #24] - 800456a: 2380 movs r3, #128 ; 0x80 - 800456c: 029b lsls r3, r3, #10 - 800456e: 401a ands r2, r3 - 8004570: 2380 movs r3, #128 ; 0x80 - 8004572: 029b lsls r3, r3, #10 - 8004574: 429a cmp r2, r3 - 8004576: d109 bne.n 800458c + 80045a2: 4b17 ldr r3, [pc, #92] ; (8004600 ) + 80045a4: 699a ldr r2, [r3, #24] + 80045a6: 2380 movs r3, #128 ; 0x80 + 80045a8: 029b lsls r3, r3, #10 + 80045aa: 401a ands r2, r3 + 80045ac: 2380 movs r3, #128 ; 0x80 + 80045ae: 029b lsls r3, r3, #10 + 80045b0: 429a cmp r2, r3 + 80045b2: d109 bne.n 80045c8 { pFlash.ErrorCode |= HAL_FLASH_ERROR_FWWERR; - 8004578: 4b13 ldr r3, [pc, #76] ; (80045c8 ) - 800457a: 695b ldr r3, [r3, #20] - 800457c: 2220 movs r2, #32 - 800457e: 431a orrs r2, r3 - 8004580: 4b11 ldr r3, [pc, #68] ; (80045c8 ) - 8004582: 615a str r2, [r3, #20] + 80045b4: 4b13 ldr r3, [pc, #76] ; (8004604 ) + 80045b6: 695b ldr r3, [r3, #20] + 80045b8: 2220 movs r2, #32 + 80045ba: 431a orrs r2, r3 + 80045bc: 4b11 ldr r3, [pc, #68] ; (8004604 ) + 80045be: 615a str r2, [r3, #20] flags |= HAL_FLASH_ERROR_FWWERR; - 8004584: 687b ldr r3, [r7, #4] - 8004586: 2220 movs r2, #32 - 8004588: 4313 orrs r3, r2 - 800458a: 607b str r3, [r7, #4] + 80045c0: 687b ldr r3, [r7, #4] + 80045c2: 2220 movs r2, #32 + 80045c4: 4313 orrs r3, r2 + 80045c6: 607b str r3, [r7, #4] } if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_NOTZEROERR)) - 800458c: 4b0d ldr r3, [pc, #52] ; (80045c4 ) - 800458e: 699a ldr r2, [r3, #24] - 8004590: 2380 movs r3, #128 ; 0x80 - 8004592: 025b lsls r3, r3, #9 - 8004594: 401a ands r2, r3 - 8004596: 2380 movs r3, #128 ; 0x80 - 8004598: 025b lsls r3, r3, #9 - 800459a: 429a cmp r2, r3 - 800459c: d10a bne.n 80045b4 + 80045c8: 4b0d ldr r3, [pc, #52] ; (8004600 ) + 80045ca: 699a ldr r2, [r3, #24] + 80045cc: 2380 movs r3, #128 ; 0x80 + 80045ce: 025b lsls r3, r3, #9 + 80045d0: 401a ands r2, r3 + 80045d2: 2380 movs r3, #128 ; 0x80 + 80045d4: 025b lsls r3, r3, #9 + 80045d6: 429a cmp r2, r3 + 80045d8: d10a bne.n 80045f0 { pFlash.ErrorCode |= HAL_FLASH_ERROR_NOTZERO; - 800459e: 4b0a ldr r3, [pc, #40] ; (80045c8 ) - 80045a0: 695b ldr r3, [r3, #20] - 80045a2: 2240 movs r2, #64 ; 0x40 - 80045a4: 431a orrs r2, r3 - 80045a6: 4b08 ldr r3, [pc, #32] ; (80045c8 ) - 80045a8: 615a str r2, [r3, #20] + 80045da: 4b0a ldr r3, [pc, #40] ; (8004604 ) + 80045dc: 695b ldr r3, [r3, #20] + 80045de: 2240 movs r2, #64 ; 0x40 + 80045e0: 431a orrs r2, r3 + 80045e2: 4b08 ldr r3, [pc, #32] ; (8004604 ) + 80045e4: 615a str r2, [r3, #20] flags |= FLASH_FLAG_NOTZEROERR; - 80045aa: 687b ldr r3, [r7, #4] - 80045ac: 2280 movs r2, #128 ; 0x80 - 80045ae: 0252 lsls r2, r2, #9 - 80045b0: 4313 orrs r3, r2 - 80045b2: 607b str r3, [r7, #4] + 80045e6: 687b ldr r3, [r7, #4] + 80045e8: 2280 movs r2, #128 ; 0x80 + 80045ea: 0252 lsls r2, r2, #9 + 80045ec: 4313 orrs r3, r2 + 80045ee: 607b str r3, [r7, #4] } /* Clear FLASH error pending bits */ __HAL_FLASH_CLEAR_FLAG(flags); - 80045b4: 4b03 ldr r3, [pc, #12] ; (80045c4 ) - 80045b6: 687a ldr r2, [r7, #4] - 80045b8: 619a str r2, [r3, #24] + 80045f0: 4b03 ldr r3, [pc, #12] ; (8004600 ) + 80045f2: 687a ldr r2, [r7, #4] + 80045f4: 619a str r2, [r3, #24] } - 80045ba: 46c0 nop ; (mov r8, r8) - 80045bc: 46bd mov sp, r7 - 80045be: b002 add sp, #8 - 80045c0: bd80 pop {r7, pc} - 80045c2: 46c0 nop ; (mov r8, r8) - 80045c4: 40022000 .word 0x40022000 - 80045c8: 20000390 .word 0x20000390 + 80045f6: 46c0 nop ; (mov r8, r8) + 80045f8: 46bd mov sp, r7 + 80045fa: b002 add sp, #8 + 80045fc: bd80 pop {r7, pc} + 80045fe: 46c0 nop ; (mov r8, r8) + 8004600: 40022000 .word 0x40022000 + 8004604: 20000398 .word 0x20000398 -080045cc : +08004608 : * @note A Page is erased in the Program memory only if the address to load * is the start address of a page (multiple of @ref FLASH_PAGE_SIZE bytes). * @retval None */ void FLASH_PageErase(uint32_t PageAddress) { - 80045cc: b580 push {r7, lr} - 80045ce: b082 sub sp, #8 - 80045d0: af00 add r7, sp, #0 - 80045d2: 6078 str r0, [r7, #4] + 8004608: b580 push {r7, lr} + 800460a: b082 sub sp, #8 + 800460c: af00 add r7, sp, #0 + 800460e: 6078 str r0, [r7, #4] /* Clean the error context */ pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; - 80045d4: 4b0c ldr r3, [pc, #48] ; (8004608 ) - 80045d6: 2200 movs r2, #0 - 80045d8: 615a str r2, [r3, #20] + 8004610: 4b0c ldr r3, [pc, #48] ; (8004644 ) + 8004612: 2200 movs r2, #0 + 8004614: 615a str r2, [r3, #20] /* Set the ERASE bit */ SET_BIT(FLASH->PECR, FLASH_PECR_ERASE); - 80045da: 4b0c ldr r3, [pc, #48] ; (800460c ) - 80045dc: 4a0b ldr r2, [pc, #44] ; (800460c ) - 80045de: 6852 ldr r2, [r2, #4] - 80045e0: 2180 movs r1, #128 ; 0x80 - 80045e2: 0089 lsls r1, r1, #2 - 80045e4: 430a orrs r2, r1 - 80045e6: 605a str r2, [r3, #4] + 8004616: 4b0c ldr r3, [pc, #48] ; (8004648 ) + 8004618: 4a0b ldr r2, [pc, #44] ; (8004648 ) + 800461a: 6852 ldr r2, [r2, #4] + 800461c: 2180 movs r1, #128 ; 0x80 + 800461e: 0089 lsls r1, r1, #2 + 8004620: 430a orrs r2, r1 + 8004622: 605a str r2, [r3, #4] /* Set PROG bit */ SET_BIT(FLASH->PECR, FLASH_PECR_PROG); - 80045e8: 4b08 ldr r3, [pc, #32] ; (800460c ) - 80045ea: 4a08 ldr r2, [pc, #32] ; (800460c ) - 80045ec: 6852 ldr r2, [r2, #4] - 80045ee: 2108 movs r1, #8 - 80045f0: 430a orrs r2, r1 - 80045f2: 605a str r2, [r3, #4] + 8004624: 4b08 ldr r3, [pc, #32] ; (8004648 ) + 8004626: 4a08 ldr r2, [pc, #32] ; (8004648 ) + 8004628: 6852 ldr r2, [r2, #4] + 800462a: 2108 movs r1, #8 + 800462c: 430a orrs r2, r1 + 800462e: 605a str r2, [r3, #4] /* Write 00000000h to the first word of the program page to erase */ *(__IO uint32_t *)(uint32_t)(PageAddress & ~(FLASH_PAGE_SIZE - 1)) = 0x00000000; - 80045f4: 687b ldr r3, [r7, #4] - 80045f6: 227f movs r2, #127 ; 0x7f - 80045f8: 4393 bics r3, r2 - 80045fa: 2200 movs r2, #0 - 80045fc: 601a str r2, [r3, #0] + 8004630: 687b ldr r3, [r7, #4] + 8004632: 227f movs r2, #127 ; 0x7f + 8004634: 4393 bics r3, r2 + 8004636: 2200 movs r2, #0 + 8004638: 601a str r2, [r3, #0] } - 80045fe: 46c0 nop ; (mov r8, r8) - 8004600: 46bd mov sp, r7 - 8004602: b002 add sp, #8 - 8004604: bd80 pop {r7, pc} - 8004606: 46c0 nop ; (mov r8, r8) - 8004608: 20000390 .word 0x20000390 - 800460c: 40022000 .word 0x40022000 + 800463a: 46c0 nop ; (mov r8, r8) + 800463c: 46bd mov sp, r7 + 800463e: b002 add sp, #8 + 8004640: bd80 pop {r7, pc} + 8004642: 46c0 nop ; (mov r8, r8) + 8004644: 20000398 .word 0x20000398 + 8004648: 40022000 .word 0x40022000 -08004610 : +0800464c : * @param GPIO_Init pointer to a GPIO_InitTypeDef structure that contains * the configuration information for the specified GPIO peripheral. * @retval None */ void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init) { - 8004610: b580 push {r7, lr} - 8004612: b086 sub sp, #24 - 8004614: af00 add r7, sp, #0 - 8004616: 6078 str r0, [r7, #4] - 8004618: 6039 str r1, [r7, #0] + 800464c: b580 push {r7, lr} + 800464e: b086 sub sp, #24 + 8004650: af00 add r7, sp, #0 + 8004652: 6078 str r0, [r7, #4] + 8004654: 6039 str r1, [r7, #0] uint32_t position = 0x00U; - 800461a: 2300 movs r3, #0 - 800461c: 617b str r3, [r7, #20] + 8004656: 2300 movs r3, #0 + 8004658: 617b str r3, [r7, #20] uint32_t iocurrent = 0x00U; - 800461e: 2300 movs r3, #0 - 8004620: 60fb str r3, [r7, #12] + 800465a: 2300 movs r3, #0 + 800465c: 60fb str r3, [r7, #12] uint32_t temp = 0x00U; - 8004622: 2300 movs r3, #0 - 8004624: 613b str r3, [r7, #16] + 800465e: 2300 movs r3, #0 + 8004660: 613b str r3, [r7, #16] assert_param(IS_GPIO_MODE(GPIO_Init->Mode)); assert_param(IS_GPIO_PULL(GPIO_Init->Pull)); assert_param(IS_GPIO_PIN_AVAILABLE(GPIOx, (GPIO_Init->Pin))); /* Configure the port pins */ while (((GPIO_Init->Pin) >> position) != 0) - 8004626: e155 b.n 80048d4 + 8004662: e155 b.n 8004910 { /* Get the IO position */ iocurrent = (GPIO_Init->Pin) & (1U << position); - 8004628: 683b ldr r3, [r7, #0] - 800462a: 681b ldr r3, [r3, #0] - 800462c: 2101 movs r1, #1 - 800462e: 697a ldr r2, [r7, #20] - 8004630: 4091 lsls r1, r2 - 8004632: 000a movs r2, r1 - 8004634: 4013 ands r3, r2 - 8004636: 60fb str r3, [r7, #12] + 8004664: 683b ldr r3, [r7, #0] + 8004666: 681b ldr r3, [r3, #0] + 8004668: 2101 movs r1, #1 + 800466a: 697a ldr r2, [r7, #20] + 800466c: 4091 lsls r1, r2 + 800466e: 000a movs r2, r1 + 8004670: 4013 ands r3, r2 + 8004672: 60fb str r3, [r7, #12] if (iocurrent) - 8004638: 68fb ldr r3, [r7, #12] - 800463a: 2b00 cmp r3, #0 - 800463c: d100 bne.n 8004640 - 800463e: e146 b.n 80048ce + 8004674: 68fb ldr r3, [r7, #12] + 8004676: 2b00 cmp r3, #0 + 8004678: d100 bne.n 800467c + 800467a: e146 b.n 800490a { /*--------------------- GPIO Mode Configuration ------------------------*/ /* In case of Output or Alternate function mode selection */ if ((GPIO_Init->Mode == GPIO_MODE_OUTPUT_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_PP) || - 8004640: 683b ldr r3, [r7, #0] - 8004642: 685b ldr r3, [r3, #4] - 8004644: 2b01 cmp r3, #1 - 8004646: d00b beq.n 8004660 - 8004648: 683b ldr r3, [r7, #0] - 800464a: 685b ldr r3, [r3, #4] - 800464c: 2b02 cmp r3, #2 - 800464e: d007 beq.n 8004660 + 800467c: 683b ldr r3, [r7, #0] + 800467e: 685b ldr r3, [r3, #4] + 8004680: 2b01 cmp r3, #1 + 8004682: d00b beq.n 800469c + 8004684: 683b ldr r3, [r7, #0] + 8004686: 685b ldr r3, [r3, #4] + 8004688: 2b02 cmp r3, #2 + 800468a: d007 beq.n 800469c (GPIO_Init->Mode == GPIO_MODE_OUTPUT_OD) || (GPIO_Init->Mode == GPIO_MODE_AF_OD)) - 8004650: 683b ldr r3, [r7, #0] - 8004652: 685b ldr r3, [r3, #4] + 800468c: 683b ldr r3, [r7, #0] + 800468e: 685b ldr r3, [r3, #4] if ((GPIO_Init->Mode == GPIO_MODE_OUTPUT_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_PP) || - 8004654: 2b11 cmp r3, #17 - 8004656: d003 beq.n 8004660 + 8004690: 2b11 cmp r3, #17 + 8004692: d003 beq.n 800469c (GPIO_Init->Mode == GPIO_MODE_OUTPUT_OD) || (GPIO_Init->Mode == GPIO_MODE_AF_OD)) - 8004658: 683b ldr r3, [r7, #0] - 800465a: 685b ldr r3, [r3, #4] - 800465c: 2b12 cmp r3, #18 - 800465e: d130 bne.n 80046c2 + 8004694: 683b ldr r3, [r7, #0] + 8004696: 685b ldr r3, [r3, #4] + 8004698: 2b12 cmp r3, #18 + 800469a: d130 bne.n 80046fe { /* Check the Speed parameter */ assert_param(IS_GPIO_SPEED(GPIO_Init->Speed)); /* Configure the IO Speed */ temp = GPIOx->OSPEEDR; - 8004660: 687b ldr r3, [r7, #4] - 8004662: 689b ldr r3, [r3, #8] - 8004664: 613b str r3, [r7, #16] + 800469c: 687b ldr r3, [r7, #4] + 800469e: 689b ldr r3, [r3, #8] + 80046a0: 613b str r3, [r7, #16] temp &= ~(GPIO_OSPEEDER_OSPEED0 << (position * 2U)); - 8004666: 697b ldr r3, [r7, #20] - 8004668: 005b lsls r3, r3, #1 - 800466a: 2203 movs r2, #3 - 800466c: 409a lsls r2, r3 - 800466e: 0013 movs r3, r2 - 8004670: 43da mvns r2, r3 - 8004672: 693b ldr r3, [r7, #16] - 8004674: 4013 ands r3, r2 - 8004676: 613b str r3, [r7, #16] + 80046a2: 697b ldr r3, [r7, #20] + 80046a4: 005b lsls r3, r3, #1 + 80046a6: 2203 movs r2, #3 + 80046a8: 409a lsls r2, r3 + 80046aa: 0013 movs r3, r2 + 80046ac: 43da mvns r2, r3 + 80046ae: 693b ldr r3, [r7, #16] + 80046b0: 4013 ands r3, r2 + 80046b2: 613b str r3, [r7, #16] temp |= (GPIO_Init->Speed << (position * 2U)); - 8004678: 683b ldr r3, [r7, #0] - 800467a: 68da ldr r2, [r3, #12] - 800467c: 697b ldr r3, [r7, #20] - 800467e: 005b lsls r3, r3, #1 - 8004680: 409a lsls r2, r3 - 8004682: 0013 movs r3, r2 - 8004684: 693a ldr r2, [r7, #16] - 8004686: 4313 orrs r3, r2 - 8004688: 613b str r3, [r7, #16] + 80046b4: 683b ldr r3, [r7, #0] + 80046b6: 68da ldr r2, [r3, #12] + 80046b8: 697b ldr r3, [r7, #20] + 80046ba: 005b lsls r3, r3, #1 + 80046bc: 409a lsls r2, r3 + 80046be: 0013 movs r3, r2 + 80046c0: 693a ldr r2, [r7, #16] + 80046c2: 4313 orrs r3, r2 + 80046c4: 613b str r3, [r7, #16] GPIOx->OSPEEDR = temp; - 800468a: 687b ldr r3, [r7, #4] - 800468c: 693a ldr r2, [r7, #16] - 800468e: 609a str r2, [r3, #8] + 80046c6: 687b ldr r3, [r7, #4] + 80046c8: 693a ldr r2, [r7, #16] + 80046ca: 609a str r2, [r3, #8] /* Configure the IO Output Type */ temp = GPIOx->OTYPER; - 8004690: 687b ldr r3, [r7, #4] - 8004692: 685b ldr r3, [r3, #4] - 8004694: 613b str r3, [r7, #16] + 80046cc: 687b ldr r3, [r7, #4] + 80046ce: 685b ldr r3, [r3, #4] + 80046d0: 613b str r3, [r7, #16] temp &= ~(GPIO_OTYPER_OT_0 << position) ; - 8004696: 2201 movs r2, #1 - 8004698: 697b ldr r3, [r7, #20] - 800469a: 409a lsls r2, r3 - 800469c: 0013 movs r3, r2 - 800469e: 43da mvns r2, r3 - 80046a0: 693b ldr r3, [r7, #16] - 80046a2: 4013 ands r3, r2 - 80046a4: 613b str r3, [r7, #16] + 80046d2: 2201 movs r2, #1 + 80046d4: 697b ldr r3, [r7, #20] + 80046d6: 409a lsls r2, r3 + 80046d8: 0013 movs r3, r2 + 80046da: 43da mvns r2, r3 + 80046dc: 693b ldr r3, [r7, #16] + 80046de: 4013 ands r3, r2 + 80046e0: 613b str r3, [r7, #16] temp |= (((GPIO_Init->Mode & GPIO_OUTPUT_TYPE) >> 4U) << position); - 80046a6: 683b ldr r3, [r7, #0] - 80046a8: 685b ldr r3, [r3, #4] - 80046aa: 091b lsrs r3, r3, #4 - 80046ac: 2201 movs r2, #1 - 80046ae: 401a ands r2, r3 - 80046b0: 697b ldr r3, [r7, #20] - 80046b2: 409a lsls r2, r3 - 80046b4: 0013 movs r3, r2 - 80046b6: 693a ldr r2, [r7, #16] - 80046b8: 4313 orrs r3, r2 - 80046ba: 613b str r3, [r7, #16] + 80046e2: 683b ldr r3, [r7, #0] + 80046e4: 685b ldr r3, [r3, #4] + 80046e6: 091b lsrs r3, r3, #4 + 80046e8: 2201 movs r2, #1 + 80046ea: 401a ands r2, r3 + 80046ec: 697b ldr r3, [r7, #20] + 80046ee: 409a lsls r2, r3 + 80046f0: 0013 movs r3, r2 + 80046f2: 693a ldr r2, [r7, #16] + 80046f4: 4313 orrs r3, r2 + 80046f6: 613b str r3, [r7, #16] GPIOx->OTYPER = temp; - 80046bc: 687b ldr r3, [r7, #4] - 80046be: 693a ldr r2, [r7, #16] - 80046c0: 605a str r2, [r3, #4] + 80046f8: 687b ldr r3, [r7, #4] + 80046fa: 693a ldr r2, [r7, #16] + 80046fc: 605a str r2, [r3, #4] } /* Activate the Pull-up or Pull down resistor for the current IO */ temp = GPIOx->PUPDR; - 80046c2: 687b ldr r3, [r7, #4] - 80046c4: 68db ldr r3, [r3, #12] - 80046c6: 613b str r3, [r7, #16] + 80046fe: 687b ldr r3, [r7, #4] + 8004700: 68db ldr r3, [r3, #12] + 8004702: 613b str r3, [r7, #16] temp &= ~(GPIO_PUPDR_PUPD0 << (position * 2U)); - 80046c8: 697b ldr r3, [r7, #20] - 80046ca: 005b lsls r3, r3, #1 - 80046cc: 2203 movs r2, #3 - 80046ce: 409a lsls r2, r3 - 80046d0: 0013 movs r3, r2 - 80046d2: 43da mvns r2, r3 - 80046d4: 693b ldr r3, [r7, #16] - 80046d6: 4013 ands r3, r2 - 80046d8: 613b str r3, [r7, #16] + 8004704: 697b ldr r3, [r7, #20] + 8004706: 005b lsls r3, r3, #1 + 8004708: 2203 movs r2, #3 + 800470a: 409a lsls r2, r3 + 800470c: 0013 movs r3, r2 + 800470e: 43da mvns r2, r3 + 8004710: 693b ldr r3, [r7, #16] + 8004712: 4013 ands r3, r2 + 8004714: 613b str r3, [r7, #16] temp |= ((GPIO_Init->Pull) << (position * 2U)); - 80046da: 683b ldr r3, [r7, #0] - 80046dc: 689a ldr r2, [r3, #8] - 80046de: 697b ldr r3, [r7, #20] - 80046e0: 005b lsls r3, r3, #1 - 80046e2: 409a lsls r2, r3 - 80046e4: 0013 movs r3, r2 - 80046e6: 693a ldr r2, [r7, #16] - 80046e8: 4313 orrs r3, r2 - 80046ea: 613b str r3, [r7, #16] + 8004716: 683b ldr r3, [r7, #0] + 8004718: 689a ldr r2, [r3, #8] + 800471a: 697b ldr r3, [r7, #20] + 800471c: 005b lsls r3, r3, #1 + 800471e: 409a lsls r2, r3 + 8004720: 0013 movs r3, r2 + 8004722: 693a ldr r2, [r7, #16] + 8004724: 4313 orrs r3, r2 + 8004726: 613b str r3, [r7, #16] GPIOx->PUPDR = temp; - 80046ec: 687b ldr r3, [r7, #4] - 80046ee: 693a ldr r2, [r7, #16] - 80046f0: 60da str r2, [r3, #12] + 8004728: 687b ldr r3, [r7, #4] + 800472a: 693a ldr r2, [r7, #16] + 800472c: 60da str r2, [r3, #12] /* In case of Alternate function mode selection */ if ((GPIO_Init->Mode == GPIO_MODE_AF_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_OD)) - 80046f2: 683b ldr r3, [r7, #0] - 80046f4: 685b ldr r3, [r3, #4] - 80046f6: 2b02 cmp r3, #2 - 80046f8: d003 beq.n 8004702 - 80046fa: 683b ldr r3, [r7, #0] - 80046fc: 685b ldr r3, [r3, #4] - 80046fe: 2b12 cmp r3, #18 - 8004700: d123 bne.n 800474a + 800472e: 683b ldr r3, [r7, #0] + 8004730: 685b ldr r3, [r3, #4] + 8004732: 2b02 cmp r3, #2 + 8004734: d003 beq.n 800473e + 8004736: 683b ldr r3, [r7, #0] + 8004738: 685b ldr r3, [r3, #4] + 800473a: 2b12 cmp r3, #18 + 800473c: d123 bne.n 8004786 /* Check the Alternate function parameters */ assert_param(IS_GPIO_AF_INSTANCE(GPIOx)); assert_param(IS_GPIO_AF(GPIO_Init->Alternate)); /* Configure Alternate function mapped with the current IO */ temp = GPIOx->AFR[position >> 3U]; - 8004702: 697b ldr r3, [r7, #20] - 8004704: 08da lsrs r2, r3, #3 - 8004706: 687b ldr r3, [r7, #4] - 8004708: 3208 adds r2, #8 - 800470a: 0092 lsls r2, r2, #2 - 800470c: 58d3 ldr r3, [r2, r3] - 800470e: 613b str r3, [r7, #16] + 800473e: 697b ldr r3, [r7, #20] + 8004740: 08da lsrs r2, r3, #3 + 8004742: 687b ldr r3, [r7, #4] + 8004744: 3208 adds r2, #8 + 8004746: 0092 lsls r2, r2, #2 + 8004748: 58d3 ldr r3, [r2, r3] + 800474a: 613b str r3, [r7, #16] temp &= ~(0xFUL << ((uint32_t)(position & 0x07UL) * 4U)); - 8004710: 697b ldr r3, [r7, #20] - 8004712: 2207 movs r2, #7 - 8004714: 4013 ands r3, r2 - 8004716: 009b lsls r3, r3, #2 - 8004718: 220f movs r2, #15 - 800471a: 409a lsls r2, r3 - 800471c: 0013 movs r3, r2 - 800471e: 43da mvns r2, r3 - 8004720: 693b ldr r3, [r7, #16] - 8004722: 4013 ands r3, r2 - 8004724: 613b str r3, [r7, #16] - temp |= ((uint32_t)(GPIO_Init->Alternate) << (((uint32_t)position & (uint32_t)0x07U) * 4U)); - 8004726: 683b ldr r3, [r7, #0] - 8004728: 691a ldr r2, [r3, #16] - 800472a: 697b ldr r3, [r7, #20] - 800472c: 2107 movs r1, #7 - 800472e: 400b ands r3, r1 - 8004730: 009b lsls r3, r3, #2 - 8004732: 409a lsls r2, r3 - 8004734: 0013 movs r3, r2 - 8004736: 693a ldr r2, [r7, #16] - 8004738: 4313 orrs r3, r2 - 800473a: 613b str r3, [r7, #16] - GPIOx->AFR[position >> 3U] = temp; - 800473c: 697b ldr r3, [r7, #20] - 800473e: 08da lsrs r2, r3, #3 - 8004740: 687b ldr r3, [r7, #4] - 8004742: 3208 adds r2, #8 - 8004744: 0092 lsls r2, r2, #2 - 8004746: 6939 ldr r1, [r7, #16] - 8004748: 50d1 str r1, [r2, r3] - } - - /* Configure IO Direction mode (Input, Output, Alternate or Analog) */ - temp = GPIOx->MODER; - 800474a: 687b ldr r3, [r7, #4] - 800474c: 681b ldr r3, [r3, #0] - 800474e: 613b str r3, [r7, #16] - temp &= ~(GPIO_MODER_MODE0 << (position * 2U)); - 8004750: 697b ldr r3, [r7, #20] - 8004752: 005b lsls r3, r3, #1 - 8004754: 2203 movs r2, #3 + 800474c: 697b ldr r3, [r7, #20] + 800474e: 2207 movs r2, #7 + 8004750: 4013 ands r3, r2 + 8004752: 009b lsls r3, r3, #2 + 8004754: 220f movs r2, #15 8004756: 409a lsls r2, r3 8004758: 0013 movs r3, r2 800475a: 43da mvns r2, r3 800475c: 693b ldr r3, [r7, #16] 800475e: 4013 ands r3, r2 8004760: 613b str r3, [r7, #16] - temp |= ((GPIO_Init->Mode & GPIO_MODE) << (position * 2U)); + temp |= ((uint32_t)(GPIO_Init->Alternate) << (((uint32_t)position & (uint32_t)0x07U) * 4U)); 8004762: 683b ldr r3, [r7, #0] - 8004764: 685b ldr r3, [r3, #4] - 8004766: 2203 movs r2, #3 - 8004768: 401a ands r2, r3 - 800476a: 697b ldr r3, [r7, #20] - 800476c: 005b lsls r3, r3, #1 + 8004764: 691a ldr r2, [r3, #16] + 8004766: 697b ldr r3, [r7, #20] + 8004768: 2107 movs r1, #7 + 800476a: 400b ands r3, r1 + 800476c: 009b lsls r3, r3, #2 800476e: 409a lsls r2, r3 8004770: 0013 movs r3, r2 8004772: 693a ldr r2, [r7, #16] 8004774: 4313 orrs r3, r2 8004776: 613b str r3, [r7, #16] + GPIOx->AFR[position >> 3U] = temp; + 8004778: 697b ldr r3, [r7, #20] + 800477a: 08da lsrs r2, r3, #3 + 800477c: 687b ldr r3, [r7, #4] + 800477e: 3208 adds r2, #8 + 8004780: 0092 lsls r2, r2, #2 + 8004782: 6939 ldr r1, [r7, #16] + 8004784: 50d1 str r1, [r2, r3] + } + + /* Configure IO Direction mode (Input, Output, Alternate or Analog) */ + temp = GPIOx->MODER; + 8004786: 687b ldr r3, [r7, #4] + 8004788: 681b ldr r3, [r3, #0] + 800478a: 613b str r3, [r7, #16] + temp &= ~(GPIO_MODER_MODE0 << (position * 2U)); + 800478c: 697b ldr r3, [r7, #20] + 800478e: 005b lsls r3, r3, #1 + 8004790: 2203 movs r2, #3 + 8004792: 409a lsls r2, r3 + 8004794: 0013 movs r3, r2 + 8004796: 43da mvns r2, r3 + 8004798: 693b ldr r3, [r7, #16] + 800479a: 4013 ands r3, r2 + 800479c: 613b str r3, [r7, #16] + temp |= ((GPIO_Init->Mode & GPIO_MODE) << (position * 2U)); + 800479e: 683b ldr r3, [r7, #0] + 80047a0: 685b ldr r3, [r3, #4] + 80047a2: 2203 movs r2, #3 + 80047a4: 401a ands r2, r3 + 80047a6: 697b ldr r3, [r7, #20] + 80047a8: 005b lsls r3, r3, #1 + 80047aa: 409a lsls r2, r3 + 80047ac: 0013 movs r3, r2 + 80047ae: 693a ldr r2, [r7, #16] + 80047b0: 4313 orrs r3, r2 + 80047b2: 613b str r3, [r7, #16] GPIOx->MODER = temp; - 8004778: 687b ldr r3, [r7, #4] - 800477a: 693a ldr r2, [r7, #16] - 800477c: 601a str r2, [r3, #0] + 80047b4: 687b ldr r3, [r7, #4] + 80047b6: 693a ldr r2, [r7, #16] + 80047b8: 601a str r2, [r3, #0] /*--------------------- EXTI Mode Configuration ------------------------*/ /* Configure the External Interrupt or event for the current IO */ if ((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE) - 800477e: 683b ldr r3, [r7, #0] - 8004780: 685a ldr r2, [r3, #4] - 8004782: 2380 movs r3, #128 ; 0x80 - 8004784: 055b lsls r3, r3, #21 - 8004786: 4013 ands r3, r2 - 8004788: d100 bne.n 800478c - 800478a: e0a0 b.n 80048ce + 80047ba: 683b ldr r3, [r7, #0] + 80047bc: 685a ldr r2, [r3, #4] + 80047be: 2380 movs r3, #128 ; 0x80 + 80047c0: 055b lsls r3, r3, #21 + 80047c2: 4013 ands r3, r2 + 80047c4: d100 bne.n 80047c8 + 80047c6: e0a0 b.n 800490a { /* Enable SYSCFG Clock */ __HAL_RCC_SYSCFG_CLK_ENABLE(); - 800478c: 4b57 ldr r3, [pc, #348] ; (80048ec ) - 800478e: 4a57 ldr r2, [pc, #348] ; (80048ec ) - 8004790: 6b52 ldr r2, [r2, #52] ; 0x34 - 8004792: 2101 movs r1, #1 - 8004794: 430a orrs r2, r1 - 8004796: 635a str r2, [r3, #52] ; 0x34 + 80047c8: 4b57 ldr r3, [pc, #348] ; (8004928 ) + 80047ca: 4a57 ldr r2, [pc, #348] ; (8004928 ) + 80047cc: 6b52 ldr r2, [r2, #52] ; 0x34 + 80047ce: 2101 movs r1, #1 + 80047d0: 430a orrs r2, r1 + 80047d2: 635a str r2, [r3, #52] ; 0x34 temp = SYSCFG->EXTICR[position >> 2U]; - 8004798: 4a55 ldr r2, [pc, #340] ; (80048f0 ) - 800479a: 697b ldr r3, [r7, #20] - 800479c: 089b lsrs r3, r3, #2 - 800479e: 3302 adds r3, #2 - 80047a0: 009b lsls r3, r3, #2 - 80047a2: 589b ldr r3, [r3, r2] - 80047a4: 613b str r3, [r7, #16] + 80047d4: 4a55 ldr r2, [pc, #340] ; (800492c ) + 80047d6: 697b ldr r3, [r7, #20] + 80047d8: 089b lsrs r3, r3, #2 + 80047da: 3302 adds r3, #2 + 80047dc: 009b lsls r3, r3, #2 + 80047de: 589b ldr r3, [r3, r2] + 80047e0: 613b str r3, [r7, #16] CLEAR_BIT(temp, (0x0FUL) << (4U * (position & 0x03U))); - 80047a6: 697b ldr r3, [r7, #20] - 80047a8: 2203 movs r2, #3 - 80047aa: 4013 ands r3, r2 - 80047ac: 009b lsls r3, r3, #2 - 80047ae: 220f movs r2, #15 - 80047b0: 409a lsls r2, r3 - 80047b2: 0013 movs r3, r2 - 80047b4: 43da mvns r2, r3 - 80047b6: 693b ldr r3, [r7, #16] - 80047b8: 4013 ands r3, r2 - 80047ba: 613b str r3, [r7, #16] + 80047e2: 697b ldr r3, [r7, #20] + 80047e4: 2203 movs r2, #3 + 80047e6: 4013 ands r3, r2 + 80047e8: 009b lsls r3, r3, #2 + 80047ea: 220f movs r2, #15 + 80047ec: 409a lsls r2, r3 + 80047ee: 0013 movs r3, r2 + 80047f0: 43da mvns r2, r3 + 80047f2: 693b ldr r3, [r7, #16] + 80047f4: 4013 ands r3, r2 + 80047f6: 613b str r3, [r7, #16] SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4 * (position & 0x03U))); - 80047bc: 687a ldr r2, [r7, #4] - 80047be: 23a0 movs r3, #160 ; 0xa0 - 80047c0: 05db lsls r3, r3, #23 - 80047c2: 429a cmp r2, r3 - 80047c4: d01f beq.n 8004806 - 80047c6: 687b ldr r3, [r7, #4] - 80047c8: 4a4a ldr r2, [pc, #296] ; (80048f4 ) - 80047ca: 4293 cmp r3, r2 - 80047cc: d019 beq.n 8004802 - 80047ce: 687b ldr r3, [r7, #4] - 80047d0: 4a49 ldr r2, [pc, #292] ; (80048f8 ) - 80047d2: 4293 cmp r3, r2 - 80047d4: d013 beq.n 80047fe - 80047d6: 687b ldr r3, [r7, #4] - 80047d8: 4a48 ldr r2, [pc, #288] ; (80048fc ) - 80047da: 4293 cmp r3, r2 - 80047dc: d00d beq.n 80047fa - 80047de: 687b ldr r3, [r7, #4] - 80047e0: 4a47 ldr r2, [pc, #284] ; (8004900 ) - 80047e2: 4293 cmp r3, r2 - 80047e4: d007 beq.n 80047f6 - 80047e6: 687b ldr r3, [r7, #4] - 80047e8: 4a46 ldr r2, [pc, #280] ; (8004904 ) - 80047ea: 4293 cmp r3, r2 - 80047ec: d101 bne.n 80047f2 - 80047ee: 2305 movs r3, #5 - 80047f0: e00a b.n 8004808 - 80047f2: 2306 movs r3, #6 - 80047f4: e008 b.n 8004808 - 80047f6: 2304 movs r3, #4 - 80047f8: e006 b.n 8004808 - 80047fa: 2303 movs r3, #3 - 80047fc: e004 b.n 8004808 - 80047fe: 2302 movs r3, #2 - 8004800: e002 b.n 8004808 - 8004802: 2301 movs r3, #1 - 8004804: e000 b.n 8004808 - 8004806: 2300 movs r3, #0 - 8004808: 697a ldr r2, [r7, #20] - 800480a: 2103 movs r1, #3 - 800480c: 400a ands r2, r1 - 800480e: 0092 lsls r2, r2, #2 - 8004810: 4093 lsls r3, r2 - 8004812: 693a ldr r2, [r7, #16] - 8004814: 4313 orrs r3, r2 - 8004816: 613b str r3, [r7, #16] + 80047f8: 687a ldr r2, [r7, #4] + 80047fa: 23a0 movs r3, #160 ; 0xa0 + 80047fc: 05db lsls r3, r3, #23 + 80047fe: 429a cmp r2, r3 + 8004800: d01f beq.n 8004842 + 8004802: 687b ldr r3, [r7, #4] + 8004804: 4a4a ldr r2, [pc, #296] ; (8004930 ) + 8004806: 4293 cmp r3, r2 + 8004808: d019 beq.n 800483e + 800480a: 687b ldr r3, [r7, #4] + 800480c: 4a49 ldr r2, [pc, #292] ; (8004934 ) + 800480e: 4293 cmp r3, r2 + 8004810: d013 beq.n 800483a + 8004812: 687b ldr r3, [r7, #4] + 8004814: 4a48 ldr r2, [pc, #288] ; (8004938 ) + 8004816: 4293 cmp r3, r2 + 8004818: d00d beq.n 8004836 + 800481a: 687b ldr r3, [r7, #4] + 800481c: 4a47 ldr r2, [pc, #284] ; (800493c ) + 800481e: 4293 cmp r3, r2 + 8004820: d007 beq.n 8004832 + 8004822: 687b ldr r3, [r7, #4] + 8004824: 4a46 ldr r2, [pc, #280] ; (8004940 ) + 8004826: 4293 cmp r3, r2 + 8004828: d101 bne.n 800482e + 800482a: 2305 movs r3, #5 + 800482c: e00a b.n 8004844 + 800482e: 2306 movs r3, #6 + 8004830: e008 b.n 8004844 + 8004832: 2304 movs r3, #4 + 8004834: e006 b.n 8004844 + 8004836: 2303 movs r3, #3 + 8004838: e004 b.n 8004844 + 800483a: 2302 movs r3, #2 + 800483c: e002 b.n 8004844 + 800483e: 2301 movs r3, #1 + 8004840: e000 b.n 8004844 + 8004842: 2300 movs r3, #0 + 8004844: 697a ldr r2, [r7, #20] + 8004846: 2103 movs r1, #3 + 8004848: 400a ands r2, r1 + 800484a: 0092 lsls r2, r2, #2 + 800484c: 4093 lsls r3, r2 + 800484e: 693a ldr r2, [r7, #16] + 8004850: 4313 orrs r3, r2 + 8004852: 613b str r3, [r7, #16] SYSCFG->EXTICR[position >> 2U] = temp; - 8004818: 4935 ldr r1, [pc, #212] ; (80048f0 ) - 800481a: 697b ldr r3, [r7, #20] - 800481c: 089b lsrs r3, r3, #2 - 800481e: 3302 adds r3, #2 - 8004820: 009b lsls r3, r3, #2 - 8004822: 693a ldr r2, [r7, #16] - 8004824: 505a str r2, [r3, r1] + 8004854: 4935 ldr r1, [pc, #212] ; (800492c ) + 8004856: 697b ldr r3, [r7, #20] + 8004858: 089b lsrs r3, r3, #2 + 800485a: 3302 adds r3, #2 + 800485c: 009b lsls r3, r3, #2 + 800485e: 693a ldr r2, [r7, #16] + 8004860: 505a str r2, [r3, r1] /* Clear EXTI line configuration */ temp = EXTI->IMR; - 8004826: 4b38 ldr r3, [pc, #224] ; (8004908 ) - 8004828: 681b ldr r3, [r3, #0] - 800482a: 613b str r3, [r7, #16] + 8004862: 4b38 ldr r3, [pc, #224] ; (8004944 ) + 8004864: 681b ldr r3, [r3, #0] + 8004866: 613b str r3, [r7, #16] temp &= ~((uint32_t)iocurrent); - 800482c: 68fb ldr r3, [r7, #12] - 800482e: 43da mvns r2, r3 - 8004830: 693b ldr r3, [r7, #16] - 8004832: 4013 ands r3, r2 - 8004834: 613b str r3, [r7, #16] + 8004868: 68fb ldr r3, [r7, #12] + 800486a: 43da mvns r2, r3 + 800486c: 693b ldr r3, [r7, #16] + 800486e: 4013 ands r3, r2 + 8004870: 613b str r3, [r7, #16] if ((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT) - 8004836: 683b ldr r3, [r7, #0] - 8004838: 685a ldr r2, [r3, #4] - 800483a: 2380 movs r3, #128 ; 0x80 - 800483c: 025b lsls r3, r3, #9 - 800483e: 4013 ands r3, r2 - 8004840: d003 beq.n 800484a + 8004872: 683b ldr r3, [r7, #0] + 8004874: 685a ldr r2, [r3, #4] + 8004876: 2380 movs r3, #128 ; 0x80 + 8004878: 025b lsls r3, r3, #9 + 800487a: 4013 ands r3, r2 + 800487c: d003 beq.n 8004886 { temp |= iocurrent; - 8004842: 693a ldr r2, [r7, #16] - 8004844: 68fb ldr r3, [r7, #12] - 8004846: 4313 orrs r3, r2 - 8004848: 613b str r3, [r7, #16] + 800487e: 693a ldr r2, [r7, #16] + 8004880: 68fb ldr r3, [r7, #12] + 8004882: 4313 orrs r3, r2 + 8004884: 613b str r3, [r7, #16] } EXTI->IMR = temp; - 800484a: 4b2f ldr r3, [pc, #188] ; (8004908 ) - 800484c: 693a ldr r2, [r7, #16] - 800484e: 601a str r2, [r3, #0] + 8004886: 4b2f ldr r3, [pc, #188] ; (8004944 ) + 8004888: 693a ldr r2, [r7, #16] + 800488a: 601a str r2, [r3, #0] temp = EXTI->EMR; - 8004850: 4b2d ldr r3, [pc, #180] ; (8004908 ) - 8004852: 685b ldr r3, [r3, #4] - 8004854: 613b str r3, [r7, #16] + 800488c: 4b2d ldr r3, [pc, #180] ; (8004944 ) + 800488e: 685b ldr r3, [r3, #4] + 8004890: 613b str r3, [r7, #16] temp &= ~((uint32_t)iocurrent); - 8004856: 68fb ldr r3, [r7, #12] - 8004858: 43da mvns r2, r3 - 800485a: 693b ldr r3, [r7, #16] - 800485c: 4013 ands r3, r2 - 800485e: 613b str r3, [r7, #16] + 8004892: 68fb ldr r3, [r7, #12] + 8004894: 43da mvns r2, r3 + 8004896: 693b ldr r3, [r7, #16] + 8004898: 4013 ands r3, r2 + 800489a: 613b str r3, [r7, #16] if ((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT) - 8004860: 683b ldr r3, [r7, #0] - 8004862: 685a ldr r2, [r3, #4] - 8004864: 2380 movs r3, #128 ; 0x80 - 8004866: 029b lsls r3, r3, #10 - 8004868: 4013 ands r3, r2 - 800486a: d003 beq.n 8004874 + 800489c: 683b ldr r3, [r7, #0] + 800489e: 685a ldr r2, [r3, #4] + 80048a0: 2380 movs r3, #128 ; 0x80 + 80048a2: 029b lsls r3, r3, #10 + 80048a4: 4013 ands r3, r2 + 80048a6: d003 beq.n 80048b0 { temp |= iocurrent; - 800486c: 693a ldr r2, [r7, #16] - 800486e: 68fb ldr r3, [r7, #12] - 8004870: 4313 orrs r3, r2 - 8004872: 613b str r3, [r7, #16] + 80048a8: 693a ldr r2, [r7, #16] + 80048aa: 68fb ldr r3, [r7, #12] + 80048ac: 4313 orrs r3, r2 + 80048ae: 613b str r3, [r7, #16] } EXTI->EMR = temp; - 8004874: 4b24 ldr r3, [pc, #144] ; (8004908 ) - 8004876: 693a ldr r2, [r7, #16] - 8004878: 605a str r2, [r3, #4] + 80048b0: 4b24 ldr r3, [pc, #144] ; (8004944 ) + 80048b2: 693a ldr r2, [r7, #16] + 80048b4: 605a str r2, [r3, #4] /* Clear Rising Falling edge configuration */ temp = EXTI->RTSR; - 800487a: 4b23 ldr r3, [pc, #140] ; (8004908 ) - 800487c: 689b ldr r3, [r3, #8] - 800487e: 613b str r3, [r7, #16] + 80048b6: 4b23 ldr r3, [pc, #140] ; (8004944 ) + 80048b8: 689b ldr r3, [r3, #8] + 80048ba: 613b str r3, [r7, #16] temp &= ~((uint32_t)iocurrent); - 8004880: 68fb ldr r3, [r7, #12] - 8004882: 43da mvns r2, r3 - 8004884: 693b ldr r3, [r7, #16] - 8004886: 4013 ands r3, r2 - 8004888: 613b str r3, [r7, #16] + 80048bc: 68fb ldr r3, [r7, #12] + 80048be: 43da mvns r2, r3 + 80048c0: 693b ldr r3, [r7, #16] + 80048c2: 4013 ands r3, r2 + 80048c4: 613b str r3, [r7, #16] if ((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE) - 800488a: 683b ldr r3, [r7, #0] - 800488c: 685a ldr r2, [r3, #4] - 800488e: 2380 movs r3, #128 ; 0x80 - 8004890: 035b lsls r3, r3, #13 - 8004892: 4013 ands r3, r2 - 8004894: d003 beq.n 800489e + 80048c6: 683b ldr r3, [r7, #0] + 80048c8: 685a ldr r2, [r3, #4] + 80048ca: 2380 movs r3, #128 ; 0x80 + 80048cc: 035b lsls r3, r3, #13 + 80048ce: 4013 ands r3, r2 + 80048d0: d003 beq.n 80048da { temp |= iocurrent; - 8004896: 693a ldr r2, [r7, #16] - 8004898: 68fb ldr r3, [r7, #12] - 800489a: 4313 orrs r3, r2 - 800489c: 613b str r3, [r7, #16] + 80048d2: 693a ldr r2, [r7, #16] + 80048d4: 68fb ldr r3, [r7, #12] + 80048d6: 4313 orrs r3, r2 + 80048d8: 613b str r3, [r7, #16] } EXTI->RTSR = temp; - 800489e: 4b1a ldr r3, [pc, #104] ; (8004908 ) - 80048a0: 693a ldr r2, [r7, #16] - 80048a2: 609a str r2, [r3, #8] + 80048da: 4b1a ldr r3, [pc, #104] ; (8004944 ) + 80048dc: 693a ldr r2, [r7, #16] + 80048de: 609a str r2, [r3, #8] temp = EXTI->FTSR; - 80048a4: 4b18 ldr r3, [pc, #96] ; (8004908 ) - 80048a6: 68db ldr r3, [r3, #12] - 80048a8: 613b str r3, [r7, #16] + 80048e0: 4b18 ldr r3, [pc, #96] ; (8004944 ) + 80048e2: 68db ldr r3, [r3, #12] + 80048e4: 613b str r3, [r7, #16] temp &= ~((uint32_t)iocurrent); - 80048aa: 68fb ldr r3, [r7, #12] - 80048ac: 43da mvns r2, r3 - 80048ae: 693b ldr r3, [r7, #16] - 80048b0: 4013 ands r3, r2 - 80048b2: 613b str r3, [r7, #16] + 80048e6: 68fb ldr r3, [r7, #12] + 80048e8: 43da mvns r2, r3 + 80048ea: 693b ldr r3, [r7, #16] + 80048ec: 4013 ands r3, r2 + 80048ee: 613b str r3, [r7, #16] if ((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE) - 80048b4: 683b ldr r3, [r7, #0] - 80048b6: 685a ldr r2, [r3, #4] - 80048b8: 2380 movs r3, #128 ; 0x80 - 80048ba: 039b lsls r3, r3, #14 - 80048bc: 4013 ands r3, r2 - 80048be: d003 beq.n 80048c8 + 80048f0: 683b ldr r3, [r7, #0] + 80048f2: 685a ldr r2, [r3, #4] + 80048f4: 2380 movs r3, #128 ; 0x80 + 80048f6: 039b lsls r3, r3, #14 + 80048f8: 4013 ands r3, r2 + 80048fa: d003 beq.n 8004904 { temp |= iocurrent; - 80048c0: 693a ldr r2, [r7, #16] - 80048c2: 68fb ldr r3, [r7, #12] - 80048c4: 4313 orrs r3, r2 - 80048c6: 613b str r3, [r7, #16] + 80048fc: 693a ldr r2, [r7, #16] + 80048fe: 68fb ldr r3, [r7, #12] + 8004900: 4313 orrs r3, r2 + 8004902: 613b str r3, [r7, #16] } EXTI->FTSR = temp; - 80048c8: 4b0f ldr r3, [pc, #60] ; (8004908 ) - 80048ca: 693a ldr r2, [r7, #16] - 80048cc: 60da str r2, [r3, #12] + 8004904: 4b0f ldr r3, [pc, #60] ; (8004944 ) + 8004906: 693a ldr r2, [r7, #16] + 8004908: 60da str r2, [r3, #12] } } position++; - 80048ce: 697b ldr r3, [r7, #20] - 80048d0: 3301 adds r3, #1 - 80048d2: 617b str r3, [r7, #20] + 800490a: 697b ldr r3, [r7, #20] + 800490c: 3301 adds r3, #1 + 800490e: 617b str r3, [r7, #20] while (((GPIO_Init->Pin) >> position) != 0) - 80048d4: 683b ldr r3, [r7, #0] - 80048d6: 681a ldr r2, [r3, #0] - 80048d8: 697b ldr r3, [r7, #20] - 80048da: 40da lsrs r2, r3 - 80048dc: 1e13 subs r3, r2, #0 - 80048de: d000 beq.n 80048e2 - 80048e0: e6a2 b.n 8004628 + 8004910: 683b ldr r3, [r7, #0] + 8004912: 681a ldr r2, [r3, #0] + 8004914: 697b ldr r3, [r7, #20] + 8004916: 40da lsrs r2, r3 + 8004918: 1e13 subs r3, r2, #0 + 800491a: d000 beq.n 800491e + 800491c: e6a2 b.n 8004664 } } - 80048e2: 46c0 nop ; (mov r8, r8) - 80048e4: 46bd mov sp, r7 - 80048e6: b006 add sp, #24 - 80048e8: bd80 pop {r7, pc} - 80048ea: 46c0 nop ; (mov r8, r8) - 80048ec: 40021000 .word 0x40021000 - 80048f0: 40010000 .word 0x40010000 - 80048f4: 50000400 .word 0x50000400 - 80048f8: 50000800 .word 0x50000800 - 80048fc: 50000c00 .word 0x50000c00 - 8004900: 50001000 .word 0x50001000 - 8004904: 50001c00 .word 0x50001c00 - 8004908: 40010400 .word 0x40010400 + 800491e: 46c0 nop ; (mov r8, r8) + 8004920: 46bd mov sp, r7 + 8004922: b006 add sp, #24 + 8004924: bd80 pop {r7, pc} + 8004926: 46c0 nop ; (mov r8, r8) + 8004928: 40021000 .word 0x40021000 + 800492c: 40010000 .word 0x40010000 + 8004930: 50000400 .word 0x50000400 + 8004934: 50000800 .word 0x50000800 + 8004938: 50000c00 .word 0x50000c00 + 800493c: 50001000 .word 0x50001000 + 8004940: 50001c00 .word 0x50001c00 + 8004944: 40010400 .word 0x40010400 -0800490c : +08004948 : * This parameter can be one of GPIO_PIN_x where x can be (0..15). * All port bits are not necessarily available on all GPIOs. * @retval None */ void HAL_GPIO_DeInit(GPIO_TypeDef *GPIOx, uint32_t GPIO_Pin) { - 800490c: b580 push {r7, lr} - 800490e: b086 sub sp, #24 - 8004910: af00 add r7, sp, #0 - 8004912: 6078 str r0, [r7, #4] - 8004914: 6039 str r1, [r7, #0] + 8004948: b580 push {r7, lr} + 800494a: b086 sub sp, #24 + 800494c: af00 add r7, sp, #0 + 800494e: 6078 str r0, [r7, #4] + 8004950: 6039 str r1, [r7, #0] uint32_t position = 0x00U; - 8004916: 2300 movs r3, #0 - 8004918: 617b str r3, [r7, #20] + 8004952: 2300 movs r3, #0 + 8004954: 617b str r3, [r7, #20] uint32_t iocurrent = 0x00U; - 800491a: 2300 movs r3, #0 - 800491c: 613b str r3, [r7, #16] + 8004956: 2300 movs r3, #0 + 8004958: 613b str r3, [r7, #16] uint32_t tmp = 0x00U; - 800491e: 2300 movs r3, #0 - 8004920: 60fb str r3, [r7, #12] + 800495a: 2300 movs r3, #0 + 800495c: 60fb str r3, [r7, #12] /* Check the parameters */ assert_param(IS_GPIO_PIN_AVAILABLE(GPIOx, GPIO_Pin)); /* Configure the port pins */ while ((GPIO_Pin >> position) != 0) - 8004922: e0be b.n 8004aa2 + 800495e: e0be b.n 8004ade { /* Get the IO position */ iocurrent = (GPIO_Pin) & (1U << position); - 8004924: 2201 movs r2, #1 - 8004926: 697b ldr r3, [r7, #20] - 8004928: 409a lsls r2, r3 - 800492a: 0013 movs r3, r2 - 800492c: 683a ldr r2, [r7, #0] - 800492e: 4013 ands r3, r2 - 8004930: 613b str r3, [r7, #16] + 8004960: 2201 movs r2, #1 + 8004962: 697b ldr r3, [r7, #20] + 8004964: 409a lsls r2, r3 + 8004966: 0013 movs r3, r2 + 8004968: 683a ldr r2, [r7, #0] + 800496a: 4013 ands r3, r2 + 800496c: 613b str r3, [r7, #16] if (iocurrent) - 8004932: 693b ldr r3, [r7, #16] - 8004934: 2b00 cmp r3, #0 - 8004936: d100 bne.n 800493a - 8004938: e0b0 b.n 8004a9c + 800496e: 693b ldr r3, [r7, #16] + 8004970: 2b00 cmp r3, #0 + 8004972: d100 bne.n 8004976 + 8004974: e0b0 b.n 8004ad8 { /*------------------------- EXTI Mode Configuration --------------------*/ /* Clear the External Interrupt or Event for the current IO */ tmp = SYSCFG->EXTICR[position >> 2U]; - 800493a: 4a5f ldr r2, [pc, #380] ; (8004ab8 ) - 800493c: 697b ldr r3, [r7, #20] - 800493e: 089b lsrs r3, r3, #2 - 8004940: 3302 adds r3, #2 - 8004942: 009b lsls r3, r3, #2 - 8004944: 589b ldr r3, [r3, r2] - 8004946: 60fb str r3, [r7, #12] + 8004976: 4a5f ldr r2, [pc, #380] ; (8004af4 ) + 8004978: 697b ldr r3, [r7, #20] + 800497a: 089b lsrs r3, r3, #2 + 800497c: 3302 adds r3, #2 + 800497e: 009b lsls r3, r3, #2 + 8004980: 589b ldr r3, [r3, r2] + 8004982: 60fb str r3, [r7, #12] tmp &= ((0x0FUL) << (4U * (position & 0x03U))); - 8004948: 697b ldr r3, [r7, #20] - 800494a: 2203 movs r2, #3 - 800494c: 4013 ands r3, r2 - 800494e: 009b lsls r3, r3, #2 - 8004950: 220f movs r2, #15 - 8004952: 409a lsls r2, r3 - 8004954: 68fb ldr r3, [r7, #12] - 8004956: 4013 ands r3, r2 - 8004958: 60fb str r3, [r7, #12] + 8004984: 697b ldr r3, [r7, #20] + 8004986: 2203 movs r2, #3 + 8004988: 4013 ands r3, r2 + 800498a: 009b lsls r3, r3, #2 + 800498c: 220f movs r2, #15 + 800498e: 409a lsls r2, r3 + 8004990: 68fb ldr r3, [r7, #12] + 8004992: 4013 ands r3, r2 + 8004994: 60fb str r3, [r7, #12] if (tmp == (GPIO_GET_INDEX(GPIOx) << (4U * (position & 0x03U)))) - 800495a: 687a ldr r2, [r7, #4] - 800495c: 23a0 movs r3, #160 ; 0xa0 - 800495e: 05db lsls r3, r3, #23 - 8004960: 429a cmp r2, r3 - 8004962: d01f beq.n 80049a4 - 8004964: 687b ldr r3, [r7, #4] - 8004966: 4a55 ldr r2, [pc, #340] ; (8004abc ) - 8004968: 4293 cmp r3, r2 - 800496a: d019 beq.n 80049a0 - 800496c: 687b ldr r3, [r7, #4] - 800496e: 4a54 ldr r2, [pc, #336] ; (8004ac0 ) - 8004970: 4293 cmp r3, r2 - 8004972: d013 beq.n 800499c - 8004974: 687b ldr r3, [r7, #4] - 8004976: 4a53 ldr r2, [pc, #332] ; (8004ac4 ) - 8004978: 4293 cmp r3, r2 - 800497a: d00d beq.n 8004998 - 800497c: 687b ldr r3, [r7, #4] - 800497e: 4a52 ldr r2, [pc, #328] ; (8004ac8 ) - 8004980: 4293 cmp r3, r2 - 8004982: d007 beq.n 8004994 - 8004984: 687b ldr r3, [r7, #4] - 8004986: 4a51 ldr r2, [pc, #324] ; (8004acc ) - 8004988: 4293 cmp r3, r2 - 800498a: d101 bne.n 8004990 - 800498c: 2305 movs r3, #5 - 800498e: e00a b.n 80049a6 - 8004990: 2306 movs r3, #6 - 8004992: e008 b.n 80049a6 - 8004994: 2304 movs r3, #4 - 8004996: e006 b.n 80049a6 - 8004998: 2303 movs r3, #3 - 800499a: e004 b.n 80049a6 - 800499c: 2302 movs r3, #2 - 800499e: e002 b.n 80049a6 - 80049a0: 2301 movs r3, #1 - 80049a2: e000 b.n 80049a6 - 80049a4: 2300 movs r3, #0 - 80049a6: 697a ldr r2, [r7, #20] - 80049a8: 2103 movs r1, #3 - 80049aa: 400a ands r2, r1 - 80049ac: 0092 lsls r2, r2, #2 - 80049ae: 4093 lsls r3, r2 - 80049b0: 001a movs r2, r3 - 80049b2: 68fb ldr r3, [r7, #12] - 80049b4: 429a cmp r2, r3 - 80049b6: d132 bne.n 8004a1e + 8004996: 687a ldr r2, [r7, #4] + 8004998: 23a0 movs r3, #160 ; 0xa0 + 800499a: 05db lsls r3, r3, #23 + 800499c: 429a cmp r2, r3 + 800499e: d01f beq.n 80049e0 + 80049a0: 687b ldr r3, [r7, #4] + 80049a2: 4a55 ldr r2, [pc, #340] ; (8004af8 ) + 80049a4: 4293 cmp r3, r2 + 80049a6: d019 beq.n 80049dc + 80049a8: 687b ldr r3, [r7, #4] + 80049aa: 4a54 ldr r2, [pc, #336] ; (8004afc ) + 80049ac: 4293 cmp r3, r2 + 80049ae: d013 beq.n 80049d8 + 80049b0: 687b ldr r3, [r7, #4] + 80049b2: 4a53 ldr r2, [pc, #332] ; (8004b00 ) + 80049b4: 4293 cmp r3, r2 + 80049b6: d00d beq.n 80049d4 + 80049b8: 687b ldr r3, [r7, #4] + 80049ba: 4a52 ldr r2, [pc, #328] ; (8004b04 ) + 80049bc: 4293 cmp r3, r2 + 80049be: d007 beq.n 80049d0 + 80049c0: 687b ldr r3, [r7, #4] + 80049c2: 4a51 ldr r2, [pc, #324] ; (8004b08 ) + 80049c4: 4293 cmp r3, r2 + 80049c6: d101 bne.n 80049cc + 80049c8: 2305 movs r3, #5 + 80049ca: e00a b.n 80049e2 + 80049cc: 2306 movs r3, #6 + 80049ce: e008 b.n 80049e2 + 80049d0: 2304 movs r3, #4 + 80049d2: e006 b.n 80049e2 + 80049d4: 2303 movs r3, #3 + 80049d6: e004 b.n 80049e2 + 80049d8: 2302 movs r3, #2 + 80049da: e002 b.n 80049e2 + 80049dc: 2301 movs r3, #1 + 80049de: e000 b.n 80049e2 + 80049e0: 2300 movs r3, #0 + 80049e2: 697a ldr r2, [r7, #20] + 80049e4: 2103 movs r1, #3 + 80049e6: 400a ands r2, r1 + 80049e8: 0092 lsls r2, r2, #2 + 80049ea: 4093 lsls r3, r2 + 80049ec: 001a movs r2, r3 + 80049ee: 68fb ldr r3, [r7, #12] + 80049f0: 429a cmp r2, r3 + 80049f2: d132 bne.n 8004a5a { /* Clear EXTI line configuration */ EXTI->IMR &= ~((uint32_t)iocurrent); - 80049b8: 4b45 ldr r3, [pc, #276] ; (8004ad0 ) - 80049ba: 4a45 ldr r2, [pc, #276] ; (8004ad0 ) - 80049bc: 6812 ldr r2, [r2, #0] - 80049be: 6939 ldr r1, [r7, #16] - 80049c0: 43c9 mvns r1, r1 - 80049c2: 400a ands r2, r1 - 80049c4: 601a str r2, [r3, #0] + 80049f4: 4b45 ldr r3, [pc, #276] ; (8004b0c ) + 80049f6: 4a45 ldr r2, [pc, #276] ; (8004b0c ) + 80049f8: 6812 ldr r2, [r2, #0] + 80049fa: 6939 ldr r1, [r7, #16] + 80049fc: 43c9 mvns r1, r1 + 80049fe: 400a ands r2, r1 + 8004a00: 601a str r2, [r3, #0] EXTI->EMR &= ~((uint32_t)iocurrent); - 80049c6: 4b42 ldr r3, [pc, #264] ; (8004ad0 ) - 80049c8: 4a41 ldr r2, [pc, #260] ; (8004ad0 ) - 80049ca: 6852 ldr r2, [r2, #4] - 80049cc: 6939 ldr r1, [r7, #16] - 80049ce: 43c9 mvns r1, r1 - 80049d0: 400a ands r2, r1 - 80049d2: 605a str r2, [r3, #4] + 8004a02: 4b42 ldr r3, [pc, #264] ; (8004b0c ) + 8004a04: 4a41 ldr r2, [pc, #260] ; (8004b0c ) + 8004a06: 6852 ldr r2, [r2, #4] + 8004a08: 6939 ldr r1, [r7, #16] + 8004a0a: 43c9 mvns r1, r1 + 8004a0c: 400a ands r2, r1 + 8004a0e: 605a str r2, [r3, #4] /* Clear Rising Falling edge configuration */ EXTI->RTSR &= ~((uint32_t)iocurrent); - 80049d4: 4b3e ldr r3, [pc, #248] ; (8004ad0 ) - 80049d6: 4a3e ldr r2, [pc, #248] ; (8004ad0 ) - 80049d8: 6892 ldr r2, [r2, #8] - 80049da: 6939 ldr r1, [r7, #16] - 80049dc: 43c9 mvns r1, r1 - 80049de: 400a ands r2, r1 - 80049e0: 609a str r2, [r3, #8] + 8004a10: 4b3e ldr r3, [pc, #248] ; (8004b0c ) + 8004a12: 4a3e ldr r2, [pc, #248] ; (8004b0c ) + 8004a14: 6892 ldr r2, [r2, #8] + 8004a16: 6939 ldr r1, [r7, #16] + 8004a18: 43c9 mvns r1, r1 + 8004a1a: 400a ands r2, r1 + 8004a1c: 609a str r2, [r3, #8] EXTI->FTSR &= ~((uint32_t)iocurrent); - 80049e2: 4b3b ldr r3, [pc, #236] ; (8004ad0 ) - 80049e4: 4a3a ldr r2, [pc, #232] ; (8004ad0 ) - 80049e6: 68d2 ldr r2, [r2, #12] - 80049e8: 6939 ldr r1, [r7, #16] - 80049ea: 43c9 mvns r1, r1 - 80049ec: 400a ands r2, r1 - 80049ee: 60da str r2, [r3, #12] + 8004a1e: 4b3b ldr r3, [pc, #236] ; (8004b0c ) + 8004a20: 4a3a ldr r2, [pc, #232] ; (8004b0c ) + 8004a22: 68d2 ldr r2, [r2, #12] + 8004a24: 6939 ldr r1, [r7, #16] + 8004a26: 43c9 mvns r1, r1 + 8004a28: 400a ands r2, r1 + 8004a2a: 60da str r2, [r3, #12] tmp = (0x0FUL) << (4U * (position & 0x03U)); - 80049f0: 697b ldr r3, [r7, #20] - 80049f2: 2203 movs r2, #3 - 80049f4: 4013 ands r3, r2 - 80049f6: 009b lsls r3, r3, #2 - 80049f8: 220f movs r2, #15 - 80049fa: 409a lsls r2, r3 - 80049fc: 0013 movs r3, r2 - 80049fe: 60fb str r3, [r7, #12] + 8004a2c: 697b ldr r3, [r7, #20] + 8004a2e: 2203 movs r2, #3 + 8004a30: 4013 ands r3, r2 + 8004a32: 009b lsls r3, r3, #2 + 8004a34: 220f movs r2, #15 + 8004a36: 409a lsls r2, r3 + 8004a38: 0013 movs r3, r2 + 8004a3a: 60fb str r3, [r7, #12] SYSCFG->EXTICR[position >> 2U] &= ~tmp; - 8004a00: 482d ldr r0, [pc, #180] ; (8004ab8 ) - 8004a02: 697b ldr r3, [r7, #20] - 8004a04: 089b lsrs r3, r3, #2 - 8004a06: 492c ldr r1, [pc, #176] ; (8004ab8 ) - 8004a08: 697a ldr r2, [r7, #20] - 8004a0a: 0892 lsrs r2, r2, #2 - 8004a0c: 3202 adds r2, #2 - 8004a0e: 0092 lsls r2, r2, #2 - 8004a10: 5852 ldr r2, [r2, r1] - 8004a12: 68f9 ldr r1, [r7, #12] - 8004a14: 43c9 mvns r1, r1 - 8004a16: 400a ands r2, r1 - 8004a18: 3302 adds r3, #2 - 8004a1a: 009b lsls r3, r3, #2 - 8004a1c: 501a str r2, [r3, r0] + 8004a3c: 482d ldr r0, [pc, #180] ; (8004af4 ) + 8004a3e: 697b ldr r3, [r7, #20] + 8004a40: 089b lsrs r3, r3, #2 + 8004a42: 492c ldr r1, [pc, #176] ; (8004af4 ) + 8004a44: 697a ldr r2, [r7, #20] + 8004a46: 0892 lsrs r2, r2, #2 + 8004a48: 3202 adds r2, #2 + 8004a4a: 0092 lsls r2, r2, #2 + 8004a4c: 5852 ldr r2, [r2, r1] + 8004a4e: 68f9 ldr r1, [r7, #12] + 8004a50: 43c9 mvns r1, r1 + 8004a52: 400a ands r2, r1 + 8004a54: 3302 adds r3, #2 + 8004a56: 009b lsls r3, r3, #2 + 8004a58: 501a str r2, [r3, r0] } /*------------------------- GPIO Mode Configuration --------------------*/ /* Configure IO Direction in Input Floting Mode */ GPIOx->MODER |= (GPIO_MODER_MODE0 << (position * 2U)); - 8004a1e: 687b ldr r3, [r7, #4] - 8004a20: 681a ldr r2, [r3, #0] - 8004a22: 697b ldr r3, [r7, #20] - 8004a24: 005b lsls r3, r3, #1 - 8004a26: 2103 movs r1, #3 - 8004a28: 4099 lsls r1, r3 - 8004a2a: 000b movs r3, r1 - 8004a2c: 431a orrs r2, r3 - 8004a2e: 687b ldr r3, [r7, #4] - 8004a30: 601a str r2, [r3, #0] + 8004a5a: 687b ldr r3, [r7, #4] + 8004a5c: 681a ldr r2, [r3, #0] + 8004a5e: 697b ldr r3, [r7, #20] + 8004a60: 005b lsls r3, r3, #1 + 8004a62: 2103 movs r1, #3 + 8004a64: 4099 lsls r1, r3 + 8004a66: 000b movs r3, r1 + 8004a68: 431a orrs r2, r3 + 8004a6a: 687b ldr r3, [r7, #4] + 8004a6c: 601a str r2, [r3, #0] /* Configure the default Alternate Function in current IO */ GPIOx->AFR[position >> 3U] &= ~(0xFUL << ((uint32_t)(position & 0x07UL) * 4U)); - 8004a32: 697b ldr r3, [r7, #20] - 8004a34: 08da lsrs r2, r3, #3 - 8004a36: 697b ldr r3, [r7, #20] - 8004a38: 08d9 lsrs r1, r3, #3 - 8004a3a: 687b ldr r3, [r7, #4] - 8004a3c: 3108 adds r1, #8 - 8004a3e: 0089 lsls r1, r1, #2 - 8004a40: 58cb ldr r3, [r1, r3] - 8004a42: 6979 ldr r1, [r7, #20] - 8004a44: 2007 movs r0, #7 - 8004a46: 4001 ands r1, r0 - 8004a48: 0089 lsls r1, r1, #2 - 8004a4a: 200f movs r0, #15 - 8004a4c: 4088 lsls r0, r1 - 8004a4e: 0001 movs r1, r0 - 8004a50: 43c9 mvns r1, r1 - 8004a52: 4019 ands r1, r3 - 8004a54: 687b ldr r3, [r7, #4] - 8004a56: 3208 adds r2, #8 - 8004a58: 0092 lsls r2, r2, #2 - 8004a5a: 50d1 str r1, [r2, r3] + 8004a6e: 697b ldr r3, [r7, #20] + 8004a70: 08da lsrs r2, r3, #3 + 8004a72: 697b ldr r3, [r7, #20] + 8004a74: 08d9 lsrs r1, r3, #3 + 8004a76: 687b ldr r3, [r7, #4] + 8004a78: 3108 adds r1, #8 + 8004a7a: 0089 lsls r1, r1, #2 + 8004a7c: 58cb ldr r3, [r1, r3] + 8004a7e: 6979 ldr r1, [r7, #20] + 8004a80: 2007 movs r0, #7 + 8004a82: 4001 ands r1, r0 + 8004a84: 0089 lsls r1, r1, #2 + 8004a86: 200f movs r0, #15 + 8004a88: 4088 lsls r0, r1 + 8004a8a: 0001 movs r1, r0 + 8004a8c: 43c9 mvns r1, r1 + 8004a8e: 4019 ands r1, r3 + 8004a90: 687b ldr r3, [r7, #4] + 8004a92: 3208 adds r2, #8 + 8004a94: 0092 lsls r2, r2, #2 + 8004a96: 50d1 str r1, [r2, r3] /* Deactivate the Pull-up oand Pull-down resistor for the current IO */ GPIOx->PUPDR &= ~(GPIO_PUPDR_PUPD0 << (position * 2U)); - 8004a5c: 687b ldr r3, [r7, #4] - 8004a5e: 68db ldr r3, [r3, #12] - 8004a60: 697a ldr r2, [r7, #20] - 8004a62: 0052 lsls r2, r2, #1 - 8004a64: 2103 movs r1, #3 - 8004a66: 4091 lsls r1, r2 - 8004a68: 000a movs r2, r1 - 8004a6a: 43d2 mvns r2, r2 - 8004a6c: 401a ands r2, r3 - 8004a6e: 687b ldr r3, [r7, #4] - 8004a70: 60da str r2, [r3, #12] + 8004a98: 687b ldr r3, [r7, #4] + 8004a9a: 68db ldr r3, [r3, #12] + 8004a9c: 697a ldr r2, [r7, #20] + 8004a9e: 0052 lsls r2, r2, #1 + 8004aa0: 2103 movs r1, #3 + 8004aa2: 4091 lsls r1, r2 + 8004aa4: 000a movs r2, r1 + 8004aa6: 43d2 mvns r2, r2 + 8004aa8: 401a ands r2, r3 + 8004aaa: 687b ldr r3, [r7, #4] + 8004aac: 60da str r2, [r3, #12] /* Configure the default value IO Output Type */ GPIOx->OTYPER &= ~(GPIO_OTYPER_OT_0 << position); - 8004a72: 687b ldr r3, [r7, #4] - 8004a74: 685b ldr r3, [r3, #4] - 8004a76: 2101 movs r1, #1 - 8004a78: 697a ldr r2, [r7, #20] - 8004a7a: 4091 lsls r1, r2 - 8004a7c: 000a movs r2, r1 - 8004a7e: 43d2 mvns r2, r2 - 8004a80: 401a ands r2, r3 - 8004a82: 687b ldr r3, [r7, #4] - 8004a84: 605a str r2, [r3, #4] + 8004aae: 687b ldr r3, [r7, #4] + 8004ab0: 685b ldr r3, [r3, #4] + 8004ab2: 2101 movs r1, #1 + 8004ab4: 697a ldr r2, [r7, #20] + 8004ab6: 4091 lsls r1, r2 + 8004ab8: 000a movs r2, r1 + 8004aba: 43d2 mvns r2, r2 + 8004abc: 401a ands r2, r3 + 8004abe: 687b ldr r3, [r7, #4] + 8004ac0: 605a str r2, [r3, #4] /* Configure the default value for IO Speed */ GPIOx->OSPEEDR &= ~(GPIO_OSPEEDER_OSPEED0 << (position * 2U)); - 8004a86: 687b ldr r3, [r7, #4] - 8004a88: 689b ldr r3, [r3, #8] - 8004a8a: 697a ldr r2, [r7, #20] - 8004a8c: 0052 lsls r2, r2, #1 - 8004a8e: 2103 movs r1, #3 - 8004a90: 4091 lsls r1, r2 - 8004a92: 000a movs r2, r1 - 8004a94: 43d2 mvns r2, r2 - 8004a96: 401a ands r2, r3 - 8004a98: 687b ldr r3, [r7, #4] - 8004a9a: 609a str r2, [r3, #8] + 8004ac2: 687b ldr r3, [r7, #4] + 8004ac4: 689b ldr r3, [r3, #8] + 8004ac6: 697a ldr r2, [r7, #20] + 8004ac8: 0052 lsls r2, r2, #1 + 8004aca: 2103 movs r1, #3 + 8004acc: 4091 lsls r1, r2 + 8004ace: 000a movs r2, r1 + 8004ad0: 43d2 mvns r2, r2 + 8004ad2: 401a ands r2, r3 + 8004ad4: 687b ldr r3, [r7, #4] + 8004ad6: 609a str r2, [r3, #8] } position++; - 8004a9c: 697b ldr r3, [r7, #20] - 8004a9e: 3301 adds r3, #1 - 8004aa0: 617b str r3, [r7, #20] + 8004ad8: 697b ldr r3, [r7, #20] + 8004ada: 3301 adds r3, #1 + 8004adc: 617b str r3, [r7, #20] while ((GPIO_Pin >> position) != 0) - 8004aa2: 683a ldr r2, [r7, #0] - 8004aa4: 697b ldr r3, [r7, #20] - 8004aa6: 40da lsrs r2, r3 - 8004aa8: 1e13 subs r3, r2, #0 - 8004aaa: d000 beq.n 8004aae - 8004aac: e73a b.n 8004924 + 8004ade: 683a ldr r2, [r7, #0] + 8004ae0: 697b ldr r3, [r7, #20] + 8004ae2: 40da lsrs r2, r3 + 8004ae4: 1e13 subs r3, r2, #0 + 8004ae6: d000 beq.n 8004aea + 8004ae8: e73a b.n 8004960 } } - 8004aae: 46c0 nop ; (mov r8, r8) - 8004ab0: 46bd mov sp, r7 - 8004ab2: b006 add sp, #24 - 8004ab4: bd80 pop {r7, pc} - 8004ab6: 46c0 nop ; (mov r8, r8) - 8004ab8: 40010000 .word 0x40010000 - 8004abc: 50000400 .word 0x50000400 - 8004ac0: 50000800 .word 0x50000800 - 8004ac4: 50000c00 .word 0x50000c00 - 8004ac8: 50001000 .word 0x50001000 - 8004acc: 50001c00 .word 0x50001c00 - 8004ad0: 40010400 .word 0x40010400 + 8004aea: 46c0 nop ; (mov r8, r8) + 8004aec: 46bd mov sp, r7 + 8004aee: b006 add sp, #24 + 8004af0: bd80 pop {r7, pc} + 8004af2: 46c0 nop ; (mov r8, r8) + 8004af4: 40010000 .word 0x40010000 + 8004af8: 50000400 .word 0x50000400 + 8004afc: 50000800 .word 0x50000800 + 8004b00: 50000c00 .word 0x50000c00 + 8004b04: 50001000 .word 0x50001000 + 8004b08: 50001c00 .word 0x50001c00 + 8004b0c: 40010400 .word 0x40010400 -08004ad4 : +08004b10 : * This parameter can be GPIO_PIN_x where x can be (0..15). * All port bits are not necessarily available on all GPIOs. * @retval The input port pin value. */ GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin) { - 8004ad4: b580 push {r7, lr} - 8004ad6: b084 sub sp, #16 - 8004ad8: af00 add r7, sp, #0 - 8004ada: 6078 str r0, [r7, #4] - 8004adc: 000a movs r2, r1 - 8004ade: 1cbb adds r3, r7, #2 - 8004ae0: 801a strh r2, [r3, #0] + 8004b10: b580 push {r7, lr} + 8004b12: b084 sub sp, #16 + 8004b14: af00 add r7, sp, #0 + 8004b16: 6078 str r0, [r7, #4] + 8004b18: 000a movs r2, r1 + 8004b1a: 1cbb adds r3, r7, #2 + 8004b1c: 801a strh r2, [r3, #0] GPIO_PinState bitstatus; /* Check the parameters */ assert_param(IS_GPIO_PIN_AVAILABLE(GPIOx, GPIO_Pin)); if ((GPIOx->IDR & GPIO_Pin) != (uint32_t)GPIO_PIN_RESET) - 8004ae2: 687b ldr r3, [r7, #4] - 8004ae4: 691b ldr r3, [r3, #16] - 8004ae6: 1cba adds r2, r7, #2 - 8004ae8: 8812 ldrh r2, [r2, #0] - 8004aea: 4013 ands r3, r2 - 8004aec: d004 beq.n 8004af8 + 8004b1e: 687b ldr r3, [r7, #4] + 8004b20: 691b ldr r3, [r3, #16] + 8004b22: 1cba adds r2, r7, #2 + 8004b24: 8812 ldrh r2, [r2, #0] + 8004b26: 4013 ands r3, r2 + 8004b28: d004 beq.n 8004b34 { bitstatus = GPIO_PIN_SET; - 8004aee: 230f movs r3, #15 - 8004af0: 18fb adds r3, r7, r3 - 8004af2: 2201 movs r2, #1 - 8004af4: 701a strb r2, [r3, #0] - 8004af6: e003 b.n 8004b00 + 8004b2a: 230f movs r3, #15 + 8004b2c: 18fb adds r3, r7, r3 + 8004b2e: 2201 movs r2, #1 + 8004b30: 701a strb r2, [r3, #0] + 8004b32: e003 b.n 8004b3c } else { bitstatus = GPIO_PIN_RESET; - 8004af8: 230f movs r3, #15 - 8004afa: 18fb adds r3, r7, r3 - 8004afc: 2200 movs r2, #0 - 8004afe: 701a strb r2, [r3, #0] + 8004b34: 230f movs r3, #15 + 8004b36: 18fb adds r3, r7, r3 + 8004b38: 2200 movs r2, #0 + 8004b3a: 701a strb r2, [r3, #0] } return bitstatus; - 8004b00: 230f movs r3, #15 - 8004b02: 18fb adds r3, r7, r3 - 8004b04: 781b ldrb r3, [r3, #0] + 8004b3c: 230f movs r3, #15 + 8004b3e: 18fb adds r3, r7, r3 + 8004b40: 781b ldrb r3, [r3, #0] } - 8004b06: 0018 movs r0, r3 - 8004b08: 46bd mov sp, r7 - 8004b0a: b004 add sp, #16 - 8004b0c: bd80 pop {r7, pc} + 8004b42: 0018 movs r0, r3 + 8004b44: 46bd mov sp, r7 + 8004b46: b004 add sp, #16 + 8004b48: bd80 pop {r7, pc} -08004b0e : +08004b4a : * GPIO_PIN_RESET: to clear the port pin * GPIO_PIN_SET: to set the port pin * @retval None */ void HAL_GPIO_WritePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState) { - 8004b0e: b580 push {r7, lr} - 8004b10: b082 sub sp, #8 - 8004b12: af00 add r7, sp, #0 - 8004b14: 6078 str r0, [r7, #4] - 8004b16: 0008 movs r0, r1 - 8004b18: 0011 movs r1, r2 - 8004b1a: 1cbb adds r3, r7, #2 - 8004b1c: 1c02 adds r2, r0, #0 - 8004b1e: 801a strh r2, [r3, #0] - 8004b20: 1c7b adds r3, r7, #1 - 8004b22: 1c0a adds r2, r1, #0 - 8004b24: 701a strb r2, [r3, #0] + 8004b4a: b580 push {r7, lr} + 8004b4c: b082 sub sp, #8 + 8004b4e: af00 add r7, sp, #0 + 8004b50: 6078 str r0, [r7, #4] + 8004b52: 0008 movs r0, r1 + 8004b54: 0011 movs r1, r2 + 8004b56: 1cbb adds r3, r7, #2 + 8004b58: 1c02 adds r2, r0, #0 + 8004b5a: 801a strh r2, [r3, #0] + 8004b5c: 1c7b adds r3, r7, #1 + 8004b5e: 1c0a adds r2, r1, #0 + 8004b60: 701a strb r2, [r3, #0] /* Check the parameters */ assert_param(IS_GPIO_PIN_AVAILABLE(GPIOx, GPIO_Pin)); assert_param(IS_GPIO_PIN_ACTION(PinState)); if (PinState != GPIO_PIN_RESET) - 8004b26: 1c7b adds r3, r7, #1 - 8004b28: 781b ldrb r3, [r3, #0] - 8004b2a: 2b00 cmp r3, #0 - 8004b2c: d004 beq.n 8004b38 + 8004b62: 1c7b adds r3, r7, #1 + 8004b64: 781b ldrb r3, [r3, #0] + 8004b66: 2b00 cmp r3, #0 + 8004b68: d004 beq.n 8004b74 { GPIOx->BSRR = GPIO_Pin; - 8004b2e: 1cbb adds r3, r7, #2 - 8004b30: 881a ldrh r2, [r3, #0] - 8004b32: 687b ldr r3, [r7, #4] - 8004b34: 619a str r2, [r3, #24] + 8004b6a: 1cbb adds r3, r7, #2 + 8004b6c: 881a ldrh r2, [r3, #0] + 8004b6e: 687b ldr r3, [r7, #4] + 8004b70: 619a str r2, [r3, #24] } else { GPIOx->BRR = GPIO_Pin ; } } - 8004b36: e003 b.n 8004b40 + 8004b72: e003 b.n 8004b7c GPIOx->BRR = GPIO_Pin ; - 8004b38: 1cbb adds r3, r7, #2 - 8004b3a: 881a ldrh r2, [r3, #0] - 8004b3c: 687b ldr r3, [r7, #4] - 8004b3e: 629a str r2, [r3, #40] ; 0x28 + 8004b74: 1cbb adds r3, r7, #2 + 8004b76: 881a ldrh r2, [r3, #0] + 8004b78: 687b ldr r3, [r7, #4] + 8004b7a: 629a str r2, [r3, #40] ; 0x28 } - 8004b40: 46c0 nop ; (mov r8, r8) - 8004b42: 46bd mov sp, r7 - 8004b44: b002 add sp, #8 - 8004b46: bd80 pop {r7, pc} + 8004b7c: 46c0 nop ; (mov r8, r8) + 8004b7e: 46bd mov sp, r7 + 8004b80: b002 add sp, #8 + 8004b82: bd80 pop {r7, pc} -08004b48 : +08004b84 : * @brief This function handles EXTI interrupt request. * @param GPIO_Pin Specifies the pins connected to the EXTI line. * @retval None */ void HAL_GPIO_EXTI_IRQHandler(uint16_t GPIO_Pin) { - 8004b48: b580 push {r7, lr} - 8004b4a: b082 sub sp, #8 - 8004b4c: af00 add r7, sp, #0 - 8004b4e: 0002 movs r2, r0 - 8004b50: 1dbb adds r3, r7, #6 - 8004b52: 801a strh r2, [r3, #0] + 8004b84: b580 push {r7, lr} + 8004b86: b082 sub sp, #8 + 8004b88: af00 add r7, sp, #0 + 8004b8a: 0002 movs r2, r0 + 8004b8c: 1dbb adds r3, r7, #6 + 8004b8e: 801a strh r2, [r3, #0] /* EXTI line interrupt detected */ if (__HAL_GPIO_EXTI_GET_IT(GPIO_Pin) != RESET) - 8004b54: 4b09 ldr r3, [pc, #36] ; (8004b7c ) - 8004b56: 695b ldr r3, [r3, #20] - 8004b58: 1dba adds r2, r7, #6 - 8004b5a: 8812 ldrh r2, [r2, #0] - 8004b5c: 4013 ands r3, r2 - 8004b5e: d008 beq.n 8004b72 + 8004b90: 4b09 ldr r3, [pc, #36] ; (8004bb8 ) + 8004b92: 695b ldr r3, [r3, #20] + 8004b94: 1dba adds r2, r7, #6 + 8004b96: 8812 ldrh r2, [r2, #0] + 8004b98: 4013 ands r3, r2 + 8004b9a: d008 beq.n 8004bae { __HAL_GPIO_EXTI_CLEAR_IT(GPIO_Pin); - 8004b60: 4b06 ldr r3, [pc, #24] ; (8004b7c ) - 8004b62: 1dba adds r2, r7, #6 - 8004b64: 8812 ldrh r2, [r2, #0] - 8004b66: 615a str r2, [r3, #20] + 8004b9c: 4b06 ldr r3, [pc, #24] ; (8004bb8 ) + 8004b9e: 1dba adds r2, r7, #6 + 8004ba0: 8812 ldrh r2, [r2, #0] + 8004ba2: 615a str r2, [r3, #20] HAL_GPIO_EXTI_Callback(GPIO_Pin); - 8004b68: 1dbb adds r3, r7, #6 - 8004b6a: 881b ldrh r3, [r3, #0] - 8004b6c: 0018 movs r0, r3 - 8004b6e: f7ff f8f7 bl 8003d60 + 8004ba4: 1dbb adds r3, r7, #6 + 8004ba6: 881b ldrh r3, [r3, #0] + 8004ba8: 0018 movs r0, r3 + 8004baa: f7ff f8ed bl 8003d88 } } - 8004b72: 46c0 nop ; (mov r8, r8) - 8004b74: 46bd mov sp, r7 - 8004b76: b002 add sp, #8 - 8004b78: bd80 pop {r7, pc} - 8004b7a: 46c0 nop ; (mov r8, r8) - 8004b7c: 40010400 .word 0x40010400 + 8004bae: 46c0 nop ; (mov r8, r8) + 8004bb0: 46bd mov sp, r7 + 8004bb2: b002 add sp, #8 + 8004bb4: bd80 pop {r7, pc} + 8004bb6: 46c0 nop ; (mov r8, r8) + 8004bb8: 40010400 .word 0x40010400 -08004b80 : +08004bbc : * supported by this macro. User should request a transition to HSE Off * first and then HSE On or HSE Bypass. * @retval HAL status */ HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct) { - 8004b80: b590 push {r4, r7, lr} - 8004b82: b08b sub sp, #44 ; 0x2c - 8004b84: af00 add r7, sp, #0 - 8004b86: 6078 str r0, [r7, #4] + 8004bbc: b590 push {r4, r7, lr} + 8004bbe: b08b sub sp, #44 ; 0x2c + 8004bc0: af00 add r7, sp, #0 + 8004bc2: 6078 str r0, [r7, #4] uint32_t hsi_state; HAL_StatusTypeDef status; uint32_t sysclk_source, pll_config; /* Check Null pointer */ if(RCC_OscInitStruct == NULL) - 8004b88: 687b ldr r3, [r7, #4] - 8004b8a: 2b00 cmp r3, #0 - 8004b8c: d102 bne.n 8004b94 + 8004bc4: 687b ldr r3, [r7, #4] + 8004bc6: 2b00 cmp r3, #0 + 8004bc8: d102 bne.n 8004bd0 { return HAL_ERROR; - 8004b8e: 2301 movs r3, #1 - 8004b90: f000 fbbe bl 8005310 + 8004bca: 2301 movs r3, #1 + 8004bcc: f000 fbbe bl 800534c } /* Check the parameters */ assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType)); sysclk_source = __HAL_RCC_GET_SYSCLK_SOURCE(); - 8004b94: 4bc9 ldr r3, [pc, #804] ; (8004ebc ) - 8004b96: 68db ldr r3, [r3, #12] - 8004b98: 220c movs r2, #12 - 8004b9a: 4013 ands r3, r2 - 8004b9c: 61fb str r3, [r7, #28] + 8004bd0: 4bc9 ldr r3, [pc, #804] ; (8004ef8 ) + 8004bd2: 68db ldr r3, [r3, #12] + 8004bd4: 220c movs r2, #12 + 8004bd6: 4013 ands r3, r2 + 8004bd8: 61fb str r3, [r7, #28] pll_config = __HAL_RCC_GET_PLL_OSCSOURCE(); - 8004b9e: 4bc7 ldr r3, [pc, #796] ; (8004ebc ) - 8004ba0: 68da ldr r2, [r3, #12] - 8004ba2: 2380 movs r3, #128 ; 0x80 - 8004ba4: 025b lsls r3, r3, #9 - 8004ba6: 4013 ands r3, r2 - 8004ba8: 61bb str r3, [r7, #24] + 8004bda: 4bc7 ldr r3, [pc, #796] ; (8004ef8 ) + 8004bdc: 68da ldr r2, [r3, #12] + 8004bde: 2380 movs r3, #128 ; 0x80 + 8004be0: 025b lsls r3, r3, #9 + 8004be2: 4013 ands r3, r2 + 8004be4: 61bb str r3, [r7, #24] /*------------------------------- HSE Configuration ------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE) - 8004baa: 687b ldr r3, [r7, #4] - 8004bac: 681b ldr r3, [r3, #0] - 8004bae: 2201 movs r2, #1 - 8004bb0: 4013 ands r3, r2 - 8004bb2: d100 bne.n 8004bb6 - 8004bb4: e07e b.n 8004cb4 + 8004be6: 687b ldr r3, [r7, #4] + 8004be8: 681b ldr r3, [r3, #0] + 8004bea: 2201 movs r2, #1 + 8004bec: 4013 ands r3, r2 + 8004bee: d100 bne.n 8004bf2 + 8004bf0: e07e b.n 8004cf0 { /* Check the parameters */ assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState)); /* When the HSE is used as system clock or clock source for PLL in these cases it is not allowed to be disabled */ if((sysclk_source == RCC_SYSCLKSOURCE_STATUS_HSE) - 8004bb6: 69fb ldr r3, [r7, #28] - 8004bb8: 2b08 cmp r3, #8 - 8004bba: d007 beq.n 8004bcc + 8004bf2: 69fb ldr r3, [r7, #28] + 8004bf4: 2b08 cmp r3, #8 + 8004bf6: d007 beq.n 8004c08 || ((sysclk_source == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (pll_config == RCC_PLLSOURCE_HSE))) - 8004bbc: 69fb ldr r3, [r7, #28] - 8004bbe: 2b0c cmp r3, #12 - 8004bc0: d112 bne.n 8004be8 - 8004bc2: 69ba ldr r2, [r7, #24] - 8004bc4: 2380 movs r3, #128 ; 0x80 - 8004bc6: 025b lsls r3, r3, #9 - 8004bc8: 429a cmp r2, r3 - 8004bca: d10d bne.n 8004be8 + 8004bf8: 69fb ldr r3, [r7, #28] + 8004bfa: 2b0c cmp r3, #12 + 8004bfc: d112 bne.n 8004c24 + 8004bfe: 69ba ldr r2, [r7, #24] + 8004c00: 2380 movs r3, #128 ; 0x80 + 8004c02: 025b lsls r3, r3, #9 + 8004c04: 429a cmp r2, r3 + 8004c06: d10d bne.n 8004c24 { if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != 0U) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF)) - 8004bcc: 4bbb ldr r3, [pc, #748] ; (8004ebc ) - 8004bce: 681a ldr r2, [r3, #0] - 8004bd0: 2380 movs r3, #128 ; 0x80 - 8004bd2: 029b lsls r3, r3, #10 - 8004bd4: 4013 ands r3, r2 - 8004bd6: d100 bne.n 8004bda - 8004bd8: e06b b.n 8004cb2 - 8004bda: 687b ldr r3, [r7, #4] - 8004bdc: 685b ldr r3, [r3, #4] - 8004bde: 2b00 cmp r3, #0 - 8004be0: d167 bne.n 8004cb2 + 8004c08: 4bbb ldr r3, [pc, #748] ; (8004ef8 ) + 8004c0a: 681a ldr r2, [r3, #0] + 8004c0c: 2380 movs r3, #128 ; 0x80 + 8004c0e: 029b lsls r3, r3, #10 + 8004c10: 4013 ands r3, r2 + 8004c12: d100 bne.n 8004c16 + 8004c14: e06b b.n 8004cee + 8004c16: 687b ldr r3, [r7, #4] + 8004c18: 685b ldr r3, [r3, #4] + 8004c1a: 2b00 cmp r3, #0 + 8004c1c: d167 bne.n 8004cee { return HAL_ERROR; - 8004be2: 2301 movs r3, #1 - 8004be4: f000 fb94 bl 8005310 + 8004c1e: 2301 movs r3, #1 + 8004c20: f000 fb94 bl 800534c } } else { /* Set the new HSE configuration ---------------------------------------*/ __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState); - 8004be8: 687b ldr r3, [r7, #4] - 8004bea: 685a ldr r2, [r3, #4] - 8004bec: 2380 movs r3, #128 ; 0x80 - 8004bee: 025b lsls r3, r3, #9 - 8004bf0: 429a cmp r2, r3 - 8004bf2: d107 bne.n 8004c04 - 8004bf4: 4bb1 ldr r3, [pc, #708] ; (8004ebc ) - 8004bf6: 4ab1 ldr r2, [pc, #708] ; (8004ebc ) - 8004bf8: 6812 ldr r2, [r2, #0] - 8004bfa: 2180 movs r1, #128 ; 0x80 - 8004bfc: 0249 lsls r1, r1, #9 - 8004bfe: 430a orrs r2, r1 - 8004c00: 601a str r2, [r3, #0] - 8004c02: e027 b.n 8004c54 - 8004c04: 687b ldr r3, [r7, #4] - 8004c06: 685a ldr r2, [r3, #4] - 8004c08: 23a0 movs r3, #160 ; 0xa0 - 8004c0a: 02db lsls r3, r3, #11 - 8004c0c: 429a cmp r2, r3 - 8004c0e: d10e bne.n 8004c2e - 8004c10: 4baa ldr r3, [pc, #680] ; (8004ebc ) - 8004c12: 4aaa ldr r2, [pc, #680] ; (8004ebc ) - 8004c14: 6812 ldr r2, [r2, #0] - 8004c16: 2180 movs r1, #128 ; 0x80 - 8004c18: 02c9 lsls r1, r1, #11 - 8004c1a: 430a orrs r2, r1 - 8004c1c: 601a str r2, [r3, #0] - 8004c1e: 4ba7 ldr r3, [pc, #668] ; (8004ebc ) - 8004c20: 4aa6 ldr r2, [pc, #664] ; (8004ebc ) - 8004c22: 6812 ldr r2, [r2, #0] - 8004c24: 2180 movs r1, #128 ; 0x80 - 8004c26: 0249 lsls r1, r1, #9 - 8004c28: 430a orrs r2, r1 - 8004c2a: 601a str r2, [r3, #0] - 8004c2c: e012 b.n 8004c54 - 8004c2e: 4ba3 ldr r3, [pc, #652] ; (8004ebc ) - 8004c30: 4aa2 ldr r2, [pc, #648] ; (8004ebc ) - 8004c32: 6812 ldr r2, [r2, #0] - 8004c34: 49a2 ldr r1, [pc, #648] ; (8004ec0 ) - 8004c36: 400a ands r2, r1 - 8004c38: 601a str r2, [r3, #0] - 8004c3a: 4ba0 ldr r3, [pc, #640] ; (8004ebc ) - 8004c3c: 681a ldr r2, [r3, #0] - 8004c3e: 2380 movs r3, #128 ; 0x80 - 8004c40: 025b lsls r3, r3, #9 - 8004c42: 4013 ands r3, r2 - 8004c44: 60fb str r3, [r7, #12] - 8004c46: 68fb ldr r3, [r7, #12] - 8004c48: 4b9c ldr r3, [pc, #624] ; (8004ebc ) - 8004c4a: 4a9c ldr r2, [pc, #624] ; (8004ebc ) - 8004c4c: 6812 ldr r2, [r2, #0] - 8004c4e: 499d ldr r1, [pc, #628] ; (8004ec4 ) - 8004c50: 400a ands r2, r1 - 8004c52: 601a str r2, [r3, #0] + 8004c24: 687b ldr r3, [r7, #4] + 8004c26: 685a ldr r2, [r3, #4] + 8004c28: 2380 movs r3, #128 ; 0x80 + 8004c2a: 025b lsls r3, r3, #9 + 8004c2c: 429a cmp r2, r3 + 8004c2e: d107 bne.n 8004c40 + 8004c30: 4bb1 ldr r3, [pc, #708] ; (8004ef8 ) + 8004c32: 4ab1 ldr r2, [pc, #708] ; (8004ef8 ) + 8004c34: 6812 ldr r2, [r2, #0] + 8004c36: 2180 movs r1, #128 ; 0x80 + 8004c38: 0249 lsls r1, r1, #9 + 8004c3a: 430a orrs r2, r1 + 8004c3c: 601a str r2, [r3, #0] + 8004c3e: e027 b.n 8004c90 + 8004c40: 687b ldr r3, [r7, #4] + 8004c42: 685a ldr r2, [r3, #4] + 8004c44: 23a0 movs r3, #160 ; 0xa0 + 8004c46: 02db lsls r3, r3, #11 + 8004c48: 429a cmp r2, r3 + 8004c4a: d10e bne.n 8004c6a + 8004c4c: 4baa ldr r3, [pc, #680] ; (8004ef8 ) + 8004c4e: 4aaa ldr r2, [pc, #680] ; (8004ef8 ) + 8004c50: 6812 ldr r2, [r2, #0] + 8004c52: 2180 movs r1, #128 ; 0x80 + 8004c54: 02c9 lsls r1, r1, #11 + 8004c56: 430a orrs r2, r1 + 8004c58: 601a str r2, [r3, #0] + 8004c5a: 4ba7 ldr r3, [pc, #668] ; (8004ef8 ) + 8004c5c: 4aa6 ldr r2, [pc, #664] ; (8004ef8 ) + 8004c5e: 6812 ldr r2, [r2, #0] + 8004c60: 2180 movs r1, #128 ; 0x80 + 8004c62: 0249 lsls r1, r1, #9 + 8004c64: 430a orrs r2, r1 + 8004c66: 601a str r2, [r3, #0] + 8004c68: e012 b.n 8004c90 + 8004c6a: 4ba3 ldr r3, [pc, #652] ; (8004ef8 ) + 8004c6c: 4aa2 ldr r2, [pc, #648] ; (8004ef8 ) + 8004c6e: 6812 ldr r2, [r2, #0] + 8004c70: 49a2 ldr r1, [pc, #648] ; (8004efc ) + 8004c72: 400a ands r2, r1 + 8004c74: 601a str r2, [r3, #0] + 8004c76: 4ba0 ldr r3, [pc, #640] ; (8004ef8 ) + 8004c78: 681a ldr r2, [r3, #0] + 8004c7a: 2380 movs r3, #128 ; 0x80 + 8004c7c: 025b lsls r3, r3, #9 + 8004c7e: 4013 ands r3, r2 + 8004c80: 60fb str r3, [r7, #12] + 8004c82: 68fb ldr r3, [r7, #12] + 8004c84: 4b9c ldr r3, [pc, #624] ; (8004ef8 ) + 8004c86: 4a9c ldr r2, [pc, #624] ; (8004ef8 ) + 8004c88: 6812 ldr r2, [r2, #0] + 8004c8a: 499d ldr r1, [pc, #628] ; (8004f00 ) + 8004c8c: 400a ands r2, r1 + 8004c8e: 601a str r2, [r3, #0] /* Check the HSE State */ if(RCC_OscInitStruct->HSEState != RCC_HSE_OFF) - 8004c54: 687b ldr r3, [r7, #4] - 8004c56: 685b ldr r3, [r3, #4] - 8004c58: 2b00 cmp r3, #0 - 8004c5a: d015 beq.n 8004c88 + 8004c90: 687b ldr r3, [r7, #4] + 8004c92: 685b ldr r3, [r3, #4] + 8004c94: 2b00 cmp r3, #0 + 8004c96: d015 beq.n 8004cc4 { /* Get Start Tick */ tickstart = HAL_GetTick(); - 8004c5c: f7ff f966 bl 8003f2c - 8004c60: 0003 movs r3, r0 - 8004c62: 617b str r3, [r7, #20] + 8004c98: f7ff f966 bl 8003f68 + 8004c9c: 0003 movs r3, r0 + 8004c9e: 617b str r3, [r7, #20] /* Wait till HSE is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == 0U) - 8004c64: e009 b.n 8004c7a + 8004ca0: e009 b.n 8004cb6 { if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE) - 8004c66: f7ff f961 bl 8003f2c - 8004c6a: 0002 movs r2, r0 - 8004c6c: 697b ldr r3, [r7, #20] - 8004c6e: 1ad3 subs r3, r2, r3 - 8004c70: 2b64 cmp r3, #100 ; 0x64 - 8004c72: d902 bls.n 8004c7a + 8004ca2: f7ff f961 bl 8003f68 + 8004ca6: 0002 movs r2, r0 + 8004ca8: 697b ldr r3, [r7, #20] + 8004caa: 1ad3 subs r3, r2, r3 + 8004cac: 2b64 cmp r3, #100 ; 0x64 + 8004cae: d902 bls.n 8004cb6 { return HAL_TIMEOUT; - 8004c74: 2303 movs r3, #3 - 8004c76: f000 fb4b bl 8005310 + 8004cb0: 2303 movs r3, #3 + 8004cb2: f000 fb4b bl 800534c while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == 0U) - 8004c7a: 4b90 ldr r3, [pc, #576] ; (8004ebc ) - 8004c7c: 681a ldr r2, [r3, #0] - 8004c7e: 2380 movs r3, #128 ; 0x80 - 8004c80: 029b lsls r3, r3, #10 - 8004c82: 4013 ands r3, r2 - 8004c84: d0ef beq.n 8004c66 - 8004c86: e015 b.n 8004cb4 + 8004cb6: 4b90 ldr r3, [pc, #576] ; (8004ef8 ) + 8004cb8: 681a ldr r2, [r3, #0] + 8004cba: 2380 movs r3, #128 ; 0x80 + 8004cbc: 029b lsls r3, r3, #10 + 8004cbe: 4013 ands r3, r2 + 8004cc0: d0ef beq.n 8004ca2 + 8004cc2: e015 b.n 8004cf0 } } else { /* Get Start Tick */ tickstart = HAL_GetTick(); - 8004c88: f7ff f950 bl 8003f2c - 8004c8c: 0003 movs r3, r0 - 8004c8e: 617b str r3, [r7, #20] + 8004cc4: f7ff f950 bl 8003f68 + 8004cc8: 0003 movs r3, r0 + 8004cca: 617b str r3, [r7, #20] /* Wait till HSE is disabled */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != 0U) - 8004c90: e008 b.n 8004ca4 + 8004ccc: e008 b.n 8004ce0 { if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE) - 8004c92: f7ff f94b bl 8003f2c - 8004c96: 0002 movs r2, r0 - 8004c98: 697b ldr r3, [r7, #20] - 8004c9a: 1ad3 subs r3, r2, r3 - 8004c9c: 2b64 cmp r3, #100 ; 0x64 - 8004c9e: d901 bls.n 8004ca4 + 8004cce: f7ff f94b bl 8003f68 + 8004cd2: 0002 movs r2, r0 + 8004cd4: 697b ldr r3, [r7, #20] + 8004cd6: 1ad3 subs r3, r2, r3 + 8004cd8: 2b64 cmp r3, #100 ; 0x64 + 8004cda: d901 bls.n 8004ce0 { return HAL_TIMEOUT; - 8004ca0: 2303 movs r3, #3 - 8004ca2: e335 b.n 8005310 + 8004cdc: 2303 movs r3, #3 + 8004cde: e335 b.n 800534c while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != 0U) - 8004ca4: 4b85 ldr r3, [pc, #532] ; (8004ebc ) - 8004ca6: 681a ldr r2, [r3, #0] - 8004ca8: 2380 movs r3, #128 ; 0x80 - 8004caa: 029b lsls r3, r3, #10 - 8004cac: 4013 ands r3, r2 - 8004cae: d1f0 bne.n 8004c92 - 8004cb0: e000 b.n 8004cb4 + 8004ce0: 4b85 ldr r3, [pc, #532] ; (8004ef8 ) + 8004ce2: 681a ldr r2, [r3, #0] + 8004ce4: 2380 movs r3, #128 ; 0x80 + 8004ce6: 029b lsls r3, r3, #10 + 8004ce8: 4013 ands r3, r2 + 8004cea: d1f0 bne.n 8004cce + 8004cec: e000 b.n 8004cf0 if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != 0U) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF)) - 8004cb2: 46c0 nop ; (mov r8, r8) + 8004cee: 46c0 nop ; (mov r8, r8) } } } } /*----------------------------- HSI Configuration --------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI) - 8004cb4: 687b ldr r3, [r7, #4] - 8004cb6: 681b ldr r3, [r3, #0] - 8004cb8: 2202 movs r2, #2 - 8004cba: 4013 ands r3, r2 - 8004cbc: d100 bne.n 8004cc0 - 8004cbe: e099 b.n 8004df4 + 8004cf0: 687b ldr r3, [r7, #4] + 8004cf2: 681b ldr r3, [r3, #0] + 8004cf4: 2202 movs r2, #2 + 8004cf6: 4013 ands r3, r2 + 8004cf8: d100 bne.n 8004cfc + 8004cfa: e099 b.n 8004e30 { /* Check the parameters */ assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState)); assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue)); hsi_state = RCC_OscInitStruct->HSIState; - 8004cc0: 687b ldr r3, [r7, #4] - 8004cc2: 68db ldr r3, [r3, #12] - 8004cc4: 627b str r3, [r7, #36] ; 0x24 + 8004cfc: 687b ldr r3, [r7, #4] + 8004cfe: 68db ldr r3, [r3, #12] + 8004d00: 627b str r3, [r7, #36] ; 0x24 #if defined(RCC_CR_HSIOUTEN) if((hsi_state & RCC_HSI_OUTEN) != 0U) - 8004cc6: 6a7b ldr r3, [r7, #36] ; 0x24 - 8004cc8: 2220 movs r2, #32 - 8004cca: 4013 ands r3, r2 - 8004ccc: d009 beq.n 8004ce2 + 8004d02: 6a7b ldr r3, [r7, #36] ; 0x24 + 8004d04: 2220 movs r2, #32 + 8004d06: 4013 ands r3, r2 + 8004d08: d009 beq.n 8004d1e { /* HSI Output enable for timer requested */ SET_BIT(RCC->CR, RCC_CR_HSIOUTEN); - 8004cce: 4b7b ldr r3, [pc, #492] ; (8004ebc ) - 8004cd0: 4a7a ldr r2, [pc, #488] ; (8004ebc ) - 8004cd2: 6812 ldr r2, [r2, #0] - 8004cd4: 2120 movs r1, #32 - 8004cd6: 430a orrs r2, r1 - 8004cd8: 601a str r2, [r3, #0] + 8004d0a: 4b7b ldr r3, [pc, #492] ; (8004ef8 ) + 8004d0c: 4a7a ldr r2, [pc, #488] ; (8004ef8 ) + 8004d0e: 6812 ldr r2, [r2, #0] + 8004d10: 2120 movs r1, #32 + 8004d12: 430a orrs r2, r1 + 8004d14: 601a str r2, [r3, #0] hsi_state &= ~RCC_CR_HSIOUTEN; - 8004cda: 6a7b ldr r3, [r7, #36] ; 0x24 - 8004cdc: 2220 movs r2, #32 - 8004cde: 4393 bics r3, r2 - 8004ce0: 627b str r3, [r7, #36] ; 0x24 + 8004d16: 6a7b ldr r3, [r7, #36] ; 0x24 + 8004d18: 2220 movs r2, #32 + 8004d1a: 4393 bics r3, r2 + 8004d1c: 627b str r3, [r7, #36] ; 0x24 } #endif /* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock */ if((sysclk_source == RCC_SYSCLKSOURCE_STATUS_HSI) - 8004ce2: 69fb ldr r3, [r7, #28] - 8004ce4: 2b04 cmp r3, #4 - 8004ce6: d005 beq.n 8004cf4 + 8004d1e: 69fb ldr r3, [r7, #28] + 8004d20: 2b04 cmp r3, #4 + 8004d22: d005 beq.n 8004d30 || ((sysclk_source == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (pll_config == RCC_PLLSOURCE_HSI))) - 8004ce8: 69fb ldr r3, [r7, #28] - 8004cea: 2b0c cmp r3, #12 - 8004cec: d13f bne.n 8004d6e - 8004cee: 69bb ldr r3, [r7, #24] - 8004cf0: 2b00 cmp r3, #0 - 8004cf2: d13c bne.n 8004d6e + 8004d24: 69fb ldr r3, [r7, #28] + 8004d26: 2b0c cmp r3, #12 + 8004d28: d13f bne.n 8004daa + 8004d2a: 69bb ldr r3, [r7, #24] + 8004d2c: 2b00 cmp r3, #0 + 8004d2e: d13c bne.n 8004daa { /* When HSI is used as system clock it will not disabled */ if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != 0U) && (hsi_state == RCC_HSI_OFF)) - 8004cf4: 4b71 ldr r3, [pc, #452] ; (8004ebc ) - 8004cf6: 681b ldr r3, [r3, #0] - 8004cf8: 2204 movs r2, #4 - 8004cfa: 4013 ands r3, r2 - 8004cfc: d004 beq.n 8004d08 - 8004cfe: 6a7b ldr r3, [r7, #36] ; 0x24 - 8004d00: 2b00 cmp r3, #0 - 8004d02: d101 bne.n 8004d08 + 8004d30: 4b71 ldr r3, [pc, #452] ; (8004ef8 ) + 8004d32: 681b ldr r3, [r3, #0] + 8004d34: 2204 movs r2, #4 + 8004d36: 4013 ands r3, r2 + 8004d38: d004 beq.n 8004d44 + 8004d3a: 6a7b ldr r3, [r7, #36] ; 0x24 + 8004d3c: 2b00 cmp r3, #0 + 8004d3e: d101 bne.n 8004d44 { return HAL_ERROR; - 8004d04: 2301 movs r3, #1 - 8004d06: e303 b.n 8005310 + 8004d40: 2301 movs r3, #1 + 8004d42: e303 b.n 800534c } /* Otherwise, just the calibration and HSI or HSIdiv4 are allowed */ else { /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/ __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); - 8004d08: 4a6c ldr r2, [pc, #432] ; (8004ebc ) - 8004d0a: 4b6c ldr r3, [pc, #432] ; (8004ebc ) - 8004d0c: 685b ldr r3, [r3, #4] - 8004d0e: 496e ldr r1, [pc, #440] ; (8004ec8 ) - 8004d10: 4019 ands r1, r3 - 8004d12: 687b ldr r3, [r7, #4] - 8004d14: 691b ldr r3, [r3, #16] - 8004d16: 021b lsls r3, r3, #8 - 8004d18: 430b orrs r3, r1 - 8004d1a: 6053 str r3, [r2, #4] + 8004d44: 4a6c ldr r2, [pc, #432] ; (8004ef8 ) + 8004d46: 4b6c ldr r3, [pc, #432] ; (8004ef8 ) + 8004d48: 685b ldr r3, [r3, #4] + 8004d4a: 496e ldr r1, [pc, #440] ; (8004f04 ) + 8004d4c: 4019 ands r1, r3 + 8004d4e: 687b ldr r3, [r7, #4] + 8004d50: 691b ldr r3, [r3, #16] + 8004d52: 021b lsls r3, r3, #8 + 8004d54: 430b orrs r3, r1 + 8004d56: 6053 str r3, [r2, #4] /* Enable the Internal High Speed oscillator (HSI or HSIdiv4) */ __HAL_RCC_HSI_CONFIG(hsi_state); - 8004d1c: 4b67 ldr r3, [pc, #412] ; (8004ebc ) - 8004d1e: 4a67 ldr r2, [pc, #412] ; (8004ebc ) - 8004d20: 6812 ldr r2, [r2, #0] - 8004d22: 2109 movs r1, #9 - 8004d24: 438a bics r2, r1 - 8004d26: 0011 movs r1, r2 - 8004d28: 6a7a ldr r2, [r7, #36] ; 0x24 - 8004d2a: 430a orrs r2, r1 - 8004d2c: 601a str r2, [r3, #0] + 8004d58: 4b67 ldr r3, [pc, #412] ; (8004ef8 ) + 8004d5a: 4a67 ldr r2, [pc, #412] ; (8004ef8 ) + 8004d5c: 6812 ldr r2, [r2, #0] + 8004d5e: 2109 movs r1, #9 + 8004d60: 438a bics r2, r1 + 8004d62: 0011 movs r1, r2 + 8004d64: 6a7a ldr r2, [r7, #36] ; 0x24 + 8004d66: 430a orrs r2, r1 + 8004d68: 601a str r2, [r3, #0] } /* Update the SystemCoreClock global variable */ SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE)>> RCC_CFGR_HPRE_Pos]; - 8004d2e: f000 fc41 bl 80055b4 - 8004d32: 0001 movs r1, r0 - 8004d34: 4b61 ldr r3, [pc, #388] ; (8004ebc ) - 8004d36: 68db ldr r3, [r3, #12] - 8004d38: 091b lsrs r3, r3, #4 - 8004d3a: 220f movs r2, #15 - 8004d3c: 4013 ands r3, r2 - 8004d3e: 4a63 ldr r2, [pc, #396] ; (8004ecc ) - 8004d40: 5cd3 ldrb r3, [r2, r3] - 8004d42: 000a movs r2, r1 - 8004d44: 40da lsrs r2, r3 - 8004d46: 4b62 ldr r3, [pc, #392] ; (8004ed0 ) - 8004d48: 601a str r2, [r3, #0] + 8004d6a: f000 fc41 bl 80055f0 + 8004d6e: 0001 movs r1, r0 + 8004d70: 4b61 ldr r3, [pc, #388] ; (8004ef8 ) + 8004d72: 68db ldr r3, [r3, #12] + 8004d74: 091b lsrs r3, r3, #4 + 8004d76: 220f movs r2, #15 + 8004d78: 4013 ands r3, r2 + 8004d7a: 4a63 ldr r2, [pc, #396] ; (8004f08 ) + 8004d7c: 5cd3 ldrb r3, [r2, r3] + 8004d7e: 000a movs r2, r1 + 8004d80: 40da lsrs r2, r3 + 8004d82: 4b62 ldr r3, [pc, #392] ; (8004f0c ) + 8004d84: 601a str r2, [r3, #0] /* Configure the source of time base considering new system clocks settings*/ status = HAL_InitTick (uwTickPrio); - 8004d4a: 4b62 ldr r3, [pc, #392] ; (8004ed4 ) - 8004d4c: 681b ldr r3, [r3, #0] - 8004d4e: 2213 movs r2, #19 - 8004d50: 18bc adds r4, r7, r2 - 8004d52: 0018 movs r0, r3 - 8004d54: f7ff f8a4 bl 8003ea0 - 8004d58: 0003 movs r3, r0 - 8004d5a: 7023 strb r3, [r4, #0] + 8004d86: 4b62 ldr r3, [pc, #392] ; (8004f10 ) + 8004d88: 681b ldr r3, [r3, #0] + 8004d8a: 2213 movs r2, #19 + 8004d8c: 18bc adds r4, r7, r2 + 8004d8e: 0018 movs r0, r3 + 8004d90: f7ff f8a4 bl 8003edc + 8004d94: 0003 movs r3, r0 + 8004d96: 7023 strb r3, [r4, #0] if(status != HAL_OK) - 8004d5c: 2313 movs r3, #19 - 8004d5e: 18fb adds r3, r7, r3 - 8004d60: 781b ldrb r3, [r3, #0] - 8004d62: 2b00 cmp r3, #0 - 8004d64: d046 beq.n 8004df4 + 8004d98: 2313 movs r3, #19 + 8004d9a: 18fb adds r3, r7, r3 + 8004d9c: 781b ldrb r3, [r3, #0] + 8004d9e: 2b00 cmp r3, #0 + 8004da0: d046 beq.n 8004e30 { return status; - 8004d66: 2313 movs r3, #19 - 8004d68: 18fb adds r3, r7, r3 - 8004d6a: 781b ldrb r3, [r3, #0] - 8004d6c: e2d0 b.n 8005310 + 8004da2: 2313 movs r3, #19 + 8004da4: 18fb adds r3, r7, r3 + 8004da6: 781b ldrb r3, [r3, #0] + 8004da8: e2d0 b.n 800534c } } else { /* Check the HSI State */ if(hsi_state != RCC_HSI_OFF) - 8004d6e: 6a7b ldr r3, [r7, #36] ; 0x24 - 8004d70: 2b00 cmp r3, #0 - 8004d72: d026 beq.n 8004dc2 + 8004daa: 6a7b ldr r3, [r7, #36] ; 0x24 + 8004dac: 2b00 cmp r3, #0 + 8004dae: d026 beq.n 8004dfe { /* Enable the Internal High Speed oscillator (HSI or HSIdiv4) */ __HAL_RCC_HSI_CONFIG(hsi_state); - 8004d74: 4b51 ldr r3, [pc, #324] ; (8004ebc ) - 8004d76: 4a51 ldr r2, [pc, #324] ; (8004ebc ) - 8004d78: 6812 ldr r2, [r2, #0] - 8004d7a: 2109 movs r1, #9 - 8004d7c: 438a bics r2, r1 - 8004d7e: 0011 movs r1, r2 - 8004d80: 6a7a ldr r2, [r7, #36] ; 0x24 - 8004d82: 430a orrs r2, r1 - 8004d84: 601a str r2, [r3, #0] + 8004db0: 4b51 ldr r3, [pc, #324] ; (8004ef8 ) + 8004db2: 4a51 ldr r2, [pc, #324] ; (8004ef8 ) + 8004db4: 6812 ldr r2, [r2, #0] + 8004db6: 2109 movs r1, #9 + 8004db8: 438a bics r2, r1 + 8004dba: 0011 movs r1, r2 + 8004dbc: 6a7a ldr r2, [r7, #36] ; 0x24 + 8004dbe: 430a orrs r2, r1 + 8004dc0: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); - 8004d86: f7ff f8d1 bl 8003f2c - 8004d8a: 0003 movs r3, r0 - 8004d8c: 617b str r3, [r7, #20] + 8004dc2: f7ff f8d1 bl 8003f68 + 8004dc6: 0003 movs r3, r0 + 8004dc8: 617b str r3, [r7, #20] /* Wait till HSI is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == 0U) - 8004d8e: e008 b.n 8004da2 + 8004dca: e008 b.n 8004dde { if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE) - 8004d90: f7ff f8cc bl 8003f2c - 8004d94: 0002 movs r2, r0 - 8004d96: 697b ldr r3, [r7, #20] - 8004d98: 1ad3 subs r3, r2, r3 - 8004d9a: 2b02 cmp r3, #2 - 8004d9c: d901 bls.n 8004da2 + 8004dcc: f7ff f8cc bl 8003f68 + 8004dd0: 0002 movs r2, r0 + 8004dd2: 697b ldr r3, [r7, #20] + 8004dd4: 1ad3 subs r3, r2, r3 + 8004dd6: 2b02 cmp r3, #2 + 8004dd8: d901 bls.n 8004dde { return HAL_TIMEOUT; - 8004d9e: 2303 movs r3, #3 - 8004da0: e2b6 b.n 8005310 + 8004dda: 2303 movs r3, #3 + 8004ddc: e2b6 b.n 800534c while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == 0U) - 8004da2: 4b46 ldr r3, [pc, #280] ; (8004ebc ) - 8004da4: 681b ldr r3, [r3, #0] - 8004da6: 2204 movs r2, #4 - 8004da8: 4013 ands r3, r2 - 8004daa: d0f1 beq.n 8004d90 + 8004dde: 4b46 ldr r3, [pc, #280] ; (8004ef8 ) + 8004de0: 681b ldr r3, [r3, #0] + 8004de2: 2204 movs r2, #4 + 8004de4: 4013 ands r3, r2 + 8004de6: d0f1 beq.n 8004dcc } } /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/ __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); - 8004dac: 4a43 ldr r2, [pc, #268] ; (8004ebc ) - 8004dae: 4b43 ldr r3, [pc, #268] ; (8004ebc ) - 8004db0: 685b ldr r3, [r3, #4] - 8004db2: 4945 ldr r1, [pc, #276] ; (8004ec8 ) - 8004db4: 4019 ands r1, r3 - 8004db6: 687b ldr r3, [r7, #4] - 8004db8: 691b ldr r3, [r3, #16] - 8004dba: 021b lsls r3, r3, #8 - 8004dbc: 430b orrs r3, r1 - 8004dbe: 6053 str r3, [r2, #4] - 8004dc0: e018 b.n 8004df4 + 8004de8: 4a43 ldr r2, [pc, #268] ; (8004ef8 ) + 8004dea: 4b43 ldr r3, [pc, #268] ; (8004ef8 ) + 8004dec: 685b ldr r3, [r3, #4] + 8004dee: 4945 ldr r1, [pc, #276] ; (8004f04 ) + 8004df0: 4019 ands r1, r3 + 8004df2: 687b ldr r3, [r7, #4] + 8004df4: 691b ldr r3, [r3, #16] + 8004df6: 021b lsls r3, r3, #8 + 8004df8: 430b orrs r3, r1 + 8004dfa: 6053 str r3, [r2, #4] + 8004dfc: e018 b.n 8004e30 } else { /* Disable the Internal High Speed oscillator (HSI). */ __HAL_RCC_HSI_DISABLE(); - 8004dc2: 4b3e ldr r3, [pc, #248] ; (8004ebc ) - 8004dc4: 4a3d ldr r2, [pc, #244] ; (8004ebc ) - 8004dc6: 6812 ldr r2, [r2, #0] - 8004dc8: 2101 movs r1, #1 - 8004dca: 438a bics r2, r1 - 8004dcc: 601a str r2, [r3, #0] + 8004dfe: 4b3e ldr r3, [pc, #248] ; (8004ef8 ) + 8004e00: 4a3d ldr r2, [pc, #244] ; (8004ef8 ) + 8004e02: 6812 ldr r2, [r2, #0] + 8004e04: 2101 movs r1, #1 + 8004e06: 438a bics r2, r1 + 8004e08: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); - 8004dce: f7ff f8ad bl 8003f2c - 8004dd2: 0003 movs r3, r0 - 8004dd4: 617b str r3, [r7, #20] + 8004e0a: f7ff f8ad bl 8003f68 + 8004e0e: 0003 movs r3, r0 + 8004e10: 617b str r3, [r7, #20] /* Wait till HSI is disabled */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != 0U) - 8004dd6: e008 b.n 8004dea + 8004e12: e008 b.n 8004e26 { if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE) - 8004dd8: f7ff f8a8 bl 8003f2c - 8004ddc: 0002 movs r2, r0 - 8004dde: 697b ldr r3, [r7, #20] - 8004de0: 1ad3 subs r3, r2, r3 - 8004de2: 2b02 cmp r3, #2 - 8004de4: d901 bls.n 8004dea + 8004e14: f7ff f8a8 bl 8003f68 + 8004e18: 0002 movs r2, r0 + 8004e1a: 697b ldr r3, [r7, #20] + 8004e1c: 1ad3 subs r3, r2, r3 + 8004e1e: 2b02 cmp r3, #2 + 8004e20: d901 bls.n 8004e26 { return HAL_TIMEOUT; - 8004de6: 2303 movs r3, #3 - 8004de8: e292 b.n 8005310 + 8004e22: 2303 movs r3, #3 + 8004e24: e292 b.n 800534c while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != 0U) - 8004dea: 4b34 ldr r3, [pc, #208] ; (8004ebc ) - 8004dec: 681b ldr r3, [r3, #0] - 8004dee: 2204 movs r2, #4 - 8004df0: 4013 ands r3, r2 - 8004df2: d1f1 bne.n 8004dd8 + 8004e26: 4b34 ldr r3, [pc, #208] ; (8004ef8 ) + 8004e28: 681b ldr r3, [r3, #0] + 8004e2a: 2204 movs r2, #4 + 8004e2c: 4013 ands r3, r2 + 8004e2e: d1f1 bne.n 8004e14 } } } } /*----------------------------- MSI Configuration --------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_MSI) == RCC_OSCILLATORTYPE_MSI) - 8004df4: 687b ldr r3, [r7, #4] - 8004df6: 681b ldr r3, [r3, #0] - 8004df8: 2210 movs r2, #16 - 8004dfa: 4013 ands r3, r2 - 8004dfc: d100 bne.n 8004e00 - 8004dfe: e0a1 b.n 8004f44 + 8004e30: 687b ldr r3, [r7, #4] + 8004e32: 681b ldr r3, [r3, #0] + 8004e34: 2210 movs r2, #16 + 8004e36: 4013 ands r3, r2 + 8004e38: d100 bne.n 8004e3c + 8004e3a: e0a1 b.n 8004f80 { /* When the MSI is used as system clock it will not be disabled */ if(sysclk_source == RCC_CFGR_SWS_MSI) - 8004e00: 69fb ldr r3, [r7, #28] - 8004e02: 2b00 cmp r3, #0 - 8004e04: d141 bne.n 8004e8a + 8004e3c: 69fb ldr r3, [r7, #28] + 8004e3e: 2b00 cmp r3, #0 + 8004e40: d141 bne.n 8004ec6 { if((__HAL_RCC_GET_FLAG(RCC_FLAG_MSIRDY) != 0U) && (RCC_OscInitStruct->MSIState == RCC_MSI_OFF)) - 8004e06: 4b2d ldr r3, [pc, #180] ; (8004ebc ) - 8004e08: 681a ldr r2, [r3, #0] - 8004e0a: 2380 movs r3, #128 ; 0x80 - 8004e0c: 009b lsls r3, r3, #2 - 8004e0e: 4013 ands r3, r2 - 8004e10: d005 beq.n 8004e1e - 8004e12: 687b ldr r3, [r7, #4] - 8004e14: 69db ldr r3, [r3, #28] - 8004e16: 2b00 cmp r3, #0 - 8004e18: d101 bne.n 8004e1e + 8004e42: 4b2d ldr r3, [pc, #180] ; (8004ef8 ) + 8004e44: 681a ldr r2, [r3, #0] + 8004e46: 2380 movs r3, #128 ; 0x80 + 8004e48: 009b lsls r3, r3, #2 + 8004e4a: 4013 ands r3, r2 + 8004e4c: d005 beq.n 8004e5a + 8004e4e: 687b ldr r3, [r7, #4] + 8004e50: 69db ldr r3, [r3, #28] + 8004e52: 2b00 cmp r3, #0 + 8004e54: d101 bne.n 8004e5a { return HAL_ERROR; - 8004e1a: 2301 movs r3, #1 - 8004e1c: e278 b.n 8005310 + 8004e56: 2301 movs r3, #1 + 8004e58: e278 b.n 800534c /* Check MSICalibrationValue and MSIClockRange input parameters */ assert_param(IS_RCC_MSICALIBRATION_VALUE(RCC_OscInitStruct->MSICalibrationValue)); assert_param(IS_RCC_MSI_CLOCK_RANGE(RCC_OscInitStruct->MSIClockRange)); /* Selects the Multiple Speed oscillator (MSI) clock range .*/ __HAL_RCC_MSI_RANGE_CONFIG(RCC_OscInitStruct->MSIClockRange); - 8004e1e: 4a27 ldr r2, [pc, #156] ; (8004ebc ) - 8004e20: 4b26 ldr r3, [pc, #152] ; (8004ebc ) - 8004e22: 685b ldr r3, [r3, #4] - 8004e24: 492c ldr r1, [pc, #176] ; (8004ed8 ) - 8004e26: 4019 ands r1, r3 - 8004e28: 687b ldr r3, [r7, #4] - 8004e2a: 6a5b ldr r3, [r3, #36] ; 0x24 - 8004e2c: 430b orrs r3, r1 - 8004e2e: 6053 str r3, [r2, #4] + 8004e5a: 4a27 ldr r2, [pc, #156] ; (8004ef8 ) + 8004e5c: 4b26 ldr r3, [pc, #152] ; (8004ef8 ) + 8004e5e: 685b ldr r3, [r3, #4] + 8004e60: 492c ldr r1, [pc, #176] ; (8004f14 ) + 8004e62: 4019 ands r1, r3 + 8004e64: 687b ldr r3, [r7, #4] + 8004e66: 6a5b ldr r3, [r3, #36] ; 0x24 + 8004e68: 430b orrs r3, r1 + 8004e6a: 6053 str r3, [r2, #4] /* Adjusts the Multiple Speed oscillator (MSI) calibration value.*/ __HAL_RCC_MSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->MSICalibrationValue); - 8004e30: 4a22 ldr r2, [pc, #136] ; (8004ebc ) - 8004e32: 4b22 ldr r3, [pc, #136] ; (8004ebc ) - 8004e34: 685b ldr r3, [r3, #4] - 8004e36: 021b lsls r3, r3, #8 - 8004e38: 0a19 lsrs r1, r3, #8 - 8004e3a: 687b ldr r3, [r7, #4] - 8004e3c: 6a1b ldr r3, [r3, #32] - 8004e3e: 061b lsls r3, r3, #24 - 8004e40: 430b orrs r3, r1 - 8004e42: 6053 str r3, [r2, #4] + 8004e6c: 4a22 ldr r2, [pc, #136] ; (8004ef8 ) + 8004e6e: 4b22 ldr r3, [pc, #136] ; (8004ef8 ) + 8004e70: 685b ldr r3, [r3, #4] + 8004e72: 021b lsls r3, r3, #8 + 8004e74: 0a19 lsrs r1, r3, #8 + 8004e76: 687b ldr r3, [r7, #4] + 8004e78: 6a1b ldr r3, [r3, #32] + 8004e7a: 061b lsls r3, r3, #24 + 8004e7c: 430b orrs r3, r1 + 8004e7e: 6053 str r3, [r2, #4] /* Update the SystemCoreClock global variable */ SystemCoreClock = (32768U * (1UL << ((RCC_OscInitStruct->MSIClockRange >> RCC_ICSCR_MSIRANGE_Pos) + 1U))) - 8004e44: 687b ldr r3, [r7, #4] - 8004e46: 6a5b ldr r3, [r3, #36] ; 0x24 - 8004e48: 0b5b lsrs r3, r3, #13 - 8004e4a: 3301 adds r3, #1 - 8004e4c: 2280 movs r2, #128 ; 0x80 - 8004e4e: 0212 lsls r2, r2, #8 - 8004e50: 409a lsls r2, r3 + 8004e80: 687b ldr r3, [r7, #4] + 8004e82: 6a5b ldr r3, [r3, #36] ; 0x24 + 8004e84: 0b5b lsrs r3, r3, #13 + 8004e86: 3301 adds r3, #1 + 8004e88: 2280 movs r2, #128 ; 0x80 + 8004e8a: 0212 lsls r2, r2, #8 + 8004e8c: 409a lsls r2, r3 >> AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> RCC_CFGR_HPRE_Pos)]; - 8004e52: 4b1a ldr r3, [pc, #104] ; (8004ebc ) - 8004e54: 68db ldr r3, [r3, #12] - 8004e56: 091b lsrs r3, r3, #4 - 8004e58: 210f movs r1, #15 - 8004e5a: 400b ands r3, r1 - 8004e5c: 491b ldr r1, [pc, #108] ; (8004ecc ) - 8004e5e: 5ccb ldrb r3, [r1, r3] - 8004e60: 40da lsrs r2, r3 + 8004e8e: 4b1a ldr r3, [pc, #104] ; (8004ef8 ) + 8004e90: 68db ldr r3, [r3, #12] + 8004e92: 091b lsrs r3, r3, #4 + 8004e94: 210f movs r1, #15 + 8004e96: 400b ands r3, r1 + 8004e98: 491b ldr r1, [pc, #108] ; (8004f08 ) + 8004e9a: 5ccb ldrb r3, [r1, r3] + 8004e9c: 40da lsrs r2, r3 SystemCoreClock = (32768U * (1UL << ((RCC_OscInitStruct->MSIClockRange >> RCC_ICSCR_MSIRANGE_Pos) + 1U))) - 8004e62: 4b1b ldr r3, [pc, #108] ; (8004ed0 ) - 8004e64: 601a str r2, [r3, #0] + 8004e9e: 4b1b ldr r3, [pc, #108] ; (8004f0c ) + 8004ea0: 601a str r2, [r3, #0] /* Configure the source of time base considering new system clocks settings*/ status = HAL_InitTick (uwTickPrio); - 8004e66: 4b1b ldr r3, [pc, #108] ; (8004ed4 ) - 8004e68: 681b ldr r3, [r3, #0] - 8004e6a: 2213 movs r2, #19 - 8004e6c: 18bc adds r4, r7, r2 - 8004e6e: 0018 movs r0, r3 - 8004e70: f7ff f816 bl 8003ea0 - 8004e74: 0003 movs r3, r0 - 8004e76: 7023 strb r3, [r4, #0] + 8004ea2: 4b1b ldr r3, [pc, #108] ; (8004f10 ) + 8004ea4: 681b ldr r3, [r3, #0] + 8004ea6: 2213 movs r2, #19 + 8004ea8: 18bc adds r4, r7, r2 + 8004eaa: 0018 movs r0, r3 + 8004eac: f7ff f816 bl 8003edc + 8004eb0: 0003 movs r3, r0 + 8004eb2: 7023 strb r3, [r4, #0] if(status != HAL_OK) - 8004e78: 2313 movs r3, #19 - 8004e7a: 18fb adds r3, r7, r3 - 8004e7c: 781b ldrb r3, [r3, #0] - 8004e7e: 2b00 cmp r3, #0 - 8004e80: d060 beq.n 8004f44 + 8004eb4: 2313 movs r3, #19 + 8004eb6: 18fb adds r3, r7, r3 + 8004eb8: 781b ldrb r3, [r3, #0] + 8004eba: 2b00 cmp r3, #0 + 8004ebc: d060 beq.n 8004f80 { return status; - 8004e82: 2313 movs r3, #19 - 8004e84: 18fb adds r3, r7, r3 - 8004e86: 781b ldrb r3, [r3, #0] - 8004e88: e242 b.n 8005310 + 8004ebe: 2313 movs r3, #19 + 8004ec0: 18fb adds r3, r7, r3 + 8004ec2: 781b ldrb r3, [r3, #0] + 8004ec4: e242 b.n 800534c { /* Check MSI State */ assert_param(IS_RCC_MSI(RCC_OscInitStruct->MSIState)); /* Check the MSI State */ if(RCC_OscInitStruct->MSIState != RCC_MSI_OFF) - 8004e8a: 687b ldr r3, [r7, #4] - 8004e8c: 69db ldr r3, [r3, #28] - 8004e8e: 2b00 cmp r3, #0 - 8004e90: d03e beq.n 8004f10 + 8004ec6: 687b ldr r3, [r7, #4] + 8004ec8: 69db ldr r3, [r3, #28] + 8004eca: 2b00 cmp r3, #0 + 8004ecc: d03e beq.n 8004f4c { /* Enable the Multi Speed oscillator (MSI). */ __HAL_RCC_MSI_ENABLE(); - 8004e92: 4b0a ldr r3, [pc, #40] ; (8004ebc ) - 8004e94: 4a09 ldr r2, [pc, #36] ; (8004ebc ) - 8004e96: 6812 ldr r2, [r2, #0] - 8004e98: 2180 movs r1, #128 ; 0x80 - 8004e9a: 0049 lsls r1, r1, #1 - 8004e9c: 430a orrs r2, r1 - 8004e9e: 601a str r2, [r3, #0] + 8004ece: 4b0a ldr r3, [pc, #40] ; (8004ef8 ) + 8004ed0: 4a09 ldr r2, [pc, #36] ; (8004ef8 ) + 8004ed2: 6812 ldr r2, [r2, #0] + 8004ed4: 2180 movs r1, #128 ; 0x80 + 8004ed6: 0049 lsls r1, r1, #1 + 8004ed8: 430a orrs r2, r1 + 8004eda: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); - 8004ea0: f7ff f844 bl 8003f2c - 8004ea4: 0003 movs r3, r0 - 8004ea6: 617b str r3, [r7, #20] + 8004edc: f7ff f844 bl 8003f68 + 8004ee0: 0003 movs r3, r0 + 8004ee2: 617b str r3, [r7, #20] /* Wait till MSI is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_MSIRDY) == 0U) - 8004ea8: e018 b.n 8004edc + 8004ee4: e018 b.n 8004f18 { if((HAL_GetTick() - tickstart) > MSI_TIMEOUT_VALUE) - 8004eaa: f7ff f83f bl 8003f2c - 8004eae: 0002 movs r2, r0 - 8004eb0: 697b ldr r3, [r7, #20] - 8004eb2: 1ad3 subs r3, r2, r3 - 8004eb4: 2b02 cmp r3, #2 - 8004eb6: d911 bls.n 8004edc + 8004ee6: f7ff f83f bl 8003f68 + 8004eea: 0002 movs r2, r0 + 8004eec: 697b ldr r3, [r7, #20] + 8004eee: 1ad3 subs r3, r2, r3 + 8004ef0: 2b02 cmp r3, #2 + 8004ef2: d911 bls.n 8004f18 { return HAL_TIMEOUT; - 8004eb8: 2303 movs r3, #3 - 8004eba: e229 b.n 8005310 - 8004ebc: 40021000 .word 0x40021000 - 8004ec0: fffeffff .word 0xfffeffff - 8004ec4: fffbffff .word 0xfffbffff - 8004ec8: ffffe0ff .word 0xffffe0ff - 8004ecc: 080071d0 .word 0x080071d0 - 8004ed0: 20000000 .word 0x20000000 - 8004ed4: 20000008 .word 0x20000008 - 8004ed8: ffff1fff .word 0xffff1fff + 8004ef4: 2303 movs r3, #3 + 8004ef6: e229 b.n 800534c + 8004ef8: 40021000 .word 0x40021000 + 8004efc: fffeffff .word 0xfffeffff + 8004f00: fffbffff .word 0xfffbffff + 8004f04: ffffe0ff .word 0xffffe0ff + 8004f08: 0800720c .word 0x0800720c + 8004f0c: 20000000 .word 0x20000000 + 8004f10: 20000008 .word 0x20000008 + 8004f14: ffff1fff .word 0xffff1fff while(__HAL_RCC_GET_FLAG(RCC_FLAG_MSIRDY) == 0U) - 8004edc: 4bca ldr r3, [pc, #808] ; (8005208 ) - 8004ede: 681a ldr r2, [r3, #0] - 8004ee0: 2380 movs r3, #128 ; 0x80 - 8004ee2: 009b lsls r3, r3, #2 - 8004ee4: 4013 ands r3, r2 - 8004ee6: d0e0 beq.n 8004eaa + 8004f18: 4bca ldr r3, [pc, #808] ; (8005244 ) + 8004f1a: 681a ldr r2, [r3, #0] + 8004f1c: 2380 movs r3, #128 ; 0x80 + 8004f1e: 009b lsls r3, r3, #2 + 8004f20: 4013 ands r3, r2 + 8004f22: d0e0 beq.n 8004ee6 /* Check MSICalibrationValue and MSIClockRange input parameters */ assert_param(IS_RCC_MSICALIBRATION_VALUE(RCC_OscInitStruct->MSICalibrationValue)); assert_param(IS_RCC_MSI_CLOCK_RANGE(RCC_OscInitStruct->MSIClockRange)); /* Selects the Multiple Speed oscillator (MSI) clock range .*/ __HAL_RCC_MSI_RANGE_CONFIG(RCC_OscInitStruct->MSIClockRange); - 8004ee8: 4ac7 ldr r2, [pc, #796] ; (8005208 ) - 8004eea: 4bc7 ldr r3, [pc, #796] ; (8005208 ) - 8004eec: 685b ldr r3, [r3, #4] - 8004eee: 49c7 ldr r1, [pc, #796] ; (800520c ) - 8004ef0: 4019 ands r1, r3 - 8004ef2: 687b ldr r3, [r7, #4] - 8004ef4: 6a5b ldr r3, [r3, #36] ; 0x24 - 8004ef6: 430b orrs r3, r1 - 8004ef8: 6053 str r3, [r2, #4] + 8004f24: 4ac7 ldr r2, [pc, #796] ; (8005244 ) + 8004f26: 4bc7 ldr r3, [pc, #796] ; (8005244 ) + 8004f28: 685b ldr r3, [r3, #4] + 8004f2a: 49c7 ldr r1, [pc, #796] ; (8005248 ) + 8004f2c: 4019 ands r1, r3 + 8004f2e: 687b ldr r3, [r7, #4] + 8004f30: 6a5b ldr r3, [r3, #36] ; 0x24 + 8004f32: 430b orrs r3, r1 + 8004f34: 6053 str r3, [r2, #4] /* Adjusts the Multiple Speed oscillator (MSI) calibration value.*/ __HAL_RCC_MSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->MSICalibrationValue); - 8004efa: 4ac3 ldr r2, [pc, #780] ; (8005208 ) - 8004efc: 4bc2 ldr r3, [pc, #776] ; (8005208 ) - 8004efe: 685b ldr r3, [r3, #4] - 8004f00: 021b lsls r3, r3, #8 - 8004f02: 0a19 lsrs r1, r3, #8 - 8004f04: 687b ldr r3, [r7, #4] - 8004f06: 6a1b ldr r3, [r3, #32] - 8004f08: 061b lsls r3, r3, #24 - 8004f0a: 430b orrs r3, r1 - 8004f0c: 6053 str r3, [r2, #4] - 8004f0e: e019 b.n 8004f44 + 8004f36: 4ac3 ldr r2, [pc, #780] ; (8005244 ) + 8004f38: 4bc2 ldr r3, [pc, #776] ; (8005244 ) + 8004f3a: 685b ldr r3, [r3, #4] + 8004f3c: 021b lsls r3, r3, #8 + 8004f3e: 0a19 lsrs r1, r3, #8 + 8004f40: 687b ldr r3, [r7, #4] + 8004f42: 6a1b ldr r3, [r3, #32] + 8004f44: 061b lsls r3, r3, #24 + 8004f46: 430b orrs r3, r1 + 8004f48: 6053 str r3, [r2, #4] + 8004f4a: e019 b.n 8004f80 } else { /* Disable the Multi Speed oscillator (MSI). */ __HAL_RCC_MSI_DISABLE(); - 8004f10: 4bbd ldr r3, [pc, #756] ; (8005208 ) - 8004f12: 4abd ldr r2, [pc, #756] ; (8005208 ) - 8004f14: 6812 ldr r2, [r2, #0] - 8004f16: 49be ldr r1, [pc, #760] ; (8005210 ) - 8004f18: 400a ands r2, r1 - 8004f1a: 601a str r2, [r3, #0] + 8004f4c: 4bbd ldr r3, [pc, #756] ; (8005244 ) + 8004f4e: 4abd ldr r2, [pc, #756] ; (8005244 ) + 8004f50: 6812 ldr r2, [r2, #0] + 8004f52: 49be ldr r1, [pc, #760] ; (800524c ) + 8004f54: 400a ands r2, r1 + 8004f56: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); - 8004f1c: f7ff f806 bl 8003f2c - 8004f20: 0003 movs r3, r0 - 8004f22: 617b str r3, [r7, #20] + 8004f58: f7ff f806 bl 8003f68 + 8004f5c: 0003 movs r3, r0 + 8004f5e: 617b str r3, [r7, #20] /* Wait till MSI is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_MSIRDY) != 0U) - 8004f24: e008 b.n 8004f38 + 8004f60: e008 b.n 8004f74 { if((HAL_GetTick() - tickstart) > MSI_TIMEOUT_VALUE) - 8004f26: f7ff f801 bl 8003f2c - 8004f2a: 0002 movs r2, r0 - 8004f2c: 697b ldr r3, [r7, #20] - 8004f2e: 1ad3 subs r3, r2, r3 - 8004f30: 2b02 cmp r3, #2 - 8004f32: d901 bls.n 8004f38 + 8004f62: f7ff f801 bl 8003f68 + 8004f66: 0002 movs r2, r0 + 8004f68: 697b ldr r3, [r7, #20] + 8004f6a: 1ad3 subs r3, r2, r3 + 8004f6c: 2b02 cmp r3, #2 + 8004f6e: d901 bls.n 8004f74 { return HAL_TIMEOUT; - 8004f34: 2303 movs r3, #3 - 8004f36: e1eb b.n 8005310 + 8004f70: 2303 movs r3, #3 + 8004f72: e1eb b.n 800534c while(__HAL_RCC_GET_FLAG(RCC_FLAG_MSIRDY) != 0U) - 8004f38: 4bb3 ldr r3, [pc, #716] ; (8005208 ) - 8004f3a: 681a ldr r2, [r3, #0] - 8004f3c: 2380 movs r3, #128 ; 0x80 - 8004f3e: 009b lsls r3, r3, #2 - 8004f40: 4013 ands r3, r2 - 8004f42: d1f0 bne.n 8004f26 + 8004f74: 4bb3 ldr r3, [pc, #716] ; (8005244 ) + 8004f76: 681a ldr r2, [r3, #0] + 8004f78: 2380 movs r3, #128 ; 0x80 + 8004f7a: 009b lsls r3, r3, #2 + 8004f7c: 4013 ands r3, r2 + 8004f7e: d1f0 bne.n 8004f62 } } } } /*------------------------------ LSI Configuration -------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI) - 8004f44: 687b ldr r3, [r7, #4] - 8004f46: 681b ldr r3, [r3, #0] - 8004f48: 2208 movs r2, #8 - 8004f4a: 4013 ands r3, r2 - 8004f4c: d036 beq.n 8004fbc + 8004f80: 687b ldr r3, [r7, #4] + 8004f82: 681b ldr r3, [r3, #0] + 8004f84: 2208 movs r2, #8 + 8004f86: 4013 ands r3, r2 + 8004f88: d036 beq.n 8004ff8 { /* Check the parameters */ assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState)); /* Check the LSI State */ if(RCC_OscInitStruct->LSIState != RCC_LSI_OFF) - 8004f4e: 687b ldr r3, [r7, #4] - 8004f50: 695b ldr r3, [r3, #20] - 8004f52: 2b00 cmp r3, #0 - 8004f54: d019 beq.n 8004f8a + 8004f8a: 687b ldr r3, [r7, #4] + 8004f8c: 695b ldr r3, [r3, #20] + 8004f8e: 2b00 cmp r3, #0 + 8004f90: d019 beq.n 8004fc6 { /* Enable the Internal Low Speed oscillator (LSI). */ __HAL_RCC_LSI_ENABLE(); - 8004f56: 4bac ldr r3, [pc, #688] ; (8005208 ) - 8004f58: 4aab ldr r2, [pc, #684] ; (8005208 ) - 8004f5a: 6d12 ldr r2, [r2, #80] ; 0x50 - 8004f5c: 2101 movs r1, #1 - 8004f5e: 430a orrs r2, r1 - 8004f60: 651a str r2, [r3, #80] ; 0x50 + 8004f92: 4bac ldr r3, [pc, #688] ; (8005244 ) + 8004f94: 4aab ldr r2, [pc, #684] ; (8005244 ) + 8004f96: 6d12 ldr r2, [r2, #80] ; 0x50 + 8004f98: 2101 movs r1, #1 + 8004f9a: 430a orrs r2, r1 + 8004f9c: 651a str r2, [r3, #80] ; 0x50 /* Get Start Tick */ tickstart = HAL_GetTick(); - 8004f62: f7fe ffe3 bl 8003f2c - 8004f66: 0003 movs r3, r0 - 8004f68: 617b str r3, [r7, #20] + 8004f9e: f7fe ffe3 bl 8003f68 + 8004fa2: 0003 movs r3, r0 + 8004fa4: 617b str r3, [r7, #20] /* Wait till LSI is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == 0U) - 8004f6a: e008 b.n 8004f7e + 8004fa6: e008 b.n 8004fba { if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE) - 8004f6c: f7fe ffde bl 8003f2c - 8004f70: 0002 movs r2, r0 - 8004f72: 697b ldr r3, [r7, #20] - 8004f74: 1ad3 subs r3, r2, r3 - 8004f76: 2b02 cmp r3, #2 - 8004f78: d901 bls.n 8004f7e + 8004fa8: f7fe ffde bl 8003f68 + 8004fac: 0002 movs r2, r0 + 8004fae: 697b ldr r3, [r7, #20] + 8004fb0: 1ad3 subs r3, r2, r3 + 8004fb2: 2b02 cmp r3, #2 + 8004fb4: d901 bls.n 8004fba { return HAL_TIMEOUT; - 8004f7a: 2303 movs r3, #3 - 8004f7c: e1c8 b.n 8005310 + 8004fb6: 2303 movs r3, #3 + 8004fb8: e1c8 b.n 800534c while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == 0U) - 8004f7e: 4ba2 ldr r3, [pc, #648] ; (8005208 ) - 8004f80: 6d1b ldr r3, [r3, #80] ; 0x50 - 8004f82: 2202 movs r2, #2 - 8004f84: 4013 ands r3, r2 - 8004f86: d0f1 beq.n 8004f6c - 8004f88: e018 b.n 8004fbc + 8004fba: 4ba2 ldr r3, [pc, #648] ; (8005244 ) + 8004fbc: 6d1b ldr r3, [r3, #80] ; 0x50 + 8004fbe: 2202 movs r2, #2 + 8004fc0: 4013 ands r3, r2 + 8004fc2: d0f1 beq.n 8004fa8 + 8004fc4: e018 b.n 8004ff8 } } else { /* Disable the Internal Low Speed oscillator (LSI). */ __HAL_RCC_LSI_DISABLE(); - 8004f8a: 4b9f ldr r3, [pc, #636] ; (8005208 ) - 8004f8c: 4a9e ldr r2, [pc, #632] ; (8005208 ) - 8004f8e: 6d12 ldr r2, [r2, #80] ; 0x50 - 8004f90: 2101 movs r1, #1 - 8004f92: 438a bics r2, r1 - 8004f94: 651a str r2, [r3, #80] ; 0x50 + 8004fc6: 4b9f ldr r3, [pc, #636] ; (8005244 ) + 8004fc8: 4a9e ldr r2, [pc, #632] ; (8005244 ) + 8004fca: 6d12 ldr r2, [r2, #80] ; 0x50 + 8004fcc: 2101 movs r1, #1 + 8004fce: 438a bics r2, r1 + 8004fd0: 651a str r2, [r3, #80] ; 0x50 /* Get Start Tick */ tickstart = HAL_GetTick(); - 8004f96: f7fe ffc9 bl 8003f2c - 8004f9a: 0003 movs r3, r0 - 8004f9c: 617b str r3, [r7, #20] + 8004fd2: f7fe ffc9 bl 8003f68 + 8004fd6: 0003 movs r3, r0 + 8004fd8: 617b str r3, [r7, #20] /* Wait till LSI is disabled */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != 0U) - 8004f9e: e008 b.n 8004fb2 + 8004fda: e008 b.n 8004fee { if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE) - 8004fa0: f7fe ffc4 bl 8003f2c - 8004fa4: 0002 movs r2, r0 - 8004fa6: 697b ldr r3, [r7, #20] - 8004fa8: 1ad3 subs r3, r2, r3 - 8004faa: 2b02 cmp r3, #2 - 8004fac: d901 bls.n 8004fb2 + 8004fdc: f7fe ffc4 bl 8003f68 + 8004fe0: 0002 movs r2, r0 + 8004fe2: 697b ldr r3, [r7, #20] + 8004fe4: 1ad3 subs r3, r2, r3 + 8004fe6: 2b02 cmp r3, #2 + 8004fe8: d901 bls.n 8004fee { return HAL_TIMEOUT; - 8004fae: 2303 movs r3, #3 - 8004fb0: e1ae b.n 8005310 + 8004fea: 2303 movs r3, #3 + 8004fec: e1ae b.n 800534c while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != 0U) - 8004fb2: 4b95 ldr r3, [pc, #596] ; (8005208 ) - 8004fb4: 6d1b ldr r3, [r3, #80] ; 0x50 - 8004fb6: 2202 movs r2, #2 - 8004fb8: 4013 ands r3, r2 - 8004fba: d1f1 bne.n 8004fa0 + 8004fee: 4b95 ldr r3, [pc, #596] ; (8005244 ) + 8004ff0: 6d1b ldr r3, [r3, #80] ; 0x50 + 8004ff2: 2202 movs r2, #2 + 8004ff4: 4013 ands r3, r2 + 8004ff6: d1f1 bne.n 8004fdc } } } } /*------------------------------ LSE Configuration -------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE) - 8004fbc: 687b ldr r3, [r7, #4] - 8004fbe: 681b ldr r3, [r3, #0] - 8004fc0: 2204 movs r2, #4 - 8004fc2: 4013 ands r3, r2 - 8004fc4: d100 bne.n 8004fc8 - 8004fc6: e0af b.n 8005128 + 8004ff8: 687b ldr r3, [r7, #4] + 8004ffa: 681b ldr r3, [r3, #0] + 8004ffc: 2204 movs r2, #4 + 8004ffe: 4013 ands r3, r2 + 8005000: d100 bne.n 8005004 + 8005002: e0af b.n 8005164 { FlagStatus pwrclkchanged = RESET; - 8004fc8: 2323 movs r3, #35 ; 0x23 - 8004fca: 18fb adds r3, r7, r3 - 8004fcc: 2200 movs r2, #0 - 8004fce: 701a strb r2, [r3, #0] + 8005004: 2323 movs r3, #35 ; 0x23 + 8005006: 18fb adds r3, r7, r3 + 8005008: 2200 movs r2, #0 + 800500a: 701a strb r2, [r3, #0] /* Check the parameters */ assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState)); /* Update LSE configuration in Backup Domain control register */ /* Requires to enable write access to Backup Domain of necessary */ if(__HAL_RCC_PWR_IS_CLK_DISABLED()) - 8004fd0: 4b8d ldr r3, [pc, #564] ; (8005208 ) - 8004fd2: 6b9a ldr r2, [r3, #56] ; 0x38 - 8004fd4: 2380 movs r3, #128 ; 0x80 - 8004fd6: 055b lsls r3, r3, #21 - 8004fd8: 4013 ands r3, r2 - 8004fda: d10a bne.n 8004ff2 + 800500c: 4b8d ldr r3, [pc, #564] ; (8005244 ) + 800500e: 6b9a ldr r2, [r3, #56] ; 0x38 + 8005010: 2380 movs r3, #128 ; 0x80 + 8005012: 055b lsls r3, r3, #21 + 8005014: 4013 ands r3, r2 + 8005016: d10a bne.n 800502e { __HAL_RCC_PWR_CLK_ENABLE(); - 8004fdc: 4b8a ldr r3, [pc, #552] ; (8005208 ) - 8004fde: 4a8a ldr r2, [pc, #552] ; (8005208 ) - 8004fe0: 6b92 ldr r2, [r2, #56] ; 0x38 - 8004fe2: 2180 movs r1, #128 ; 0x80 - 8004fe4: 0549 lsls r1, r1, #21 - 8004fe6: 430a orrs r2, r1 - 8004fe8: 639a str r2, [r3, #56] ; 0x38 + 8005018: 4b8a ldr r3, [pc, #552] ; (8005244 ) + 800501a: 4a8a ldr r2, [pc, #552] ; (8005244 ) + 800501c: 6b92 ldr r2, [r2, #56] ; 0x38 + 800501e: 2180 movs r1, #128 ; 0x80 + 8005020: 0549 lsls r1, r1, #21 + 8005022: 430a orrs r2, r1 + 8005024: 639a str r2, [r3, #56] ; 0x38 pwrclkchanged = SET; - 8004fea: 2323 movs r3, #35 ; 0x23 - 8004fec: 18fb adds r3, r7, r3 - 8004fee: 2201 movs r2, #1 - 8004ff0: 701a strb r2, [r3, #0] + 8005026: 2323 movs r3, #35 ; 0x23 + 8005028: 18fb adds r3, r7, r3 + 800502a: 2201 movs r2, #1 + 800502c: 701a strb r2, [r3, #0] } if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) - 8004ff2: 4b88 ldr r3, [pc, #544] ; (8005214 ) - 8004ff4: 681a ldr r2, [r3, #0] - 8004ff6: 2380 movs r3, #128 ; 0x80 - 8004ff8: 005b lsls r3, r3, #1 - 8004ffa: 4013 ands r3, r2 - 8004ffc: d11a bne.n 8005034 + 800502e: 4b88 ldr r3, [pc, #544] ; (8005250 ) + 8005030: 681a ldr r2, [r3, #0] + 8005032: 2380 movs r3, #128 ; 0x80 + 8005034: 005b lsls r3, r3, #1 + 8005036: 4013 ands r3, r2 + 8005038: d11a bne.n 8005070 { /* Enable write access to Backup domain */ SET_BIT(PWR->CR, PWR_CR_DBP); - 8004ffe: 4b85 ldr r3, [pc, #532] ; (8005214 ) - 8005000: 4a84 ldr r2, [pc, #528] ; (8005214 ) - 8005002: 6812 ldr r2, [r2, #0] - 8005004: 2180 movs r1, #128 ; 0x80 - 8005006: 0049 lsls r1, r1, #1 - 8005008: 430a orrs r2, r1 - 800500a: 601a str r2, [r3, #0] + 800503a: 4b85 ldr r3, [pc, #532] ; (8005250 ) + 800503c: 4a84 ldr r2, [pc, #528] ; (8005250 ) + 800503e: 6812 ldr r2, [r2, #0] + 8005040: 2180 movs r1, #128 ; 0x80 + 8005042: 0049 lsls r1, r1, #1 + 8005044: 430a orrs r2, r1 + 8005046: 601a str r2, [r3, #0] /* Wait for Backup domain Write protection disable */ tickstart = HAL_GetTick(); - 800500c: f7fe ff8e bl 8003f2c - 8005010: 0003 movs r3, r0 - 8005012: 617b str r3, [r7, #20] + 8005048: f7fe ff8e bl 8003f68 + 800504c: 0003 movs r3, r0 + 800504e: 617b str r3, [r7, #20] while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) - 8005014: e008 b.n 8005028 + 8005050: e008 b.n 8005064 { if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE) - 8005016: f7fe ff89 bl 8003f2c - 800501a: 0002 movs r2, r0 - 800501c: 697b ldr r3, [r7, #20] - 800501e: 1ad3 subs r3, r2, r3 - 8005020: 2b64 cmp r3, #100 ; 0x64 - 8005022: d901 bls.n 8005028 + 8005052: f7fe ff89 bl 8003f68 + 8005056: 0002 movs r2, r0 + 8005058: 697b ldr r3, [r7, #20] + 800505a: 1ad3 subs r3, r2, r3 + 800505c: 2b64 cmp r3, #100 ; 0x64 + 800505e: d901 bls.n 8005064 { return HAL_TIMEOUT; - 8005024: 2303 movs r3, #3 - 8005026: e173 b.n 8005310 + 8005060: 2303 movs r3, #3 + 8005062: e173 b.n 800534c while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) - 8005028: 4b7a ldr r3, [pc, #488] ; (8005214 ) - 800502a: 681a ldr r2, [r3, #0] - 800502c: 2380 movs r3, #128 ; 0x80 - 800502e: 005b lsls r3, r3, #1 - 8005030: 4013 ands r3, r2 - 8005032: d0f0 beq.n 8005016 + 8005064: 4b7a ldr r3, [pc, #488] ; (8005250 ) + 8005066: 681a ldr r2, [r3, #0] + 8005068: 2380 movs r3, #128 ; 0x80 + 800506a: 005b lsls r3, r3, #1 + 800506c: 4013 ands r3, r2 + 800506e: d0f0 beq.n 8005052 } } } /* Set the new LSE configuration -----------------------------------------*/ __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); - 8005034: 687b ldr r3, [r7, #4] - 8005036: 689a ldr r2, [r3, #8] - 8005038: 2380 movs r3, #128 ; 0x80 - 800503a: 005b lsls r3, r3, #1 - 800503c: 429a cmp r2, r3 - 800503e: d107 bne.n 8005050 - 8005040: 4b71 ldr r3, [pc, #452] ; (8005208 ) - 8005042: 4a71 ldr r2, [pc, #452] ; (8005208 ) - 8005044: 6d12 ldr r2, [r2, #80] ; 0x50 - 8005046: 2180 movs r1, #128 ; 0x80 - 8005048: 0049 lsls r1, r1, #1 - 800504a: 430a orrs r2, r1 - 800504c: 651a str r2, [r3, #80] ; 0x50 - 800504e: e031 b.n 80050b4 - 8005050: 687b ldr r3, [r7, #4] - 8005052: 689b ldr r3, [r3, #8] - 8005054: 2b00 cmp r3, #0 - 8005056: d10c bne.n 8005072 - 8005058: 4b6b ldr r3, [pc, #428] ; (8005208 ) - 800505a: 4a6b ldr r2, [pc, #428] ; (8005208 ) - 800505c: 6d12 ldr r2, [r2, #80] ; 0x50 - 800505e: 496c ldr r1, [pc, #432] ; (8005210 ) - 8005060: 400a ands r2, r1 - 8005062: 651a str r2, [r3, #80] ; 0x50 - 8005064: 4b68 ldr r3, [pc, #416] ; (8005208 ) - 8005066: 4a68 ldr r2, [pc, #416] ; (8005208 ) - 8005068: 6d12 ldr r2, [r2, #80] ; 0x50 - 800506a: 496b ldr r1, [pc, #428] ; (8005218 ) - 800506c: 400a ands r2, r1 - 800506e: 651a str r2, [r3, #80] ; 0x50 - 8005070: e020 b.n 80050b4 - 8005072: 687b ldr r3, [r7, #4] - 8005074: 689a ldr r2, [r3, #8] - 8005076: 23a0 movs r3, #160 ; 0xa0 - 8005078: 00db lsls r3, r3, #3 - 800507a: 429a cmp r2, r3 - 800507c: d10e bne.n 800509c - 800507e: 4b62 ldr r3, [pc, #392] ; (8005208 ) - 8005080: 4a61 ldr r2, [pc, #388] ; (8005208 ) - 8005082: 6d12 ldr r2, [r2, #80] ; 0x50 - 8005084: 2180 movs r1, #128 ; 0x80 - 8005086: 00c9 lsls r1, r1, #3 - 8005088: 430a orrs r2, r1 - 800508a: 651a str r2, [r3, #80] ; 0x50 - 800508c: 4b5e ldr r3, [pc, #376] ; (8005208 ) - 800508e: 4a5e ldr r2, [pc, #376] ; (8005208 ) - 8005090: 6d12 ldr r2, [r2, #80] ; 0x50 - 8005092: 2180 movs r1, #128 ; 0x80 - 8005094: 0049 lsls r1, r1, #1 - 8005096: 430a orrs r2, r1 - 8005098: 651a str r2, [r3, #80] ; 0x50 - 800509a: e00b b.n 80050b4 - 800509c: 4b5a ldr r3, [pc, #360] ; (8005208 ) - 800509e: 4a5a ldr r2, [pc, #360] ; (8005208 ) - 80050a0: 6d12 ldr r2, [r2, #80] ; 0x50 - 80050a2: 495b ldr r1, [pc, #364] ; (8005210 ) - 80050a4: 400a ands r2, r1 - 80050a6: 651a str r2, [r3, #80] ; 0x50 - 80050a8: 4b57 ldr r3, [pc, #348] ; (8005208 ) - 80050aa: 4a57 ldr r2, [pc, #348] ; (8005208 ) - 80050ac: 6d12 ldr r2, [r2, #80] ; 0x50 - 80050ae: 495a ldr r1, [pc, #360] ; (8005218 ) - 80050b0: 400a ands r2, r1 - 80050b2: 651a str r2, [r3, #80] ; 0x50 + 8005070: 687b ldr r3, [r7, #4] + 8005072: 689a ldr r2, [r3, #8] + 8005074: 2380 movs r3, #128 ; 0x80 + 8005076: 005b lsls r3, r3, #1 + 8005078: 429a cmp r2, r3 + 800507a: d107 bne.n 800508c + 800507c: 4b71 ldr r3, [pc, #452] ; (8005244 ) + 800507e: 4a71 ldr r2, [pc, #452] ; (8005244 ) + 8005080: 6d12 ldr r2, [r2, #80] ; 0x50 + 8005082: 2180 movs r1, #128 ; 0x80 + 8005084: 0049 lsls r1, r1, #1 + 8005086: 430a orrs r2, r1 + 8005088: 651a str r2, [r3, #80] ; 0x50 + 800508a: e031 b.n 80050f0 + 800508c: 687b ldr r3, [r7, #4] + 800508e: 689b ldr r3, [r3, #8] + 8005090: 2b00 cmp r3, #0 + 8005092: d10c bne.n 80050ae + 8005094: 4b6b ldr r3, [pc, #428] ; (8005244 ) + 8005096: 4a6b ldr r2, [pc, #428] ; (8005244 ) + 8005098: 6d12 ldr r2, [r2, #80] ; 0x50 + 800509a: 496c ldr r1, [pc, #432] ; (800524c ) + 800509c: 400a ands r2, r1 + 800509e: 651a str r2, [r3, #80] ; 0x50 + 80050a0: 4b68 ldr r3, [pc, #416] ; (8005244 ) + 80050a2: 4a68 ldr r2, [pc, #416] ; (8005244 ) + 80050a4: 6d12 ldr r2, [r2, #80] ; 0x50 + 80050a6: 496b ldr r1, [pc, #428] ; (8005254 ) + 80050a8: 400a ands r2, r1 + 80050aa: 651a str r2, [r3, #80] ; 0x50 + 80050ac: e020 b.n 80050f0 + 80050ae: 687b ldr r3, [r7, #4] + 80050b0: 689a ldr r2, [r3, #8] + 80050b2: 23a0 movs r3, #160 ; 0xa0 + 80050b4: 00db lsls r3, r3, #3 + 80050b6: 429a cmp r2, r3 + 80050b8: d10e bne.n 80050d8 + 80050ba: 4b62 ldr r3, [pc, #392] ; (8005244 ) + 80050bc: 4a61 ldr r2, [pc, #388] ; (8005244 ) + 80050be: 6d12 ldr r2, [r2, #80] ; 0x50 + 80050c0: 2180 movs r1, #128 ; 0x80 + 80050c2: 00c9 lsls r1, r1, #3 + 80050c4: 430a orrs r2, r1 + 80050c6: 651a str r2, [r3, #80] ; 0x50 + 80050c8: 4b5e ldr r3, [pc, #376] ; (8005244 ) + 80050ca: 4a5e ldr r2, [pc, #376] ; (8005244 ) + 80050cc: 6d12 ldr r2, [r2, #80] ; 0x50 + 80050ce: 2180 movs r1, #128 ; 0x80 + 80050d0: 0049 lsls r1, r1, #1 + 80050d2: 430a orrs r2, r1 + 80050d4: 651a str r2, [r3, #80] ; 0x50 + 80050d6: e00b b.n 80050f0 + 80050d8: 4b5a ldr r3, [pc, #360] ; (8005244 ) + 80050da: 4a5a ldr r2, [pc, #360] ; (8005244 ) + 80050dc: 6d12 ldr r2, [r2, #80] ; 0x50 + 80050de: 495b ldr r1, [pc, #364] ; (800524c ) + 80050e0: 400a ands r2, r1 + 80050e2: 651a str r2, [r3, #80] ; 0x50 + 80050e4: 4b57 ldr r3, [pc, #348] ; (8005244 ) + 80050e6: 4a57 ldr r2, [pc, #348] ; (8005244 ) + 80050e8: 6d12 ldr r2, [r2, #80] ; 0x50 + 80050ea: 495a ldr r1, [pc, #360] ; (8005254 ) + 80050ec: 400a ands r2, r1 + 80050ee: 651a str r2, [r3, #80] ; 0x50 /* Check the LSE State */ if(RCC_OscInitStruct->LSEState != RCC_LSE_OFF) - 80050b4: 687b ldr r3, [r7, #4] - 80050b6: 689b ldr r3, [r3, #8] - 80050b8: 2b00 cmp r3, #0 - 80050ba: d015 beq.n 80050e8 + 80050f0: 687b ldr r3, [r7, #4] + 80050f2: 689b ldr r3, [r3, #8] + 80050f4: 2b00 cmp r3, #0 + 80050f6: d015 beq.n 8005124 { /* Get Start Tick */ tickstart = HAL_GetTick(); - 80050bc: f7fe ff36 bl 8003f2c - 80050c0: 0003 movs r3, r0 - 80050c2: 617b str r3, [r7, #20] + 80050f8: f7fe ff36 bl 8003f68 + 80050fc: 0003 movs r3, r0 + 80050fe: 617b str r3, [r7, #20] /* Wait till LSE is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == 0U) - 80050c4: e009 b.n 80050da + 8005100: e009 b.n 8005116 { if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) - 80050c6: f7fe ff31 bl 8003f2c - 80050ca: 0002 movs r2, r0 - 80050cc: 697b ldr r3, [r7, #20] - 80050ce: 1ad3 subs r3, r2, r3 - 80050d0: 4a52 ldr r2, [pc, #328] ; (800521c ) - 80050d2: 4293 cmp r3, r2 - 80050d4: d901 bls.n 80050da + 8005102: f7fe ff31 bl 8003f68 + 8005106: 0002 movs r2, r0 + 8005108: 697b ldr r3, [r7, #20] + 800510a: 1ad3 subs r3, r2, r3 + 800510c: 4a52 ldr r2, [pc, #328] ; (8005258 ) + 800510e: 4293 cmp r3, r2 + 8005110: d901 bls.n 8005116 { return HAL_TIMEOUT; - 80050d6: 2303 movs r3, #3 - 80050d8: e11a b.n 8005310 + 8005112: 2303 movs r3, #3 + 8005114: e11a b.n 800534c while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == 0U) - 80050da: 4b4b ldr r3, [pc, #300] ; (8005208 ) - 80050dc: 6d1a ldr r2, [r3, #80] ; 0x50 - 80050de: 2380 movs r3, #128 ; 0x80 - 80050e0: 009b lsls r3, r3, #2 - 80050e2: 4013 ands r3, r2 - 80050e4: d0ef beq.n 80050c6 - 80050e6: e014 b.n 8005112 + 8005116: 4b4b ldr r3, [pc, #300] ; (8005244 ) + 8005118: 6d1a ldr r2, [r3, #80] ; 0x50 + 800511a: 2380 movs r3, #128 ; 0x80 + 800511c: 009b lsls r3, r3, #2 + 800511e: 4013 ands r3, r2 + 8005120: d0ef beq.n 8005102 + 8005122: e014 b.n 800514e } } else { /* Get Start Tick */ tickstart = HAL_GetTick(); - 80050e8: f7fe ff20 bl 8003f2c - 80050ec: 0003 movs r3, r0 - 80050ee: 617b str r3, [r7, #20] + 8005124: f7fe ff20 bl 8003f68 + 8005128: 0003 movs r3, r0 + 800512a: 617b str r3, [r7, #20] /* Wait till LSE is disabled */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != 0U) - 80050f0: e009 b.n 8005106 + 800512c: e009 b.n 8005142 { if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) - 80050f2: f7fe ff1b bl 8003f2c - 80050f6: 0002 movs r2, r0 - 80050f8: 697b ldr r3, [r7, #20] - 80050fa: 1ad3 subs r3, r2, r3 - 80050fc: 4a47 ldr r2, [pc, #284] ; (800521c ) - 80050fe: 4293 cmp r3, r2 - 8005100: d901 bls.n 8005106 + 800512e: f7fe ff1b bl 8003f68 + 8005132: 0002 movs r2, r0 + 8005134: 697b ldr r3, [r7, #20] + 8005136: 1ad3 subs r3, r2, r3 + 8005138: 4a47 ldr r2, [pc, #284] ; (8005258 ) + 800513a: 4293 cmp r3, r2 + 800513c: d901 bls.n 8005142 { return HAL_TIMEOUT; - 8005102: 2303 movs r3, #3 - 8005104: e104 b.n 8005310 + 800513e: 2303 movs r3, #3 + 8005140: e104 b.n 800534c while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != 0U) - 8005106: 4b40 ldr r3, [pc, #256] ; (8005208 ) - 8005108: 6d1a ldr r2, [r3, #80] ; 0x50 - 800510a: 2380 movs r3, #128 ; 0x80 - 800510c: 009b lsls r3, r3, #2 - 800510e: 4013 ands r3, r2 - 8005110: d1ef bne.n 80050f2 + 8005142: 4b40 ldr r3, [pc, #256] ; (8005244 ) + 8005144: 6d1a ldr r2, [r3, #80] ; 0x50 + 8005146: 2380 movs r3, #128 ; 0x80 + 8005148: 009b lsls r3, r3, #2 + 800514a: 4013 ands r3, r2 + 800514c: d1ef bne.n 800512e } } } /* Require to disable power clock if necessary */ if(pwrclkchanged == SET) - 8005112: 2323 movs r3, #35 ; 0x23 - 8005114: 18fb adds r3, r7, r3 - 8005116: 781b ldrb r3, [r3, #0] - 8005118: 2b01 cmp r3, #1 - 800511a: d105 bne.n 8005128 + 800514e: 2323 movs r3, #35 ; 0x23 + 8005150: 18fb adds r3, r7, r3 + 8005152: 781b ldrb r3, [r3, #0] + 8005154: 2b01 cmp r3, #1 + 8005156: d105 bne.n 8005164 { __HAL_RCC_PWR_CLK_DISABLE(); - 800511c: 4b3a ldr r3, [pc, #232] ; (8005208 ) - 800511e: 4a3a ldr r2, [pc, #232] ; (8005208 ) - 8005120: 6b92 ldr r2, [r2, #56] ; 0x38 - 8005122: 493f ldr r1, [pc, #252] ; (8005220 ) - 8005124: 400a ands r2, r1 - 8005126: 639a str r2, [r3, #56] ; 0x38 + 8005158: 4b3a ldr r3, [pc, #232] ; (8005244 ) + 800515a: 4a3a ldr r2, [pc, #232] ; (8005244 ) + 800515c: 6b92 ldr r2, [r2, #56] ; 0x38 + 800515e: 493f ldr r1, [pc, #252] ; (800525c ) + 8005160: 400a ands r2, r1 + 8005162: 639a str r2, [r3, #56] ; 0x38 } } #if defined(RCC_HSI48_SUPPORT) /*----------------------------- HSI48 Configuration --------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI48) == RCC_OSCILLATORTYPE_HSI48) - 8005128: 687b ldr r3, [r7, #4] - 800512a: 681b ldr r3, [r3, #0] - 800512c: 2220 movs r2, #32 - 800512e: 4013 ands r3, r2 - 8005130: d049 beq.n 80051c6 + 8005164: 687b ldr r3, [r7, #4] + 8005166: 681b ldr r3, [r3, #0] + 8005168: 2220 movs r2, #32 + 800516a: 4013 ands r3, r2 + 800516c: d049 beq.n 8005202 { /* Check the parameters */ assert_param(IS_RCC_HSI48(RCC_OscInitStruct->HSI48State)); /* Check the HSI48 State */ if(RCC_OscInitStruct->HSI48State != RCC_HSI48_OFF) - 8005132: 687b ldr r3, [r7, #4] - 8005134: 699b ldr r3, [r3, #24] - 8005136: 2b00 cmp r3, #0 - 8005138: d026 beq.n 8005188 + 800516e: 687b ldr r3, [r7, #4] + 8005170: 699b ldr r3, [r3, #24] + 8005172: 2b00 cmp r3, #0 + 8005174: d026 beq.n 80051c4 { /* Enable the Internal High Speed oscillator (HSI48). */ __HAL_RCC_HSI48_ENABLE(); - 800513a: 4b33 ldr r3, [pc, #204] ; (8005208 ) - 800513c: 4a32 ldr r2, [pc, #200] ; (8005208 ) - 800513e: 6892 ldr r2, [r2, #8] - 8005140: 2101 movs r1, #1 - 8005142: 430a orrs r2, r1 - 8005144: 609a str r2, [r3, #8] - 8005146: 4b30 ldr r3, [pc, #192] ; (8005208 ) - 8005148: 4a2f ldr r2, [pc, #188] ; (8005208 ) - 800514a: 6b52 ldr r2, [r2, #52] ; 0x34 - 800514c: 2101 movs r1, #1 - 800514e: 430a orrs r2, r1 - 8005150: 635a str r2, [r3, #52] ; 0x34 - 8005152: 4b34 ldr r3, [pc, #208] ; (8005224 ) - 8005154: 4a33 ldr r2, [pc, #204] ; (8005224 ) - 8005156: 6a12 ldr r2, [r2, #32] - 8005158: 2180 movs r1, #128 ; 0x80 - 800515a: 0189 lsls r1, r1, #6 - 800515c: 430a orrs r2, r1 - 800515e: 621a str r2, [r3, #32] + 8005176: 4b33 ldr r3, [pc, #204] ; (8005244 ) + 8005178: 4a32 ldr r2, [pc, #200] ; (8005244 ) + 800517a: 6892 ldr r2, [r2, #8] + 800517c: 2101 movs r1, #1 + 800517e: 430a orrs r2, r1 + 8005180: 609a str r2, [r3, #8] + 8005182: 4b30 ldr r3, [pc, #192] ; (8005244 ) + 8005184: 4a2f ldr r2, [pc, #188] ; (8005244 ) + 8005186: 6b52 ldr r2, [r2, #52] ; 0x34 + 8005188: 2101 movs r1, #1 + 800518a: 430a orrs r2, r1 + 800518c: 635a str r2, [r3, #52] ; 0x34 + 800518e: 4b34 ldr r3, [pc, #208] ; (8005260 ) + 8005190: 4a33 ldr r2, [pc, #204] ; (8005260 ) + 8005192: 6a12 ldr r2, [r2, #32] + 8005194: 2180 movs r1, #128 ; 0x80 + 8005196: 0189 lsls r1, r1, #6 + 8005198: 430a orrs r2, r1 + 800519a: 621a str r2, [r3, #32] /* Get Start Tick */ tickstart = HAL_GetTick(); - 8005160: f7fe fee4 bl 8003f2c - 8005164: 0003 movs r3, r0 - 8005166: 617b str r3, [r7, #20] + 800519c: f7fe fee4 bl 8003f68 + 80051a0: 0003 movs r3, r0 + 80051a2: 617b str r3, [r7, #20] /* Wait till HSI48 is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSI48RDY) == 0U) - 8005168: e008 b.n 800517c + 80051a4: e008 b.n 80051b8 { if((HAL_GetTick() - tickstart) > HSI48_TIMEOUT_VALUE) - 800516a: f7fe fedf bl 8003f2c - 800516e: 0002 movs r2, r0 - 8005170: 697b ldr r3, [r7, #20] - 8005172: 1ad3 subs r3, r2, r3 - 8005174: 2b02 cmp r3, #2 - 8005176: d901 bls.n 800517c + 80051a6: f7fe fedf bl 8003f68 + 80051aa: 0002 movs r2, r0 + 80051ac: 697b ldr r3, [r7, #20] + 80051ae: 1ad3 subs r3, r2, r3 + 80051b0: 2b02 cmp r3, #2 + 80051b2: d901 bls.n 80051b8 { return HAL_TIMEOUT; - 8005178: 2303 movs r3, #3 - 800517a: e0c9 b.n 8005310 + 80051b4: 2303 movs r3, #3 + 80051b6: e0c9 b.n 800534c while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSI48RDY) == 0U) - 800517c: 4b22 ldr r3, [pc, #136] ; (8005208 ) - 800517e: 689b ldr r3, [r3, #8] - 8005180: 2202 movs r2, #2 - 8005182: 4013 ands r3, r2 - 8005184: d0f1 beq.n 800516a - 8005186: e01e b.n 80051c6 + 80051b8: 4b22 ldr r3, [pc, #136] ; (8005244 ) + 80051ba: 689b ldr r3, [r3, #8] + 80051bc: 2202 movs r2, #2 + 80051be: 4013 ands r3, r2 + 80051c0: d0f1 beq.n 80051a6 + 80051c2: e01e b.n 8005202 } } else { /* Disable the Internal High Speed oscillator (HSI48). */ __HAL_RCC_HSI48_DISABLE(); - 8005188: 4b1f ldr r3, [pc, #124] ; (8005208 ) - 800518a: 4a1f ldr r2, [pc, #124] ; (8005208 ) - 800518c: 6892 ldr r2, [r2, #8] - 800518e: 2101 movs r1, #1 - 8005190: 438a bics r2, r1 - 8005192: 609a str r2, [r3, #8] - 8005194: 4b23 ldr r3, [pc, #140] ; (8005224 ) - 8005196: 4a23 ldr r2, [pc, #140] ; (8005224 ) - 8005198: 6a12 ldr r2, [r2, #32] - 800519a: 4923 ldr r1, [pc, #140] ; (8005228 ) - 800519c: 400a ands r2, r1 - 800519e: 621a str r2, [r3, #32] + 80051c4: 4b1f ldr r3, [pc, #124] ; (8005244 ) + 80051c6: 4a1f ldr r2, [pc, #124] ; (8005244 ) + 80051c8: 6892 ldr r2, [r2, #8] + 80051ca: 2101 movs r1, #1 + 80051cc: 438a bics r2, r1 + 80051ce: 609a str r2, [r3, #8] + 80051d0: 4b23 ldr r3, [pc, #140] ; (8005260 ) + 80051d2: 4a23 ldr r2, [pc, #140] ; (8005260 ) + 80051d4: 6a12 ldr r2, [r2, #32] + 80051d6: 4923 ldr r1, [pc, #140] ; (8005264 ) + 80051d8: 400a ands r2, r1 + 80051da: 621a str r2, [r3, #32] /* Get Start Tick */ tickstart = HAL_GetTick(); - 80051a0: f7fe fec4 bl 8003f2c - 80051a4: 0003 movs r3, r0 - 80051a6: 617b str r3, [r7, #20] + 80051dc: f7fe fec4 bl 8003f68 + 80051e0: 0003 movs r3, r0 + 80051e2: 617b str r3, [r7, #20] /* Wait till HSI48 is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSI48RDY) != 0U) - 80051a8: e008 b.n 80051bc + 80051e4: e008 b.n 80051f8 { if((HAL_GetTick() - tickstart) > HSI48_TIMEOUT_VALUE) - 80051aa: f7fe febf bl 8003f2c - 80051ae: 0002 movs r2, r0 - 80051b0: 697b ldr r3, [r7, #20] - 80051b2: 1ad3 subs r3, r2, r3 - 80051b4: 2b02 cmp r3, #2 - 80051b6: d901 bls.n 80051bc + 80051e6: f7fe febf bl 8003f68 + 80051ea: 0002 movs r2, r0 + 80051ec: 697b ldr r3, [r7, #20] + 80051ee: 1ad3 subs r3, r2, r3 + 80051f0: 2b02 cmp r3, #2 + 80051f2: d901 bls.n 80051f8 { return HAL_TIMEOUT; - 80051b8: 2303 movs r3, #3 - 80051ba: e0a9 b.n 8005310 + 80051f4: 2303 movs r3, #3 + 80051f6: e0a9 b.n 800534c while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSI48RDY) != 0U) - 80051bc: 4b12 ldr r3, [pc, #72] ; (8005208 ) - 80051be: 689b ldr r3, [r3, #8] - 80051c0: 2202 movs r2, #2 - 80051c2: 4013 ands r3, r2 - 80051c4: d1f1 bne.n 80051aa + 80051f8: 4b12 ldr r3, [pc, #72] ; (8005244 ) + 80051fa: 689b ldr r3, [r3, #8] + 80051fc: 2202 movs r2, #2 + 80051fe: 4013 ands r3, r2 + 8005200: d1f1 bne.n 80051e6 #endif /* RCC_HSI48_SUPPORT */ /*-------------------------------- PLL Configuration -----------------------*/ /* Check the parameters */ assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState)); if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE) - 80051c6: 687b ldr r3, [r7, #4] - 80051c8: 6a9b ldr r3, [r3, #40] ; 0x28 - 80051ca: 2b00 cmp r3, #0 - 80051cc: d100 bne.n 80051d0 - 80051ce: e09e b.n 800530e + 8005202: 687b ldr r3, [r7, #4] + 8005204: 6a9b ldr r3, [r3, #40] ; 0x28 + 8005206: 2b00 cmp r3, #0 + 8005208: d100 bne.n 800520c + 800520a: e09e b.n 800534a { /* Check if the PLL is used as system clock or not */ if(sysclk_source != RCC_SYSCLKSOURCE_STATUS_PLLCLK) - 80051d0: 69fb ldr r3, [r7, #28] - 80051d2: 2b0c cmp r3, #12 - 80051d4: d100 bne.n 80051d8 - 80051d6: e077 b.n 80052c8 + 800520c: 69fb ldr r3, [r7, #28] + 800520e: 2b0c cmp r3, #12 + 8005210: d100 bne.n 8005214 + 8005212: e077 b.n 8005304 { if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON) - 80051d8: 687b ldr r3, [r7, #4] - 80051da: 6a9b ldr r3, [r3, #40] ; 0x28 - 80051dc: 2b02 cmp r3, #2 - 80051de: d158 bne.n 8005292 + 8005214: 687b ldr r3, [r7, #4] + 8005216: 6a9b ldr r3, [r3, #40] ; 0x28 + 8005218: 2b02 cmp r3, #2 + 800521a: d158 bne.n 80052ce assert_param(IS_RCC_PLLSOURCE(RCC_OscInitStruct->PLL.PLLSource)); assert_param(IS_RCC_PLL_MUL(RCC_OscInitStruct->PLL.PLLMUL)); assert_param(IS_RCC_PLL_DIV(RCC_OscInitStruct->PLL.PLLDIV)); /* Disable the main PLL. */ __HAL_RCC_PLL_DISABLE(); - 80051e0: 4b09 ldr r3, [pc, #36] ; (8005208 ) - 80051e2: 4a09 ldr r2, [pc, #36] ; (8005208 ) - 80051e4: 6812 ldr r2, [r2, #0] - 80051e6: 4911 ldr r1, [pc, #68] ; (800522c ) - 80051e8: 400a ands r2, r1 - 80051ea: 601a str r2, [r3, #0] + 800521c: 4b09 ldr r3, [pc, #36] ; (8005244 ) + 800521e: 4a09 ldr r2, [pc, #36] ; (8005244 ) + 8005220: 6812 ldr r2, [r2, #0] + 8005222: 4911 ldr r1, [pc, #68] ; (8005268 ) + 8005224: 400a ands r2, r1 + 8005226: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); - 80051ec: f7fe fe9e bl 8003f2c - 80051f0: 0003 movs r3, r0 - 80051f2: 617b str r3, [r7, #20] + 8005228: f7fe fe9e bl 8003f68 + 800522c: 0003 movs r3, r0 + 800522e: 617b str r3, [r7, #20] /* Wait till PLL is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != 0U) - 80051f4: e01c b.n 8005230 + 8005230: e01c b.n 800526c { if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) - 80051f6: f7fe fe99 bl 8003f2c - 80051fa: 0002 movs r2, r0 - 80051fc: 697b ldr r3, [r7, #20] - 80051fe: 1ad3 subs r3, r2, r3 - 8005200: 2b02 cmp r3, #2 - 8005202: d915 bls.n 8005230 + 8005232: f7fe fe99 bl 8003f68 + 8005236: 0002 movs r2, r0 + 8005238: 697b ldr r3, [r7, #20] + 800523a: 1ad3 subs r3, r2, r3 + 800523c: 2b02 cmp r3, #2 + 800523e: d915 bls.n 800526c { return HAL_TIMEOUT; - 8005204: 2303 movs r3, #3 - 8005206: e083 b.n 8005310 - 8005208: 40021000 .word 0x40021000 - 800520c: ffff1fff .word 0xffff1fff - 8005210: fffffeff .word 0xfffffeff - 8005214: 40007000 .word 0x40007000 - 8005218: fffffbff .word 0xfffffbff - 800521c: 00001388 .word 0x00001388 - 8005220: efffffff .word 0xefffffff - 8005224: 40010000 .word 0x40010000 - 8005228: ffffdfff .word 0xffffdfff - 800522c: feffffff .word 0xfeffffff + 8005240: 2303 movs r3, #3 + 8005242: e083 b.n 800534c + 8005244: 40021000 .word 0x40021000 + 8005248: ffff1fff .word 0xffff1fff + 800524c: fffffeff .word 0xfffffeff + 8005250: 40007000 .word 0x40007000 + 8005254: fffffbff .word 0xfffffbff + 8005258: 00001388 .word 0x00001388 + 800525c: efffffff .word 0xefffffff + 8005260: 40010000 .word 0x40010000 + 8005264: ffffdfff .word 0xffffdfff + 8005268: feffffff .word 0xfeffffff while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != 0U) - 8005230: 4b39 ldr r3, [pc, #228] ; (8005318 ) - 8005232: 681a ldr r2, [r3, #0] - 8005234: 2380 movs r3, #128 ; 0x80 - 8005236: 049b lsls r3, r3, #18 - 8005238: 4013 ands r3, r2 - 800523a: d1dc bne.n 80051f6 + 800526c: 4b39 ldr r3, [pc, #228] ; (8005354 ) + 800526e: 681a ldr r2, [r3, #0] + 8005270: 2380 movs r3, #128 ; 0x80 + 8005272: 049b lsls r3, r3, #18 + 8005274: 4013 ands r3, r2 + 8005276: d1dc bne.n 8005232 } } /* Configure the main PLL clock source, multiplication and division factors. */ __HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource, - 800523c: 4a36 ldr r2, [pc, #216] ; (8005318 ) - 800523e: 4b36 ldr r3, [pc, #216] ; (8005318 ) - 8005240: 68db ldr r3, [r3, #12] - 8005242: 4936 ldr r1, [pc, #216] ; (800531c ) - 8005244: 4019 ands r1, r3 - 8005246: 687b ldr r3, [r7, #4] - 8005248: 6ad8 ldr r0, [r3, #44] ; 0x2c - 800524a: 687b ldr r3, [r7, #4] - 800524c: 6b1b ldr r3, [r3, #48] ; 0x30 - 800524e: 4318 orrs r0, r3 - 8005250: 687b ldr r3, [r7, #4] - 8005252: 6b5b ldr r3, [r3, #52] ; 0x34 - 8005254: 4303 orrs r3, r0 - 8005256: 430b orrs r3, r1 - 8005258: 60d3 str r3, [r2, #12] + 8005278: 4a36 ldr r2, [pc, #216] ; (8005354 ) + 800527a: 4b36 ldr r3, [pc, #216] ; (8005354 ) + 800527c: 68db ldr r3, [r3, #12] + 800527e: 4936 ldr r1, [pc, #216] ; (8005358 ) + 8005280: 4019 ands r1, r3 + 8005282: 687b ldr r3, [r7, #4] + 8005284: 6ad8 ldr r0, [r3, #44] ; 0x2c + 8005286: 687b ldr r3, [r7, #4] + 8005288: 6b1b ldr r3, [r3, #48] ; 0x30 + 800528a: 4318 orrs r0, r3 + 800528c: 687b ldr r3, [r7, #4] + 800528e: 6b5b ldr r3, [r3, #52] ; 0x34 + 8005290: 4303 orrs r3, r0 + 8005292: 430b orrs r3, r1 + 8005294: 60d3 str r3, [r2, #12] RCC_OscInitStruct->PLL.PLLMUL, RCC_OscInitStruct->PLL.PLLDIV); /* Enable the main PLL. */ __HAL_RCC_PLL_ENABLE(); - 800525a: 4b2f ldr r3, [pc, #188] ; (8005318 ) - 800525c: 4a2e ldr r2, [pc, #184] ; (8005318 ) - 800525e: 6812 ldr r2, [r2, #0] - 8005260: 2180 movs r1, #128 ; 0x80 - 8005262: 0449 lsls r1, r1, #17 - 8005264: 430a orrs r2, r1 - 8005266: 601a str r2, [r3, #0] + 8005296: 4b2f ldr r3, [pc, #188] ; (8005354 ) + 8005298: 4a2e ldr r2, [pc, #184] ; (8005354 ) + 800529a: 6812 ldr r2, [r2, #0] + 800529c: 2180 movs r1, #128 ; 0x80 + 800529e: 0449 lsls r1, r1, #17 + 80052a0: 430a orrs r2, r1 + 80052a2: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); - 8005268: f7fe fe60 bl 8003f2c - 800526c: 0003 movs r3, r0 - 800526e: 617b str r3, [r7, #20] + 80052a4: f7fe fe60 bl 8003f68 + 80052a8: 0003 movs r3, r0 + 80052aa: 617b str r3, [r7, #20] /* Wait till PLL is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == 0U) - 8005270: e008 b.n 8005284 + 80052ac: e008 b.n 80052c0 { if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) - 8005272: f7fe fe5b bl 8003f2c - 8005276: 0002 movs r2, r0 - 8005278: 697b ldr r3, [r7, #20] - 800527a: 1ad3 subs r3, r2, r3 - 800527c: 2b02 cmp r3, #2 - 800527e: d901 bls.n 8005284 + 80052ae: f7fe fe5b bl 8003f68 + 80052b2: 0002 movs r2, r0 + 80052b4: 697b ldr r3, [r7, #20] + 80052b6: 1ad3 subs r3, r2, r3 + 80052b8: 2b02 cmp r3, #2 + 80052ba: d901 bls.n 80052c0 { return HAL_TIMEOUT; - 8005280: 2303 movs r3, #3 - 8005282: e045 b.n 8005310 + 80052bc: 2303 movs r3, #3 + 80052be: e045 b.n 800534c while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == 0U) - 8005284: 4b24 ldr r3, [pc, #144] ; (8005318 ) - 8005286: 681a ldr r2, [r3, #0] - 8005288: 2380 movs r3, #128 ; 0x80 - 800528a: 049b lsls r3, r3, #18 - 800528c: 4013 ands r3, r2 - 800528e: d0f0 beq.n 8005272 - 8005290: e03d b.n 800530e + 80052c0: 4b24 ldr r3, [pc, #144] ; (8005354 ) + 80052c2: 681a ldr r2, [r3, #0] + 80052c4: 2380 movs r3, #128 ; 0x80 + 80052c6: 049b lsls r3, r3, #18 + 80052c8: 4013 ands r3, r2 + 80052ca: d0f0 beq.n 80052ae + 80052cc: e03d b.n 800534a } } else { /* Disable the main PLL. */ __HAL_RCC_PLL_DISABLE(); - 8005292: 4b21 ldr r3, [pc, #132] ; (8005318 ) - 8005294: 4a20 ldr r2, [pc, #128] ; (8005318 ) - 8005296: 6812 ldr r2, [r2, #0] - 8005298: 4921 ldr r1, [pc, #132] ; (8005320 ) - 800529a: 400a ands r2, r1 - 800529c: 601a str r2, [r3, #0] + 80052ce: 4b21 ldr r3, [pc, #132] ; (8005354 ) + 80052d0: 4a20 ldr r2, [pc, #128] ; (8005354 ) + 80052d2: 6812 ldr r2, [r2, #0] + 80052d4: 4921 ldr r1, [pc, #132] ; (800535c ) + 80052d6: 400a ands r2, r1 + 80052d8: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); - 800529e: f7fe fe45 bl 8003f2c - 80052a2: 0003 movs r3, r0 - 80052a4: 617b str r3, [r7, #20] + 80052da: f7fe fe45 bl 8003f68 + 80052de: 0003 movs r3, r0 + 80052e0: 617b str r3, [r7, #20] /* Wait till PLL is disabled */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != 0U) - 80052a6: e008 b.n 80052ba + 80052e2: e008 b.n 80052f6 { if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) - 80052a8: f7fe fe40 bl 8003f2c - 80052ac: 0002 movs r2, r0 - 80052ae: 697b ldr r3, [r7, #20] - 80052b0: 1ad3 subs r3, r2, r3 - 80052b2: 2b02 cmp r3, #2 - 80052b4: d901 bls.n 80052ba + 80052e4: f7fe fe40 bl 8003f68 + 80052e8: 0002 movs r2, r0 + 80052ea: 697b ldr r3, [r7, #20] + 80052ec: 1ad3 subs r3, r2, r3 + 80052ee: 2b02 cmp r3, #2 + 80052f0: d901 bls.n 80052f6 { return HAL_TIMEOUT; - 80052b6: 2303 movs r3, #3 - 80052b8: e02a b.n 8005310 + 80052f2: 2303 movs r3, #3 + 80052f4: e02a b.n 800534c while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != 0U) - 80052ba: 4b17 ldr r3, [pc, #92] ; (8005318 ) - 80052bc: 681a ldr r2, [r3, #0] - 80052be: 2380 movs r3, #128 ; 0x80 - 80052c0: 049b lsls r3, r3, #18 - 80052c2: 4013 ands r3, r2 - 80052c4: d1f0 bne.n 80052a8 - 80052c6: e022 b.n 800530e + 80052f6: 4b17 ldr r3, [pc, #92] ; (8005354 ) + 80052f8: 681a ldr r2, [r3, #0] + 80052fa: 2380 movs r3, #128 ; 0x80 + 80052fc: 049b lsls r3, r3, #18 + 80052fe: 4013 ands r3, r2 + 8005300: d1f0 bne.n 80052e4 + 8005302: e022 b.n 800534a } } else { /* Check if there is a request to disable the PLL used as System clock source */ if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF) - 80052c8: 687b ldr r3, [r7, #4] - 80052ca: 6a9b ldr r3, [r3, #40] ; 0x28 - 80052cc: 2b01 cmp r3, #1 - 80052ce: d101 bne.n 80052d4 + 8005304: 687b ldr r3, [r7, #4] + 8005306: 6a9b ldr r3, [r3, #40] ; 0x28 + 8005308: 2b01 cmp r3, #1 + 800530a: d101 bne.n 8005310 { return HAL_ERROR; - 80052d0: 2301 movs r3, #1 - 80052d2: e01d b.n 8005310 + 800530c: 2301 movs r3, #1 + 800530e: e01d b.n 800534c } else { /* Do not return HAL_ERROR if request repeats the current configuration */ pll_config = RCC->CFGR; - 80052d4: 4b10 ldr r3, [pc, #64] ; (8005318 ) - 80052d6: 68db ldr r3, [r3, #12] - 80052d8: 61bb str r3, [r7, #24] + 8005310: 4b10 ldr r3, [pc, #64] ; (8005354 ) + 8005312: 68db ldr r3, [r3, #12] + 8005314: 61bb str r3, [r7, #24] if((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) || - 80052da: 69ba ldr r2, [r7, #24] - 80052dc: 2380 movs r3, #128 ; 0x80 - 80052de: 025b lsls r3, r3, #9 - 80052e0: 401a ands r2, r3 - 80052e2: 687b ldr r3, [r7, #4] - 80052e4: 6adb ldr r3, [r3, #44] ; 0x2c - 80052e6: 429a cmp r2, r3 - 80052e8: d10f bne.n 800530a + 8005316: 69ba ldr r2, [r7, #24] + 8005318: 2380 movs r3, #128 ; 0x80 + 800531a: 025b lsls r3, r3, #9 + 800531c: 401a ands r2, r3 + 800531e: 687b ldr r3, [r7, #4] + 8005320: 6adb ldr r3, [r3, #44] ; 0x2c + 8005322: 429a cmp r2, r3 + 8005324: d10f bne.n 8005346 (READ_BIT(pll_config, RCC_CFGR_PLLMUL) != RCC_OscInitStruct->PLL.PLLMUL) || - 80052ea: 69ba ldr r2, [r7, #24] - 80052ec: 23f0 movs r3, #240 ; 0xf0 - 80052ee: 039b lsls r3, r3, #14 - 80052f0: 401a ands r2, r3 - 80052f2: 687b ldr r3, [r7, #4] - 80052f4: 6b1b ldr r3, [r3, #48] ; 0x30 + 8005326: 69ba ldr r2, [r7, #24] + 8005328: 23f0 movs r3, #240 ; 0xf0 + 800532a: 039b lsls r3, r3, #14 + 800532c: 401a ands r2, r3 + 800532e: 687b ldr r3, [r7, #4] + 8005330: 6b1b ldr r3, [r3, #48] ; 0x30 if((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) || - 80052f6: 429a cmp r2, r3 - 80052f8: d107 bne.n 800530a + 8005332: 429a cmp r2, r3 + 8005334: d107 bne.n 8005346 (READ_BIT(pll_config, RCC_CFGR_PLLDIV) != RCC_OscInitStruct->PLL.PLLDIV)) - 80052fa: 69ba ldr r2, [r7, #24] - 80052fc: 23c0 movs r3, #192 ; 0xc0 - 80052fe: 041b lsls r3, r3, #16 - 8005300: 401a ands r2, r3 - 8005302: 687b ldr r3, [r7, #4] - 8005304: 6b5b ldr r3, [r3, #52] ; 0x34 + 8005336: 69ba ldr r2, [r7, #24] + 8005338: 23c0 movs r3, #192 ; 0xc0 + 800533a: 041b lsls r3, r3, #16 + 800533c: 401a ands r2, r3 + 800533e: 687b ldr r3, [r7, #4] + 8005340: 6b5b ldr r3, [r3, #52] ; 0x34 (READ_BIT(pll_config, RCC_CFGR_PLLMUL) != RCC_OscInitStruct->PLL.PLLMUL) || - 8005306: 429a cmp r2, r3 - 8005308: d001 beq.n 800530e + 8005342: 429a cmp r2, r3 + 8005344: d001 beq.n 800534a { return HAL_ERROR; - 800530a: 2301 movs r3, #1 - 800530c: e000 b.n 8005310 + 8005346: 2301 movs r3, #1 + 8005348: e000 b.n 800534c } } } } return HAL_OK; - 800530e: 2300 movs r3, #0 + 800534a: 2300 movs r3, #0 } - 8005310: 0018 movs r0, r3 - 8005312: 46bd mov sp, r7 - 8005314: b00b add sp, #44 ; 0x2c - 8005316: bd90 pop {r4, r7, pc} - 8005318: 40021000 .word 0x40021000 - 800531c: ff02ffff .word 0xff02ffff - 8005320: feffffff .word 0xfeffffff + 800534c: 0018 movs r0, r3 + 800534e: 46bd mov sp, r7 + 8005350: b00b add sp, #44 ; 0x2c + 8005352: bd90 pop {r4, r7, pc} + 8005354: 40021000 .word 0x40021000 + 8005358: ff02ffff .word 0xff02ffff + 800535c: feffffff .word 0xfeffffff -08005324 : +08005360 : * HPRE[3:0] bits to ensure that HCLK not exceed the maximum allowed frequency * (for more details refer to section above "Initialization/de-initialization functions") * @retval HAL status */ HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency) { - 8005324: b590 push {r4, r7, lr} - 8005326: b085 sub sp, #20 - 8005328: af00 add r7, sp, #0 - 800532a: 6078 str r0, [r7, #4] - 800532c: 6039 str r1, [r7, #0] + 8005360: b590 push {r4, r7, lr} + 8005362: b085 sub sp, #20 + 8005364: af00 add r7, sp, #0 + 8005366: 6078 str r0, [r7, #4] + 8005368: 6039 str r1, [r7, #0] uint32_t tickstart; HAL_StatusTypeDef status; /* Check Null pointer */ if(RCC_ClkInitStruct == NULL) - 800532e: 687b ldr r3, [r7, #4] - 8005330: 2b00 cmp r3, #0 - 8005332: d101 bne.n 8005338 + 800536a: 687b ldr r3, [r7, #4] + 800536c: 2b00 cmp r3, #0 + 800536e: d101 bne.n 8005374 { return HAL_ERROR; - 8005334: 2301 movs r3, #1 - 8005336: e128 b.n 800558a + 8005370: 2301 movs r3, #1 + 8005372: e128 b.n 80055c6 /* To correctly read data from FLASH memory, the number of wait states (LATENCY) must be correctly programmed according to the frequency of the CPU clock (HCLK) and the supply voltage of the device. */ /* Increasing the number of wait states because of higher CPU frequency */ if(FLatency > __HAL_FLASH_GET_LATENCY()) - 8005338: 4b96 ldr r3, [pc, #600] ; (8005594 ) - 800533a: 681b ldr r3, [r3, #0] - 800533c: 2201 movs r2, #1 - 800533e: 401a ands r2, r3 - 8005340: 683b ldr r3, [r7, #0] - 8005342: 429a cmp r2, r3 - 8005344: d21e bcs.n 8005384 + 8005374: 4b96 ldr r3, [pc, #600] ; (80055d0 ) + 8005376: 681b ldr r3, [r3, #0] + 8005378: 2201 movs r2, #1 + 800537a: 401a ands r2, r3 + 800537c: 683b ldr r3, [r7, #0] + 800537e: 429a cmp r2, r3 + 8005380: d21e bcs.n 80053c0 { /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ __HAL_FLASH_SET_LATENCY(FLatency); - 8005346: 4b93 ldr r3, [pc, #588] ; (8005594 ) - 8005348: 4a92 ldr r2, [pc, #584] ; (8005594 ) - 800534a: 6812 ldr r2, [r2, #0] - 800534c: 2101 movs r1, #1 - 800534e: 438a bics r2, r1 - 8005350: 0011 movs r1, r2 - 8005352: 683a ldr r2, [r7, #0] - 8005354: 430a orrs r2, r1 - 8005356: 601a str r2, [r3, #0] + 8005382: 4b93 ldr r3, [pc, #588] ; (80055d0 ) + 8005384: 4a92 ldr r2, [pc, #584] ; (80055d0 ) + 8005386: 6812 ldr r2, [r2, #0] + 8005388: 2101 movs r1, #1 + 800538a: 438a bics r2, r1 + 800538c: 0011 movs r1, r2 + 800538e: 683a ldr r2, [r7, #0] + 8005390: 430a orrs r2, r1 + 8005392: 601a str r2, [r3, #0] /* Check that the new number of wait states is taken into account to access the Flash memory by polling the FLASH_ACR register */ tickstart = HAL_GetTick(); - 8005358: f7fe fde8 bl 8003f2c - 800535c: 0003 movs r3, r0 - 800535e: 60fb str r3, [r7, #12] + 8005394: f7fe fde8 bl 8003f68 + 8005398: 0003 movs r3, r0 + 800539a: 60fb str r3, [r7, #12] while (__HAL_FLASH_GET_LATENCY() != FLatency) - 8005360: e009 b.n 8005376 + 800539c: e009 b.n 80053b2 { if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE) - 8005362: f7fe fde3 bl 8003f2c - 8005366: 0002 movs r2, r0 - 8005368: 68fb ldr r3, [r7, #12] - 800536a: 1ad3 subs r3, r2, r3 - 800536c: 4a8a ldr r2, [pc, #552] ; (8005598 ) - 800536e: 4293 cmp r3, r2 - 8005370: d901 bls.n 8005376 + 800539e: f7fe fde3 bl 8003f68 + 80053a2: 0002 movs r2, r0 + 80053a4: 68fb ldr r3, [r7, #12] + 80053a6: 1ad3 subs r3, r2, r3 + 80053a8: 4a8a ldr r2, [pc, #552] ; (80055d4 ) + 80053aa: 4293 cmp r3, r2 + 80053ac: d901 bls.n 80053b2 { return HAL_TIMEOUT; - 8005372: 2303 movs r3, #3 - 8005374: e109 b.n 800558a + 80053ae: 2303 movs r3, #3 + 80053b0: e109 b.n 80055c6 while (__HAL_FLASH_GET_LATENCY() != FLatency) - 8005376: 4b87 ldr r3, [pc, #540] ; (8005594 ) - 8005378: 681b ldr r3, [r3, #0] - 800537a: 2201 movs r2, #1 - 800537c: 401a ands r2, r3 - 800537e: 683b ldr r3, [r7, #0] - 8005380: 429a cmp r2, r3 - 8005382: d1ee bne.n 8005362 + 80053b2: 4b87 ldr r3, [pc, #540] ; (80055d0 ) + 80053b4: 681b ldr r3, [r3, #0] + 80053b6: 2201 movs r2, #1 + 80053b8: 401a ands r2, r3 + 80053ba: 683b ldr r3, [r7, #0] + 80053bc: 429a cmp r2, r3 + 80053be: d1ee bne.n 800539e } } } /*-------------------------- HCLK Configuration --------------------------*/ if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK) - 8005384: 687b ldr r3, [r7, #4] - 8005386: 681b ldr r3, [r3, #0] - 8005388: 2202 movs r2, #2 - 800538a: 4013 ands r3, r2 - 800538c: d009 beq.n 80053a2 + 80053c0: 687b ldr r3, [r7, #4] + 80053c2: 681b ldr r3, [r3, #0] + 80053c4: 2202 movs r2, #2 + 80053c6: 4013 ands r3, r2 + 80053c8: d009 beq.n 80053de { assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider)); MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider); - 800538e: 4a83 ldr r2, [pc, #524] ; (800559c ) - 8005390: 4b82 ldr r3, [pc, #520] ; (800559c ) - 8005392: 68db ldr r3, [r3, #12] - 8005394: 21f0 movs r1, #240 ; 0xf0 - 8005396: 438b bics r3, r1 - 8005398: 0019 movs r1, r3 - 800539a: 687b ldr r3, [r7, #4] - 800539c: 689b ldr r3, [r3, #8] - 800539e: 430b orrs r3, r1 - 80053a0: 60d3 str r3, [r2, #12] + 80053ca: 4a83 ldr r2, [pc, #524] ; (80055d8 ) + 80053cc: 4b82 ldr r3, [pc, #520] ; (80055d8 ) + 80053ce: 68db ldr r3, [r3, #12] + 80053d0: 21f0 movs r1, #240 ; 0xf0 + 80053d2: 438b bics r3, r1 + 80053d4: 0019 movs r1, r3 + 80053d6: 687b ldr r3, [r7, #4] + 80053d8: 689b ldr r3, [r3, #8] + 80053da: 430b orrs r3, r1 + 80053dc: 60d3 str r3, [r2, #12] } /*------------------------- SYSCLK Configuration ---------------------------*/ if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK) - 80053a2: 687b ldr r3, [r7, #4] - 80053a4: 681b ldr r3, [r3, #0] - 80053a6: 2201 movs r2, #1 - 80053a8: 4013 ands r3, r2 - 80053aa: d100 bne.n 80053ae - 80053ac: e089 b.n 80054c2 + 80053de: 687b ldr r3, [r7, #4] + 80053e0: 681b ldr r3, [r3, #0] + 80053e2: 2201 movs r2, #1 + 80053e4: 4013 ands r3, r2 + 80053e6: d100 bne.n 80053ea + 80053e8: e089 b.n 80054fe { assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource)); /* HSE is selected as System Clock Source */ if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) - 80053ae: 687b ldr r3, [r7, #4] - 80053b0: 685b ldr r3, [r3, #4] - 80053b2: 2b02 cmp r3, #2 - 80053b4: d107 bne.n 80053c6 + 80053ea: 687b ldr r3, [r7, #4] + 80053ec: 685b ldr r3, [r3, #4] + 80053ee: 2b02 cmp r3, #2 + 80053f0: d107 bne.n 8005402 { /* Check the HSE ready flag */ if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == 0U) - 80053b6: 4b79 ldr r3, [pc, #484] ; (800559c ) - 80053b8: 681a ldr r2, [r3, #0] - 80053ba: 2380 movs r3, #128 ; 0x80 - 80053bc: 029b lsls r3, r3, #10 - 80053be: 4013 ands r3, r2 - 80053c0: d120 bne.n 8005404 + 80053f2: 4b79 ldr r3, [pc, #484] ; (80055d8 ) + 80053f4: 681a ldr r2, [r3, #0] + 80053f6: 2380 movs r3, #128 ; 0x80 + 80053f8: 029b lsls r3, r3, #10 + 80053fa: 4013 ands r3, r2 + 80053fc: d120 bne.n 8005440 { return HAL_ERROR; - 80053c2: 2301 movs r3, #1 - 80053c4: e0e1 b.n 800558a + 80053fe: 2301 movs r3, #1 + 8005400: e0e1 b.n 80055c6 } } /* PLL is selected as System Clock Source */ else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) - 80053c6: 687b ldr r3, [r7, #4] - 80053c8: 685b ldr r3, [r3, #4] - 80053ca: 2b03 cmp r3, #3 - 80053cc: d107 bne.n 80053de + 8005402: 687b ldr r3, [r7, #4] + 8005404: 685b ldr r3, [r3, #4] + 8005406: 2b03 cmp r3, #3 + 8005408: d107 bne.n 800541a { /* Check the PLL ready flag */ if(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == 0U) - 80053ce: 4b73 ldr r3, [pc, #460] ; (800559c ) - 80053d0: 681a ldr r2, [r3, #0] - 80053d2: 2380 movs r3, #128 ; 0x80 - 80053d4: 049b lsls r3, r3, #18 - 80053d6: 4013 ands r3, r2 - 80053d8: d114 bne.n 8005404 + 800540a: 4b73 ldr r3, [pc, #460] ; (80055d8 ) + 800540c: 681a ldr r2, [r3, #0] + 800540e: 2380 movs r3, #128 ; 0x80 + 8005410: 049b lsls r3, r3, #18 + 8005412: 4013 ands r3, r2 + 8005414: d114 bne.n 8005440 { return HAL_ERROR; - 80053da: 2301 movs r3, #1 - 80053dc: e0d5 b.n 800558a + 8005416: 2301 movs r3, #1 + 8005418: e0d5 b.n 80055c6 } } /* HSI is selected as System Clock Source */ else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSI) - 80053de: 687b ldr r3, [r7, #4] - 80053e0: 685b ldr r3, [r3, #4] - 80053e2: 2b01 cmp r3, #1 - 80053e4: d106 bne.n 80053f4 + 800541a: 687b ldr r3, [r7, #4] + 800541c: 685b ldr r3, [r3, #4] + 800541e: 2b01 cmp r3, #1 + 8005420: d106 bne.n 8005430 { /* Check the HSI ready flag */ if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == 0U) - 80053e6: 4b6d ldr r3, [pc, #436] ; (800559c ) - 80053e8: 681b ldr r3, [r3, #0] - 80053ea: 2204 movs r2, #4 - 80053ec: 4013 ands r3, r2 - 80053ee: d109 bne.n 8005404 + 8005422: 4b6d ldr r3, [pc, #436] ; (80055d8 ) + 8005424: 681b ldr r3, [r3, #0] + 8005426: 2204 movs r2, #4 + 8005428: 4013 ands r3, r2 + 800542a: d109 bne.n 8005440 { return HAL_ERROR; - 80053f0: 2301 movs r3, #1 - 80053f2: e0ca b.n 800558a + 800542c: 2301 movs r3, #1 + 800542e: e0ca b.n 80055c6 } /* MSI is selected as System Clock Source */ else { /* Check the MSI ready flag */ if(__HAL_RCC_GET_FLAG(RCC_FLAG_MSIRDY) == 0U) - 80053f4: 4b69 ldr r3, [pc, #420] ; (800559c ) - 80053f6: 681a ldr r2, [r3, #0] - 80053f8: 2380 movs r3, #128 ; 0x80 - 80053fa: 009b lsls r3, r3, #2 - 80053fc: 4013 ands r3, r2 - 80053fe: d101 bne.n 8005404 + 8005430: 4b69 ldr r3, [pc, #420] ; (80055d8 ) + 8005432: 681a ldr r2, [r3, #0] + 8005434: 2380 movs r3, #128 ; 0x80 + 8005436: 009b lsls r3, r3, #2 + 8005438: 4013 ands r3, r2 + 800543a: d101 bne.n 8005440 { return HAL_ERROR; - 8005400: 2301 movs r3, #1 - 8005402: e0c2 b.n 800558a + 800543c: 2301 movs r3, #1 + 800543e: e0c2 b.n 80055c6 } } __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource); - 8005404: 4a65 ldr r2, [pc, #404] ; (800559c ) - 8005406: 4b65 ldr r3, [pc, #404] ; (800559c ) - 8005408: 68db ldr r3, [r3, #12] - 800540a: 2103 movs r1, #3 - 800540c: 438b bics r3, r1 - 800540e: 0019 movs r1, r3 - 8005410: 687b ldr r3, [r7, #4] - 8005412: 685b ldr r3, [r3, #4] - 8005414: 430b orrs r3, r1 - 8005416: 60d3 str r3, [r2, #12] + 8005440: 4a65 ldr r2, [pc, #404] ; (80055d8 ) + 8005442: 4b65 ldr r3, [pc, #404] ; (80055d8 ) + 8005444: 68db ldr r3, [r3, #12] + 8005446: 2103 movs r1, #3 + 8005448: 438b bics r3, r1 + 800544a: 0019 movs r1, r3 + 800544c: 687b ldr r3, [r7, #4] + 800544e: 685b ldr r3, [r3, #4] + 8005450: 430b orrs r3, r1 + 8005452: 60d3 str r3, [r2, #12] /* Get Start Tick */ tickstart = HAL_GetTick(); - 8005418: f7fe fd88 bl 8003f2c - 800541c: 0003 movs r3, r0 - 800541e: 60fb str r3, [r7, #12] + 8005454: f7fe fd88 bl 8003f68 + 8005458: 0003 movs r3, r0 + 800545a: 60fb str r3, [r7, #12] if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) - 8005420: 687b ldr r3, [r7, #4] - 8005422: 685b ldr r3, [r3, #4] - 8005424: 2b02 cmp r3, #2 - 8005426: d111 bne.n 800544c + 800545c: 687b ldr r3, [r7, #4] + 800545e: 685b ldr r3, [r3, #4] + 8005460: 2b02 cmp r3, #2 + 8005462: d111 bne.n 8005488 { while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_HSE) - 8005428: e009 b.n 800543e + 8005464: e009 b.n 800547a { if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE) - 800542a: f7fe fd7f bl 8003f2c - 800542e: 0002 movs r2, r0 - 8005430: 68fb ldr r3, [r7, #12] - 8005432: 1ad3 subs r3, r2, r3 - 8005434: 4a58 ldr r2, [pc, #352] ; (8005598 ) - 8005436: 4293 cmp r3, r2 - 8005438: d901 bls.n 800543e + 8005466: f7fe fd7f bl 8003f68 + 800546a: 0002 movs r2, r0 + 800546c: 68fb ldr r3, [r7, #12] + 800546e: 1ad3 subs r3, r2, r3 + 8005470: 4a58 ldr r2, [pc, #352] ; (80055d4 ) + 8005472: 4293 cmp r3, r2 + 8005474: d901 bls.n 800547a { return HAL_TIMEOUT; - 800543a: 2303 movs r3, #3 - 800543c: e0a5 b.n 800558a + 8005476: 2303 movs r3, #3 + 8005478: e0a5 b.n 80055c6 while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_HSE) - 800543e: 4b57 ldr r3, [pc, #348] ; (800559c ) - 8005440: 68db ldr r3, [r3, #12] - 8005442: 220c movs r2, #12 - 8005444: 4013 ands r3, r2 - 8005446: 2b08 cmp r3, #8 - 8005448: d1ef bne.n 800542a - 800544a: e03a b.n 80054c2 + 800547a: 4b57 ldr r3, [pc, #348] ; (80055d8 ) + 800547c: 68db ldr r3, [r3, #12] + 800547e: 220c movs r2, #12 + 8005480: 4013 ands r3, r2 + 8005482: 2b08 cmp r3, #8 + 8005484: d1ef bne.n 8005466 + 8005486: e03a b.n 80054fe } } } else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) - 800544c: 687b ldr r3, [r7, #4] - 800544e: 685b ldr r3, [r3, #4] - 8005450: 2b03 cmp r3, #3 - 8005452: d111 bne.n 8005478 + 8005488: 687b ldr r3, [r7, #4] + 800548a: 685b ldr r3, [r3, #4] + 800548c: 2b03 cmp r3, #3 + 800548e: d111 bne.n 80054b4 { while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK) - 8005454: e009 b.n 800546a + 8005490: e009 b.n 80054a6 { if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE) - 8005456: f7fe fd69 bl 8003f2c - 800545a: 0002 movs r2, r0 - 800545c: 68fb ldr r3, [r7, #12] - 800545e: 1ad3 subs r3, r2, r3 - 8005460: 4a4d ldr r2, [pc, #308] ; (8005598 ) - 8005462: 4293 cmp r3, r2 - 8005464: d901 bls.n 800546a + 8005492: f7fe fd69 bl 8003f68 + 8005496: 0002 movs r2, r0 + 8005498: 68fb ldr r3, [r7, #12] + 800549a: 1ad3 subs r3, r2, r3 + 800549c: 4a4d ldr r2, [pc, #308] ; (80055d4 ) + 800549e: 4293 cmp r3, r2 + 80054a0: d901 bls.n 80054a6 { return HAL_TIMEOUT; - 8005466: 2303 movs r3, #3 - 8005468: e08f b.n 800558a + 80054a2: 2303 movs r3, #3 + 80054a4: e08f b.n 80055c6 while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK) - 800546a: 4b4c ldr r3, [pc, #304] ; (800559c ) - 800546c: 68db ldr r3, [r3, #12] - 800546e: 220c movs r2, #12 - 8005470: 4013 ands r3, r2 - 8005472: 2b0c cmp r3, #12 - 8005474: d1ef bne.n 8005456 - 8005476: e024 b.n 80054c2 + 80054a6: 4b4c ldr r3, [pc, #304] ; (80055d8 ) + 80054a8: 68db ldr r3, [r3, #12] + 80054aa: 220c movs r2, #12 + 80054ac: 4013 ands r3, r2 + 80054ae: 2b0c cmp r3, #12 + 80054b0: d1ef bne.n 8005492 + 80054b2: e024 b.n 80054fe } } } else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSI) - 8005478: 687b ldr r3, [r7, #4] - 800547a: 685b ldr r3, [r3, #4] - 800547c: 2b01 cmp r3, #1 - 800547e: d11b bne.n 80054b8 + 80054b4: 687b ldr r3, [r7, #4] + 80054b6: 685b ldr r3, [r3, #4] + 80054b8: 2b01 cmp r3, #1 + 80054ba: d11b bne.n 80054f4 { while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_HSI) - 8005480: e009 b.n 8005496 + 80054bc: e009 b.n 80054d2 { if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE) - 8005482: f7fe fd53 bl 8003f2c - 8005486: 0002 movs r2, r0 - 8005488: 68fb ldr r3, [r7, #12] - 800548a: 1ad3 subs r3, r2, r3 - 800548c: 4a42 ldr r2, [pc, #264] ; (8005598 ) - 800548e: 4293 cmp r3, r2 - 8005490: d901 bls.n 8005496 + 80054be: f7fe fd53 bl 8003f68 + 80054c2: 0002 movs r2, r0 + 80054c4: 68fb ldr r3, [r7, #12] + 80054c6: 1ad3 subs r3, r2, r3 + 80054c8: 4a42 ldr r2, [pc, #264] ; (80055d4 ) + 80054ca: 4293 cmp r3, r2 + 80054cc: d901 bls.n 80054d2 { return HAL_TIMEOUT; - 8005492: 2303 movs r3, #3 - 8005494: e079 b.n 800558a + 80054ce: 2303 movs r3, #3 + 80054d0: e079 b.n 80055c6 while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_HSI) - 8005496: 4b41 ldr r3, [pc, #260] ; (800559c ) - 8005498: 68db ldr r3, [r3, #12] - 800549a: 220c movs r2, #12 - 800549c: 4013 ands r3, r2 - 800549e: 2b04 cmp r3, #4 - 80054a0: d1ef bne.n 8005482 - 80054a2: e00e b.n 80054c2 + 80054d2: 4b41 ldr r3, [pc, #260] ; (80055d8 ) + 80054d4: 68db ldr r3, [r3, #12] + 80054d6: 220c movs r2, #12 + 80054d8: 4013 ands r3, r2 + 80054da: 2b04 cmp r3, #4 + 80054dc: d1ef bne.n 80054be + 80054de: e00e b.n 80054fe } else { while(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_MSI) { if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE) - 80054a4: f7fe fd42 bl 8003f2c - 80054a8: 0002 movs r2, r0 - 80054aa: 68fb ldr r3, [r7, #12] - 80054ac: 1ad3 subs r3, r2, r3 - 80054ae: 4a3a ldr r2, [pc, #232] ; (8005598 ) - 80054b0: 4293 cmp r3, r2 - 80054b2: d901 bls.n 80054b8 + 80054e0: f7fe fd42 bl 8003f68 + 80054e4: 0002 movs r2, r0 + 80054e6: 68fb ldr r3, [r7, #12] + 80054e8: 1ad3 subs r3, r2, r3 + 80054ea: 4a3a ldr r2, [pc, #232] ; (80055d4 ) + 80054ec: 4293 cmp r3, r2 + 80054ee: d901 bls.n 80054f4 { return HAL_TIMEOUT; - 80054b4: 2303 movs r3, #3 - 80054b6: e068 b.n 800558a + 80054f0: 2303 movs r3, #3 + 80054f2: e068 b.n 80055c6 while(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_MSI) - 80054b8: 4b38 ldr r3, [pc, #224] ; (800559c ) - 80054ba: 68db ldr r3, [r3, #12] - 80054bc: 220c movs r2, #12 - 80054be: 4013 ands r3, r2 - 80054c0: d1f0 bne.n 80054a4 + 80054f4: 4b38 ldr r3, [pc, #224] ; (80055d8 ) + 80054f6: 68db ldr r3, [r3, #12] + 80054f8: 220c movs r2, #12 + 80054fa: 4013 ands r3, r2 + 80054fc: d1f0 bne.n 80054e0 } } } } /* Decreasing the number of wait states because of lower CPU frequency */ if(FLatency < __HAL_FLASH_GET_LATENCY()) - 80054c2: 4b34 ldr r3, [pc, #208] ; (8005594 ) - 80054c4: 681b ldr r3, [r3, #0] - 80054c6: 2201 movs r2, #1 - 80054c8: 401a ands r2, r3 - 80054ca: 683b ldr r3, [r7, #0] - 80054cc: 429a cmp r2, r3 - 80054ce: d91e bls.n 800550e + 80054fe: 4b34 ldr r3, [pc, #208] ; (80055d0 ) + 8005500: 681b ldr r3, [r3, #0] + 8005502: 2201 movs r2, #1 + 8005504: 401a ands r2, r3 + 8005506: 683b ldr r3, [r7, #0] + 8005508: 429a cmp r2, r3 + 800550a: d91e bls.n 800554a { /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ __HAL_FLASH_SET_LATENCY(FLatency); - 80054d0: 4b30 ldr r3, [pc, #192] ; (8005594 ) - 80054d2: 4a30 ldr r2, [pc, #192] ; (8005594 ) - 80054d4: 6812 ldr r2, [r2, #0] - 80054d6: 2101 movs r1, #1 - 80054d8: 438a bics r2, r1 - 80054da: 0011 movs r1, r2 - 80054dc: 683a ldr r2, [r7, #0] - 80054de: 430a orrs r2, r1 - 80054e0: 601a str r2, [r3, #0] + 800550c: 4b30 ldr r3, [pc, #192] ; (80055d0 ) + 800550e: 4a30 ldr r2, [pc, #192] ; (80055d0 ) + 8005510: 6812 ldr r2, [r2, #0] + 8005512: 2101 movs r1, #1 + 8005514: 438a bics r2, r1 + 8005516: 0011 movs r1, r2 + 8005518: 683a ldr r2, [r7, #0] + 800551a: 430a orrs r2, r1 + 800551c: 601a str r2, [r3, #0] /* Check that the new number of wait states is taken into account to access the Flash memory by polling the FLASH_ACR register */ tickstart = HAL_GetTick(); - 80054e2: f7fe fd23 bl 8003f2c - 80054e6: 0003 movs r3, r0 - 80054e8: 60fb str r3, [r7, #12] + 800551e: f7fe fd23 bl 8003f68 + 8005522: 0003 movs r3, r0 + 8005524: 60fb str r3, [r7, #12] while (__HAL_FLASH_GET_LATENCY() != FLatency) - 80054ea: e009 b.n 8005500 + 8005526: e009 b.n 800553c { if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE) - 80054ec: f7fe fd1e bl 8003f2c - 80054f0: 0002 movs r2, r0 - 80054f2: 68fb ldr r3, [r7, #12] - 80054f4: 1ad3 subs r3, r2, r3 - 80054f6: 4a28 ldr r2, [pc, #160] ; (8005598 ) - 80054f8: 4293 cmp r3, r2 - 80054fa: d901 bls.n 8005500 + 8005528: f7fe fd1e bl 8003f68 + 800552c: 0002 movs r2, r0 + 800552e: 68fb ldr r3, [r7, #12] + 8005530: 1ad3 subs r3, r2, r3 + 8005532: 4a28 ldr r2, [pc, #160] ; (80055d4 ) + 8005534: 4293 cmp r3, r2 + 8005536: d901 bls.n 800553c { return HAL_TIMEOUT; - 80054fc: 2303 movs r3, #3 - 80054fe: e044 b.n 800558a + 8005538: 2303 movs r3, #3 + 800553a: e044 b.n 80055c6 while (__HAL_FLASH_GET_LATENCY() != FLatency) - 8005500: 4b24 ldr r3, [pc, #144] ; (8005594 ) - 8005502: 681b ldr r3, [r3, #0] - 8005504: 2201 movs r2, #1 - 8005506: 401a ands r2, r3 - 8005508: 683b ldr r3, [r7, #0] - 800550a: 429a cmp r2, r3 - 800550c: d1ee bne.n 80054ec + 800553c: 4b24 ldr r3, [pc, #144] ; (80055d0 ) + 800553e: 681b ldr r3, [r3, #0] + 8005540: 2201 movs r2, #1 + 8005542: 401a ands r2, r3 + 8005544: 683b ldr r3, [r7, #0] + 8005546: 429a cmp r2, r3 + 8005548: d1ee bne.n 8005528 } } } /*-------------------------- PCLK1 Configuration ---------------------------*/ if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) - 800550e: 687b ldr r3, [r7, #4] - 8005510: 681b ldr r3, [r3, #0] - 8005512: 2204 movs r2, #4 - 8005514: 4013 ands r3, r2 - 8005516: d008 beq.n 800552a + 800554a: 687b ldr r3, [r7, #4] + 800554c: 681b ldr r3, [r3, #0] + 800554e: 2204 movs r2, #4 + 8005550: 4013 ands r3, r2 + 8005552: d008 beq.n 8005566 { assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider)); MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider); - 8005518: 4a20 ldr r2, [pc, #128] ; (800559c ) - 800551a: 4b20 ldr r3, [pc, #128] ; (800559c ) - 800551c: 68db ldr r3, [r3, #12] - 800551e: 4920 ldr r1, [pc, #128] ; (80055a0 ) - 8005520: 4019 ands r1, r3 - 8005522: 687b ldr r3, [r7, #4] - 8005524: 68db ldr r3, [r3, #12] - 8005526: 430b orrs r3, r1 - 8005528: 60d3 str r3, [r2, #12] + 8005554: 4a20 ldr r2, [pc, #128] ; (80055d8 ) + 8005556: 4b20 ldr r3, [pc, #128] ; (80055d8 ) + 8005558: 68db ldr r3, [r3, #12] + 800555a: 4920 ldr r1, [pc, #128] ; (80055dc ) + 800555c: 4019 ands r1, r3 + 800555e: 687b ldr r3, [r7, #4] + 8005560: 68db ldr r3, [r3, #12] + 8005562: 430b orrs r3, r1 + 8005564: 60d3 str r3, [r2, #12] } /*-------------------------- PCLK2 Configuration ---------------------------*/ if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2) - 800552a: 687b ldr r3, [r7, #4] - 800552c: 681b ldr r3, [r3, #0] - 800552e: 2208 movs r2, #8 - 8005530: 4013 ands r3, r2 - 8005532: d009 beq.n 8005548 + 8005566: 687b ldr r3, [r7, #4] + 8005568: 681b ldr r3, [r3, #0] + 800556a: 2208 movs r2, #8 + 800556c: 4013 ands r3, r2 + 800556e: d009 beq.n 8005584 { assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB2CLKDivider)); MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3)); - 8005534: 4a19 ldr r2, [pc, #100] ; (800559c ) - 8005536: 4b19 ldr r3, [pc, #100] ; (800559c ) - 8005538: 68db ldr r3, [r3, #12] - 800553a: 491a ldr r1, [pc, #104] ; (80055a4 ) - 800553c: 4019 ands r1, r3 - 800553e: 687b ldr r3, [r7, #4] - 8005540: 691b ldr r3, [r3, #16] - 8005542: 00db lsls r3, r3, #3 - 8005544: 430b orrs r3, r1 - 8005546: 60d3 str r3, [r2, #12] + 8005570: 4a19 ldr r2, [pc, #100] ; (80055d8 ) + 8005572: 4b19 ldr r3, [pc, #100] ; (80055d8 ) + 8005574: 68db ldr r3, [r3, #12] + 8005576: 491a ldr r1, [pc, #104] ; (80055e0 ) + 8005578: 4019 ands r1, r3 + 800557a: 687b ldr r3, [r7, #4] + 800557c: 691b ldr r3, [r3, #16] + 800557e: 00db lsls r3, r3, #3 + 8005580: 430b orrs r3, r1 + 8005582: 60d3 str r3, [r2, #12] } /* Update the SystemCoreClock global variable */ SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE)>> RCC_CFGR_HPRE_Pos]; - 8005548: f000 f834 bl 80055b4 - 800554c: 0001 movs r1, r0 - 800554e: 4b13 ldr r3, [pc, #76] ; (800559c ) - 8005550: 68db ldr r3, [r3, #12] - 8005552: 091b lsrs r3, r3, #4 - 8005554: 220f movs r2, #15 - 8005556: 4013 ands r3, r2 - 8005558: 4a13 ldr r2, [pc, #76] ; (80055a8 ) - 800555a: 5cd3 ldrb r3, [r2, r3] - 800555c: 000a movs r2, r1 - 800555e: 40da lsrs r2, r3 - 8005560: 4b12 ldr r3, [pc, #72] ; (80055ac ) - 8005562: 601a str r2, [r3, #0] + 8005584: f000 f834 bl 80055f0 + 8005588: 0001 movs r1, r0 + 800558a: 4b13 ldr r3, [pc, #76] ; (80055d8 ) + 800558c: 68db ldr r3, [r3, #12] + 800558e: 091b lsrs r3, r3, #4 + 8005590: 220f movs r2, #15 + 8005592: 4013 ands r3, r2 + 8005594: 4a13 ldr r2, [pc, #76] ; (80055e4 ) + 8005596: 5cd3 ldrb r3, [r2, r3] + 8005598: 000a movs r2, r1 + 800559a: 40da lsrs r2, r3 + 800559c: 4b12 ldr r3, [pc, #72] ; (80055e8 ) + 800559e: 601a str r2, [r3, #0] /* Configure the source of time base considering new system clocks settings*/ status = HAL_InitTick(uwTickPrio); - 8005564: 4b12 ldr r3, [pc, #72] ; (80055b0 ) - 8005566: 681b ldr r3, [r3, #0] - 8005568: 220b movs r2, #11 - 800556a: 18bc adds r4, r7, r2 - 800556c: 0018 movs r0, r3 - 800556e: f7fe fc97 bl 8003ea0 - 8005572: 0003 movs r3, r0 - 8005574: 7023 strb r3, [r4, #0] + 80055a0: 4b12 ldr r3, [pc, #72] ; (80055ec ) + 80055a2: 681b ldr r3, [r3, #0] + 80055a4: 220b movs r2, #11 + 80055a6: 18bc adds r4, r7, r2 + 80055a8: 0018 movs r0, r3 + 80055aa: f7fe fc97 bl 8003edc + 80055ae: 0003 movs r3, r0 + 80055b0: 7023 strb r3, [r4, #0] if(status != HAL_OK) - 8005576: 230b movs r3, #11 - 8005578: 18fb adds r3, r7, r3 - 800557a: 781b ldrb r3, [r3, #0] - 800557c: 2b00 cmp r3, #0 - 800557e: d003 beq.n 8005588 + 80055b2: 230b movs r3, #11 + 80055b4: 18fb adds r3, r7, r3 + 80055b6: 781b ldrb r3, [r3, #0] + 80055b8: 2b00 cmp r3, #0 + 80055ba: d003 beq.n 80055c4 { return status; - 8005580: 230b movs r3, #11 - 8005582: 18fb adds r3, r7, r3 - 8005584: 781b ldrb r3, [r3, #0] - 8005586: e000 b.n 800558a + 80055bc: 230b movs r3, #11 + 80055be: 18fb adds r3, r7, r3 + 80055c0: 781b ldrb r3, [r3, #0] + 80055c2: e000 b.n 80055c6 } return HAL_OK; - 8005588: 2300 movs r3, #0 + 80055c4: 2300 movs r3, #0 } - 800558a: 0018 movs r0, r3 - 800558c: 46bd mov sp, r7 - 800558e: b005 add sp, #20 - 8005590: bd90 pop {r4, r7, pc} - 8005592: 46c0 nop ; (mov r8, r8) - 8005594: 40022000 .word 0x40022000 - 8005598: 00001388 .word 0x00001388 - 800559c: 40021000 .word 0x40021000 - 80055a0: fffff8ff .word 0xfffff8ff - 80055a4: ffffc7ff .word 0xffffc7ff - 80055a8: 080071d0 .word 0x080071d0 - 80055ac: 20000000 .word 0x20000000 - 80055b0: 20000008 .word 0x20000008 + 80055c6: 0018 movs r0, r3 + 80055c8: 46bd mov sp, r7 + 80055ca: b005 add sp, #20 + 80055cc: bd90 pop {r4, r7, pc} + 80055ce: 46c0 nop ; (mov r8, r8) + 80055d0: 40022000 .word 0x40022000 + 80055d4: 00001388 .word 0x00001388 + 80055d8: 40021000 .word 0x40021000 + 80055dc: fffff8ff .word 0xfffff8ff + 80055e0: ffffc7ff .word 0xffffc7ff + 80055e4: 0800720c .word 0x0800720c + 80055e8: 20000000 .word 0x20000000 + 80055ec: 20000008 .word 0x20000008 -080055b4 : +080055f0 : * right SYSCLK value. Otherwise, any configuration based on this function will be incorrect. * * @retval SYSCLK frequency */ uint32_t HAL_RCC_GetSysClockFreq(void) { - 80055b4: b5f0 push {r4, r5, r6, r7, lr} - 80055b6: b08f sub sp, #60 ; 0x3c - 80055b8: af00 add r7, sp, #0 + 80055f0: b5f0 push {r4, r5, r6, r7, lr} + 80055f2: b08f sub sp, #60 ; 0x3c + 80055f4: af00 add r7, sp, #0 uint32_t tmpreg, pllm, plld, pllvco, msiclkrange; /* no init needed */ uint32_t sysclockfreq; tmpreg = RCC->CFGR; - 80055ba: 4b4a ldr r3, [pc, #296] ; (80056e4 ) - 80055bc: 68db ldr r3, [r3, #12] - 80055be: 62fb str r3, [r7, #44] ; 0x2c + 80055f6: 4b4a ldr r3, [pc, #296] ; (8005720 ) + 80055f8: 68db ldr r3, [r3, #12] + 80055fa: 62fb str r3, [r7, #44] ; 0x2c /* Get SYSCLK source -------------------------------------------------------*/ switch (tmpreg & RCC_CFGR_SWS) - 80055c0: 6afa ldr r2, [r7, #44] ; 0x2c - 80055c2: 230c movs r3, #12 - 80055c4: 4013 ands r3, r2 - 80055c6: 2b08 cmp r3, #8 - 80055c8: d00f beq.n 80055ea - 80055ca: 2b0c cmp r3, #12 - 80055cc: d010 beq.n 80055f0 - 80055ce: 2b04 cmp r3, #4 - 80055d0: d000 beq.n 80055d4 - 80055d2: e073 b.n 80056bc + 80055fc: 6afa ldr r2, [r7, #44] ; 0x2c + 80055fe: 230c movs r3, #12 + 8005600: 4013 ands r3, r2 + 8005602: 2b08 cmp r3, #8 + 8005604: d00f beq.n 8005626 + 8005606: 2b0c cmp r3, #12 + 8005608: d010 beq.n 800562c + 800560a: 2b04 cmp r3, #4 + 800560c: d000 beq.n 8005610 + 800560e: e073 b.n 80056f8 { case RCC_SYSCLKSOURCE_STATUS_HSI: /* HSI used as system clock source */ { if ((RCC->CR & RCC_CR_HSIDIVF) != 0U) - 80055d4: 4b43 ldr r3, [pc, #268] ; (80056e4 ) - 80055d6: 681b ldr r3, [r3, #0] - 80055d8: 2210 movs r2, #16 - 80055da: 4013 ands r3, r2 - 80055dc: d002 beq.n 80055e4 + 8005610: 4b43 ldr r3, [pc, #268] ; (8005720 ) + 8005612: 681b ldr r3, [r3, #0] + 8005614: 2210 movs r2, #16 + 8005616: 4013 ands r3, r2 + 8005618: d002 beq.n 8005620 { sysclockfreq = (HSI_VALUE >> 2); - 80055de: 4b42 ldr r3, [pc, #264] ; (80056e8 ) - 80055e0: 633b str r3, [r7, #48] ; 0x30 + 800561a: 4b42 ldr r3, [pc, #264] ; (8005724 ) + 800561c: 633b str r3, [r7, #48] ; 0x30 } else { sysclockfreq = HSI_VALUE; } break; - 80055e2: e079 b.n 80056d8 + 800561e: e079 b.n 8005714 sysclockfreq = HSI_VALUE; - 80055e4: 4b41 ldr r3, [pc, #260] ; (80056ec ) - 80055e6: 633b str r3, [r7, #48] ; 0x30 + 8005620: 4b41 ldr r3, [pc, #260] ; (8005728 ) + 8005622: 633b str r3, [r7, #48] ; 0x30 break; - 80055e8: e076 b.n 80056d8 + 8005624: e076 b.n 8005714 } case RCC_SYSCLKSOURCE_STATUS_HSE: /* HSE used as system clock */ { sysclockfreq = HSE_VALUE; - 80055ea: 4b41 ldr r3, [pc, #260] ; (80056f0 ) - 80055ec: 633b str r3, [r7, #48] ; 0x30 + 8005626: 4b41 ldr r3, [pc, #260] ; (800572c ) + 8005628: 633b str r3, [r7, #48] ; 0x30 break; - 80055ee: e073 b.n 80056d8 + 800562a: e073 b.n 8005714 } case RCC_SYSCLKSOURCE_STATUS_PLLCLK: /* PLL used as system clock */ { pllm = PLLMulTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMUL) >> RCC_CFGR_PLLMUL_Pos]; - 80055f0: 6afb ldr r3, [r7, #44] ; 0x2c - 80055f2: 0c9a lsrs r2, r3, #18 - 80055f4: 230f movs r3, #15 - 80055f6: 401a ands r2, r3 - 80055f8: 4b3e ldr r3, [pc, #248] ; (80056f4 ) - 80055fa: 5c9b ldrb r3, [r3, r2] - 80055fc: 62bb str r3, [r7, #40] ; 0x28 + 800562c: 6afb ldr r3, [r7, #44] ; 0x2c + 800562e: 0c9a lsrs r2, r3, #18 + 8005630: 230f movs r3, #15 + 8005632: 401a ands r2, r3 + 8005634: 4b3e ldr r3, [pc, #248] ; (8005730 ) + 8005636: 5c9b ldrb r3, [r3, r2] + 8005638: 62bb str r3, [r7, #40] ; 0x28 plld = ((uint32_t)(tmpreg & RCC_CFGR_PLLDIV) >> RCC_CFGR_PLLDIV_Pos) + 1U; - 80055fe: 6afb ldr r3, [r7, #44] ; 0x2c - 8005600: 0d9a lsrs r2, r3, #22 - 8005602: 2303 movs r3, #3 - 8005604: 4013 ands r3, r2 - 8005606: 3301 adds r3, #1 - 8005608: 627b str r3, [r7, #36] ; 0x24 + 800563a: 6afb ldr r3, [r7, #44] ; 0x2c + 800563c: 0d9a lsrs r2, r3, #22 + 800563e: 2303 movs r3, #3 + 8005640: 4013 ands r3, r2 + 8005642: 3301 adds r3, #1 + 8005644: 627b str r3, [r7, #36] ; 0x24 if (__HAL_RCC_GET_PLL_OSCSOURCE() != RCC_PLLSOURCE_HSI) - 800560a: 4b36 ldr r3, [pc, #216] ; (80056e4 ) - 800560c: 68da ldr r2, [r3, #12] - 800560e: 2380 movs r3, #128 ; 0x80 - 8005610: 025b lsls r3, r3, #9 - 8005612: 4013 ands r3, r2 - 8005614: d019 beq.n 800564a + 8005646: 4b36 ldr r3, [pc, #216] ; (8005720 ) + 8005648: 68da ldr r2, [r3, #12] + 800564a: 2380 movs r3, #128 ; 0x80 + 800564c: 025b lsls r3, r3, #9 + 800564e: 4013 ands r3, r2 + 8005650: d019 beq.n 8005686 { /* HSE used as PLL clock source */ pllvco = (uint32_t)(((uint64_t)HSE_VALUE * (uint64_t)pllm) / (uint64_t)plld); - 8005616: 6abb ldr r3, [r7, #40] ; 0x28 - 8005618: 61bb str r3, [r7, #24] - 800561a: 2300 movs r3, #0 - 800561c: 61fb str r3, [r7, #28] - 800561e: 4a34 ldr r2, [pc, #208] ; (80056f0 ) - 8005620: 2300 movs r3, #0 - 8005622: 69b8 ldr r0, [r7, #24] - 8005624: 69f9 ldr r1, [r7, #28] - 8005626: f7fa fe93 bl 8000350 <__aeabi_lmul> - 800562a: 0003 movs r3, r0 - 800562c: 000c movs r4, r1 - 800562e: 0018 movs r0, r3 - 8005630: 0021 movs r1, r4 - 8005632: 6a7b ldr r3, [r7, #36] ; 0x24 - 8005634: 613b str r3, [r7, #16] - 8005636: 2300 movs r3, #0 - 8005638: 617b str r3, [r7, #20] - 800563a: 693a ldr r2, [r7, #16] - 800563c: 697b ldr r3, [r7, #20] - 800563e: f7fa fe67 bl 8000310 <__aeabi_uldivmod> - 8005642: 0003 movs r3, r0 - 8005644: 000c movs r4, r1 - 8005646: 637b str r3, [r7, #52] ; 0x34 - 8005648: e035 b.n 80056b6 + 8005652: 6abb ldr r3, [r7, #40] ; 0x28 + 8005654: 61bb str r3, [r7, #24] + 8005656: 2300 movs r3, #0 + 8005658: 61fb str r3, [r7, #28] + 800565a: 4a34 ldr r2, [pc, #208] ; (800572c ) + 800565c: 2300 movs r3, #0 + 800565e: 69b8 ldr r0, [r7, #24] + 8005660: 69f9 ldr r1, [r7, #28] + 8005662: f7fa fe75 bl 8000350 <__aeabi_lmul> + 8005666: 0003 movs r3, r0 + 8005668: 000c movs r4, r1 + 800566a: 0018 movs r0, r3 + 800566c: 0021 movs r1, r4 + 800566e: 6a7b ldr r3, [r7, #36] ; 0x24 + 8005670: 613b str r3, [r7, #16] + 8005672: 2300 movs r3, #0 + 8005674: 617b str r3, [r7, #20] + 8005676: 693a ldr r2, [r7, #16] + 8005678: 697b ldr r3, [r7, #20] + 800567a: f7fa fe49 bl 8000310 <__aeabi_uldivmod> + 800567e: 0003 movs r3, r0 + 8005680: 000c movs r4, r1 + 8005682: 637b str r3, [r7, #52] ; 0x34 + 8005684: e035 b.n 80056f2 } else { if ((RCC->CR & RCC_CR_HSIDIVF) != 0U) - 800564a: 4b26 ldr r3, [pc, #152] ; (80056e4 ) - 800564c: 681b ldr r3, [r3, #0] - 800564e: 2210 movs r2, #16 - 8005650: 4013 ands r3, r2 - 8005652: d019 beq.n 8005688 + 8005686: 4b26 ldr r3, [pc, #152] ; (8005720 ) + 8005688: 681b ldr r3, [r3, #0] + 800568a: 2210 movs r2, #16 + 800568c: 4013 ands r3, r2 + 800568e: d019 beq.n 80056c4 { pllvco = (uint32_t)((((uint64_t)(HSI_VALUE >> 2)) * (uint64_t)pllm) / (uint64_t)plld); - 8005654: 6abb ldr r3, [r7, #40] ; 0x28 - 8005656: 60bb str r3, [r7, #8] - 8005658: 2300 movs r3, #0 - 800565a: 60fb str r3, [r7, #12] - 800565c: 4a22 ldr r2, [pc, #136] ; (80056e8 ) - 800565e: 2300 movs r3, #0 - 8005660: 68b8 ldr r0, [r7, #8] - 8005662: 68f9 ldr r1, [r7, #12] - 8005664: f7fa fe74 bl 8000350 <__aeabi_lmul> - 8005668: 0003 movs r3, r0 - 800566a: 000c movs r4, r1 - 800566c: 0018 movs r0, r3 - 800566e: 0021 movs r1, r4 - 8005670: 6a7b ldr r3, [r7, #36] ; 0x24 - 8005672: 603b str r3, [r7, #0] - 8005674: 2300 movs r3, #0 - 8005676: 607b str r3, [r7, #4] - 8005678: 683a ldr r2, [r7, #0] - 800567a: 687b ldr r3, [r7, #4] - 800567c: f7fa fe48 bl 8000310 <__aeabi_uldivmod> - 8005680: 0003 movs r3, r0 - 8005682: 000c movs r4, r1 - 8005684: 637b str r3, [r7, #52] ; 0x34 - 8005686: e016 b.n 80056b6 + 8005690: 6abb ldr r3, [r7, #40] ; 0x28 + 8005692: 60bb str r3, [r7, #8] + 8005694: 2300 movs r3, #0 + 8005696: 60fb str r3, [r7, #12] + 8005698: 4a22 ldr r2, [pc, #136] ; (8005724 ) + 800569a: 2300 movs r3, #0 + 800569c: 68b8 ldr r0, [r7, #8] + 800569e: 68f9 ldr r1, [r7, #12] + 80056a0: f7fa fe56 bl 8000350 <__aeabi_lmul> + 80056a4: 0003 movs r3, r0 + 80056a6: 000c movs r4, r1 + 80056a8: 0018 movs r0, r3 + 80056aa: 0021 movs r1, r4 + 80056ac: 6a7b ldr r3, [r7, #36] ; 0x24 + 80056ae: 603b str r3, [r7, #0] + 80056b0: 2300 movs r3, #0 + 80056b2: 607b str r3, [r7, #4] + 80056b4: 683a ldr r2, [r7, #0] + 80056b6: 687b ldr r3, [r7, #4] + 80056b8: f7fa fe2a bl 8000310 <__aeabi_uldivmod> + 80056bc: 0003 movs r3, r0 + 80056be: 000c movs r4, r1 + 80056c0: 637b str r3, [r7, #52] ; 0x34 + 80056c2: e016 b.n 80056f2 } else { pllvco = (uint32_t)(((uint64_t)HSI_VALUE * (uint64_t)pllm) / (uint64_t)plld); - 8005688: 6abb ldr r3, [r7, #40] ; 0x28 - 800568a: 0018 movs r0, r3 - 800568c: 2300 movs r3, #0 - 800568e: 0019 movs r1, r3 - 8005690: 4a16 ldr r2, [pc, #88] ; (80056ec ) - 8005692: 2300 movs r3, #0 - 8005694: f7fa fe5c bl 8000350 <__aeabi_lmul> - 8005698: 0003 movs r3, r0 - 800569a: 000c movs r4, r1 - 800569c: 0018 movs r0, r3 - 800569e: 0021 movs r1, r4 - 80056a0: 6a7b ldr r3, [r7, #36] ; 0x24 - 80056a2: 001d movs r5, r3 - 80056a4: 2300 movs r3, #0 - 80056a6: 001e movs r6, r3 - 80056a8: 002a movs r2, r5 - 80056aa: 0033 movs r3, r6 - 80056ac: f7fa fe30 bl 8000310 <__aeabi_uldivmod> - 80056b0: 0003 movs r3, r0 - 80056b2: 000c movs r4, r1 - 80056b4: 637b str r3, [r7, #52] ; 0x34 + 80056c4: 6abb ldr r3, [r7, #40] ; 0x28 + 80056c6: 0018 movs r0, r3 + 80056c8: 2300 movs r3, #0 + 80056ca: 0019 movs r1, r3 + 80056cc: 4a16 ldr r2, [pc, #88] ; (8005728 ) + 80056ce: 2300 movs r3, #0 + 80056d0: f7fa fe3e bl 8000350 <__aeabi_lmul> + 80056d4: 0003 movs r3, r0 + 80056d6: 000c movs r4, r1 + 80056d8: 0018 movs r0, r3 + 80056da: 0021 movs r1, r4 + 80056dc: 6a7b ldr r3, [r7, #36] ; 0x24 + 80056de: 001d movs r5, r3 + 80056e0: 2300 movs r3, #0 + 80056e2: 001e movs r6, r3 + 80056e4: 002a movs r2, r5 + 80056e6: 0033 movs r3, r6 + 80056e8: f7fa fe12 bl 8000310 <__aeabi_uldivmod> + 80056ec: 0003 movs r3, r0 + 80056ee: 000c movs r4, r1 + 80056f0: 637b str r3, [r7, #52] ; 0x34 } } sysclockfreq = pllvco; - 80056b6: 6b7b ldr r3, [r7, #52] ; 0x34 - 80056b8: 633b str r3, [r7, #48] ; 0x30 + 80056f2: 6b7b ldr r3, [r7, #52] ; 0x34 + 80056f4: 633b str r3, [r7, #48] ; 0x30 break; - 80056ba: e00d b.n 80056d8 + 80056f6: e00d b.n 8005714 } case RCC_SYSCLKSOURCE_STATUS_MSI: /* MSI used as system clock source */ default: /* MSI used as system clock */ { msiclkrange = (RCC->ICSCR & RCC_ICSCR_MSIRANGE ) >> RCC_ICSCR_MSIRANGE_Pos; - 80056bc: 4b09 ldr r3, [pc, #36] ; (80056e4 ) - 80056be: 685b ldr r3, [r3, #4] - 80056c0: 0b5b lsrs r3, r3, #13 - 80056c2: 2207 movs r2, #7 - 80056c4: 4013 ands r3, r2 - 80056c6: 623b str r3, [r7, #32] + 80056f8: 4b09 ldr r3, [pc, #36] ; (8005720 ) + 80056fa: 685b ldr r3, [r3, #4] + 80056fc: 0b5b lsrs r3, r3, #13 + 80056fe: 2207 movs r2, #7 + 8005700: 4013 ands r3, r2 + 8005702: 623b str r3, [r7, #32] sysclockfreq = (32768U * (1UL << (msiclkrange + 1U))); - 80056c8: 6a3b ldr r3, [r7, #32] - 80056ca: 3301 adds r3, #1 - 80056cc: 2280 movs r2, #128 ; 0x80 - 80056ce: 0212 lsls r2, r2, #8 - 80056d0: 409a lsls r2, r3 - 80056d2: 0013 movs r3, r2 - 80056d4: 633b str r3, [r7, #48] ; 0x30 + 8005704: 6a3b ldr r3, [r7, #32] + 8005706: 3301 adds r3, #1 + 8005708: 2280 movs r2, #128 ; 0x80 + 800570a: 0212 lsls r2, r2, #8 + 800570c: 409a lsls r2, r3 + 800570e: 0013 movs r3, r2 + 8005710: 633b str r3, [r7, #48] ; 0x30 break; - 80056d6: 46c0 nop ; (mov r8, r8) + 8005712: 46c0 nop ; (mov r8, r8) } } return sysclockfreq; - 80056d8: 6b3b ldr r3, [r7, #48] ; 0x30 + 8005714: 6b3b ldr r3, [r7, #48] ; 0x30 } - 80056da: 0018 movs r0, r3 - 80056dc: 46bd mov sp, r7 - 80056de: b00f add sp, #60 ; 0x3c - 80056e0: bdf0 pop {r4, r5, r6, r7, pc} - 80056e2: 46c0 nop ; (mov r8, r8) - 80056e4: 40021000 .word 0x40021000 - 80056e8: 003d0900 .word 0x003d0900 - 80056ec: 00f42400 .word 0x00f42400 - 80056f0: 007a1200 .word 0x007a1200 - 80056f4: 080071e8 .word 0x080071e8 + 8005716: 0018 movs r0, r3 + 8005718: 46bd mov sp, r7 + 800571a: b00f add sp, #60 ; 0x3c + 800571c: bdf0 pop {r4, r5, r6, r7, pc} + 800571e: 46c0 nop ; (mov r8, r8) + 8005720: 40021000 .word 0x40021000 + 8005724: 003d0900 .word 0x003d0900 + 8005728: 00f42400 .word 0x00f42400 + 800572c: 007a1200 .word 0x007a1200 + 8005730: 08007224 .word 0x08007224 -080056f8 : +08005734 : * @note The SystemCoreClock CMSIS variable is used to store System Clock Frequency * and updated within this function * @retval HCLK frequency */ uint32_t HAL_RCC_GetHCLKFreq(void) { - 80056f8: b580 push {r7, lr} - 80056fa: af00 add r7, sp, #0 + 8005734: b580 push {r7, lr} + 8005736: af00 add r7, sp, #0 return SystemCoreClock; - 80056fc: 4b02 ldr r3, [pc, #8] ; (8005708 ) - 80056fe: 681b ldr r3, [r3, #0] + 8005738: 4b02 ldr r3, [pc, #8] ; (8005744 ) + 800573a: 681b ldr r3, [r3, #0] } - 8005700: 0018 movs r0, r3 - 8005702: 46bd mov sp, r7 - 8005704: bd80 pop {r7, pc} - 8005706: 46c0 nop ; (mov r8, r8) - 8005708: 20000000 .word 0x20000000 + 800573c: 0018 movs r0, r3 + 800573e: 46bd mov sp, r7 + 8005740: bd80 pop {r7, pc} + 8005742: 46c0 nop ; (mov r8, r8) + 8005744: 20000000 .word 0x20000000 -0800570c : +08005748 : * @note Each time PCLK1 changes, this function must be called to update the * right PCLK1 value. Otherwise, any configuration based on this function will be incorrect. * @retval PCLK1 frequency */ uint32_t HAL_RCC_GetPCLK1Freq(void) { - 800570c: b580 push {r7, lr} - 800570e: af00 add r7, sp, #0 + 8005748: b580 push {r7, lr} + 800574a: af00 add r7, sp, #0 /* Get HCLK source and Compute PCLK1 frequency ---------------------------*/ return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1) >> RCC_CFGR_PPRE1_Pos]); - 8005710: f7ff fff2 bl 80056f8 - 8005714: 0001 movs r1, r0 - 8005716: 4b06 ldr r3, [pc, #24] ; (8005730 ) - 8005718: 68db ldr r3, [r3, #12] - 800571a: 0a1b lsrs r3, r3, #8 - 800571c: 2207 movs r2, #7 - 800571e: 4013 ands r3, r2 - 8005720: 4a04 ldr r2, [pc, #16] ; (8005734 ) - 8005722: 5cd3 ldrb r3, [r2, r3] - 8005724: 40d9 lsrs r1, r3 - 8005726: 000b movs r3, r1 + 800574c: f7ff fff2 bl 8005734 + 8005750: 0001 movs r1, r0 + 8005752: 4b06 ldr r3, [pc, #24] ; (800576c ) + 8005754: 68db ldr r3, [r3, #12] + 8005756: 0a1b lsrs r3, r3, #8 + 8005758: 2207 movs r2, #7 + 800575a: 4013 ands r3, r2 + 800575c: 4a04 ldr r2, [pc, #16] ; (8005770 ) + 800575e: 5cd3 ldrb r3, [r2, r3] + 8005760: 40d9 lsrs r1, r3 + 8005762: 000b movs r3, r1 } - 8005728: 0018 movs r0, r3 - 800572a: 46bd mov sp, r7 - 800572c: bd80 pop {r7, pc} - 800572e: 46c0 nop ; (mov r8, r8) - 8005730: 40021000 .word 0x40021000 - 8005734: 080071e0 .word 0x080071e0 + 8005764: 0018 movs r0, r3 + 8005766: 46bd mov sp, r7 + 8005768: bd80 pop {r7, pc} + 800576a: 46c0 nop ; (mov r8, r8) + 800576c: 40021000 .word 0x40021000 + 8005770: 0800721c .word 0x0800721c -08005738 : +08005774 : * @note Each time PCLK2 changes, this function must be called to update the * right PCLK2 value. Otherwise, any configuration based on this function will be incorrect. * @retval PCLK2 frequency */ uint32_t HAL_RCC_GetPCLK2Freq(void) { - 8005738: b580 push {r7, lr} - 800573a: af00 add r7, sp, #0 + 8005774: b580 push {r7, lr} + 8005776: af00 add r7, sp, #0 /* Get HCLK source and Compute PCLK2 frequency ---------------------------*/ return (HAL_RCC_GetHCLKFreq()>> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE2) >> RCC_CFGR_PPRE2_Pos]); - 800573c: f7ff ffdc bl 80056f8 - 8005740: 0001 movs r1, r0 - 8005742: 4b06 ldr r3, [pc, #24] ; (800575c ) - 8005744: 68db ldr r3, [r3, #12] - 8005746: 0adb lsrs r3, r3, #11 - 8005748: 2207 movs r2, #7 - 800574a: 4013 ands r3, r2 - 800574c: 4a04 ldr r2, [pc, #16] ; (8005760 ) - 800574e: 5cd3 ldrb r3, [r2, r3] - 8005750: 40d9 lsrs r1, r3 - 8005752: 000b movs r3, r1 + 8005778: f7ff ffdc bl 8005734 + 800577c: 0001 movs r1, r0 + 800577e: 4b06 ldr r3, [pc, #24] ; (8005798 ) + 8005780: 68db ldr r3, [r3, #12] + 8005782: 0adb lsrs r3, r3, #11 + 8005784: 2207 movs r2, #7 + 8005786: 4013 ands r3, r2 + 8005788: 4a04 ldr r2, [pc, #16] ; (800579c ) + 800578a: 5cd3 ldrb r3, [r2, r3] + 800578c: 40d9 lsrs r1, r3 + 800578e: 000b movs r3, r1 } - 8005754: 0018 movs r0, r3 - 8005756: 46bd mov sp, r7 - 8005758: bd80 pop {r7, pc} - 800575a: 46c0 nop ; (mov r8, r8) - 800575c: 40021000 .word 0x40021000 - 8005760: 080071e0 .word 0x080071e0 + 8005790: 0018 movs r0, r3 + 8005792: 46bd mov sp, r7 + 8005794: bd80 pop {r7, pc} + 8005796: 46c0 nop ; (mov r8, r8) + 8005798: 40021000 .word 0x40021000 + 800579c: 0800721c .word 0x0800721c -08005764 : +080057a0 : * @retval HAL status * @note If HAL_ERROR returned, first switch-OFF HSE clock oscillator with @ref HAL_RCC_OscConfig() * to possibly update HSE divider. */ HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit) { - 8005764: b580 push {r7, lr} - 8005766: b086 sub sp, #24 - 8005768: af00 add r7, sp, #0 - 800576a: 6078 str r0, [r7, #4] + 80057a0: b580 push {r7, lr} + 80057a2: b086 sub sp, #24 + 80057a4: af00 add r7, sp, #0 + 80057a6: 6078 str r0, [r7, #4] uint32_t tickstart; uint32_t temp_reg; FlagStatus pwrclkchanged = RESET; - 800576c: 2317 movs r3, #23 - 800576e: 18fb adds r3, r7, r3 - 8005770: 2200 movs r2, #0 - 8005772: 701a strb r2, [r3, #0] + 80057a8: 2317 movs r3, #23 + 80057aa: 18fb adds r3, r7, r3 + 80057ac: 2200 movs r2, #0 + 80057ae: 701a strb r2, [r3, #0] /* Check the parameters */ assert_param(IS_RCC_PERIPHCLOCK(PeriphClkInit->PeriphClockSelection)); /*------------------------------- RTC/LCD Configuration ------------------------*/ if ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == RCC_PERIPHCLK_RTC) - 8005774: 687b ldr r3, [r7, #4] - 8005776: 681b ldr r3, [r3, #0] - 8005778: 2220 movs r2, #32 - 800577a: 4013 ands r3, r2 - 800577c: d100 bne.n 8005780 - 800577e: e0c2 b.n 8005906 + 80057b0: 687b ldr r3, [r7, #4] + 80057b2: 681b ldr r3, [r3, #0] + 80057b4: 2220 movs r2, #32 + 80057b6: 4013 ands r3, r2 + 80057b8: d100 bne.n 80057bc + 80057ba: e0c2 b.n 8005942 #endif /* LCD */ /* As soon as function is called to change RTC clock source, activation of the power domain is done. */ /* Requires to enable write access to Backup Domain of necessary */ if(__HAL_RCC_PWR_IS_CLK_DISABLED()) - 8005780: 4b96 ldr r3, [pc, #600] ; (80059dc ) - 8005782: 6b9a ldr r2, [r3, #56] ; 0x38 - 8005784: 2380 movs r3, #128 ; 0x80 - 8005786: 055b lsls r3, r3, #21 - 8005788: 4013 ands r3, r2 - 800578a: d10a bne.n 80057a2 + 80057bc: 4b96 ldr r3, [pc, #600] ; (8005a18 ) + 80057be: 6b9a ldr r2, [r3, #56] ; 0x38 + 80057c0: 2380 movs r3, #128 ; 0x80 + 80057c2: 055b lsls r3, r3, #21 + 80057c4: 4013 ands r3, r2 + 80057c6: d10a bne.n 80057de { __HAL_RCC_PWR_CLK_ENABLE(); - 800578c: 4b93 ldr r3, [pc, #588] ; (80059dc ) - 800578e: 4a93 ldr r2, [pc, #588] ; (80059dc ) - 8005790: 6b92 ldr r2, [r2, #56] ; 0x38 - 8005792: 2180 movs r1, #128 ; 0x80 - 8005794: 0549 lsls r1, r1, #21 - 8005796: 430a orrs r2, r1 - 8005798: 639a str r2, [r3, #56] ; 0x38 + 80057c8: 4b93 ldr r3, [pc, #588] ; (8005a18 ) + 80057ca: 4a93 ldr r2, [pc, #588] ; (8005a18 ) + 80057cc: 6b92 ldr r2, [r2, #56] ; 0x38 + 80057ce: 2180 movs r1, #128 ; 0x80 + 80057d0: 0549 lsls r1, r1, #21 + 80057d2: 430a orrs r2, r1 + 80057d4: 639a str r2, [r3, #56] ; 0x38 pwrclkchanged = SET; - 800579a: 2317 movs r3, #23 - 800579c: 18fb adds r3, r7, r3 - 800579e: 2201 movs r2, #1 - 80057a0: 701a strb r2, [r3, #0] + 80057d6: 2317 movs r3, #23 + 80057d8: 18fb adds r3, r7, r3 + 80057da: 2201 movs r2, #1 + 80057dc: 701a strb r2, [r3, #0] } if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) - 80057a2: 4b8f ldr r3, [pc, #572] ; (80059e0 ) - 80057a4: 681a ldr r2, [r3, #0] - 80057a6: 2380 movs r3, #128 ; 0x80 - 80057a8: 005b lsls r3, r3, #1 - 80057aa: 4013 ands r3, r2 - 80057ac: d11a bne.n 80057e4 + 80057de: 4b8f ldr r3, [pc, #572] ; (8005a1c ) + 80057e0: 681a ldr r2, [r3, #0] + 80057e2: 2380 movs r3, #128 ; 0x80 + 80057e4: 005b lsls r3, r3, #1 + 80057e6: 4013 ands r3, r2 + 80057e8: d11a bne.n 8005820 { /* Enable write access to Backup domain */ SET_BIT(PWR->CR, PWR_CR_DBP); - 80057ae: 4b8c ldr r3, [pc, #560] ; (80059e0 ) - 80057b0: 4a8b ldr r2, [pc, #556] ; (80059e0 ) - 80057b2: 6812 ldr r2, [r2, #0] - 80057b4: 2180 movs r1, #128 ; 0x80 - 80057b6: 0049 lsls r1, r1, #1 - 80057b8: 430a orrs r2, r1 - 80057ba: 601a str r2, [r3, #0] + 80057ea: 4b8c ldr r3, [pc, #560] ; (8005a1c ) + 80057ec: 4a8b ldr r2, [pc, #556] ; (8005a1c ) + 80057ee: 6812 ldr r2, [r2, #0] + 80057f0: 2180 movs r1, #128 ; 0x80 + 80057f2: 0049 lsls r1, r1, #1 + 80057f4: 430a orrs r2, r1 + 80057f6: 601a str r2, [r3, #0] /* Wait for Backup domain Write protection disable */ tickstart = HAL_GetTick(); - 80057bc: f7fe fbb6 bl 8003f2c - 80057c0: 0003 movs r3, r0 - 80057c2: 613b str r3, [r7, #16] + 80057f8: f7fe fbb6 bl 8003f68 + 80057fc: 0003 movs r3, r0 + 80057fe: 613b str r3, [r7, #16] while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) - 80057c4: e008 b.n 80057d8 + 8005800: e008 b.n 8005814 { if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE) - 80057c6: f7fe fbb1 bl 8003f2c - 80057ca: 0002 movs r2, r0 - 80057cc: 693b ldr r3, [r7, #16] - 80057ce: 1ad3 subs r3, r2, r3 - 80057d0: 2b64 cmp r3, #100 ; 0x64 - 80057d2: d901 bls.n 80057d8 + 8005802: f7fe fbb1 bl 8003f68 + 8005806: 0002 movs r2, r0 + 8005808: 693b ldr r3, [r7, #16] + 800580a: 1ad3 subs r3, r2, r3 + 800580c: 2b64 cmp r3, #100 ; 0x64 + 800580e: d901 bls.n 8005814 { return HAL_TIMEOUT; - 80057d4: 2303 movs r3, #3 - 80057d6: e0fc b.n 80059d2 + 8005810: 2303 movs r3, #3 + 8005812: e0fc b.n 8005a0e while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) - 80057d8: 4b81 ldr r3, [pc, #516] ; (80059e0 ) - 80057da: 681a ldr r2, [r3, #0] - 80057dc: 2380 movs r3, #128 ; 0x80 - 80057de: 005b lsls r3, r3, #1 - 80057e0: 4013 ands r3, r2 - 80057e2: d0f0 beq.n 80057c6 + 8005814: 4b81 ldr r3, [pc, #516] ; (8005a1c ) + 8005816: 681a ldr r2, [r3, #0] + 8005818: 2380 movs r3, #128 ; 0x80 + 800581a: 005b lsls r3, r3, #1 + 800581c: 4013 ands r3, r2 + 800581e: d0f0 beq.n 8005802 } } } /* Check if user wants to change HSE RTC prescaler whereas HSE is enabled */ temp_reg = (RCC->CR & RCC_CR_RTCPRE); - 80057e4: 4b7d ldr r3, [pc, #500] ; (80059dc ) - 80057e6: 681a ldr r2, [r3, #0] - 80057e8: 23c0 movs r3, #192 ; 0xc0 - 80057ea: 039b lsls r3, r3, #14 - 80057ec: 4013 ands r3, r2 - 80057ee: 60fb str r3, [r7, #12] + 8005820: 4b7d ldr r3, [pc, #500] ; (8005a18 ) + 8005822: 681a ldr r2, [r3, #0] + 8005824: 23c0 movs r3, #192 ; 0xc0 + 8005826: 039b lsls r3, r3, #14 + 8005828: 4013 ands r3, r2 + 800582a: 60fb str r3, [r7, #12] if ((temp_reg != (PeriphClkInit->RTCClockSelection & RCC_CR_RTCPRE)) - 80057f0: 687b ldr r3, [r7, #4] - 80057f2: 685a ldr r2, [r3, #4] - 80057f4: 23c0 movs r3, #192 ; 0xc0 - 80057f6: 039b lsls r3, r3, #14 - 80057f8: 401a ands r2, r3 - 80057fa: 68fb ldr r3, [r7, #12] - 80057fc: 429a cmp r2, r3 - 80057fe: d013 beq.n 8005828 + 800582c: 687b ldr r3, [r7, #4] + 800582e: 685a ldr r2, [r3, #4] + 8005830: 23c0 movs r3, #192 ; 0xc0 + 8005832: 039b lsls r3, r3, #14 + 8005834: 401a ands r2, r3 + 8005836: 68fb ldr r3, [r7, #12] + 8005838: 429a cmp r2, r3 + 800583a: d013 beq.n 8005864 #if defined (LCD) || (temp_reg != (PeriphClkInit->LCDClockSelection & RCC_CR_RTCPRE)) #endif /* LCD */ ) { /* Check HSE State */ if ((PeriphClkInit->RTCClockSelection & RCC_CSR_RTCSEL) == RCC_CSR_RTCSEL_HSE) - 8005800: 687b ldr r3, [r7, #4] - 8005802: 685a ldr r2, [r3, #4] - 8005804: 23c0 movs r3, #192 ; 0xc0 - 8005806: 029b lsls r3, r3, #10 - 8005808: 401a ands r2, r3 - 800580a: 23c0 movs r3, #192 ; 0xc0 - 800580c: 029b lsls r3, r3, #10 - 800580e: 429a cmp r2, r3 - 8005810: d10a bne.n 8005828 + 800583c: 687b ldr r3, [r7, #4] + 800583e: 685a ldr r2, [r3, #4] + 8005840: 23c0 movs r3, #192 ; 0xc0 + 8005842: 029b lsls r3, r3, #10 + 8005844: 401a ands r2, r3 + 8005846: 23c0 movs r3, #192 ; 0xc0 + 8005848: 029b lsls r3, r3, #10 + 800584a: 429a cmp r2, r3 + 800584c: d10a bne.n 8005864 { if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSERDY)) - 8005812: 4b72 ldr r3, [pc, #456] ; (80059dc ) - 8005814: 681a ldr r2, [r3, #0] - 8005816: 2380 movs r3, #128 ; 0x80 - 8005818: 029b lsls r3, r3, #10 - 800581a: 401a ands r2, r3 - 800581c: 2380 movs r3, #128 ; 0x80 - 800581e: 029b lsls r3, r3, #10 - 8005820: 429a cmp r2, r3 - 8005822: d101 bne.n 8005828 + 800584e: 4b72 ldr r3, [pc, #456] ; (8005a18 ) + 8005850: 681a ldr r2, [r3, #0] + 8005852: 2380 movs r3, #128 ; 0x80 + 8005854: 029b lsls r3, r3, #10 + 8005856: 401a ands r2, r3 + 8005858: 2380 movs r3, #128 ; 0x80 + 800585a: 029b lsls r3, r3, #10 + 800585c: 429a cmp r2, r3 + 800585e: d101 bne.n 8005864 { /* To update HSE divider, first switch-OFF HSE clock oscillator*/ return HAL_ERROR; - 8005824: 2301 movs r3, #1 - 8005826: e0d4 b.n 80059d2 + 8005860: 2301 movs r3, #1 + 8005862: e0d4 b.n 8005a0e } } } /* Reset the Backup domain only if the RTC Clock source selection is modified from reset value */ temp_reg = (RCC->CSR & RCC_CSR_RTCSEL); - 8005828: 4b6c ldr r3, [pc, #432] ; (80059dc ) - 800582a: 6d1a ldr r2, [r3, #80] ; 0x50 - 800582c: 23c0 movs r3, #192 ; 0xc0 - 800582e: 029b lsls r3, r3, #10 - 8005830: 4013 ands r3, r2 - 8005832: 60fb str r3, [r7, #12] + 8005864: 4b6c ldr r3, [pc, #432] ; (8005a18 ) + 8005866: 6d1a ldr r2, [r3, #80] ; 0x50 + 8005868: 23c0 movs r3, #192 ; 0xc0 + 800586a: 029b lsls r3, r3, #10 + 800586c: 4013 ands r3, r2 + 800586e: 60fb str r3, [r7, #12] if((temp_reg != 0x00000000U) && (((temp_reg != (PeriphClkInit->RTCClockSelection & RCC_CSR_RTCSEL)) \ - 8005834: 68fb ldr r3, [r7, #12] - 8005836: 2b00 cmp r3, #0 - 8005838: d03b beq.n 80058b2 - 800583a: 687b ldr r3, [r7, #4] - 800583c: 685a ldr r2, [r3, #4] - 800583e: 23c0 movs r3, #192 ; 0xc0 - 8005840: 029b lsls r3, r3, #10 - 8005842: 401a ands r2, r3 - 8005844: 68fb ldr r3, [r7, #12] - 8005846: 429a cmp r2, r3 - 8005848: d033 beq.n 80058b2 + 8005870: 68fb ldr r3, [r7, #12] + 8005872: 2b00 cmp r3, #0 + 8005874: d03b beq.n 80058ee + 8005876: 687b ldr r3, [r7, #4] + 8005878: 685a ldr r2, [r3, #4] + 800587a: 23c0 movs r3, #192 ; 0xc0 + 800587c: 029b lsls r3, r3, #10 + 800587e: 401a ands r2, r3 + 8005880: 68fb ldr r3, [r7, #12] + 8005882: 429a cmp r2, r3 + 8005884: d033 beq.n 80058ee && (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == RCC_PERIPHCLK_RTC)) - 800584a: 687b ldr r3, [r7, #4] - 800584c: 681b ldr r3, [r3, #0] - 800584e: 2220 movs r2, #32 - 8005850: 4013 ands r3, r2 - 8005852: d02e beq.n 80058b2 + 8005886: 687b ldr r3, [r7, #4] + 8005888: 681b ldr r3, [r3, #0] + 800588a: 2220 movs r2, #32 + 800588c: 4013 ands r3, r2 + 800588e: d02e beq.n 80058ee && (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_LCD) == RCC_PERIPHCLK_LCD)) #endif /* LCD */ )) { /* Store the content of CSR register before the reset of Backup Domain */ temp_reg = (RCC->CSR & ~(RCC_CSR_RTCSEL)); - 8005854: 4b61 ldr r3, [pc, #388] ; (80059dc ) - 8005856: 6d1b ldr r3, [r3, #80] ; 0x50 - 8005858: 4a62 ldr r2, [pc, #392] ; (80059e4 ) - 800585a: 4013 ands r3, r2 - 800585c: 60fb str r3, [r7, #12] + 8005890: 4b61 ldr r3, [pc, #388] ; (8005a18 ) + 8005892: 6d1b ldr r3, [r3, #80] ; 0x50 + 8005894: 4a62 ldr r2, [pc, #392] ; (8005a20 ) + 8005896: 4013 ands r3, r2 + 8005898: 60fb str r3, [r7, #12] /* RTC Clock selection can be changed only if the Backup Domain is reset */ __HAL_RCC_BACKUPRESET_FORCE(); - 800585e: 4b5f ldr r3, [pc, #380] ; (80059dc ) - 8005860: 4a5e ldr r2, [pc, #376] ; (80059dc ) - 8005862: 6d12 ldr r2, [r2, #80] ; 0x50 - 8005864: 2180 movs r1, #128 ; 0x80 - 8005866: 0309 lsls r1, r1, #12 - 8005868: 430a orrs r2, r1 - 800586a: 651a str r2, [r3, #80] ; 0x50 + 800589a: 4b5f ldr r3, [pc, #380] ; (8005a18 ) + 800589c: 4a5e ldr r2, [pc, #376] ; (8005a18 ) + 800589e: 6d12 ldr r2, [r2, #80] ; 0x50 + 80058a0: 2180 movs r1, #128 ; 0x80 + 80058a2: 0309 lsls r1, r1, #12 + 80058a4: 430a orrs r2, r1 + 80058a6: 651a str r2, [r3, #80] ; 0x50 __HAL_RCC_BACKUPRESET_RELEASE(); - 800586c: 4b5b ldr r3, [pc, #364] ; (80059dc ) - 800586e: 4a5b ldr r2, [pc, #364] ; (80059dc ) - 8005870: 6d12 ldr r2, [r2, #80] ; 0x50 - 8005872: 495d ldr r1, [pc, #372] ; (80059e8 ) - 8005874: 400a ands r2, r1 - 8005876: 651a str r2, [r3, #80] ; 0x50 + 80058a8: 4b5b ldr r3, [pc, #364] ; (8005a18 ) + 80058aa: 4a5b ldr r2, [pc, #364] ; (8005a18 ) + 80058ac: 6d12 ldr r2, [r2, #80] ; 0x50 + 80058ae: 495d ldr r1, [pc, #372] ; (8005a24 ) + 80058b0: 400a ands r2, r1 + 80058b2: 651a str r2, [r3, #80] ; 0x50 /* Restore the Content of CSR register */ RCC->CSR = temp_reg; - 8005878: 4b58 ldr r3, [pc, #352] ; (80059dc ) - 800587a: 68fa ldr r2, [r7, #12] - 800587c: 651a str r2, [r3, #80] ; 0x50 + 80058b4: 4b58 ldr r3, [pc, #352] ; (8005a18 ) + 80058b6: 68fa ldr r2, [r7, #12] + 80058b8: 651a str r2, [r3, #80] ; 0x50 /* Wait for LSERDY if LSE was enabled */ if (HAL_IS_BIT_SET(temp_reg, RCC_CSR_LSEON)) - 800587e: 68fa ldr r2, [r7, #12] - 8005880: 2380 movs r3, #128 ; 0x80 - 8005882: 005b lsls r3, r3, #1 - 8005884: 4013 ands r3, r2 - 8005886: d014 beq.n 80058b2 + 80058ba: 68fa ldr r2, [r7, #12] + 80058bc: 2380 movs r3, #128 ; 0x80 + 80058be: 005b lsls r3, r3, #1 + 80058c0: 4013 ands r3, r2 + 80058c2: d014 beq.n 80058ee { /* Get Start Tick */ tickstart = HAL_GetTick(); - 8005888: f7fe fb50 bl 8003f2c - 800588c: 0003 movs r3, r0 - 800588e: 613b str r3, [r7, #16] + 80058c4: f7fe fb50 bl 8003f68 + 80058c8: 0003 movs r3, r0 + 80058ca: 613b str r3, [r7, #16] /* Wait till LSE is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == 0U) - 8005890: e009 b.n 80058a6 + 80058cc: e009 b.n 80058e2 { if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) - 8005892: f7fe fb4b bl 8003f2c - 8005896: 0002 movs r2, r0 - 8005898: 693b ldr r3, [r7, #16] - 800589a: 1ad3 subs r3, r2, r3 - 800589c: 4a53 ldr r2, [pc, #332] ; (80059ec ) - 800589e: 4293 cmp r3, r2 - 80058a0: d901 bls.n 80058a6 + 80058ce: f7fe fb4b bl 8003f68 + 80058d2: 0002 movs r2, r0 + 80058d4: 693b ldr r3, [r7, #16] + 80058d6: 1ad3 subs r3, r2, r3 + 80058d8: 4a53 ldr r2, [pc, #332] ; (8005a28 ) + 80058da: 4293 cmp r3, r2 + 80058dc: d901 bls.n 80058e2 { return HAL_TIMEOUT; - 80058a2: 2303 movs r3, #3 - 80058a4: e095 b.n 80059d2 + 80058de: 2303 movs r3, #3 + 80058e0: e095 b.n 8005a0e while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == 0U) - 80058a6: 4b4d ldr r3, [pc, #308] ; (80059dc ) - 80058a8: 6d1a ldr r2, [r3, #80] ; 0x50 - 80058aa: 2380 movs r3, #128 ; 0x80 - 80058ac: 009b lsls r3, r3, #2 - 80058ae: 4013 ands r3, r2 - 80058b0: d0ef beq.n 8005892 + 80058e2: 4b4d ldr r3, [pc, #308] ; (8005a18 ) + 80058e4: 6d1a ldr r2, [r3, #80] ; 0x50 + 80058e6: 2380 movs r3, #128 ; 0x80 + 80058e8: 009b lsls r3, r3, #2 + 80058ea: 4013 ands r3, r2 + 80058ec: d0ef beq.n 80058ce } } } } __HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection); - 80058b2: 687b ldr r3, [r7, #4] - 80058b4: 685a ldr r2, [r3, #4] - 80058b6: 23c0 movs r3, #192 ; 0xc0 - 80058b8: 029b lsls r3, r3, #10 - 80058ba: 401a ands r2, r3 - 80058bc: 23c0 movs r3, #192 ; 0xc0 - 80058be: 029b lsls r3, r3, #10 - 80058c0: 429a cmp r2, r3 - 80058c2: d10b bne.n 80058dc - 80058c4: 4a45 ldr r2, [pc, #276] ; (80059dc ) - 80058c6: 4b45 ldr r3, [pc, #276] ; (80059dc ) - 80058c8: 681b ldr r3, [r3, #0] - 80058ca: 4949 ldr r1, [pc, #292] ; (80059f0 ) - 80058cc: 4019 ands r1, r3 - 80058ce: 687b ldr r3, [r7, #4] - 80058d0: 6858 ldr r0, [r3, #4] - 80058d2: 23c0 movs r3, #192 ; 0xc0 - 80058d4: 039b lsls r3, r3, #14 - 80058d6: 4003 ands r3, r0 - 80058d8: 430b orrs r3, r1 - 80058da: 6013 str r3, [r2, #0] - 80058dc: 4a3f ldr r2, [pc, #252] ; (80059dc ) - 80058de: 4b3f ldr r3, [pc, #252] ; (80059dc ) - 80058e0: 6d19 ldr r1, [r3, #80] ; 0x50 - 80058e2: 687b ldr r3, [r7, #4] - 80058e4: 6858 ldr r0, [r3, #4] - 80058e6: 23c0 movs r3, #192 ; 0xc0 - 80058e8: 029b lsls r3, r3, #10 - 80058ea: 4003 ands r3, r0 - 80058ec: 430b orrs r3, r1 - 80058ee: 6513 str r3, [r2, #80] ; 0x50 + 80058ee: 687b ldr r3, [r7, #4] + 80058f0: 685a ldr r2, [r3, #4] + 80058f2: 23c0 movs r3, #192 ; 0xc0 + 80058f4: 029b lsls r3, r3, #10 + 80058f6: 401a ands r2, r3 + 80058f8: 23c0 movs r3, #192 ; 0xc0 + 80058fa: 029b lsls r3, r3, #10 + 80058fc: 429a cmp r2, r3 + 80058fe: d10b bne.n 8005918 + 8005900: 4a45 ldr r2, [pc, #276] ; (8005a18 ) + 8005902: 4b45 ldr r3, [pc, #276] ; (8005a18 ) + 8005904: 681b ldr r3, [r3, #0] + 8005906: 4949 ldr r1, [pc, #292] ; (8005a2c ) + 8005908: 4019 ands r1, r3 + 800590a: 687b ldr r3, [r7, #4] + 800590c: 6858 ldr r0, [r3, #4] + 800590e: 23c0 movs r3, #192 ; 0xc0 + 8005910: 039b lsls r3, r3, #14 + 8005912: 4003 ands r3, r0 + 8005914: 430b orrs r3, r1 + 8005916: 6013 str r3, [r2, #0] + 8005918: 4a3f ldr r2, [pc, #252] ; (8005a18 ) + 800591a: 4b3f ldr r3, [pc, #252] ; (8005a18 ) + 800591c: 6d19 ldr r1, [r3, #80] ; 0x50 + 800591e: 687b ldr r3, [r7, #4] + 8005920: 6858 ldr r0, [r3, #4] + 8005922: 23c0 movs r3, #192 ; 0xc0 + 8005924: 029b lsls r3, r3, #10 + 8005926: 4003 ands r3, r0 + 8005928: 430b orrs r3, r1 + 800592a: 6513 str r3, [r2, #80] ; 0x50 /* Require to disable power clock if necessary */ if(pwrclkchanged == SET) - 80058f0: 2317 movs r3, #23 - 80058f2: 18fb adds r3, r7, r3 - 80058f4: 781b ldrb r3, [r3, #0] - 80058f6: 2b01 cmp r3, #1 - 80058f8: d105 bne.n 8005906 + 800592c: 2317 movs r3, #23 + 800592e: 18fb adds r3, r7, r3 + 8005930: 781b ldrb r3, [r3, #0] + 8005932: 2b01 cmp r3, #1 + 8005934: d105 bne.n 8005942 { __HAL_RCC_PWR_CLK_DISABLE(); - 80058fa: 4b38 ldr r3, [pc, #224] ; (80059dc ) - 80058fc: 4a37 ldr r2, [pc, #220] ; (80059dc ) - 80058fe: 6b92 ldr r2, [r2, #56] ; 0x38 - 8005900: 493c ldr r1, [pc, #240] ; (80059f4 ) - 8005902: 400a ands r2, r1 - 8005904: 639a str r2, [r3, #56] ; 0x38 + 8005936: 4b38 ldr r3, [pc, #224] ; (8005a18 ) + 8005938: 4a37 ldr r2, [pc, #220] ; (8005a18 ) + 800593a: 6b92 ldr r2, [r2, #56] ; 0x38 + 800593c: 493c ldr r1, [pc, #240] ; (8005a30 ) + 800593e: 400a ands r2, r1 + 8005940: 639a str r2, [r3, #56] ; 0x38 } } #if defined (RCC_CCIPR_USART1SEL) /*------------------------------- USART1 Configuration ------------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART1) == RCC_PERIPHCLK_USART1) - 8005906: 687b ldr r3, [r7, #4] - 8005908: 681b ldr r3, [r3, #0] - 800590a: 2201 movs r2, #1 - 800590c: 4013 ands r3, r2 - 800590e: d009 beq.n 8005924 + 8005942: 687b ldr r3, [r7, #4] + 8005944: 681b ldr r3, [r3, #0] + 8005946: 2201 movs r2, #1 + 8005948: 4013 ands r3, r2 + 800594a: d009 beq.n 8005960 { /* Check the parameters */ assert_param(IS_RCC_USART1CLKSOURCE(PeriphClkInit->Usart1ClockSelection)); /* Configure the USART1 clock source */ __HAL_RCC_USART1_CONFIG(PeriphClkInit->Usart1ClockSelection); - 8005910: 4a32 ldr r2, [pc, #200] ; (80059dc ) - 8005912: 4b32 ldr r3, [pc, #200] ; (80059dc ) - 8005914: 6cdb ldr r3, [r3, #76] ; 0x4c - 8005916: 2103 movs r1, #3 - 8005918: 438b bics r3, r1 - 800591a: 0019 movs r1, r3 - 800591c: 687b ldr r3, [r7, #4] - 800591e: 689b ldr r3, [r3, #8] - 8005920: 430b orrs r3, r1 - 8005922: 64d3 str r3, [r2, #76] ; 0x4c + 800594c: 4a32 ldr r2, [pc, #200] ; (8005a18 ) + 800594e: 4b32 ldr r3, [pc, #200] ; (8005a18 ) + 8005950: 6cdb ldr r3, [r3, #76] ; 0x4c + 8005952: 2103 movs r1, #3 + 8005954: 438b bics r3, r1 + 8005956: 0019 movs r1, r3 + 8005958: 687b ldr r3, [r7, #4] + 800595a: 689b ldr r3, [r3, #8] + 800595c: 430b orrs r3, r1 + 800595e: 64d3 str r3, [r2, #76] ; 0x4c } #endif /* RCC_CCIPR_USART1SEL */ /*----------------------------- USART2 Configuration --------------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART2) == RCC_PERIPHCLK_USART2) - 8005924: 687b ldr r3, [r7, #4] - 8005926: 681b ldr r3, [r3, #0] - 8005928: 2202 movs r2, #2 - 800592a: 4013 ands r3, r2 - 800592c: d009 beq.n 8005942 + 8005960: 687b ldr r3, [r7, #4] + 8005962: 681b ldr r3, [r3, #0] + 8005964: 2202 movs r2, #2 + 8005966: 4013 ands r3, r2 + 8005968: d009 beq.n 800597e { /* Check the parameters */ assert_param(IS_RCC_USART2CLKSOURCE(PeriphClkInit->Usart2ClockSelection)); /* Configure the USART2 clock source */ __HAL_RCC_USART2_CONFIG(PeriphClkInit->Usart2ClockSelection); - 800592e: 4a2b ldr r2, [pc, #172] ; (80059dc ) - 8005930: 4b2a ldr r3, [pc, #168] ; (80059dc ) - 8005932: 6cdb ldr r3, [r3, #76] ; 0x4c - 8005934: 210c movs r1, #12 - 8005936: 438b bics r3, r1 - 8005938: 0019 movs r1, r3 - 800593a: 687b ldr r3, [r7, #4] - 800593c: 68db ldr r3, [r3, #12] - 800593e: 430b orrs r3, r1 - 8005940: 64d3 str r3, [r2, #76] ; 0x4c + 800596a: 4a2b ldr r2, [pc, #172] ; (8005a18 ) + 800596c: 4b2a ldr r3, [pc, #168] ; (8005a18 ) + 800596e: 6cdb ldr r3, [r3, #76] ; 0x4c + 8005970: 210c movs r1, #12 + 8005972: 438b bics r3, r1 + 8005974: 0019 movs r1, r3 + 8005976: 687b ldr r3, [r7, #4] + 8005978: 68db ldr r3, [r3, #12] + 800597a: 430b orrs r3, r1 + 800597c: 64d3 str r3, [r2, #76] ; 0x4c } /*------------------------------ LPUART1 Configuration ------------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_LPUART1) == RCC_PERIPHCLK_LPUART1) - 8005942: 687b ldr r3, [r7, #4] - 8005944: 681b ldr r3, [r3, #0] - 8005946: 2204 movs r2, #4 - 8005948: 4013 ands r3, r2 - 800594a: d008 beq.n 800595e + 800597e: 687b ldr r3, [r7, #4] + 8005980: 681b ldr r3, [r3, #0] + 8005982: 2204 movs r2, #4 + 8005984: 4013 ands r3, r2 + 8005986: d008 beq.n 800599a { /* Check the parameters */ assert_param(IS_RCC_LPUART1CLKSOURCE(PeriphClkInit->Lpuart1ClockSelection)); /* Configure the LPUAR1 clock source */ __HAL_RCC_LPUART1_CONFIG(PeriphClkInit->Lpuart1ClockSelection); - 800594c: 4a23 ldr r2, [pc, #140] ; (80059dc ) - 800594e: 4b23 ldr r3, [pc, #140] ; (80059dc ) - 8005950: 6cdb ldr r3, [r3, #76] ; 0x4c - 8005952: 4929 ldr r1, [pc, #164] ; (80059f8 ) - 8005954: 4019 ands r1, r3 - 8005956: 687b ldr r3, [r7, #4] - 8005958: 691b ldr r3, [r3, #16] - 800595a: 430b orrs r3, r1 - 800595c: 64d3 str r3, [r2, #76] ; 0x4c + 8005988: 4a23 ldr r2, [pc, #140] ; (8005a18 ) + 800598a: 4b23 ldr r3, [pc, #140] ; (8005a18 ) + 800598c: 6cdb ldr r3, [r3, #76] ; 0x4c + 800598e: 4929 ldr r1, [pc, #164] ; (8005a34 ) + 8005990: 4019 ands r1, r3 + 8005992: 687b ldr r3, [r7, #4] + 8005994: 691b ldr r3, [r3, #16] + 8005996: 430b orrs r3, r1 + 8005998: 64d3 str r3, [r2, #76] ; 0x4c } /*------------------------------ I2C1 Configuration ------------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2C1) == RCC_PERIPHCLK_I2C1) - 800595e: 687b ldr r3, [r7, #4] - 8005960: 681b ldr r3, [r3, #0] - 8005962: 2208 movs r2, #8 - 8005964: 4013 ands r3, r2 - 8005966: d008 beq.n 800597a + 800599a: 687b ldr r3, [r7, #4] + 800599c: 681b ldr r3, [r3, #0] + 800599e: 2208 movs r2, #8 + 80059a0: 4013 ands r3, r2 + 80059a2: d008 beq.n 80059b6 { /* Check the parameters */ assert_param(IS_RCC_I2C1CLKSOURCE(PeriphClkInit->I2c1ClockSelection)); /* Configure the I2C1 clock source */ __HAL_RCC_I2C1_CONFIG(PeriphClkInit->I2c1ClockSelection); - 8005968: 4a1c ldr r2, [pc, #112] ; (80059dc ) - 800596a: 4b1c ldr r3, [pc, #112] ; (80059dc ) - 800596c: 6cdb ldr r3, [r3, #76] ; 0x4c - 800596e: 4923 ldr r1, [pc, #140] ; (80059fc ) - 8005970: 4019 ands r1, r3 - 8005972: 687b ldr r3, [r7, #4] - 8005974: 695b ldr r3, [r3, #20] - 8005976: 430b orrs r3, r1 - 8005978: 64d3 str r3, [r2, #76] ; 0x4c + 80059a4: 4a1c ldr r2, [pc, #112] ; (8005a18 ) + 80059a6: 4b1c ldr r3, [pc, #112] ; (8005a18 ) + 80059a8: 6cdb ldr r3, [r3, #76] ; 0x4c + 80059aa: 4923 ldr r1, [pc, #140] ; (8005a38 ) + 80059ac: 4019 ands r1, r3 + 80059ae: 687b ldr r3, [r7, #4] + 80059b0: 695b ldr r3, [r3, #20] + 80059b2: 430b orrs r3, r1 + 80059b4: 64d3 str r3, [r2, #76] ; 0x4c } #if defined (RCC_CCIPR_I2C3SEL) /*------------------------------ I2C3 Configuration ------------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2C3) == RCC_PERIPHCLK_I2C3) - 800597a: 687b ldr r3, [r7, #4] - 800597c: 681a ldr r2, [r3, #0] - 800597e: 2380 movs r3, #128 ; 0x80 - 8005980: 005b lsls r3, r3, #1 - 8005982: 4013 ands r3, r2 - 8005984: d008 beq.n 8005998 + 80059b6: 687b ldr r3, [r7, #4] + 80059b8: 681a ldr r2, [r3, #0] + 80059ba: 2380 movs r3, #128 ; 0x80 + 80059bc: 005b lsls r3, r3, #1 + 80059be: 4013 ands r3, r2 + 80059c0: d008 beq.n 80059d4 { /* Check the parameters */ assert_param(IS_RCC_I2C3CLKSOURCE(PeriphClkInit->I2c3ClockSelection)); /* Configure the I2C3 clock source */ __HAL_RCC_I2C3_CONFIG(PeriphClkInit->I2c3ClockSelection); - 8005986: 4a15 ldr r2, [pc, #84] ; (80059dc ) - 8005988: 4b14 ldr r3, [pc, #80] ; (80059dc ) - 800598a: 6cdb ldr r3, [r3, #76] ; 0x4c - 800598c: 4915 ldr r1, [pc, #84] ; (80059e4 ) - 800598e: 4019 ands r1, r3 - 8005990: 687b ldr r3, [r7, #4] - 8005992: 699b ldr r3, [r3, #24] - 8005994: 430b orrs r3, r1 - 8005996: 64d3 str r3, [r2, #76] ; 0x4c + 80059c2: 4a15 ldr r2, [pc, #84] ; (8005a18 ) + 80059c4: 4b14 ldr r3, [pc, #80] ; (8005a18 ) + 80059c6: 6cdb ldr r3, [r3, #76] ; 0x4c + 80059c8: 4915 ldr r1, [pc, #84] ; (8005a20 ) + 80059ca: 4019 ands r1, r3 + 80059cc: 687b ldr r3, [r7, #4] + 80059ce: 699b ldr r3, [r3, #24] + 80059d0: 430b orrs r3, r1 + 80059d2: 64d3 str r3, [r2, #76] ; 0x4c } #endif /* RCC_CCIPR_I2C3SEL */ #if defined(USB) /*---------------------------- USB and RNG configuration --------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USB) == (RCC_PERIPHCLK_USB)) - 8005998: 687b ldr r3, [r7, #4] - 800599a: 681b ldr r3, [r3, #0] - 800599c: 2240 movs r2, #64 ; 0x40 - 800599e: 4013 ands r3, r2 - 80059a0: d008 beq.n 80059b4 + 80059d4: 687b ldr r3, [r7, #4] + 80059d6: 681b ldr r3, [r3, #0] + 80059d8: 2240 movs r2, #64 ; 0x40 + 80059da: 4013 ands r3, r2 + 80059dc: d008 beq.n 80059f0 { assert_param(IS_RCC_USBCLKSOURCE(PeriphClkInit->UsbClockSelection)); __HAL_RCC_USB_CONFIG(PeriphClkInit->UsbClockSelection); - 80059a2: 4a0e ldr r2, [pc, #56] ; (80059dc ) - 80059a4: 4b0d ldr r3, [pc, #52] ; (80059dc ) - 80059a6: 6cdb ldr r3, [r3, #76] ; 0x4c - 80059a8: 4915 ldr r1, [pc, #84] ; (8005a00 ) - 80059aa: 4019 ands r1, r3 - 80059ac: 687b ldr r3, [r7, #4] - 80059ae: 6a1b ldr r3, [r3, #32] - 80059b0: 430b orrs r3, r1 - 80059b2: 64d3 str r3, [r2, #76] ; 0x4c + 80059de: 4a0e ldr r2, [pc, #56] ; (8005a18 ) + 80059e0: 4b0d ldr r3, [pc, #52] ; (8005a18 ) + 80059e2: 6cdb ldr r3, [r3, #76] ; 0x4c + 80059e4: 4915 ldr r1, [pc, #84] ; (8005a3c ) + 80059e6: 4019 ands r1, r3 + 80059e8: 687b ldr r3, [r7, #4] + 80059ea: 6a1b ldr r3, [r3, #32] + 80059ec: 430b orrs r3, r1 + 80059ee: 64d3 str r3, [r2, #76] ; 0x4c } #endif /* USB */ /*---------------------------- LPTIM1 configuration ------------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_LPTIM1) == (RCC_PERIPHCLK_LPTIM1)) - 80059b4: 687b ldr r3, [r7, #4] - 80059b6: 681b ldr r3, [r3, #0] - 80059b8: 2280 movs r2, #128 ; 0x80 - 80059ba: 4013 ands r3, r2 - 80059bc: d008 beq.n 80059d0 + 80059f0: 687b ldr r3, [r7, #4] + 80059f2: 681b ldr r3, [r3, #0] + 80059f4: 2280 movs r2, #128 ; 0x80 + 80059f6: 4013 ands r3, r2 + 80059f8: d008 beq.n 8005a0c { assert_param(IS_RCC_LPTIMCLK(PeriphClkInit->LptimClockSelection)); __HAL_RCC_LPTIM1_CONFIG(PeriphClkInit->LptimClockSelection); - 80059be: 4a07 ldr r2, [pc, #28] ; (80059dc ) - 80059c0: 4b06 ldr r3, [pc, #24] ; (80059dc ) - 80059c2: 6cdb ldr r3, [r3, #76] ; 0x4c - 80059c4: 490f ldr r1, [pc, #60] ; (8005a04 ) - 80059c6: 4019 ands r1, r3 - 80059c8: 687b ldr r3, [r7, #4] - 80059ca: 69db ldr r3, [r3, #28] - 80059cc: 430b orrs r3, r1 - 80059ce: 64d3 str r3, [r2, #76] ; 0x4c + 80059fa: 4a07 ldr r2, [pc, #28] ; (8005a18 ) + 80059fc: 4b06 ldr r3, [pc, #24] ; (8005a18 ) + 80059fe: 6cdb ldr r3, [r3, #76] ; 0x4c + 8005a00: 490f ldr r1, [pc, #60] ; (8005a40 ) + 8005a02: 4019 ands r1, r3 + 8005a04: 687b ldr r3, [r7, #4] + 8005a06: 69db ldr r3, [r3, #28] + 8005a08: 430b orrs r3, r1 + 8005a0a: 64d3 str r3, [r2, #76] ; 0x4c } return HAL_OK; - 80059d0: 2300 movs r3, #0 + 8005a0c: 2300 movs r3, #0 } - 80059d2: 0018 movs r0, r3 - 80059d4: 46bd mov sp, r7 - 80059d6: b006 add sp, #24 - 80059d8: bd80 pop {r7, pc} - 80059da: 46c0 nop ; (mov r8, r8) - 80059dc: 40021000 .word 0x40021000 - 80059e0: 40007000 .word 0x40007000 - 80059e4: fffcffff .word 0xfffcffff - 80059e8: fff7ffff .word 0xfff7ffff - 80059ec: 00001388 .word 0x00001388 - 80059f0: ffcfffff .word 0xffcfffff - 80059f4: efffffff .word 0xefffffff - 80059f8: fffff3ff .word 0xfffff3ff - 80059fc: ffffcfff .word 0xffffcfff - 8005a00: fbffffff .word 0xfbffffff - 8005a04: fff3ffff .word 0xfff3ffff + 8005a0e: 0018 movs r0, r3 + 8005a10: 46bd mov sp, r7 + 8005a12: b006 add sp, #24 + 8005a14: bd80 pop {r7, pc} + 8005a16: 46c0 nop ; (mov r8, r8) + 8005a18: 40021000 .word 0x40021000 + 8005a1c: 40007000 .word 0x40007000 + 8005a20: fffcffff .word 0xfffcffff + 8005a24: fff7ffff .word 0xfff7ffff + 8005a28: 00001388 .word 0x00001388 + 8005a2c: ffcfffff .word 0xffcfffff + 8005a30: efffffff .word 0xefffffff + 8005a34: fffff3ff .word 0xfffff3ff + 8005a38: ffffcfff .word 0xffffcfff + 8005a3c: fbffffff .word 0xfbffffff + 8005a40: fff3ffff .word 0xfff3ffff -08005a08 : +08005a44 : * Ex: call @ref HAL_TIM_Base_DeInit() before HAL_TIM_Base_Init() * @param htim TIM Base handle * @retval HAL status */ HAL_StatusTypeDef HAL_TIM_Base_Init(TIM_HandleTypeDef *htim) { - 8005a08: b580 push {r7, lr} - 8005a0a: b082 sub sp, #8 - 8005a0c: af00 add r7, sp, #0 - 8005a0e: 6078 str r0, [r7, #4] + 8005a44: b580 push {r7, lr} + 8005a46: b082 sub sp, #8 + 8005a48: af00 add r7, sp, #0 + 8005a4a: 6078 str r0, [r7, #4] /* Check the TIM handle allocation */ if (htim == NULL) - 8005a10: 687b ldr r3, [r7, #4] - 8005a12: 2b00 cmp r3, #0 - 8005a14: d101 bne.n 8005a1a + 8005a4c: 687b ldr r3, [r7, #4] + 8005a4e: 2b00 cmp r3, #0 + 8005a50: d101 bne.n 8005a56 { return HAL_ERROR; - 8005a16: 2301 movs r3, #1 - 8005a18: e032 b.n 8005a80 + 8005a52: 2301 movs r3, #1 + 8005a54: e032 b.n 8005abc assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); assert_param(IS_TIM_PERIOD(htim->Init.Period)); assert_param(IS_TIM_PRESCALER(htim->Init.Prescaler)); assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload)); if (htim->State == HAL_TIM_STATE_RESET) - 8005a1a: 687b ldr r3, [r7, #4] - 8005a1c: 2239 movs r2, #57 ; 0x39 - 8005a1e: 5c9b ldrb r3, [r3, r2] - 8005a20: b2db uxtb r3, r3 - 8005a22: 2b00 cmp r3, #0 - 8005a24: d107 bne.n 8005a36 + 8005a56: 687b ldr r3, [r7, #4] + 8005a58: 2239 movs r2, #57 ; 0x39 + 8005a5a: 5c9b ldrb r3, [r3, r2] + 8005a5c: b2db uxtb r3, r3 + 8005a5e: 2b00 cmp r3, #0 + 8005a60: d107 bne.n 8005a72 { /* Allocate lock resource and initialize it */ htim->Lock = HAL_UNLOCKED; - 8005a26: 687b ldr r3, [r7, #4] - 8005a28: 2238 movs r2, #56 ; 0x38 - 8005a2a: 2100 movs r1, #0 - 8005a2c: 5499 strb r1, [r3, r2] + 8005a62: 687b ldr r3, [r7, #4] + 8005a64: 2238 movs r2, #56 ; 0x38 + 8005a66: 2100 movs r1, #0 + 8005a68: 5499 strb r1, [r3, r2] } /* Init the low level hardware : GPIO, CLOCK, NVIC */ htim->Base_MspInitCallback(htim); #else /* Init the low level hardware : GPIO, CLOCK, NVIC */ HAL_TIM_Base_MspInit(htim); - 8005a2e: 687b ldr r3, [r7, #4] - 8005a30: 0018 movs r0, r3 - 8005a32: f7fc fca9 bl 8002388 + 8005a6a: 687b ldr r3, [r7, #4] + 8005a6c: 0018 movs r0, r3 + 8005a6e: f7fc fc9f bl 80023b0 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } /* Set the TIM state */ htim->State = HAL_TIM_STATE_BUSY; - 8005a36: 687b ldr r3, [r7, #4] - 8005a38: 2239 movs r2, #57 ; 0x39 - 8005a3a: 2102 movs r1, #2 - 8005a3c: 5499 strb r1, [r3, r2] + 8005a72: 687b ldr r3, [r7, #4] + 8005a74: 2239 movs r2, #57 ; 0x39 + 8005a76: 2102 movs r1, #2 + 8005a78: 5499 strb r1, [r3, r2] /* Set the Time Base configuration */ TIM_Base_SetConfig(htim->Instance, &htim->Init); - 8005a3e: 687b ldr r3, [r7, #4] - 8005a40: 681a ldr r2, [r3, #0] - 8005a42: 687b ldr r3, [r7, #4] - 8005a44: 3304 adds r3, #4 - 8005a46: 0019 movs r1, r3 - 8005a48: 0010 movs r0, r2 - 8005a4a: f000 f977 bl 8005d3c + 8005a7a: 687b ldr r3, [r7, #4] + 8005a7c: 681a ldr r2, [r3, #0] + 8005a7e: 687b ldr r3, [r7, #4] + 8005a80: 3304 adds r3, #4 + 8005a82: 0019 movs r1, r3 + 8005a84: 0010 movs r0, r2 + 8005a86: f000 f977 bl 8005d78 /* Initialize the DMA burst operation state */ htim->DMABurstState = HAL_DMA_BURST_STATE_READY; - 8005a4e: 687b ldr r3, [r7, #4] - 8005a50: 223e movs r2, #62 ; 0x3e - 8005a52: 2101 movs r1, #1 - 8005a54: 5499 strb r1, [r3, r2] + 8005a8a: 687b ldr r3, [r7, #4] + 8005a8c: 223e movs r2, #62 ; 0x3e + 8005a8e: 2101 movs r1, #1 + 8005a90: 5499 strb r1, [r3, r2] /* Initialize the TIM channels state */ TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); - 8005a56: 687b ldr r3, [r7, #4] - 8005a58: 223a movs r2, #58 ; 0x3a - 8005a5a: 2101 movs r1, #1 - 8005a5c: 5499 strb r1, [r3, r2] - 8005a5e: 687b ldr r3, [r7, #4] - 8005a60: 223b movs r2, #59 ; 0x3b - 8005a62: 2101 movs r1, #1 - 8005a64: 5499 strb r1, [r3, r2] - 8005a66: 687b ldr r3, [r7, #4] - 8005a68: 223c movs r2, #60 ; 0x3c - 8005a6a: 2101 movs r1, #1 - 8005a6c: 5499 strb r1, [r3, r2] - 8005a6e: 687b ldr r3, [r7, #4] - 8005a70: 223d movs r2, #61 ; 0x3d - 8005a72: 2101 movs r1, #1 - 8005a74: 5499 strb r1, [r3, r2] + 8005a92: 687b ldr r3, [r7, #4] + 8005a94: 223a movs r2, #58 ; 0x3a + 8005a96: 2101 movs r1, #1 + 8005a98: 5499 strb r1, [r3, r2] + 8005a9a: 687b ldr r3, [r7, #4] + 8005a9c: 223b movs r2, #59 ; 0x3b + 8005a9e: 2101 movs r1, #1 + 8005aa0: 5499 strb r1, [r3, r2] + 8005aa2: 687b ldr r3, [r7, #4] + 8005aa4: 223c movs r2, #60 ; 0x3c + 8005aa6: 2101 movs r1, #1 + 8005aa8: 5499 strb r1, [r3, r2] + 8005aaa: 687b ldr r3, [r7, #4] + 8005aac: 223d movs r2, #61 ; 0x3d + 8005aae: 2101 movs r1, #1 + 8005ab0: 5499 strb r1, [r3, r2] /* Initialize the TIM state*/ htim->State = HAL_TIM_STATE_READY; - 8005a76: 687b ldr r3, [r7, #4] - 8005a78: 2239 movs r2, #57 ; 0x39 - 8005a7a: 2101 movs r1, #1 - 8005a7c: 5499 strb r1, [r3, r2] + 8005ab2: 687b ldr r3, [r7, #4] + 8005ab4: 2239 movs r2, #57 ; 0x39 + 8005ab6: 2101 movs r1, #1 + 8005ab8: 5499 strb r1, [r3, r2] return HAL_OK; - 8005a7e: 2300 movs r3, #0 + 8005aba: 2300 movs r3, #0 } - 8005a80: 0018 movs r0, r3 - 8005a82: 46bd mov sp, r7 - 8005a84: b002 add sp, #8 - 8005a86: bd80 pop {r7, pc} + 8005abc: 0018 movs r0, r3 + 8005abe: 46bd mov sp, r7 + 8005ac0: b002 add sp, #8 + 8005ac2: bd80 pop {r7, pc} -08005a88 : +08005ac4 : * @brief Starts the TIM Base generation in interrupt mode. * @param htim TIM Base handle * @retval HAL status */ HAL_StatusTypeDef HAL_TIM_Base_Start_IT(TIM_HandleTypeDef *htim) { - 8005a88: b580 push {r7, lr} - 8005a8a: b084 sub sp, #16 - 8005a8c: af00 add r7, sp, #0 - 8005a8e: 6078 str r0, [r7, #4] + 8005ac4: b580 push {r7, lr} + 8005ac6: b084 sub sp, #16 + 8005ac8: af00 add r7, sp, #0 + 8005aca: 6078 str r0, [r7, #4] /* Check the parameters */ assert_param(IS_TIM_INSTANCE(htim->Instance)); /* Check the TIM state */ if (htim->State != HAL_TIM_STATE_READY) - 8005a90: 687b ldr r3, [r7, #4] - 8005a92: 2239 movs r2, #57 ; 0x39 - 8005a94: 5c9b ldrb r3, [r3, r2] - 8005a96: b2db uxtb r3, r3 - 8005a98: 2b01 cmp r3, #1 - 8005a9a: d001 beq.n 8005aa0 + 8005acc: 687b ldr r3, [r7, #4] + 8005ace: 2239 movs r2, #57 ; 0x39 + 8005ad0: 5c9b ldrb r3, [r3, r2] + 8005ad2: b2db uxtb r3, r3 + 8005ad4: 2b01 cmp r3, #1 + 8005ad6: d001 beq.n 8005adc { return HAL_ERROR; - 8005a9c: 2301 movs r3, #1 - 8005a9e: e03b b.n 8005b18 + 8005ad8: 2301 movs r3, #1 + 8005ada: e03b b.n 8005b54 } /* Set the TIM state */ htim->State = HAL_TIM_STATE_BUSY; - 8005aa0: 687b ldr r3, [r7, #4] - 8005aa2: 2239 movs r2, #57 ; 0x39 - 8005aa4: 2102 movs r1, #2 - 8005aa6: 5499 strb r1, [r3, r2] + 8005adc: 687b ldr r3, [r7, #4] + 8005ade: 2239 movs r2, #57 ; 0x39 + 8005ae0: 2102 movs r1, #2 + 8005ae2: 5499 strb r1, [r3, r2] /* Enable the TIM Update interrupt */ __HAL_TIM_ENABLE_IT(htim, TIM_IT_UPDATE); - 8005aa8: 687b ldr r3, [r7, #4] - 8005aaa: 681b ldr r3, [r3, #0] - 8005aac: 687a ldr r2, [r7, #4] - 8005aae: 6812 ldr r2, [r2, #0] - 8005ab0: 68d2 ldr r2, [r2, #12] - 8005ab2: 2101 movs r1, #1 - 8005ab4: 430a orrs r2, r1 - 8005ab6: 60da str r2, [r3, #12] + 8005ae4: 687b ldr r3, [r7, #4] + 8005ae6: 681b ldr r3, [r3, #0] + 8005ae8: 687a ldr r2, [r7, #4] + 8005aea: 6812 ldr r2, [r2, #0] + 8005aec: 68d2 ldr r2, [r2, #12] + 8005aee: 2101 movs r1, #1 + 8005af0: 430a orrs r2, r1 + 8005af2: 60da str r2, [r3, #12] /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */ if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) - 8005ab8: 687b ldr r3, [r7, #4] - 8005aba: 681a ldr r2, [r3, #0] - 8005abc: 2380 movs r3, #128 ; 0x80 - 8005abe: 05db lsls r3, r3, #23 - 8005ac0: 429a cmp r2, r3 - 8005ac2: d00e beq.n 8005ae2 - 8005ac4: 687b ldr r3, [r7, #4] - 8005ac6: 681b ldr r3, [r3, #0] - 8005ac8: 4a15 ldr r2, [pc, #84] ; (8005b20 ) - 8005aca: 4293 cmp r3, r2 - 8005acc: d009 beq.n 8005ae2 - 8005ace: 687b ldr r3, [r7, #4] - 8005ad0: 681b ldr r3, [r3, #0] - 8005ad2: 4a14 ldr r2, [pc, #80] ; (8005b24 ) - 8005ad4: 4293 cmp r3, r2 - 8005ad6: d004 beq.n 8005ae2 - 8005ad8: 687b ldr r3, [r7, #4] - 8005ada: 681b ldr r3, [r3, #0] - 8005adc: 4a12 ldr r2, [pc, #72] ; (8005b28 ) - 8005ade: 4293 cmp r3, r2 - 8005ae0: d111 bne.n 8005b06 + 8005af4: 687b ldr r3, [r7, #4] + 8005af6: 681a ldr r2, [r3, #0] + 8005af8: 2380 movs r3, #128 ; 0x80 + 8005afa: 05db lsls r3, r3, #23 + 8005afc: 429a cmp r2, r3 + 8005afe: d00e beq.n 8005b1e + 8005b00: 687b ldr r3, [r7, #4] + 8005b02: 681b ldr r3, [r3, #0] + 8005b04: 4a15 ldr r2, [pc, #84] ; (8005b5c ) + 8005b06: 4293 cmp r3, r2 + 8005b08: d009 beq.n 8005b1e + 8005b0a: 687b ldr r3, [r7, #4] + 8005b0c: 681b ldr r3, [r3, #0] + 8005b0e: 4a14 ldr r2, [pc, #80] ; (8005b60 ) + 8005b10: 4293 cmp r3, r2 + 8005b12: d004 beq.n 8005b1e + 8005b14: 687b ldr r3, [r7, #4] + 8005b16: 681b ldr r3, [r3, #0] + 8005b18: 4a12 ldr r2, [pc, #72] ; (8005b64 ) + 8005b1a: 4293 cmp r3, r2 + 8005b1c: d111 bne.n 8005b42 { tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; - 8005ae2: 687b ldr r3, [r7, #4] - 8005ae4: 681b ldr r3, [r3, #0] - 8005ae6: 689b ldr r3, [r3, #8] - 8005ae8: 2207 movs r2, #7 - 8005aea: 4013 ands r3, r2 - 8005aec: 60fb str r3, [r7, #12] + 8005b1e: 687b ldr r3, [r7, #4] + 8005b20: 681b ldr r3, [r3, #0] + 8005b22: 689b ldr r3, [r3, #8] + 8005b24: 2207 movs r2, #7 + 8005b26: 4013 ands r3, r2 + 8005b28: 60fb str r3, [r7, #12] if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) - 8005aee: 68fb ldr r3, [r7, #12] - 8005af0: 2b06 cmp r3, #6 - 8005af2: d010 beq.n 8005b16 + 8005b2a: 68fb ldr r3, [r7, #12] + 8005b2c: 2b06 cmp r3, #6 + 8005b2e: d010 beq.n 8005b52 { __HAL_TIM_ENABLE(htim); - 8005af4: 687b ldr r3, [r7, #4] - 8005af6: 681b ldr r3, [r3, #0] - 8005af8: 687a ldr r2, [r7, #4] - 8005afa: 6812 ldr r2, [r2, #0] - 8005afc: 6812 ldr r2, [r2, #0] - 8005afe: 2101 movs r1, #1 - 8005b00: 430a orrs r2, r1 - 8005b02: 601a str r2, [r3, #0] + 8005b30: 687b ldr r3, [r7, #4] + 8005b32: 681b ldr r3, [r3, #0] + 8005b34: 687a ldr r2, [r7, #4] + 8005b36: 6812 ldr r2, [r2, #0] + 8005b38: 6812 ldr r2, [r2, #0] + 8005b3a: 2101 movs r1, #1 + 8005b3c: 430a orrs r2, r1 + 8005b3e: 601a str r2, [r3, #0] if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) - 8005b04: e007 b.n 8005b16 + 8005b40: e007 b.n 8005b52 } } else { __HAL_TIM_ENABLE(htim); - 8005b06: 687b ldr r3, [r7, #4] - 8005b08: 681b ldr r3, [r3, #0] - 8005b0a: 687a ldr r2, [r7, #4] - 8005b0c: 6812 ldr r2, [r2, #0] - 8005b0e: 6812 ldr r2, [r2, #0] - 8005b10: 2101 movs r1, #1 - 8005b12: 430a orrs r2, r1 - 8005b14: 601a str r2, [r3, #0] + 8005b42: 687b ldr r3, [r7, #4] + 8005b44: 681b ldr r3, [r3, #0] + 8005b46: 687a ldr r2, [r7, #4] + 8005b48: 6812 ldr r2, [r2, #0] + 8005b4a: 6812 ldr r2, [r2, #0] + 8005b4c: 2101 movs r1, #1 + 8005b4e: 430a orrs r2, r1 + 8005b50: 601a str r2, [r3, #0] } /* Return function status */ return HAL_OK; - 8005b16: 2300 movs r3, #0 + 8005b52: 2300 movs r3, #0 } - 8005b18: 0018 movs r0, r3 - 8005b1a: 46bd mov sp, r7 - 8005b1c: b004 add sp, #16 - 8005b1e: bd80 pop {r7, pc} - 8005b20: 40000400 .word 0x40000400 - 8005b24: 40010800 .word 0x40010800 - 8005b28: 40011400 .word 0x40011400 + 8005b54: 0018 movs r0, r3 + 8005b56: 46bd mov sp, r7 + 8005b58: b004 add sp, #16 + 8005b5a: bd80 pop {r7, pc} + 8005b5c: 40000400 .word 0x40000400 + 8005b60: 40010800 .word 0x40010800 + 8005b64: 40011400 .word 0x40011400 -08005b2c : +08005b68 : * @brief This function handles TIM interrupts requests. * @param htim TIM handle * @retval None */ void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim) { - 8005b2c: b580 push {r7, lr} - 8005b2e: b082 sub sp, #8 - 8005b30: af00 add r7, sp, #0 - 8005b32: 6078 str r0, [r7, #4] + 8005b68: b580 push {r7, lr} + 8005b6a: b082 sub sp, #8 + 8005b6c: af00 add r7, sp, #0 + 8005b6e: 6078 str r0, [r7, #4] /* Capture compare 1 event */ if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET) - 8005b34: 687b ldr r3, [r7, #4] - 8005b36: 681b ldr r3, [r3, #0] - 8005b38: 691b ldr r3, [r3, #16] - 8005b3a: 2202 movs r2, #2 - 8005b3c: 4013 ands r3, r2 - 8005b3e: 2b02 cmp r3, #2 - 8005b40: d124 bne.n 8005b8c + 8005b70: 687b ldr r3, [r7, #4] + 8005b72: 681b ldr r3, [r3, #0] + 8005b74: 691b ldr r3, [r3, #16] + 8005b76: 2202 movs r2, #2 + 8005b78: 4013 ands r3, r2 + 8005b7a: 2b02 cmp r3, #2 + 8005b7c: d124 bne.n 8005bc8 { if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC1) != RESET) - 8005b42: 687b ldr r3, [r7, #4] - 8005b44: 681b ldr r3, [r3, #0] - 8005b46: 68db ldr r3, [r3, #12] - 8005b48: 2202 movs r2, #2 - 8005b4a: 4013 ands r3, r2 - 8005b4c: 2b02 cmp r3, #2 - 8005b4e: d11d bne.n 8005b8c + 8005b7e: 687b ldr r3, [r7, #4] + 8005b80: 681b ldr r3, [r3, #0] + 8005b82: 68db ldr r3, [r3, #12] + 8005b84: 2202 movs r2, #2 + 8005b86: 4013 ands r3, r2 + 8005b88: 2b02 cmp r3, #2 + 8005b8a: d11d bne.n 8005bc8 { { __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC1); - 8005b50: 687b ldr r3, [r7, #4] - 8005b52: 681b ldr r3, [r3, #0] - 8005b54: 2203 movs r2, #3 - 8005b56: 4252 negs r2, r2 - 8005b58: 611a str r2, [r3, #16] + 8005b8c: 687b ldr r3, [r7, #4] + 8005b8e: 681b ldr r3, [r3, #0] + 8005b90: 2203 movs r2, #3 + 8005b92: 4252 negs r2, r2 + 8005b94: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1; - 8005b5a: 687b ldr r3, [r7, #4] - 8005b5c: 2201 movs r2, #1 - 8005b5e: 761a strb r2, [r3, #24] + 8005b96: 687b ldr r3, [r7, #4] + 8005b98: 2201 movs r2, #1 + 8005b9a: 761a strb r2, [r3, #24] /* Input capture event */ if ((htim->Instance->CCMR1 & TIM_CCMR1_CC1S) != 0x00U) - 8005b60: 687b ldr r3, [r7, #4] - 8005b62: 681b ldr r3, [r3, #0] - 8005b64: 699b ldr r3, [r3, #24] - 8005b66: 2203 movs r2, #3 - 8005b68: 4013 ands r3, r2 - 8005b6a: d004 beq.n 8005b76 + 8005b9c: 687b ldr r3, [r7, #4] + 8005b9e: 681b ldr r3, [r3, #0] + 8005ba0: 699b ldr r3, [r3, #24] + 8005ba2: 2203 movs r2, #3 + 8005ba4: 4013 ands r3, r2 + 8005ba6: d004 beq.n 8005bb2 { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->IC_CaptureCallback(htim); #else HAL_TIM_IC_CaptureCallback(htim); - 8005b6c: 687b ldr r3, [r7, #4] - 8005b6e: 0018 movs r0, r3 - 8005b70: f000 f8cc bl 8005d0c - 8005b74: e007 b.n 8005b86 + 8005ba8: 687b ldr r3, [r7, #4] + 8005baa: 0018 movs r0, r3 + 8005bac: f000 f8cc bl 8005d48 + 8005bb0: e007 b.n 8005bc2 { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->OC_DelayElapsedCallback(htim); htim->PWM_PulseFinishedCallback(htim); #else HAL_TIM_OC_DelayElapsedCallback(htim); - 8005b76: 687b ldr r3, [r7, #4] - 8005b78: 0018 movs r0, r3 - 8005b7a: f000 f8bf bl 8005cfc + 8005bb2: 687b ldr r3, [r7, #4] + 8005bb4: 0018 movs r0, r3 + 8005bb6: f000 f8bf bl 8005d38 HAL_TIM_PWM_PulseFinishedCallback(htim); - 8005b7e: 687b ldr r3, [r7, #4] - 8005b80: 0018 movs r0, r3 - 8005b82: f000 f8cb bl 8005d1c + 8005bba: 687b ldr r3, [r7, #4] + 8005bbc: 0018 movs r0, r3 + 8005bbe: f000 f8cb bl 8005d58 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; - 8005b86: 687b ldr r3, [r7, #4] - 8005b88: 2200 movs r2, #0 - 8005b8a: 761a strb r2, [r3, #24] + 8005bc2: 687b ldr r3, [r7, #4] + 8005bc4: 2200 movs r2, #0 + 8005bc6: 761a strb r2, [r3, #24] } } } /* Capture compare 2 event */ if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC2) != RESET) - 8005b8c: 687b ldr r3, [r7, #4] - 8005b8e: 681b ldr r3, [r3, #0] - 8005b90: 691b ldr r3, [r3, #16] - 8005b92: 2204 movs r2, #4 - 8005b94: 4013 ands r3, r2 - 8005b96: 2b04 cmp r3, #4 - 8005b98: d125 bne.n 8005be6 + 8005bc8: 687b ldr r3, [r7, #4] + 8005bca: 681b ldr r3, [r3, #0] + 8005bcc: 691b ldr r3, [r3, #16] + 8005bce: 2204 movs r2, #4 + 8005bd0: 4013 ands r3, r2 + 8005bd2: 2b04 cmp r3, #4 + 8005bd4: d125 bne.n 8005c22 { if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC2) != RESET) - 8005b9a: 687b ldr r3, [r7, #4] - 8005b9c: 681b ldr r3, [r3, #0] - 8005b9e: 68db ldr r3, [r3, #12] - 8005ba0: 2204 movs r2, #4 - 8005ba2: 4013 ands r3, r2 - 8005ba4: 2b04 cmp r3, #4 - 8005ba6: d11e bne.n 8005be6 + 8005bd6: 687b ldr r3, [r7, #4] + 8005bd8: 681b ldr r3, [r3, #0] + 8005bda: 68db ldr r3, [r3, #12] + 8005bdc: 2204 movs r2, #4 + 8005bde: 4013 ands r3, r2 + 8005be0: 2b04 cmp r3, #4 + 8005be2: d11e bne.n 8005c22 { __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC2); - 8005ba8: 687b ldr r3, [r7, #4] - 8005baa: 681b ldr r3, [r3, #0] - 8005bac: 2205 movs r2, #5 - 8005bae: 4252 negs r2, r2 - 8005bb0: 611a str r2, [r3, #16] + 8005be4: 687b ldr r3, [r7, #4] + 8005be6: 681b ldr r3, [r3, #0] + 8005be8: 2205 movs r2, #5 + 8005bea: 4252 negs r2, r2 + 8005bec: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2; - 8005bb2: 687b ldr r3, [r7, #4] - 8005bb4: 2202 movs r2, #2 - 8005bb6: 761a strb r2, [r3, #24] + 8005bee: 687b ldr r3, [r7, #4] + 8005bf0: 2202 movs r2, #2 + 8005bf2: 761a strb r2, [r3, #24] /* Input capture event */ if ((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U) - 8005bb8: 687b ldr r3, [r7, #4] - 8005bba: 681b ldr r3, [r3, #0] - 8005bbc: 699a ldr r2, [r3, #24] - 8005bbe: 23c0 movs r3, #192 ; 0xc0 - 8005bc0: 009b lsls r3, r3, #2 - 8005bc2: 4013 ands r3, r2 - 8005bc4: d004 beq.n 8005bd0 + 8005bf4: 687b ldr r3, [r7, #4] + 8005bf6: 681b ldr r3, [r3, #0] + 8005bf8: 699a ldr r2, [r3, #24] + 8005bfa: 23c0 movs r3, #192 ; 0xc0 + 8005bfc: 009b lsls r3, r3, #2 + 8005bfe: 4013 ands r3, r2 + 8005c00: d004 beq.n 8005c0c { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->IC_CaptureCallback(htim); #else HAL_TIM_IC_CaptureCallback(htim); - 8005bc6: 687b ldr r3, [r7, #4] - 8005bc8: 0018 movs r0, r3 - 8005bca: f000 f89f bl 8005d0c - 8005bce: e007 b.n 8005be0 + 8005c02: 687b ldr r3, [r7, #4] + 8005c04: 0018 movs r0, r3 + 8005c06: f000 f89f bl 8005d48 + 8005c0a: e007 b.n 8005c1c { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->OC_DelayElapsedCallback(htim); htim->PWM_PulseFinishedCallback(htim); #else HAL_TIM_OC_DelayElapsedCallback(htim); - 8005bd0: 687b ldr r3, [r7, #4] - 8005bd2: 0018 movs r0, r3 - 8005bd4: f000 f892 bl 8005cfc + 8005c0c: 687b ldr r3, [r7, #4] + 8005c0e: 0018 movs r0, r3 + 8005c10: f000 f892 bl 8005d38 HAL_TIM_PWM_PulseFinishedCallback(htim); - 8005bd8: 687b ldr r3, [r7, #4] - 8005bda: 0018 movs r0, r3 - 8005bdc: f000 f89e bl 8005d1c + 8005c14: 687b ldr r3, [r7, #4] + 8005c16: 0018 movs r0, r3 + 8005c18: f000 f89e bl 8005d58 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; - 8005be0: 687b ldr r3, [r7, #4] - 8005be2: 2200 movs r2, #0 - 8005be4: 761a strb r2, [r3, #24] + 8005c1c: 687b ldr r3, [r7, #4] + 8005c1e: 2200 movs r2, #0 + 8005c20: 761a strb r2, [r3, #24] } } /* Capture compare 3 event */ if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC3) != RESET) - 8005be6: 687b ldr r3, [r7, #4] - 8005be8: 681b ldr r3, [r3, #0] - 8005bea: 691b ldr r3, [r3, #16] - 8005bec: 2208 movs r2, #8 - 8005bee: 4013 ands r3, r2 - 8005bf0: 2b08 cmp r3, #8 - 8005bf2: d124 bne.n 8005c3e + 8005c22: 687b ldr r3, [r7, #4] + 8005c24: 681b ldr r3, [r3, #0] + 8005c26: 691b ldr r3, [r3, #16] + 8005c28: 2208 movs r2, #8 + 8005c2a: 4013 ands r3, r2 + 8005c2c: 2b08 cmp r3, #8 + 8005c2e: d124 bne.n 8005c7a { if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC3) != RESET) - 8005bf4: 687b ldr r3, [r7, #4] - 8005bf6: 681b ldr r3, [r3, #0] - 8005bf8: 68db ldr r3, [r3, #12] - 8005bfa: 2208 movs r2, #8 - 8005bfc: 4013 ands r3, r2 - 8005bfe: 2b08 cmp r3, #8 - 8005c00: d11d bne.n 8005c3e + 8005c30: 687b ldr r3, [r7, #4] + 8005c32: 681b ldr r3, [r3, #0] + 8005c34: 68db ldr r3, [r3, #12] + 8005c36: 2208 movs r2, #8 + 8005c38: 4013 ands r3, r2 + 8005c3a: 2b08 cmp r3, #8 + 8005c3c: d11d bne.n 8005c7a { __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC3); - 8005c02: 687b ldr r3, [r7, #4] - 8005c04: 681b ldr r3, [r3, #0] - 8005c06: 2209 movs r2, #9 - 8005c08: 4252 negs r2, r2 - 8005c0a: 611a str r2, [r3, #16] + 8005c3e: 687b ldr r3, [r7, #4] + 8005c40: 681b ldr r3, [r3, #0] + 8005c42: 2209 movs r2, #9 + 8005c44: 4252 negs r2, r2 + 8005c46: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3; - 8005c0c: 687b ldr r3, [r7, #4] - 8005c0e: 2204 movs r2, #4 - 8005c10: 761a strb r2, [r3, #24] + 8005c48: 687b ldr r3, [r7, #4] + 8005c4a: 2204 movs r2, #4 + 8005c4c: 761a strb r2, [r3, #24] /* Input capture event */ if ((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U) - 8005c12: 687b ldr r3, [r7, #4] - 8005c14: 681b ldr r3, [r3, #0] - 8005c16: 69db ldr r3, [r3, #28] - 8005c18: 2203 movs r2, #3 - 8005c1a: 4013 ands r3, r2 - 8005c1c: d004 beq.n 8005c28 + 8005c4e: 687b ldr r3, [r7, #4] + 8005c50: 681b ldr r3, [r3, #0] + 8005c52: 69db ldr r3, [r3, #28] + 8005c54: 2203 movs r2, #3 + 8005c56: 4013 ands r3, r2 + 8005c58: d004 beq.n 8005c64 { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->IC_CaptureCallback(htim); #else HAL_TIM_IC_CaptureCallback(htim); - 8005c1e: 687b ldr r3, [r7, #4] - 8005c20: 0018 movs r0, r3 - 8005c22: f000 f873 bl 8005d0c - 8005c26: e007 b.n 8005c38 + 8005c5a: 687b ldr r3, [r7, #4] + 8005c5c: 0018 movs r0, r3 + 8005c5e: f000 f873 bl 8005d48 + 8005c62: e007 b.n 8005c74 { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->OC_DelayElapsedCallback(htim); htim->PWM_PulseFinishedCallback(htim); #else HAL_TIM_OC_DelayElapsedCallback(htim); - 8005c28: 687b ldr r3, [r7, #4] - 8005c2a: 0018 movs r0, r3 - 8005c2c: f000 f866 bl 8005cfc + 8005c64: 687b ldr r3, [r7, #4] + 8005c66: 0018 movs r0, r3 + 8005c68: f000 f866 bl 8005d38 HAL_TIM_PWM_PulseFinishedCallback(htim); - 8005c30: 687b ldr r3, [r7, #4] - 8005c32: 0018 movs r0, r3 - 8005c34: f000 f872 bl 8005d1c + 8005c6c: 687b ldr r3, [r7, #4] + 8005c6e: 0018 movs r0, r3 + 8005c70: f000 f872 bl 8005d58 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; - 8005c38: 687b ldr r3, [r7, #4] - 8005c3a: 2200 movs r2, #0 - 8005c3c: 761a strb r2, [r3, #24] + 8005c74: 687b ldr r3, [r7, #4] + 8005c76: 2200 movs r2, #0 + 8005c78: 761a strb r2, [r3, #24] } } /* Capture compare 4 event */ if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC4) != RESET) - 8005c3e: 687b ldr r3, [r7, #4] - 8005c40: 681b ldr r3, [r3, #0] - 8005c42: 691b ldr r3, [r3, #16] - 8005c44: 2210 movs r2, #16 - 8005c46: 4013 ands r3, r2 - 8005c48: 2b10 cmp r3, #16 - 8005c4a: d125 bne.n 8005c98 + 8005c7a: 687b ldr r3, [r7, #4] + 8005c7c: 681b ldr r3, [r3, #0] + 8005c7e: 691b ldr r3, [r3, #16] + 8005c80: 2210 movs r2, #16 + 8005c82: 4013 ands r3, r2 + 8005c84: 2b10 cmp r3, #16 + 8005c86: d125 bne.n 8005cd4 { if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC4) != RESET) - 8005c4c: 687b ldr r3, [r7, #4] - 8005c4e: 681b ldr r3, [r3, #0] - 8005c50: 68db ldr r3, [r3, #12] - 8005c52: 2210 movs r2, #16 - 8005c54: 4013 ands r3, r2 - 8005c56: 2b10 cmp r3, #16 - 8005c58: d11e bne.n 8005c98 + 8005c88: 687b ldr r3, [r7, #4] + 8005c8a: 681b ldr r3, [r3, #0] + 8005c8c: 68db ldr r3, [r3, #12] + 8005c8e: 2210 movs r2, #16 + 8005c90: 4013 ands r3, r2 + 8005c92: 2b10 cmp r3, #16 + 8005c94: d11e bne.n 8005cd4 { __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC4); - 8005c5a: 687b ldr r3, [r7, #4] - 8005c5c: 681b ldr r3, [r3, #0] - 8005c5e: 2211 movs r2, #17 - 8005c60: 4252 negs r2, r2 - 8005c62: 611a str r2, [r3, #16] + 8005c96: 687b ldr r3, [r7, #4] + 8005c98: 681b ldr r3, [r3, #0] + 8005c9a: 2211 movs r2, #17 + 8005c9c: 4252 negs r2, r2 + 8005c9e: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4; - 8005c64: 687b ldr r3, [r7, #4] - 8005c66: 2208 movs r2, #8 - 8005c68: 761a strb r2, [r3, #24] + 8005ca0: 687b ldr r3, [r7, #4] + 8005ca2: 2208 movs r2, #8 + 8005ca4: 761a strb r2, [r3, #24] /* Input capture event */ if ((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U) - 8005c6a: 687b ldr r3, [r7, #4] - 8005c6c: 681b ldr r3, [r3, #0] - 8005c6e: 69da ldr r2, [r3, #28] - 8005c70: 23c0 movs r3, #192 ; 0xc0 - 8005c72: 009b lsls r3, r3, #2 - 8005c74: 4013 ands r3, r2 - 8005c76: d004 beq.n 8005c82 + 8005ca6: 687b ldr r3, [r7, #4] + 8005ca8: 681b ldr r3, [r3, #0] + 8005caa: 69da ldr r2, [r3, #28] + 8005cac: 23c0 movs r3, #192 ; 0xc0 + 8005cae: 009b lsls r3, r3, #2 + 8005cb0: 4013 ands r3, r2 + 8005cb2: d004 beq.n 8005cbe { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->IC_CaptureCallback(htim); #else HAL_TIM_IC_CaptureCallback(htim); - 8005c78: 687b ldr r3, [r7, #4] - 8005c7a: 0018 movs r0, r3 - 8005c7c: f000 f846 bl 8005d0c - 8005c80: e007 b.n 8005c92 + 8005cb4: 687b ldr r3, [r7, #4] + 8005cb6: 0018 movs r0, r3 + 8005cb8: f000 f846 bl 8005d48 + 8005cbc: e007 b.n 8005cce { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->OC_DelayElapsedCallback(htim); htim->PWM_PulseFinishedCallback(htim); #else HAL_TIM_OC_DelayElapsedCallback(htim); - 8005c82: 687b ldr r3, [r7, #4] - 8005c84: 0018 movs r0, r3 - 8005c86: f000 f839 bl 8005cfc + 8005cbe: 687b ldr r3, [r7, #4] + 8005cc0: 0018 movs r0, r3 + 8005cc2: f000 f839 bl 8005d38 HAL_TIM_PWM_PulseFinishedCallback(htim); - 8005c8a: 687b ldr r3, [r7, #4] - 8005c8c: 0018 movs r0, r3 - 8005c8e: f000 f845 bl 8005d1c + 8005cc6: 687b ldr r3, [r7, #4] + 8005cc8: 0018 movs r0, r3 + 8005cca: f000 f845 bl 8005d58 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; - 8005c92: 687b ldr r3, [r7, #4] - 8005c94: 2200 movs r2, #0 - 8005c96: 761a strb r2, [r3, #24] + 8005cce: 687b ldr r3, [r7, #4] + 8005cd0: 2200 movs r2, #0 + 8005cd2: 761a strb r2, [r3, #24] } } /* TIM Update event */ if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_UPDATE) != RESET) - 8005c98: 687b ldr r3, [r7, #4] - 8005c9a: 681b ldr r3, [r3, #0] - 8005c9c: 691b ldr r3, [r3, #16] - 8005c9e: 2201 movs r2, #1 - 8005ca0: 4013 ands r3, r2 - 8005ca2: 2b01 cmp r3, #1 - 8005ca4: d10f bne.n 8005cc6 + 8005cd4: 687b ldr r3, [r7, #4] + 8005cd6: 681b ldr r3, [r3, #0] + 8005cd8: 691b ldr r3, [r3, #16] + 8005cda: 2201 movs r2, #1 + 8005cdc: 4013 ands r3, r2 + 8005cde: 2b01 cmp r3, #1 + 8005ce0: d10f bne.n 8005d02 { if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_UPDATE) != RESET) - 8005ca6: 687b ldr r3, [r7, #4] - 8005ca8: 681b ldr r3, [r3, #0] - 8005caa: 68db ldr r3, [r3, #12] - 8005cac: 2201 movs r2, #1 - 8005cae: 4013 ands r3, r2 - 8005cb0: 2b01 cmp r3, #1 - 8005cb2: d108 bne.n 8005cc6 + 8005ce2: 687b ldr r3, [r7, #4] + 8005ce4: 681b ldr r3, [r3, #0] + 8005ce6: 68db ldr r3, [r3, #12] + 8005ce8: 2201 movs r2, #1 + 8005cea: 4013 ands r3, r2 + 8005cec: 2b01 cmp r3, #1 + 8005cee: d108 bne.n 8005d02 { __HAL_TIM_CLEAR_IT(htim, TIM_IT_UPDATE); - 8005cb4: 687b ldr r3, [r7, #4] - 8005cb6: 681b ldr r3, [r3, #0] - 8005cb8: 2202 movs r2, #2 - 8005cba: 4252 negs r2, r2 - 8005cbc: 611a str r2, [r3, #16] + 8005cf0: 687b ldr r3, [r7, #4] + 8005cf2: 681b ldr r3, [r3, #0] + 8005cf4: 2202 movs r2, #2 + 8005cf6: 4252 negs r2, r2 + 8005cf8: 611a str r2, [r3, #16] #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->PeriodElapsedCallback(htim); #else HAL_TIM_PeriodElapsedCallback(htim); - 8005cbe: 687b ldr r3, [r7, #4] - 8005cc0: 0018 movs r0, r3 - 8005cc2: f7fc fb81 bl 80023c8 + 8005cfa: 687b ldr r3, [r7, #4] + 8005cfc: 0018 movs r0, r3 + 8005cfe: f7fc fb77 bl 80023f0 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } } /* TIM Trigger detection event */ if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_TRIGGER) != RESET) - 8005cc6: 687b ldr r3, [r7, #4] - 8005cc8: 681b ldr r3, [r3, #0] - 8005cca: 691b ldr r3, [r3, #16] - 8005ccc: 2240 movs r2, #64 ; 0x40 - 8005cce: 4013 ands r3, r2 - 8005cd0: 2b40 cmp r3, #64 ; 0x40 - 8005cd2: d10f bne.n 8005cf4 + 8005d02: 687b ldr r3, [r7, #4] + 8005d04: 681b ldr r3, [r3, #0] + 8005d06: 691b ldr r3, [r3, #16] + 8005d08: 2240 movs r2, #64 ; 0x40 + 8005d0a: 4013 ands r3, r2 + 8005d0c: 2b40 cmp r3, #64 ; 0x40 + 8005d0e: d10f bne.n 8005d30 { if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_TRIGGER) != RESET) - 8005cd4: 687b ldr r3, [r7, #4] - 8005cd6: 681b ldr r3, [r3, #0] - 8005cd8: 68db ldr r3, [r3, #12] - 8005cda: 2240 movs r2, #64 ; 0x40 - 8005cdc: 4013 ands r3, r2 - 8005cde: 2b40 cmp r3, #64 ; 0x40 - 8005ce0: d108 bne.n 8005cf4 + 8005d10: 687b ldr r3, [r7, #4] + 8005d12: 681b ldr r3, [r3, #0] + 8005d14: 68db ldr r3, [r3, #12] + 8005d16: 2240 movs r2, #64 ; 0x40 + 8005d18: 4013 ands r3, r2 + 8005d1a: 2b40 cmp r3, #64 ; 0x40 + 8005d1c: d108 bne.n 8005d30 { __HAL_TIM_CLEAR_IT(htim, TIM_IT_TRIGGER); - 8005ce2: 687b ldr r3, [r7, #4] - 8005ce4: 681b ldr r3, [r3, #0] - 8005ce6: 2241 movs r2, #65 ; 0x41 - 8005ce8: 4252 negs r2, r2 - 8005cea: 611a str r2, [r3, #16] + 8005d1e: 687b ldr r3, [r7, #4] + 8005d20: 681b ldr r3, [r3, #0] + 8005d22: 2241 movs r2, #65 ; 0x41 + 8005d24: 4252 negs r2, r2 + 8005d26: 611a str r2, [r3, #16] #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->TriggerCallback(htim); #else HAL_TIM_TriggerCallback(htim); - 8005cec: 687b ldr r3, [r7, #4] - 8005cee: 0018 movs r0, r3 - 8005cf0: f000 f81c bl 8005d2c + 8005d28: 687b ldr r3, [r7, #4] + 8005d2a: 0018 movs r0, r3 + 8005d2c: f000 f81c bl 8005d68 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } } } - 8005cf4: 46c0 nop ; (mov r8, r8) - 8005cf6: 46bd mov sp, r7 - 8005cf8: b002 add sp, #8 - 8005cfa: bd80 pop {r7, pc} + 8005d30: 46c0 nop ; (mov r8, r8) + 8005d32: 46bd mov sp, r7 + 8005d34: b002 add sp, #8 + 8005d36: bd80 pop {r7, pc} -08005cfc : +08005d38 : * @brief Output Compare callback in non-blocking mode * @param htim TIM OC handle * @retval None */ __weak void HAL_TIM_OC_DelayElapsedCallback(TIM_HandleTypeDef *htim) { - 8005cfc: b580 push {r7, lr} - 8005cfe: b082 sub sp, #8 - 8005d00: af00 add r7, sp, #0 - 8005d02: 6078 str r0, [r7, #4] + 8005d38: b580 push {r7, lr} + 8005d3a: b082 sub sp, #8 + 8005d3c: af00 add r7, sp, #0 + 8005d3e: 6078 str r0, [r7, #4] UNUSED(htim); /* NOTE : This function should not be modified, when the callback is needed, the HAL_TIM_OC_DelayElapsedCallback could be implemented in the user file */ } - 8005d04: 46c0 nop ; (mov r8, r8) - 8005d06: 46bd mov sp, r7 - 8005d08: b002 add sp, #8 - 8005d0a: bd80 pop {r7, pc} + 8005d40: 46c0 nop ; (mov r8, r8) + 8005d42: 46bd mov sp, r7 + 8005d44: b002 add sp, #8 + 8005d46: bd80 pop {r7, pc} -08005d0c : +08005d48 : * @brief Input Capture callback in non-blocking mode * @param htim TIM IC handle * @retval None */ __weak void HAL_TIM_IC_CaptureCallback(TIM_HandleTypeDef *htim) { - 8005d0c: b580 push {r7, lr} - 8005d0e: b082 sub sp, #8 - 8005d10: af00 add r7, sp, #0 - 8005d12: 6078 str r0, [r7, #4] + 8005d48: b580 push {r7, lr} + 8005d4a: b082 sub sp, #8 + 8005d4c: af00 add r7, sp, #0 + 8005d4e: 6078 str r0, [r7, #4] UNUSED(htim); /* NOTE : This function should not be modified, when the callback is needed, the HAL_TIM_IC_CaptureCallback could be implemented in the user file */ } - 8005d14: 46c0 nop ; (mov r8, r8) - 8005d16: 46bd mov sp, r7 - 8005d18: b002 add sp, #8 - 8005d1a: bd80 pop {r7, pc} + 8005d50: 46c0 nop ; (mov r8, r8) + 8005d52: 46bd mov sp, r7 + 8005d54: b002 add sp, #8 + 8005d56: bd80 pop {r7, pc} -08005d1c : +08005d58 : * @brief PWM Pulse finished callback in non-blocking mode * @param htim TIM handle * @retval None */ __weak void HAL_TIM_PWM_PulseFinishedCallback(TIM_HandleTypeDef *htim) { - 8005d1c: b580 push {r7, lr} - 8005d1e: b082 sub sp, #8 - 8005d20: af00 add r7, sp, #0 - 8005d22: 6078 str r0, [r7, #4] + 8005d58: b580 push {r7, lr} + 8005d5a: b082 sub sp, #8 + 8005d5c: af00 add r7, sp, #0 + 8005d5e: 6078 str r0, [r7, #4] UNUSED(htim); /* NOTE : This function should not be modified, when the callback is needed, the HAL_TIM_PWM_PulseFinishedCallback could be implemented in the user file */ } - 8005d24: 46c0 nop ; (mov r8, r8) - 8005d26: 46bd mov sp, r7 - 8005d28: b002 add sp, #8 - 8005d2a: bd80 pop {r7, pc} + 8005d60: 46c0 nop ; (mov r8, r8) + 8005d62: 46bd mov sp, r7 + 8005d64: b002 add sp, #8 + 8005d66: bd80 pop {r7, pc} -08005d2c : +08005d68 : * @brief Hall Trigger detection callback in non-blocking mode * @param htim TIM handle * @retval None */ __weak void HAL_TIM_TriggerCallback(TIM_HandleTypeDef *htim) { - 8005d2c: b580 push {r7, lr} - 8005d2e: b082 sub sp, #8 - 8005d30: af00 add r7, sp, #0 - 8005d32: 6078 str r0, [r7, #4] + 8005d68: b580 push {r7, lr} + 8005d6a: b082 sub sp, #8 + 8005d6c: af00 add r7, sp, #0 + 8005d6e: 6078 str r0, [r7, #4] UNUSED(htim); /* NOTE : This function should not be modified, when the callback is needed, the HAL_TIM_TriggerCallback could be implemented in the user file */ } - 8005d34: 46c0 nop ; (mov r8, r8) - 8005d36: 46bd mov sp, r7 - 8005d38: b002 add sp, #8 - 8005d3a: bd80 pop {r7, pc} + 8005d70: 46c0 nop ; (mov r8, r8) + 8005d72: 46bd mov sp, r7 + 8005d74: b002 add sp, #8 + 8005d76: bd80 pop {r7, pc} -08005d3c : +08005d78 : * @param TIMx TIM peripheral * @param Structure TIM Base configuration structure * @retval None */ static void TIM_Base_SetConfig(TIM_TypeDef *TIMx, TIM_Base_InitTypeDef *Structure) { - 8005d3c: b580 push {r7, lr} - 8005d3e: b084 sub sp, #16 - 8005d40: af00 add r7, sp, #0 - 8005d42: 6078 str r0, [r7, #4] - 8005d44: 6039 str r1, [r7, #0] + 8005d78: b580 push {r7, lr} + 8005d7a: b084 sub sp, #16 + 8005d7c: af00 add r7, sp, #0 + 8005d7e: 6078 str r0, [r7, #4] + 8005d80: 6039 str r1, [r7, #0] uint32_t tmpcr1; tmpcr1 = TIMx->CR1; - 8005d46: 687b ldr r3, [r7, #4] - 8005d48: 681b ldr r3, [r3, #0] - 8005d4a: 60fb str r3, [r7, #12] + 8005d82: 687b ldr r3, [r7, #4] + 8005d84: 681b ldr r3, [r3, #0] + 8005d86: 60fb str r3, [r7, #12] /* Set TIM Time Base Unit parameters ---------------------------------------*/ if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx)) - 8005d4c: 687a ldr r2, [r7, #4] - 8005d4e: 2380 movs r3, #128 ; 0x80 - 8005d50: 05db lsls r3, r3, #23 - 8005d52: 429a cmp r2, r3 - 8005d54: d00b beq.n 8005d6e - 8005d56: 687b ldr r3, [r7, #4] - 8005d58: 4a23 ldr r2, [pc, #140] ; (8005de8 ) - 8005d5a: 4293 cmp r3, r2 - 8005d5c: d007 beq.n 8005d6e - 8005d5e: 687b ldr r3, [r7, #4] - 8005d60: 4a22 ldr r2, [pc, #136] ; (8005dec ) - 8005d62: 4293 cmp r3, r2 - 8005d64: d003 beq.n 8005d6e - 8005d66: 687b ldr r3, [r7, #4] - 8005d68: 4a21 ldr r2, [pc, #132] ; (8005df0 ) - 8005d6a: 4293 cmp r3, r2 - 8005d6c: d108 bne.n 8005d80 + 8005d88: 687a ldr r2, [r7, #4] + 8005d8a: 2380 movs r3, #128 ; 0x80 + 8005d8c: 05db lsls r3, r3, #23 + 8005d8e: 429a cmp r2, r3 + 8005d90: d00b beq.n 8005daa + 8005d92: 687b ldr r3, [r7, #4] + 8005d94: 4a23 ldr r2, [pc, #140] ; (8005e24 ) + 8005d96: 4293 cmp r3, r2 + 8005d98: d007 beq.n 8005daa + 8005d9a: 687b ldr r3, [r7, #4] + 8005d9c: 4a22 ldr r2, [pc, #136] ; (8005e28 ) + 8005d9e: 4293 cmp r3, r2 + 8005da0: d003 beq.n 8005daa + 8005da2: 687b ldr r3, [r7, #4] + 8005da4: 4a21 ldr r2, [pc, #132] ; (8005e2c ) + 8005da6: 4293 cmp r3, r2 + 8005da8: d108 bne.n 8005dbc { /* Select the Counter Mode */ tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS); - 8005d6e: 68fb ldr r3, [r7, #12] - 8005d70: 2270 movs r2, #112 ; 0x70 - 8005d72: 4393 bics r3, r2 - 8005d74: 60fb str r3, [r7, #12] + 8005daa: 68fb ldr r3, [r7, #12] + 8005dac: 2270 movs r2, #112 ; 0x70 + 8005dae: 4393 bics r3, r2 + 8005db0: 60fb str r3, [r7, #12] tmpcr1 |= Structure->CounterMode; - 8005d76: 683b ldr r3, [r7, #0] - 8005d78: 685b ldr r3, [r3, #4] - 8005d7a: 68fa ldr r2, [r7, #12] - 8005d7c: 4313 orrs r3, r2 - 8005d7e: 60fb str r3, [r7, #12] + 8005db2: 683b ldr r3, [r7, #0] + 8005db4: 685b ldr r3, [r3, #4] + 8005db6: 68fa ldr r2, [r7, #12] + 8005db8: 4313 orrs r3, r2 + 8005dba: 60fb str r3, [r7, #12] } if (IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx)) - 8005d80: 687a ldr r2, [r7, #4] - 8005d82: 2380 movs r3, #128 ; 0x80 - 8005d84: 05db lsls r3, r3, #23 - 8005d86: 429a cmp r2, r3 - 8005d88: d00b beq.n 8005da2 - 8005d8a: 687b ldr r3, [r7, #4] - 8005d8c: 4a16 ldr r2, [pc, #88] ; (8005de8 ) - 8005d8e: 4293 cmp r3, r2 - 8005d90: d007 beq.n 8005da2 - 8005d92: 687b ldr r3, [r7, #4] - 8005d94: 4a15 ldr r2, [pc, #84] ; (8005dec ) - 8005d96: 4293 cmp r3, r2 - 8005d98: d003 beq.n 8005da2 - 8005d9a: 687b ldr r3, [r7, #4] - 8005d9c: 4a14 ldr r2, [pc, #80] ; (8005df0 ) - 8005d9e: 4293 cmp r3, r2 - 8005da0: d108 bne.n 8005db4 + 8005dbc: 687a ldr r2, [r7, #4] + 8005dbe: 2380 movs r3, #128 ; 0x80 + 8005dc0: 05db lsls r3, r3, #23 + 8005dc2: 429a cmp r2, r3 + 8005dc4: d00b beq.n 8005dde + 8005dc6: 687b ldr r3, [r7, #4] + 8005dc8: 4a16 ldr r2, [pc, #88] ; (8005e24 ) + 8005dca: 4293 cmp r3, r2 + 8005dcc: d007 beq.n 8005dde + 8005dce: 687b ldr r3, [r7, #4] + 8005dd0: 4a15 ldr r2, [pc, #84] ; (8005e28 ) + 8005dd2: 4293 cmp r3, r2 + 8005dd4: d003 beq.n 8005dde + 8005dd6: 687b ldr r3, [r7, #4] + 8005dd8: 4a14 ldr r2, [pc, #80] ; (8005e2c ) + 8005dda: 4293 cmp r3, r2 + 8005ddc: d108 bne.n 8005df0 { /* Set the clock division */ tmpcr1 &= ~TIM_CR1_CKD; - 8005da2: 68fb ldr r3, [r7, #12] - 8005da4: 4a13 ldr r2, [pc, #76] ; (8005df4 ) - 8005da6: 4013 ands r3, r2 - 8005da8: 60fb str r3, [r7, #12] + 8005dde: 68fb ldr r3, [r7, #12] + 8005de0: 4a13 ldr r2, [pc, #76] ; (8005e30 ) + 8005de2: 4013 ands r3, r2 + 8005de4: 60fb str r3, [r7, #12] tmpcr1 |= (uint32_t)Structure->ClockDivision; - 8005daa: 683b ldr r3, [r7, #0] - 8005dac: 68db ldr r3, [r3, #12] - 8005dae: 68fa ldr r2, [r7, #12] - 8005db0: 4313 orrs r3, r2 - 8005db2: 60fb str r3, [r7, #12] + 8005de6: 683b ldr r3, [r7, #0] + 8005de8: 68db ldr r3, [r3, #12] + 8005dea: 68fa ldr r2, [r7, #12] + 8005dec: 4313 orrs r3, r2 + 8005dee: 60fb str r3, [r7, #12] } /* Set the auto-reload preload */ MODIFY_REG(tmpcr1, TIM_CR1_ARPE, Structure->AutoReloadPreload); - 8005db4: 68fb ldr r3, [r7, #12] - 8005db6: 2280 movs r2, #128 ; 0x80 - 8005db8: 4393 bics r3, r2 - 8005dba: 001a movs r2, r3 - 8005dbc: 683b ldr r3, [r7, #0] - 8005dbe: 691b ldr r3, [r3, #16] - 8005dc0: 4313 orrs r3, r2 - 8005dc2: 60fb str r3, [r7, #12] + 8005df0: 68fb ldr r3, [r7, #12] + 8005df2: 2280 movs r2, #128 ; 0x80 + 8005df4: 4393 bics r3, r2 + 8005df6: 001a movs r2, r3 + 8005df8: 683b ldr r3, [r7, #0] + 8005dfa: 691b ldr r3, [r3, #16] + 8005dfc: 4313 orrs r3, r2 + 8005dfe: 60fb str r3, [r7, #12] TIMx->CR1 = tmpcr1; - 8005dc4: 687b ldr r3, [r7, #4] - 8005dc6: 68fa ldr r2, [r7, #12] - 8005dc8: 601a str r2, [r3, #0] + 8005e00: 687b ldr r3, [r7, #4] + 8005e02: 68fa ldr r2, [r7, #12] + 8005e04: 601a str r2, [r3, #0] /* Set the Autoreload value */ TIMx->ARR = (uint32_t)Structure->Period ; - 8005dca: 683b ldr r3, [r7, #0] - 8005dcc: 689a ldr r2, [r3, #8] - 8005dce: 687b ldr r3, [r7, #4] - 8005dd0: 62da str r2, [r3, #44] ; 0x2c + 8005e06: 683b ldr r3, [r7, #0] + 8005e08: 689a ldr r2, [r3, #8] + 8005e0a: 687b ldr r3, [r7, #4] + 8005e0c: 62da str r2, [r3, #44] ; 0x2c /* Set the Prescaler value */ TIMx->PSC = Structure->Prescaler; - 8005dd2: 683b ldr r3, [r7, #0] - 8005dd4: 681a ldr r2, [r3, #0] - 8005dd6: 687b ldr r3, [r7, #4] - 8005dd8: 629a str r2, [r3, #40] ; 0x28 + 8005e0e: 683b ldr r3, [r7, #0] + 8005e10: 681a ldr r2, [r3, #0] + 8005e12: 687b ldr r3, [r7, #4] + 8005e14: 629a str r2, [r3, #40] ; 0x28 /* Generate an update event to reload the Prescaler and the repetition counter (only for advanced timer) value immediately */ TIMx->EGR = TIM_EGR_UG; - 8005dda: 687b ldr r3, [r7, #4] - 8005ddc: 2201 movs r2, #1 - 8005dde: 615a str r2, [r3, #20] + 8005e16: 687b ldr r3, [r7, #4] + 8005e18: 2201 movs r2, #1 + 8005e1a: 615a str r2, [r3, #20] } - 8005de0: 46c0 nop ; (mov r8, r8) - 8005de2: 46bd mov sp, r7 - 8005de4: b004 add sp, #16 - 8005de6: bd80 pop {r7, pc} - 8005de8: 40000400 .word 0x40000400 - 8005dec: 40010800 .word 0x40010800 - 8005df0: 40011400 .word 0x40011400 - 8005df4: fffffcff .word 0xfffffcff + 8005e1c: 46c0 nop ; (mov r8, r8) + 8005e1e: 46bd mov sp, r7 + 8005e20: b004 add sp, #16 + 8005e22: bd80 pop {r7, pc} + 8005e24: 40000400 .word 0x40000400 + 8005e28: 40010800 .word 0x40010800 + 8005e2c: 40011400 .word 0x40011400 + 8005e30: fffffcff .word 0xfffffcff -08005df8 : +08005e34 : * mode. * @retval HAL status */ HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim, TIM_MasterConfigTypeDef *sMasterConfig) { - 8005df8: b580 push {r7, lr} - 8005dfa: b084 sub sp, #16 - 8005dfc: af00 add r7, sp, #0 - 8005dfe: 6078 str r0, [r7, #4] - 8005e00: 6039 str r1, [r7, #0] + 8005e34: b580 push {r7, lr} + 8005e36: b084 sub sp, #16 + 8005e38: af00 add r7, sp, #0 + 8005e3a: 6078 str r0, [r7, #4] + 8005e3c: 6039 str r1, [r7, #0] assert_param(IS_TIM_MASTER_INSTANCE(htim->Instance)); assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger)); assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode)); /* Check input state */ __HAL_LOCK(htim); - 8005e02: 687b ldr r3, [r7, #4] - 8005e04: 2238 movs r2, #56 ; 0x38 - 8005e06: 5c9b ldrb r3, [r3, r2] - 8005e08: 2b01 cmp r3, #1 - 8005e0a: d101 bne.n 8005e10 - 8005e0c: 2302 movs r3, #2 - 8005e0e: e047 b.n 8005ea0 - 8005e10: 687b ldr r3, [r7, #4] - 8005e12: 2238 movs r2, #56 ; 0x38 - 8005e14: 2101 movs r1, #1 - 8005e16: 5499 strb r1, [r3, r2] + 8005e3e: 687b ldr r3, [r7, #4] + 8005e40: 2238 movs r2, #56 ; 0x38 + 8005e42: 5c9b ldrb r3, [r3, r2] + 8005e44: 2b01 cmp r3, #1 + 8005e46: d101 bne.n 8005e4c + 8005e48: 2302 movs r3, #2 + 8005e4a: e047 b.n 8005edc + 8005e4c: 687b ldr r3, [r7, #4] + 8005e4e: 2238 movs r2, #56 ; 0x38 + 8005e50: 2101 movs r1, #1 + 8005e52: 5499 strb r1, [r3, r2] /* Change the handler state */ htim->State = HAL_TIM_STATE_BUSY; - 8005e18: 687b ldr r3, [r7, #4] - 8005e1a: 2239 movs r2, #57 ; 0x39 - 8005e1c: 2102 movs r1, #2 - 8005e1e: 5499 strb r1, [r3, r2] + 8005e54: 687b ldr r3, [r7, #4] + 8005e56: 2239 movs r2, #57 ; 0x39 + 8005e58: 2102 movs r1, #2 + 8005e5a: 5499 strb r1, [r3, r2] /* Get the TIMx CR2 register value */ tmpcr2 = htim->Instance->CR2; - 8005e20: 687b ldr r3, [r7, #4] - 8005e22: 681b ldr r3, [r3, #0] - 8005e24: 685b ldr r3, [r3, #4] - 8005e26: 60fb str r3, [r7, #12] + 8005e5c: 687b ldr r3, [r7, #4] + 8005e5e: 681b ldr r3, [r3, #0] + 8005e60: 685b ldr r3, [r3, #4] + 8005e62: 60fb str r3, [r7, #12] /* Get the TIMx SMCR register value */ tmpsmcr = htim->Instance->SMCR; - 8005e28: 687b ldr r3, [r7, #4] - 8005e2a: 681b ldr r3, [r3, #0] - 8005e2c: 689b ldr r3, [r3, #8] - 8005e2e: 60bb str r3, [r7, #8] + 8005e64: 687b ldr r3, [r7, #4] + 8005e66: 681b ldr r3, [r3, #0] + 8005e68: 689b ldr r3, [r3, #8] + 8005e6a: 60bb str r3, [r7, #8] /* Reset the MMS Bits */ tmpcr2 &= ~TIM_CR2_MMS; - 8005e30: 68fb ldr r3, [r7, #12] - 8005e32: 2270 movs r2, #112 ; 0x70 - 8005e34: 4393 bics r3, r2 - 8005e36: 60fb str r3, [r7, #12] + 8005e6c: 68fb ldr r3, [r7, #12] + 8005e6e: 2270 movs r2, #112 ; 0x70 + 8005e70: 4393 bics r3, r2 + 8005e72: 60fb str r3, [r7, #12] /* Select the TRGO source */ tmpcr2 |= sMasterConfig->MasterOutputTrigger; - 8005e38: 683b ldr r3, [r7, #0] - 8005e3a: 681b ldr r3, [r3, #0] - 8005e3c: 68fa ldr r2, [r7, #12] - 8005e3e: 4313 orrs r3, r2 - 8005e40: 60fb str r3, [r7, #12] + 8005e74: 683b ldr r3, [r7, #0] + 8005e76: 681b ldr r3, [r3, #0] + 8005e78: 68fa ldr r2, [r7, #12] + 8005e7a: 4313 orrs r3, r2 + 8005e7c: 60fb str r3, [r7, #12] /* Update TIMx CR2 */ htim->Instance->CR2 = tmpcr2; - 8005e42: 687b ldr r3, [r7, #4] - 8005e44: 681b ldr r3, [r3, #0] - 8005e46: 68fa ldr r2, [r7, #12] - 8005e48: 605a str r2, [r3, #4] + 8005e7e: 687b ldr r3, [r7, #4] + 8005e80: 681b ldr r3, [r3, #0] + 8005e82: 68fa ldr r2, [r7, #12] + 8005e84: 605a str r2, [r3, #4] if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) - 8005e4a: 687b ldr r3, [r7, #4] - 8005e4c: 681a ldr r2, [r3, #0] - 8005e4e: 2380 movs r3, #128 ; 0x80 - 8005e50: 05db lsls r3, r3, #23 - 8005e52: 429a cmp r2, r3 - 8005e54: d00e beq.n 8005e74 - 8005e56: 687b ldr r3, [r7, #4] - 8005e58: 681b ldr r3, [r3, #0] - 8005e5a: 4a13 ldr r2, [pc, #76] ; (8005ea8 ) - 8005e5c: 4293 cmp r3, r2 - 8005e5e: d009 beq.n 8005e74 - 8005e60: 687b ldr r3, [r7, #4] - 8005e62: 681b ldr r3, [r3, #0] - 8005e64: 4a11 ldr r2, [pc, #68] ; (8005eac ) - 8005e66: 4293 cmp r3, r2 - 8005e68: d004 beq.n 8005e74 - 8005e6a: 687b ldr r3, [r7, #4] - 8005e6c: 681b ldr r3, [r3, #0] - 8005e6e: 4a10 ldr r2, [pc, #64] ; (8005eb0 ) - 8005e70: 4293 cmp r3, r2 - 8005e72: d10c bne.n 8005e8e + 8005e86: 687b ldr r3, [r7, #4] + 8005e88: 681a ldr r2, [r3, #0] + 8005e8a: 2380 movs r3, #128 ; 0x80 + 8005e8c: 05db lsls r3, r3, #23 + 8005e8e: 429a cmp r2, r3 + 8005e90: d00e beq.n 8005eb0 + 8005e92: 687b ldr r3, [r7, #4] + 8005e94: 681b ldr r3, [r3, #0] + 8005e96: 4a13 ldr r2, [pc, #76] ; (8005ee4 ) + 8005e98: 4293 cmp r3, r2 + 8005e9a: d009 beq.n 8005eb0 + 8005e9c: 687b ldr r3, [r7, #4] + 8005e9e: 681b ldr r3, [r3, #0] + 8005ea0: 4a11 ldr r2, [pc, #68] ; (8005ee8 ) + 8005ea2: 4293 cmp r3, r2 + 8005ea4: d004 beq.n 8005eb0 + 8005ea6: 687b ldr r3, [r7, #4] + 8005ea8: 681b ldr r3, [r3, #0] + 8005eaa: 4a10 ldr r2, [pc, #64] ; (8005eec ) + 8005eac: 4293 cmp r3, r2 + 8005eae: d10c bne.n 8005eca { /* Reset the MSM Bit */ tmpsmcr &= ~TIM_SMCR_MSM; - 8005e74: 68bb ldr r3, [r7, #8] - 8005e76: 2280 movs r2, #128 ; 0x80 - 8005e78: 4393 bics r3, r2 - 8005e7a: 60bb str r3, [r7, #8] + 8005eb0: 68bb ldr r3, [r7, #8] + 8005eb2: 2280 movs r2, #128 ; 0x80 + 8005eb4: 4393 bics r3, r2 + 8005eb6: 60bb str r3, [r7, #8] /* Set master mode */ tmpsmcr |= sMasterConfig->MasterSlaveMode; - 8005e7c: 683b ldr r3, [r7, #0] - 8005e7e: 685b ldr r3, [r3, #4] - 8005e80: 68ba ldr r2, [r7, #8] - 8005e82: 4313 orrs r3, r2 - 8005e84: 60bb str r3, [r7, #8] + 8005eb8: 683b ldr r3, [r7, #0] + 8005eba: 685b ldr r3, [r3, #4] + 8005ebc: 68ba ldr r2, [r7, #8] + 8005ebe: 4313 orrs r3, r2 + 8005ec0: 60bb str r3, [r7, #8] /* Update TIMx SMCR */ htim->Instance->SMCR = tmpsmcr; - 8005e86: 687b ldr r3, [r7, #4] - 8005e88: 681b ldr r3, [r3, #0] - 8005e8a: 68ba ldr r2, [r7, #8] - 8005e8c: 609a str r2, [r3, #8] + 8005ec2: 687b ldr r3, [r7, #4] + 8005ec4: 681b ldr r3, [r3, #0] + 8005ec6: 68ba ldr r2, [r7, #8] + 8005ec8: 609a str r2, [r3, #8] } /* Change the htim state */ htim->State = HAL_TIM_STATE_READY; - 8005e8e: 687b ldr r3, [r7, #4] - 8005e90: 2239 movs r2, #57 ; 0x39 - 8005e92: 2101 movs r1, #1 - 8005e94: 5499 strb r1, [r3, r2] + 8005eca: 687b ldr r3, [r7, #4] + 8005ecc: 2239 movs r2, #57 ; 0x39 + 8005ece: 2101 movs r1, #1 + 8005ed0: 5499 strb r1, [r3, r2] __HAL_UNLOCK(htim); - 8005e96: 687b ldr r3, [r7, #4] - 8005e98: 2238 movs r2, #56 ; 0x38 - 8005e9a: 2100 movs r1, #0 - 8005e9c: 5499 strb r1, [r3, r2] + 8005ed2: 687b ldr r3, [r7, #4] + 8005ed4: 2238 movs r2, #56 ; 0x38 + 8005ed6: 2100 movs r1, #0 + 8005ed8: 5499 strb r1, [r3, r2] return HAL_OK; - 8005e9e: 2300 movs r3, #0 + 8005eda: 2300 movs r3, #0 } - 8005ea0: 0018 movs r0, r3 - 8005ea2: 46bd mov sp, r7 - 8005ea4: b004 add sp, #16 - 8005ea6: bd80 pop {r7, pc} - 8005ea8: 40000400 .word 0x40000400 - 8005eac: 40010800 .word 0x40010800 - 8005eb0: 40011400 .word 0x40011400 + 8005edc: 0018 movs r0, r3 + 8005ede: 46bd mov sp, r7 + 8005ee0: b004 add sp, #16 + 8005ee2: bd80 pop {r7, pc} + 8005ee4: 40000400 .word 0x40000400 + 8005ee8: 40010800 .word 0x40010800 + 8005eec: 40011400 .word 0x40011400 -08005eb4 : +08005ef0 : * parameters in the UART_InitTypeDef and initialize the associated handle. * @param huart UART handle. * @retval HAL status */ HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart) { - 8005eb4: b580 push {r7, lr} - 8005eb6: b082 sub sp, #8 - 8005eb8: af00 add r7, sp, #0 - 8005eba: 6078 str r0, [r7, #4] + 8005ef0: b580 push {r7, lr} + 8005ef2: b082 sub sp, #8 + 8005ef4: af00 add r7, sp, #0 + 8005ef6: 6078 str r0, [r7, #4] /* Check the UART handle allocation */ if (huart == NULL) - 8005ebc: 687b ldr r3, [r7, #4] - 8005ebe: 2b00 cmp r3, #0 - 8005ec0: d101 bne.n 8005ec6 + 8005ef8: 687b ldr r3, [r7, #4] + 8005efa: 2b00 cmp r3, #0 + 8005efc: d101 bne.n 8005f02 { return HAL_ERROR; - 8005ec2: 2301 movs r3, #1 - 8005ec4: e044 b.n 8005f50 + 8005efe: 2301 movs r3, #1 + 8005f00: e044 b.n 8005f8c { /* Check the parameters */ assert_param((IS_UART_INSTANCE(huart->Instance)) || (IS_LPUART_INSTANCE(huart->Instance))); } if (huart->gState == HAL_UART_STATE_RESET) - 8005ec6: 687b ldr r3, [r7, #4] - 8005ec8: 6f9b ldr r3, [r3, #120] ; 0x78 - 8005eca: 2b00 cmp r3, #0 - 8005ecc: d107 bne.n 8005ede + 8005f02: 687b ldr r3, [r7, #4] + 8005f04: 6f9b ldr r3, [r3, #120] ; 0x78 + 8005f06: 2b00 cmp r3, #0 + 8005f08: d107 bne.n 8005f1a { /* Allocate lock resource and initialize it */ huart->Lock = HAL_UNLOCKED; - 8005ece: 687b ldr r3, [r7, #4] - 8005ed0: 2274 movs r2, #116 ; 0x74 - 8005ed2: 2100 movs r1, #0 - 8005ed4: 5499 strb r1, [r3, r2] + 8005f0a: 687b ldr r3, [r7, #4] + 8005f0c: 2274 movs r2, #116 ; 0x74 + 8005f0e: 2100 movs r1, #0 + 8005f10: 5499 strb r1, [r3, r2] /* Init the low level hardware */ huart->MspInitCallback(huart); #else /* Init the low level hardware : GPIO, CLOCK */ HAL_UART_MspInit(huart); - 8005ed6: 687b ldr r3, [r7, #4] - 8005ed8: 0018 movs r0, r3 - 8005eda: f7fc fb3d bl 8002558 + 8005f12: 687b ldr r3, [r7, #4] + 8005f14: 0018 movs r0, r3 + 8005f16: f7fc fb33 bl 8002580 #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */ } huart->gState = HAL_UART_STATE_BUSY; - 8005ede: 687b ldr r3, [r7, #4] - 8005ee0: 2224 movs r2, #36 ; 0x24 - 8005ee2: 679a str r2, [r3, #120] ; 0x78 + 8005f1a: 687b ldr r3, [r7, #4] + 8005f1c: 2224 movs r2, #36 ; 0x24 + 8005f1e: 679a str r2, [r3, #120] ; 0x78 __HAL_UART_DISABLE(huart); - 8005ee4: 687b ldr r3, [r7, #4] - 8005ee6: 681b ldr r3, [r3, #0] - 8005ee8: 687a ldr r2, [r7, #4] - 8005eea: 6812 ldr r2, [r2, #0] - 8005eec: 6812 ldr r2, [r2, #0] - 8005eee: 2101 movs r1, #1 - 8005ef0: 438a bics r2, r1 - 8005ef2: 601a str r2, [r3, #0] + 8005f20: 687b ldr r3, [r7, #4] + 8005f22: 681b ldr r3, [r3, #0] + 8005f24: 687a ldr r2, [r7, #4] + 8005f26: 6812 ldr r2, [r2, #0] + 8005f28: 6812 ldr r2, [r2, #0] + 8005f2a: 2101 movs r1, #1 + 8005f2c: 438a bics r2, r1 + 8005f2e: 601a str r2, [r3, #0] /* Set the UART Communication parameters */ if (UART_SetConfig(huart) == HAL_ERROR) - 8005ef4: 687b ldr r3, [r7, #4] - 8005ef6: 0018 movs r0, r3 - 8005ef8: f000 faf8 bl 80064ec - 8005efc: 0003 movs r3, r0 - 8005efe: 2b01 cmp r3, #1 - 8005f00: d101 bne.n 8005f06 + 8005f30: 687b ldr r3, [r7, #4] + 8005f32: 0018 movs r0, r3 + 8005f34: f000 faf8 bl 8006528 + 8005f38: 0003 movs r3, r0 + 8005f3a: 2b01 cmp r3, #1 + 8005f3c: d101 bne.n 8005f42 { return HAL_ERROR; - 8005f02: 2301 movs r3, #1 - 8005f04: e024 b.n 8005f50 + 8005f3e: 2301 movs r3, #1 + 8005f40: e024 b.n 8005f8c } if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT) - 8005f06: 687b ldr r3, [r7, #4] - 8005f08: 6a5b ldr r3, [r3, #36] ; 0x24 - 8005f0a: 2b00 cmp r3, #0 - 8005f0c: d003 beq.n 8005f16 + 8005f42: 687b ldr r3, [r7, #4] + 8005f44: 6a5b ldr r3, [r3, #36] ; 0x24 + 8005f46: 2b00 cmp r3, #0 + 8005f48: d003 beq.n 8005f52 { UART_AdvFeatureConfig(huart); - 8005f0e: 687b ldr r3, [r7, #4] - 8005f10: 0018 movs r0, r3 - 8005f12: f000 fdad bl 8006a70 + 8005f4a: 687b ldr r3, [r7, #4] + 8005f4c: 0018 movs r0, r3 + 8005f4e: f000 fdad bl 8006aac } /* In asynchronous mode, the following bits must be kept cleared: - LINEN and CLKEN bits in the USART_CR2 register, - SCEN, HDSEL and IREN bits in the USART_CR3 register.*/ CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN)); - 8005f16: 687b ldr r3, [r7, #4] - 8005f18: 681b ldr r3, [r3, #0] - 8005f1a: 687a ldr r2, [r7, #4] - 8005f1c: 6812 ldr r2, [r2, #0] - 8005f1e: 6852 ldr r2, [r2, #4] - 8005f20: 490d ldr r1, [pc, #52] ; (8005f58 ) - 8005f22: 400a ands r2, r1 - 8005f24: 605a str r2, [r3, #4] + 8005f52: 687b ldr r3, [r7, #4] + 8005f54: 681b ldr r3, [r3, #0] + 8005f56: 687a ldr r2, [r7, #4] + 8005f58: 6812 ldr r2, [r2, #0] + 8005f5a: 6852 ldr r2, [r2, #4] + 8005f5c: 490d ldr r1, [pc, #52] ; (8005f94 ) + 8005f5e: 400a ands r2, r1 + 8005f60: 605a str r2, [r3, #4] CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN)); - 8005f26: 687b ldr r3, [r7, #4] - 8005f28: 681b ldr r3, [r3, #0] - 8005f2a: 687a ldr r2, [r7, #4] - 8005f2c: 6812 ldr r2, [r2, #0] - 8005f2e: 6892 ldr r2, [r2, #8] - 8005f30: 212a movs r1, #42 ; 0x2a - 8005f32: 438a bics r2, r1 - 8005f34: 609a str r2, [r3, #8] + 8005f62: 687b ldr r3, [r7, #4] + 8005f64: 681b ldr r3, [r3, #0] + 8005f66: 687a ldr r2, [r7, #4] + 8005f68: 6812 ldr r2, [r2, #0] + 8005f6a: 6892 ldr r2, [r2, #8] + 8005f6c: 212a movs r1, #42 ; 0x2a + 8005f6e: 438a bics r2, r1 + 8005f70: 609a str r2, [r3, #8] __HAL_UART_ENABLE(huart); - 8005f36: 687b ldr r3, [r7, #4] - 8005f38: 681b ldr r3, [r3, #0] - 8005f3a: 687a ldr r2, [r7, #4] - 8005f3c: 6812 ldr r2, [r2, #0] - 8005f3e: 6812 ldr r2, [r2, #0] - 8005f40: 2101 movs r1, #1 - 8005f42: 430a orrs r2, r1 - 8005f44: 601a str r2, [r3, #0] + 8005f72: 687b ldr r3, [r7, #4] + 8005f74: 681b ldr r3, [r3, #0] + 8005f76: 687a ldr r2, [r7, #4] + 8005f78: 6812 ldr r2, [r2, #0] + 8005f7a: 6812 ldr r2, [r2, #0] + 8005f7c: 2101 movs r1, #1 + 8005f7e: 430a orrs r2, r1 + 8005f80: 601a str r2, [r3, #0] /* TEACK and/or REACK to check before moving huart->gState and huart->RxState to Ready */ return (UART_CheckIdleState(huart)); - 8005f46: 687b ldr r3, [r7, #4] - 8005f48: 0018 movs r0, r3 - 8005f4a: f000 fe3d bl 8006bc8 - 8005f4e: 0003 movs r3, r0 + 8005f82: 687b ldr r3, [r7, #4] + 8005f84: 0018 movs r0, r3 + 8005f86: f000 fe3d bl 8006c04 + 8005f8a: 0003 movs r3, r0 } - 8005f50: 0018 movs r0, r3 - 8005f52: 46bd mov sp, r7 - 8005f54: b002 add sp, #8 - 8005f56: bd80 pop {r7, pc} - 8005f58: ffffb7ff .word 0xffffb7ff + 8005f8c: 0018 movs r0, r3 + 8005f8e: 46bd mov sp, r7 + 8005f90: b002 add sp, #8 + 8005f92: bd80 pop {r7, pc} + 8005f94: ffffb7ff .word 0xffffb7ff -08005f5c : +08005f98 : * @brief DeInitialize the UART peripheral. * @param huart UART handle. * @retval HAL status */ HAL_StatusTypeDef HAL_UART_DeInit(UART_HandleTypeDef *huart) { - 8005f5c: b580 push {r7, lr} - 8005f5e: b082 sub sp, #8 - 8005f60: af00 add r7, sp, #0 - 8005f62: 6078 str r0, [r7, #4] + 8005f98: b580 push {r7, lr} + 8005f9a: b082 sub sp, #8 + 8005f9c: af00 add r7, sp, #0 + 8005f9e: 6078 str r0, [r7, #4] /* Check the UART handle allocation */ if (huart == NULL) - 8005f64: 687b ldr r3, [r7, #4] - 8005f66: 2b00 cmp r3, #0 - 8005f68: d101 bne.n 8005f6e + 8005fa0: 687b ldr r3, [r7, #4] + 8005fa2: 2b00 cmp r3, #0 + 8005fa4: d101 bne.n 8005faa { return HAL_ERROR; - 8005f6a: 2301 movs r3, #1 - 8005f6c: e02c b.n 8005fc8 + 8005fa6: 2301 movs r3, #1 + 8005fa8: e02c b.n 8006004 } /* Check the parameters */ assert_param((IS_UART_INSTANCE(huart->Instance)) || (IS_LPUART_INSTANCE(huart->Instance))); huart->gState = HAL_UART_STATE_BUSY; - 8005f6e: 687b ldr r3, [r7, #4] - 8005f70: 2224 movs r2, #36 ; 0x24 - 8005f72: 679a str r2, [r3, #120] ; 0x78 + 8005faa: 687b ldr r3, [r7, #4] + 8005fac: 2224 movs r2, #36 ; 0x24 + 8005fae: 679a str r2, [r3, #120] ; 0x78 __HAL_UART_DISABLE(huart); - 8005f74: 687b ldr r3, [r7, #4] - 8005f76: 681b ldr r3, [r3, #0] - 8005f78: 687a ldr r2, [r7, #4] - 8005f7a: 6812 ldr r2, [r2, #0] - 8005f7c: 6812 ldr r2, [r2, #0] - 8005f7e: 2101 movs r1, #1 - 8005f80: 438a bics r2, r1 - 8005f82: 601a str r2, [r3, #0] + 8005fb0: 687b ldr r3, [r7, #4] + 8005fb2: 681b ldr r3, [r3, #0] + 8005fb4: 687a ldr r2, [r7, #4] + 8005fb6: 6812 ldr r2, [r2, #0] + 8005fb8: 6812 ldr r2, [r2, #0] + 8005fba: 2101 movs r1, #1 + 8005fbc: 438a bics r2, r1 + 8005fbe: 601a str r2, [r3, #0] huart->Instance->CR1 = 0x0U; - 8005f84: 687b ldr r3, [r7, #4] - 8005f86: 681b ldr r3, [r3, #0] - 8005f88: 2200 movs r2, #0 - 8005f8a: 601a str r2, [r3, #0] + 8005fc0: 687b ldr r3, [r7, #4] + 8005fc2: 681b ldr r3, [r3, #0] + 8005fc4: 2200 movs r2, #0 + 8005fc6: 601a str r2, [r3, #0] huart->Instance->CR2 = 0x0U; - 8005f8c: 687b ldr r3, [r7, #4] - 8005f8e: 681b ldr r3, [r3, #0] - 8005f90: 2200 movs r2, #0 - 8005f92: 605a str r2, [r3, #4] + 8005fc8: 687b ldr r3, [r7, #4] + 8005fca: 681b ldr r3, [r3, #0] + 8005fcc: 2200 movs r2, #0 + 8005fce: 605a str r2, [r3, #4] huart->Instance->CR3 = 0x0U; - 8005f94: 687b ldr r3, [r7, #4] - 8005f96: 681b ldr r3, [r3, #0] - 8005f98: 2200 movs r2, #0 - 8005f9a: 609a str r2, [r3, #8] + 8005fd0: 687b ldr r3, [r7, #4] + 8005fd2: 681b ldr r3, [r3, #0] + 8005fd4: 2200 movs r2, #0 + 8005fd6: 609a str r2, [r3, #8] } /* DeInit the low level hardware */ huart->MspDeInitCallback(huart); #else /* DeInit the low level hardware */ HAL_UART_MspDeInit(huart); - 8005f9c: 687b ldr r3, [r7, #4] - 8005f9e: 0018 movs r0, r3 - 8005fa0: f7fc fb2c bl 80025fc + 8005fd8: 687b ldr r3, [r7, #4] + 8005fda: 0018 movs r0, r3 + 8005fdc: f7fc fb22 bl 8002624 #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */ huart->ErrorCode = HAL_UART_ERROR_NONE; - 8005fa4: 687b ldr r3, [r7, #4] - 8005fa6: 2280 movs r2, #128 ; 0x80 - 8005fa8: 2100 movs r1, #0 - 8005faa: 5099 str r1, [r3, r2] + 8005fe0: 687b ldr r3, [r7, #4] + 8005fe2: 2280 movs r2, #128 ; 0x80 + 8005fe4: 2100 movs r1, #0 + 8005fe6: 5099 str r1, [r3, r2] huart->gState = HAL_UART_STATE_RESET; - 8005fac: 687b ldr r3, [r7, #4] - 8005fae: 2200 movs r2, #0 - 8005fb0: 679a str r2, [r3, #120] ; 0x78 + 8005fe8: 687b ldr r3, [r7, #4] + 8005fea: 2200 movs r2, #0 + 8005fec: 679a str r2, [r3, #120] ; 0x78 huart->RxState = HAL_UART_STATE_RESET; - 8005fb2: 687b ldr r3, [r7, #4] - 8005fb4: 2200 movs r2, #0 - 8005fb6: 67da str r2, [r3, #124] ; 0x7c + 8005fee: 687b ldr r3, [r7, #4] + 8005ff0: 2200 movs r2, #0 + 8005ff2: 67da str r2, [r3, #124] ; 0x7c huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; - 8005fb8: 687b ldr r3, [r7, #4] - 8005fba: 2200 movs r2, #0 - 8005fbc: 661a str r2, [r3, #96] ; 0x60 + 8005ff4: 687b ldr r3, [r7, #4] + 8005ff6: 2200 movs r2, #0 + 8005ff8: 661a str r2, [r3, #96] ; 0x60 __HAL_UNLOCK(huart); - 8005fbe: 687b ldr r3, [r7, #4] - 8005fc0: 2274 movs r2, #116 ; 0x74 - 8005fc2: 2100 movs r1, #0 - 8005fc4: 5499 strb r1, [r3, r2] + 8005ffa: 687b ldr r3, [r7, #4] + 8005ffc: 2274 movs r2, #116 ; 0x74 + 8005ffe: 2100 movs r1, #0 + 8006000: 5499 strb r1, [r3, r2] return HAL_OK; - 8005fc6: 2300 movs r3, #0 + 8006002: 2300 movs r3, #0 } - 8005fc8: 0018 movs r0, r3 - 8005fca: 46bd mov sp, r7 - 8005fcc: b002 add sp, #8 - 8005fce: bd80 pop {r7, pc} + 8006004: 0018 movs r0, r3 + 8006006: 46bd mov sp, r7 + 8006008: b002 add sp, #8 + 800600a: bd80 pop {r7, pc} -08005fd0 : +0800600c : * @param pData Pointer to data buffer (u8 or u16 data elements). * @param Size Amount of data elements (u8 or u16) to be sent. * @retval HAL status */ HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size) { - 8005fd0: b580 push {r7, lr} - 8005fd2: b084 sub sp, #16 - 8005fd4: af00 add r7, sp, #0 - 8005fd6: 60f8 str r0, [r7, #12] - 8005fd8: 60b9 str r1, [r7, #8] - 8005fda: 1dbb adds r3, r7, #6 - 8005fdc: 801a strh r2, [r3, #0] + 800600c: b580 push {r7, lr} + 800600e: b084 sub sp, #16 + 8006010: af00 add r7, sp, #0 + 8006012: 60f8 str r0, [r7, #12] + 8006014: 60b9 str r1, [r7, #8] + 8006016: 1dbb adds r3, r7, #6 + 8006018: 801a strh r2, [r3, #0] /* Check that a Tx process is not already ongoing */ if (huart->gState == HAL_UART_STATE_READY) - 8005fde: 68fb ldr r3, [r7, #12] - 8005fe0: 6f9b ldr r3, [r3, #120] ; 0x78 - 8005fe2: 2b20 cmp r3, #32 - 8005fe4: d159 bne.n 800609a + 800601a: 68fb ldr r3, [r7, #12] + 800601c: 6f9b ldr r3, [r3, #120] ; 0x78 + 800601e: 2b20 cmp r3, #32 + 8006020: d159 bne.n 80060d6 { if ((pData == NULL) || (Size == 0U)) - 8005fe6: 68bb ldr r3, [r7, #8] - 8005fe8: 2b00 cmp r3, #0 - 8005fea: d003 beq.n 8005ff4 - 8005fec: 1dbb adds r3, r7, #6 - 8005fee: 881b ldrh r3, [r3, #0] - 8005ff0: 2b00 cmp r3, #0 - 8005ff2: d101 bne.n 8005ff8 + 8006022: 68bb ldr r3, [r7, #8] + 8006024: 2b00 cmp r3, #0 + 8006026: d003 beq.n 8006030 + 8006028: 1dbb adds r3, r7, #6 + 800602a: 881b ldrh r3, [r3, #0] + 800602c: 2b00 cmp r3, #0 + 800602e: d101 bne.n 8006034 { return HAL_ERROR; - 8005ff4: 2301 movs r3, #1 - 8005ff6: e051 b.n 800609c + 8006030: 2301 movs r3, #1 + 8006032: e051 b.n 80060d8 } /* In case of 9bits/No Parity transfer, pData buffer provided as input parameter should be aligned on a u16 frontier, as data to be filled into TDR will be handled through a u16 cast. */ if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE)) - 8005ff8: 68fb ldr r3, [r7, #12] - 8005ffa: 689a ldr r2, [r3, #8] - 8005ffc: 2380 movs r3, #128 ; 0x80 - 8005ffe: 015b lsls r3, r3, #5 - 8006000: 429a cmp r2, r3 - 8006002: d109 bne.n 8006018 - 8006004: 68fb ldr r3, [r7, #12] - 8006006: 691b ldr r3, [r3, #16] - 8006008: 2b00 cmp r3, #0 - 800600a: d105 bne.n 8006018 + 8006034: 68fb ldr r3, [r7, #12] + 8006036: 689a ldr r2, [r3, #8] + 8006038: 2380 movs r3, #128 ; 0x80 + 800603a: 015b lsls r3, r3, #5 + 800603c: 429a cmp r2, r3 + 800603e: d109 bne.n 8006054 + 8006040: 68fb ldr r3, [r7, #12] + 8006042: 691b ldr r3, [r3, #16] + 8006044: 2b00 cmp r3, #0 + 8006046: d105 bne.n 8006054 { if ((((uint32_t)pData) & 1U) != 0U) - 800600c: 68bb ldr r3, [r7, #8] - 800600e: 2201 movs r2, #1 - 8006010: 4013 ands r3, r2 - 8006012: d001 beq.n 8006018 + 8006048: 68bb ldr r3, [r7, #8] + 800604a: 2201 movs r2, #1 + 800604c: 4013 ands r3, r2 + 800604e: d001 beq.n 8006054 { return HAL_ERROR; - 8006014: 2301 movs r3, #1 - 8006016: e041 b.n 800609c + 8006050: 2301 movs r3, #1 + 8006052: e041 b.n 80060d8 } } __HAL_LOCK(huart); - 8006018: 68fb ldr r3, [r7, #12] - 800601a: 2274 movs r2, #116 ; 0x74 - 800601c: 5c9b ldrb r3, [r3, r2] - 800601e: 2b01 cmp r3, #1 - 8006020: d101 bne.n 8006026 - 8006022: 2302 movs r3, #2 - 8006024: e03a b.n 800609c - 8006026: 68fb ldr r3, [r7, #12] - 8006028: 2274 movs r2, #116 ; 0x74 - 800602a: 2101 movs r1, #1 - 800602c: 5499 strb r1, [r3, r2] + 8006054: 68fb ldr r3, [r7, #12] + 8006056: 2274 movs r2, #116 ; 0x74 + 8006058: 5c9b ldrb r3, [r3, r2] + 800605a: 2b01 cmp r3, #1 + 800605c: d101 bne.n 8006062 + 800605e: 2302 movs r3, #2 + 8006060: e03a b.n 80060d8 + 8006062: 68fb ldr r3, [r7, #12] + 8006064: 2274 movs r2, #116 ; 0x74 + 8006066: 2101 movs r1, #1 + 8006068: 5499 strb r1, [r3, r2] huart->pTxBuffPtr = pData; - 800602e: 68fb ldr r3, [r7, #12] - 8006030: 68ba ldr r2, [r7, #8] - 8006032: 64da str r2, [r3, #76] ; 0x4c + 800606a: 68fb ldr r3, [r7, #12] + 800606c: 68ba ldr r2, [r7, #8] + 800606e: 64da str r2, [r3, #76] ; 0x4c huart->TxXferSize = Size; - 8006034: 68fb ldr r3, [r7, #12] - 8006036: 1dba adds r2, r7, #6 - 8006038: 2150 movs r1, #80 ; 0x50 - 800603a: 8812 ldrh r2, [r2, #0] - 800603c: 525a strh r2, [r3, r1] + 8006070: 68fb ldr r3, [r7, #12] + 8006072: 1dba adds r2, r7, #6 + 8006074: 2150 movs r1, #80 ; 0x50 + 8006076: 8812 ldrh r2, [r2, #0] + 8006078: 525a strh r2, [r3, r1] huart->TxXferCount = Size; - 800603e: 68fb ldr r3, [r7, #12] - 8006040: 1dba adds r2, r7, #6 - 8006042: 2152 movs r1, #82 ; 0x52 - 8006044: 8812 ldrh r2, [r2, #0] - 8006046: 525a strh r2, [r3, r1] + 800607a: 68fb ldr r3, [r7, #12] + 800607c: 1dba adds r2, r7, #6 + 800607e: 2152 movs r1, #82 ; 0x52 + 8006080: 8812 ldrh r2, [r2, #0] + 8006082: 525a strh r2, [r3, r1] huart->TxISR = NULL; - 8006048: 68fb ldr r3, [r7, #12] - 800604a: 2200 movs r2, #0 - 800604c: 669a str r2, [r3, #104] ; 0x68 + 8006084: 68fb ldr r3, [r7, #12] + 8006086: 2200 movs r2, #0 + 8006088: 669a str r2, [r3, #104] ; 0x68 huart->ErrorCode = HAL_UART_ERROR_NONE; - 800604e: 68fb ldr r3, [r7, #12] - 8006050: 2280 movs r2, #128 ; 0x80 - 8006052: 2100 movs r1, #0 - 8006054: 5099 str r1, [r3, r2] + 800608a: 68fb ldr r3, [r7, #12] + 800608c: 2280 movs r2, #128 ; 0x80 + 800608e: 2100 movs r1, #0 + 8006090: 5099 str r1, [r3, r2] huart->gState = HAL_UART_STATE_BUSY_TX; - 8006056: 68fb ldr r3, [r7, #12] - 8006058: 2221 movs r2, #33 ; 0x21 - 800605a: 679a str r2, [r3, #120] ; 0x78 + 8006092: 68fb ldr r3, [r7, #12] + 8006094: 2221 movs r2, #33 ; 0x21 + 8006096: 679a str r2, [r3, #120] ; 0x78 /* Set the Tx ISR function pointer according to the data word length */ if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE)) - 800605c: 68fb ldr r3, [r7, #12] - 800605e: 689a ldr r2, [r3, #8] - 8006060: 2380 movs r3, #128 ; 0x80 - 8006062: 015b lsls r3, r3, #5 - 8006064: 429a cmp r2, r3 - 8006066: d107 bne.n 8006078 - 8006068: 68fb ldr r3, [r7, #12] - 800606a: 691b ldr r3, [r3, #16] - 800606c: 2b00 cmp r3, #0 - 800606e: d103 bne.n 8006078 + 8006098: 68fb ldr r3, [r7, #12] + 800609a: 689a ldr r2, [r3, #8] + 800609c: 2380 movs r3, #128 ; 0x80 + 800609e: 015b lsls r3, r3, #5 + 80060a0: 429a cmp r2, r3 + 80060a2: d107 bne.n 80060b4 + 80060a4: 68fb ldr r3, [r7, #12] + 80060a6: 691b ldr r3, [r3, #16] + 80060a8: 2b00 cmp r3, #0 + 80060aa: d103 bne.n 80060b4 { huart->TxISR = UART_TxISR_16BIT; - 8006070: 68fb ldr r3, [r7, #12] - 8006072: 4a0c ldr r2, [pc, #48] ; (80060a4 ) - 8006074: 669a str r2, [r3, #104] ; 0x68 - 8006076: e002 b.n 800607e + 80060ac: 68fb ldr r3, [r7, #12] + 80060ae: 4a0c ldr r2, [pc, #48] ; (80060e0 ) + 80060b0: 669a str r2, [r3, #104] ; 0x68 + 80060b2: e002 b.n 80060ba } else { huart->TxISR = UART_TxISR_8BIT; - 8006078: 68fb ldr r3, [r7, #12] - 800607a: 4a0b ldr r2, [pc, #44] ; (80060a8 ) - 800607c: 669a str r2, [r3, #104] ; 0x68 + 80060b4: 68fb ldr r3, [r7, #12] + 80060b6: 4a0b ldr r2, [pc, #44] ; (80060e4 ) + 80060b8: 669a str r2, [r3, #104] ; 0x68 } __HAL_UNLOCK(huart); - 800607e: 68fb ldr r3, [r7, #12] - 8006080: 2274 movs r2, #116 ; 0x74 - 8006082: 2100 movs r1, #0 - 8006084: 5499 strb r1, [r3, r2] + 80060ba: 68fb ldr r3, [r7, #12] + 80060bc: 2274 movs r2, #116 ; 0x74 + 80060be: 2100 movs r1, #0 + 80060c0: 5499 strb r1, [r3, r2] /* Enable the Transmit Data Register Empty interrupt */ SET_BIT(huart->Instance->CR1, USART_CR1_TXEIE); - 8006086: 68fb ldr r3, [r7, #12] - 8006088: 681b ldr r3, [r3, #0] - 800608a: 68fa ldr r2, [r7, #12] - 800608c: 6812 ldr r2, [r2, #0] - 800608e: 6812 ldr r2, [r2, #0] - 8006090: 2180 movs r1, #128 ; 0x80 - 8006092: 430a orrs r2, r1 - 8006094: 601a str r2, [r3, #0] + 80060c2: 68fb ldr r3, [r7, #12] + 80060c4: 681b ldr r3, [r3, #0] + 80060c6: 68fa ldr r2, [r7, #12] + 80060c8: 6812 ldr r2, [r2, #0] + 80060ca: 6812 ldr r2, [r2, #0] + 80060cc: 2180 movs r1, #128 ; 0x80 + 80060ce: 430a orrs r2, r1 + 80060d0: 601a str r2, [r3, #0] return HAL_OK; - 8006096: 2300 movs r3, #0 - 8006098: e000 b.n 800609c + 80060d2: 2300 movs r3, #0 + 80060d4: e000 b.n 80060d8 } else { return HAL_BUSY; - 800609a: 2302 movs r3, #2 + 80060d6: 2302 movs r3, #2 } } - 800609c: 0018 movs r0, r3 - 800609e: 46bd mov sp, r7 - 80060a0: b004 add sp, #16 - 80060a2: bd80 pop {r7, pc} - 80060a4: 08006e55 .word 0x08006e55 - 80060a8: 08006de7 .word 0x08006de7 + 80060d8: 0018 movs r0, r3 + 80060da: 46bd mov sp, r7 + 80060dc: b004 add sp, #16 + 80060de: bd80 pop {r7, pc} + 80060e0: 08006e91 .word 0x08006e91 + 80060e4: 08006e23 .word 0x08006e23 -080060ac : +080060e8 : * @brief Handle UART interrupt request. * @param huart UART handle. * @retval None */ void HAL_UART_IRQHandler(UART_HandleTypeDef *huart) { - 80060ac: b580 push {r7, lr} - 80060ae: b088 sub sp, #32 - 80060b0: af00 add r7, sp, #0 - 80060b2: 6078 str r0, [r7, #4] + 80060e8: b580 push {r7, lr} + 80060ea: b088 sub sp, #32 + 80060ec: af00 add r7, sp, #0 + 80060ee: 6078 str r0, [r7, #4] uint32_t isrflags = READ_REG(huart->Instance->ISR); - 80060b4: 687b ldr r3, [r7, #4] - 80060b6: 681b ldr r3, [r3, #0] - 80060b8: 69db ldr r3, [r3, #28] - 80060ba: 61fb str r3, [r7, #28] + 80060f0: 687b ldr r3, [r7, #4] + 80060f2: 681b ldr r3, [r3, #0] + 80060f4: 69db ldr r3, [r3, #28] + 80060f6: 61fb str r3, [r7, #28] uint32_t cr1its = READ_REG(huart->Instance->CR1); - 80060bc: 687b ldr r3, [r7, #4] - 80060be: 681b ldr r3, [r3, #0] - 80060c0: 681b ldr r3, [r3, #0] - 80060c2: 61bb str r3, [r7, #24] + 80060f8: 687b ldr r3, [r7, #4] + 80060fa: 681b ldr r3, [r3, #0] + 80060fc: 681b ldr r3, [r3, #0] + 80060fe: 61bb str r3, [r7, #24] uint32_t cr3its = READ_REG(huart->Instance->CR3); - 80060c4: 687b ldr r3, [r7, #4] - 80060c6: 681b ldr r3, [r3, #0] - 80060c8: 689b ldr r3, [r3, #8] - 80060ca: 617b str r3, [r7, #20] + 8006100: 687b ldr r3, [r7, #4] + 8006102: 681b ldr r3, [r3, #0] + 8006104: 689b ldr r3, [r3, #8] + 8006106: 617b str r3, [r7, #20] uint32_t errorflags; uint32_t errorcode; /* If no error occurs */ errorflags = (isrflags & (uint32_t)(USART_ISR_PE | USART_ISR_FE | USART_ISR_ORE | USART_ISR_NE | USART_ISR_RTOF)); - 80060cc: 69fb ldr r3, [r7, #28] - 80060ce: 4ab7 ldr r2, [pc, #732] ; (80063ac ) - 80060d0: 4013 ands r3, r2 - 80060d2: 613b str r3, [r7, #16] + 8006108: 69fb ldr r3, [r7, #28] + 800610a: 4ab7 ldr r2, [pc, #732] ; (80063e8 ) + 800610c: 4013 ands r3, r2 + 800610e: 613b str r3, [r7, #16] if (errorflags == 0U) - 80060d4: 693b ldr r3, [r7, #16] - 80060d6: 2b00 cmp r3, #0 - 80060d8: d112 bne.n 8006100 + 8006110: 693b ldr r3, [r7, #16] + 8006112: 2b00 cmp r3, #0 + 8006114: d112 bne.n 800613c { /* UART in mode Receiver ---------------------------------------------------*/ if (((isrflags & USART_ISR_RXNE) != 0U) - 80060da: 69fb ldr r3, [r7, #28] - 80060dc: 2220 movs r2, #32 - 80060de: 4013 ands r3, r2 - 80060e0: d00e beq.n 8006100 + 8006116: 69fb ldr r3, [r7, #28] + 8006118: 2220 movs r2, #32 + 800611a: 4013 ands r3, r2 + 800611c: d00e beq.n 800613c && ((cr1its & USART_CR1_RXNEIE) != 0U)) - 80060e2: 69bb ldr r3, [r7, #24] - 80060e4: 2220 movs r2, #32 - 80060e6: 4013 ands r3, r2 - 80060e8: d00a beq.n 8006100 + 800611e: 69bb ldr r3, [r7, #24] + 8006120: 2220 movs r2, #32 + 8006122: 4013 ands r3, r2 + 8006124: d00a beq.n 800613c { if (huart->RxISR != NULL) - 80060ea: 687b ldr r3, [r7, #4] - 80060ec: 6e5b ldr r3, [r3, #100] ; 0x64 - 80060ee: 2b00 cmp r3, #0 - 80060f0: d100 bne.n 80060f4 - 80060f2: e1d8 b.n 80064a6 + 8006126: 687b ldr r3, [r7, #4] + 8006128: 6e5b ldr r3, [r3, #100] ; 0x64 + 800612a: 2b00 cmp r3, #0 + 800612c: d100 bne.n 8006130 + 800612e: e1d8 b.n 80064e2 { huart->RxISR(huart); - 80060f4: 687b ldr r3, [r7, #4] - 80060f6: 6e5b ldr r3, [r3, #100] ; 0x64 - 80060f8: 687a ldr r2, [r7, #4] - 80060fa: 0010 movs r0, r2 - 80060fc: 4798 blx r3 + 8006130: 687b ldr r3, [r7, #4] + 8006132: 6e5b ldr r3, [r3, #100] ; 0x64 + 8006134: 687a ldr r2, [r7, #4] + 8006136: 0010 movs r0, r2 + 8006138: 4798 blx r3 } return; - 80060fe: e1d2 b.n 80064a6 + 800613a: e1d2 b.n 80064e2 } } /* If some errors occur */ if ((errorflags != 0U) - 8006100: 693b ldr r3, [r7, #16] - 8006102: 2b00 cmp r3, #0 - 8006104: d100 bne.n 8006108 - 8006106: e0d9 b.n 80062bc + 800613c: 693b ldr r3, [r7, #16] + 800613e: 2b00 cmp r3, #0 + 8006140: d100 bne.n 8006144 + 8006142: e0d9 b.n 80062f8 && (((cr3its & USART_CR3_EIE) != 0U) - 8006108: 697b ldr r3, [r7, #20] - 800610a: 2201 movs r2, #1 - 800610c: 4013 ands r3, r2 - 800610e: d104 bne.n 800611a + 8006144: 697b ldr r3, [r7, #20] + 8006146: 2201 movs r2, #1 + 8006148: 4013 ands r3, r2 + 800614a: d104 bne.n 8006156 || ((cr1its & (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_RTOIE)) != 0U))) - 8006110: 69bb ldr r3, [r7, #24] - 8006112: 4aa7 ldr r2, [pc, #668] ; (80063b0 ) - 8006114: 4013 ands r3, r2 - 8006116: d100 bne.n 800611a - 8006118: e0d0 b.n 80062bc + 800614c: 69bb ldr r3, [r7, #24] + 800614e: 4aa7 ldr r2, [pc, #668] ; (80063ec ) + 8006150: 4013 ands r3, r2 + 8006152: d100 bne.n 8006156 + 8006154: e0d0 b.n 80062f8 { /* UART parity error interrupt occurred -------------------------------------*/ if (((isrflags & USART_ISR_PE) != 0U) && ((cr1its & USART_CR1_PEIE) != 0U)) - 800611a: 69fb ldr r3, [r7, #28] - 800611c: 2201 movs r2, #1 - 800611e: 4013 ands r3, r2 - 8006120: d010 beq.n 8006144 - 8006122: 69ba ldr r2, [r7, #24] - 8006124: 2380 movs r3, #128 ; 0x80 - 8006126: 005b lsls r3, r3, #1 - 8006128: 4013 ands r3, r2 - 800612a: d00b beq.n 8006144 + 8006156: 69fb ldr r3, [r7, #28] + 8006158: 2201 movs r2, #1 + 800615a: 4013 ands r3, r2 + 800615c: d010 beq.n 8006180 + 800615e: 69ba ldr r2, [r7, #24] + 8006160: 2380 movs r3, #128 ; 0x80 + 8006162: 005b lsls r3, r3, #1 + 8006164: 4013 ands r3, r2 + 8006166: d00b beq.n 8006180 { __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_PEF); - 800612c: 687b ldr r3, [r7, #4] - 800612e: 681b ldr r3, [r3, #0] - 8006130: 2201 movs r2, #1 - 8006132: 621a str r2, [r3, #32] + 8006168: 687b ldr r3, [r7, #4] + 800616a: 681b ldr r3, [r3, #0] + 800616c: 2201 movs r2, #1 + 800616e: 621a str r2, [r3, #32] huart->ErrorCode |= HAL_UART_ERROR_PE; - 8006134: 687b ldr r3, [r7, #4] - 8006136: 2280 movs r2, #128 ; 0x80 - 8006138: 589b ldr r3, [r3, r2] - 800613a: 2201 movs r2, #1 - 800613c: 431a orrs r2, r3 - 800613e: 687b ldr r3, [r7, #4] - 8006140: 2180 movs r1, #128 ; 0x80 - 8006142: 505a str r2, [r3, r1] + 8006170: 687b ldr r3, [r7, #4] + 8006172: 2280 movs r2, #128 ; 0x80 + 8006174: 589b ldr r3, [r3, r2] + 8006176: 2201 movs r2, #1 + 8006178: 431a orrs r2, r3 + 800617a: 687b ldr r3, [r7, #4] + 800617c: 2180 movs r1, #128 ; 0x80 + 800617e: 505a str r2, [r3, r1] } /* UART frame error interrupt occurred --------------------------------------*/ if (((isrflags & USART_ISR_FE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U)) - 8006144: 69fb ldr r3, [r7, #28] - 8006146: 2202 movs r2, #2 - 8006148: 4013 ands r3, r2 - 800614a: d00f beq.n 800616c - 800614c: 697b ldr r3, [r7, #20] - 800614e: 2201 movs r2, #1 - 8006150: 4013 ands r3, r2 - 8006152: d00b beq.n 800616c + 8006180: 69fb ldr r3, [r7, #28] + 8006182: 2202 movs r2, #2 + 8006184: 4013 ands r3, r2 + 8006186: d00f beq.n 80061a8 + 8006188: 697b ldr r3, [r7, #20] + 800618a: 2201 movs r2, #1 + 800618c: 4013 ands r3, r2 + 800618e: d00b beq.n 80061a8 { __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_FEF); - 8006154: 687b ldr r3, [r7, #4] - 8006156: 681b ldr r3, [r3, #0] - 8006158: 2202 movs r2, #2 - 800615a: 621a str r2, [r3, #32] + 8006190: 687b ldr r3, [r7, #4] + 8006192: 681b ldr r3, [r3, #0] + 8006194: 2202 movs r2, #2 + 8006196: 621a str r2, [r3, #32] huart->ErrorCode |= HAL_UART_ERROR_FE; - 800615c: 687b ldr r3, [r7, #4] - 800615e: 2280 movs r2, #128 ; 0x80 - 8006160: 589b ldr r3, [r3, r2] - 8006162: 2204 movs r2, #4 - 8006164: 431a orrs r2, r3 - 8006166: 687b ldr r3, [r7, #4] - 8006168: 2180 movs r1, #128 ; 0x80 - 800616a: 505a str r2, [r3, r1] + 8006198: 687b ldr r3, [r7, #4] + 800619a: 2280 movs r2, #128 ; 0x80 + 800619c: 589b ldr r3, [r3, r2] + 800619e: 2204 movs r2, #4 + 80061a0: 431a orrs r2, r3 + 80061a2: 687b ldr r3, [r7, #4] + 80061a4: 2180 movs r1, #128 ; 0x80 + 80061a6: 505a str r2, [r3, r1] } /* UART noise error interrupt occurred --------------------------------------*/ if (((isrflags & USART_ISR_NE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U)) - 800616c: 69fb ldr r3, [r7, #28] - 800616e: 2204 movs r2, #4 - 8006170: 4013 ands r3, r2 - 8006172: d00f beq.n 8006194 - 8006174: 697b ldr r3, [r7, #20] - 8006176: 2201 movs r2, #1 - 8006178: 4013 ands r3, r2 - 800617a: d00b beq.n 8006194 + 80061a8: 69fb ldr r3, [r7, #28] + 80061aa: 2204 movs r2, #4 + 80061ac: 4013 ands r3, r2 + 80061ae: d00f beq.n 80061d0 + 80061b0: 697b ldr r3, [r7, #20] + 80061b2: 2201 movs r2, #1 + 80061b4: 4013 ands r3, r2 + 80061b6: d00b beq.n 80061d0 { __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_NEF); - 800617c: 687b ldr r3, [r7, #4] - 800617e: 681b ldr r3, [r3, #0] - 8006180: 2204 movs r2, #4 - 8006182: 621a str r2, [r3, #32] + 80061b8: 687b ldr r3, [r7, #4] + 80061ba: 681b ldr r3, [r3, #0] + 80061bc: 2204 movs r2, #4 + 80061be: 621a str r2, [r3, #32] huart->ErrorCode |= HAL_UART_ERROR_NE; - 8006184: 687b ldr r3, [r7, #4] - 8006186: 2280 movs r2, #128 ; 0x80 - 8006188: 589b ldr r3, [r3, r2] - 800618a: 2202 movs r2, #2 - 800618c: 431a orrs r2, r3 - 800618e: 687b ldr r3, [r7, #4] - 8006190: 2180 movs r1, #128 ; 0x80 - 8006192: 505a str r2, [r3, r1] + 80061c0: 687b ldr r3, [r7, #4] + 80061c2: 2280 movs r2, #128 ; 0x80 + 80061c4: 589b ldr r3, [r3, r2] + 80061c6: 2202 movs r2, #2 + 80061c8: 431a orrs r2, r3 + 80061ca: 687b ldr r3, [r7, #4] + 80061cc: 2180 movs r1, #128 ; 0x80 + 80061ce: 505a str r2, [r3, r1] } /* UART Over-Run interrupt occurred -----------------------------------------*/ if (((isrflags & USART_ISR_ORE) != 0U) - 8006194: 69fb ldr r3, [r7, #28] - 8006196: 2208 movs r2, #8 - 8006198: 4013 ands r3, r2 - 800619a: d013 beq.n 80061c4 + 80061d0: 69fb ldr r3, [r7, #28] + 80061d2: 2208 movs r2, #8 + 80061d4: 4013 ands r3, r2 + 80061d6: d013 beq.n 8006200 && (((cr1its & USART_CR1_RXNEIE) != 0U) || - 800619c: 69bb ldr r3, [r7, #24] - 800619e: 2220 movs r2, #32 - 80061a0: 4013 ands r3, r2 - 80061a2: d103 bne.n 80061ac + 80061d8: 69bb ldr r3, [r7, #24] + 80061da: 2220 movs r2, #32 + 80061dc: 4013 ands r3, r2 + 80061de: d103 bne.n 80061e8 ((cr3its & USART_CR3_EIE) != 0U))) - 80061a4: 697b ldr r3, [r7, #20] - 80061a6: 2201 movs r2, #1 - 80061a8: 4013 ands r3, r2 + 80061e0: 697b ldr r3, [r7, #20] + 80061e2: 2201 movs r2, #1 + 80061e4: 4013 ands r3, r2 && (((cr1its & USART_CR1_RXNEIE) != 0U) || - 80061aa: d00b beq.n 80061c4 + 80061e6: d00b beq.n 8006200 { __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF); - 80061ac: 687b ldr r3, [r7, #4] - 80061ae: 681b ldr r3, [r3, #0] - 80061b0: 2208 movs r2, #8 - 80061b2: 621a str r2, [r3, #32] + 80061e8: 687b ldr r3, [r7, #4] + 80061ea: 681b ldr r3, [r3, #0] + 80061ec: 2208 movs r2, #8 + 80061ee: 621a str r2, [r3, #32] huart->ErrorCode |= HAL_UART_ERROR_ORE; - 80061b4: 687b ldr r3, [r7, #4] - 80061b6: 2280 movs r2, #128 ; 0x80 - 80061b8: 589b ldr r3, [r3, r2] - 80061ba: 2208 movs r2, #8 - 80061bc: 431a orrs r2, r3 - 80061be: 687b ldr r3, [r7, #4] - 80061c0: 2180 movs r1, #128 ; 0x80 - 80061c2: 505a str r2, [r3, r1] + 80061f0: 687b ldr r3, [r7, #4] + 80061f2: 2280 movs r2, #128 ; 0x80 + 80061f4: 589b ldr r3, [r3, r2] + 80061f6: 2208 movs r2, #8 + 80061f8: 431a orrs r2, r3 + 80061fa: 687b ldr r3, [r7, #4] + 80061fc: 2180 movs r1, #128 ; 0x80 + 80061fe: 505a str r2, [r3, r1] } /* UART Receiver Timeout interrupt occurred ---------------------------------*/ if (((isrflags & USART_ISR_RTOF) != 0U) && ((cr1its & USART_CR1_RTOIE) != 0U)) - 80061c4: 69fa ldr r2, [r7, #28] - 80061c6: 2380 movs r3, #128 ; 0x80 - 80061c8: 011b lsls r3, r3, #4 - 80061ca: 4013 ands r3, r2 - 80061cc: d011 beq.n 80061f2 - 80061ce: 69ba ldr r2, [r7, #24] - 80061d0: 2380 movs r3, #128 ; 0x80 - 80061d2: 04db lsls r3, r3, #19 - 80061d4: 4013 ands r3, r2 - 80061d6: d00c beq.n 80061f2 + 8006200: 69fa ldr r2, [r7, #28] + 8006202: 2380 movs r3, #128 ; 0x80 + 8006204: 011b lsls r3, r3, #4 + 8006206: 4013 ands r3, r2 + 8006208: d011 beq.n 800622e + 800620a: 69ba ldr r2, [r7, #24] + 800620c: 2380 movs r3, #128 ; 0x80 + 800620e: 04db lsls r3, r3, #19 + 8006210: 4013 ands r3, r2 + 8006212: d00c beq.n 800622e { __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_RTOF); - 80061d8: 687b ldr r3, [r7, #4] - 80061da: 681b ldr r3, [r3, #0] - 80061dc: 2280 movs r2, #128 ; 0x80 - 80061de: 0112 lsls r2, r2, #4 - 80061e0: 621a str r2, [r3, #32] + 8006214: 687b ldr r3, [r7, #4] + 8006216: 681b ldr r3, [r3, #0] + 8006218: 2280 movs r2, #128 ; 0x80 + 800621a: 0112 lsls r2, r2, #4 + 800621c: 621a str r2, [r3, #32] huart->ErrorCode |= HAL_UART_ERROR_RTO; - 80061e2: 687b ldr r3, [r7, #4] - 80061e4: 2280 movs r2, #128 ; 0x80 - 80061e6: 589b ldr r3, [r3, r2] - 80061e8: 2220 movs r2, #32 - 80061ea: 431a orrs r2, r3 - 80061ec: 687b ldr r3, [r7, #4] - 80061ee: 2180 movs r1, #128 ; 0x80 - 80061f0: 505a str r2, [r3, r1] + 800621e: 687b ldr r3, [r7, #4] + 8006220: 2280 movs r2, #128 ; 0x80 + 8006222: 589b ldr r3, [r3, r2] + 8006224: 2220 movs r2, #32 + 8006226: 431a orrs r2, r3 + 8006228: 687b ldr r3, [r7, #4] + 800622a: 2180 movs r1, #128 ; 0x80 + 800622c: 505a str r2, [r3, r1] } /* Call UART Error Call back function if need be ----------------------------*/ if (huart->ErrorCode != HAL_UART_ERROR_NONE) - 80061f2: 687b ldr r3, [r7, #4] - 80061f4: 2280 movs r2, #128 ; 0x80 - 80061f6: 589b ldr r3, [r3, r2] - 80061f8: 2b00 cmp r3, #0 - 80061fa: d100 bne.n 80061fe - 80061fc: e155 b.n 80064aa + 800622e: 687b ldr r3, [r7, #4] + 8006230: 2280 movs r2, #128 ; 0x80 + 8006232: 589b ldr r3, [r3, r2] + 8006234: 2b00 cmp r3, #0 + 8006236: d100 bne.n 800623a + 8006238: e155 b.n 80064e6 { /* UART in mode Receiver --------------------------------------------------*/ if (((isrflags & USART_ISR_RXNE) != 0U) - 80061fe: 69fb ldr r3, [r7, #28] - 8006200: 2220 movs r2, #32 - 8006202: 4013 ands r3, r2 - 8006204: d00c beq.n 8006220 + 800623a: 69fb ldr r3, [r7, #28] + 800623c: 2220 movs r2, #32 + 800623e: 4013 ands r3, r2 + 8006240: d00c beq.n 800625c && ((cr1its & USART_CR1_RXNEIE) != 0U)) - 8006206: 69bb ldr r3, [r7, #24] - 8006208: 2220 movs r2, #32 - 800620a: 4013 ands r3, r2 - 800620c: d008 beq.n 8006220 + 8006242: 69bb ldr r3, [r7, #24] + 8006244: 2220 movs r2, #32 + 8006246: 4013 ands r3, r2 + 8006248: d008 beq.n 800625c { if (huart->RxISR != NULL) - 800620e: 687b ldr r3, [r7, #4] - 8006210: 6e5b ldr r3, [r3, #100] ; 0x64 - 8006212: 2b00 cmp r3, #0 - 8006214: d004 beq.n 8006220 + 800624a: 687b ldr r3, [r7, #4] + 800624c: 6e5b ldr r3, [r3, #100] ; 0x64 + 800624e: 2b00 cmp r3, #0 + 8006250: d004 beq.n 800625c { huart->RxISR(huart); - 8006216: 687b ldr r3, [r7, #4] - 8006218: 6e5b ldr r3, [r3, #100] ; 0x64 - 800621a: 687a ldr r2, [r7, #4] - 800621c: 0010 movs r0, r2 - 800621e: 4798 blx r3 + 8006252: 687b ldr r3, [r7, #4] + 8006254: 6e5b ldr r3, [r3, #100] ; 0x64 + 8006256: 687a ldr r2, [r7, #4] + 8006258: 0010 movs r0, r2 + 800625a: 4798 blx r3 /* If Error is to be considered as blocking : - Receiver Timeout error in Reception - Overrun error in Reception - any error occurs in DMA mode reception */ errorcode = huart->ErrorCode; - 8006220: 687b ldr r3, [r7, #4] - 8006222: 2280 movs r2, #128 ; 0x80 - 8006224: 589b ldr r3, [r3, r2] - 8006226: 60fb str r3, [r7, #12] + 800625c: 687b ldr r3, [r7, #4] + 800625e: 2280 movs r2, #128 ; 0x80 + 8006260: 589b ldr r3, [r3, r2] + 8006262: 60fb str r3, [r7, #12] if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) || - 8006228: 687b ldr r3, [r7, #4] - 800622a: 681b ldr r3, [r3, #0] - 800622c: 689b ldr r3, [r3, #8] - 800622e: 2240 movs r2, #64 ; 0x40 - 8006230: 4013 ands r3, r2 - 8006232: 2b40 cmp r3, #64 ; 0x40 - 8006234: d003 beq.n 800623e + 8006264: 687b ldr r3, [r7, #4] + 8006266: 681b ldr r3, [r3, #0] + 8006268: 689b ldr r3, [r3, #8] + 800626a: 2240 movs r2, #64 ; 0x40 + 800626c: 4013 ands r3, r2 + 800626e: 2b40 cmp r3, #64 ; 0x40 + 8006270: d003 beq.n 800627a ((errorcode & (HAL_UART_ERROR_RTO | HAL_UART_ERROR_ORE)) != 0U)) - 8006236: 68fb ldr r3, [r7, #12] - 8006238: 2228 movs r2, #40 ; 0x28 - 800623a: 4013 ands r3, r2 + 8006272: 68fb ldr r3, [r7, #12] + 8006274: 2228 movs r2, #40 ; 0x28 + 8006276: 4013 ands r3, r2 if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) || - 800623c: d033 beq.n 80062a6 + 8006278: d033 beq.n 80062e2 { /* Blocking error : transfer is aborted Set the UART state ready to be able to start again the process, Disable Rx Interrupts, and disable Rx DMA request, if ongoing */ UART_EndRxTransfer(huart); - 800623e: 687b ldr r3, [r7, #4] - 8006240: 0018 movs r0, r3 - 8006242: f000 fd89 bl 8006d58 + 800627a: 687b ldr r3, [r7, #4] + 800627c: 0018 movs r0, r3 + 800627e: f000 fd89 bl 8006d94 /* Disable the UART DMA Rx request if enabled */ if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) - 8006246: 687b ldr r3, [r7, #4] - 8006248: 681b ldr r3, [r3, #0] - 800624a: 689b ldr r3, [r3, #8] - 800624c: 2240 movs r2, #64 ; 0x40 - 800624e: 4013 ands r3, r2 - 8006250: 2b40 cmp r3, #64 ; 0x40 - 8006252: d123 bne.n 800629c + 8006282: 687b ldr r3, [r7, #4] + 8006284: 681b ldr r3, [r3, #0] + 8006286: 689b ldr r3, [r3, #8] + 8006288: 2240 movs r2, #64 ; 0x40 + 800628a: 4013 ands r3, r2 + 800628c: 2b40 cmp r3, #64 ; 0x40 + 800628e: d123 bne.n 80062d8 { CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); - 8006254: 687b ldr r3, [r7, #4] - 8006256: 681b ldr r3, [r3, #0] - 8006258: 687a ldr r2, [r7, #4] - 800625a: 6812 ldr r2, [r2, #0] - 800625c: 6892 ldr r2, [r2, #8] - 800625e: 2140 movs r1, #64 ; 0x40 - 8006260: 438a bics r2, r1 - 8006262: 609a str r2, [r3, #8] + 8006290: 687b ldr r3, [r7, #4] + 8006292: 681b ldr r3, [r3, #0] + 8006294: 687a ldr r2, [r7, #4] + 8006296: 6812 ldr r2, [r2, #0] + 8006298: 6892 ldr r2, [r2, #8] + 800629a: 2140 movs r1, #64 ; 0x40 + 800629c: 438a bics r2, r1 + 800629e: 609a str r2, [r3, #8] /* Abort the UART DMA Rx channel */ if (huart->hdmarx != NULL) - 8006264: 687b ldr r3, [r7, #4] - 8006266: 6f1b ldr r3, [r3, #112] ; 0x70 - 8006268: 2b00 cmp r3, #0 - 800626a: d012 beq.n 8006292 + 80062a0: 687b ldr r3, [r7, #4] + 80062a2: 6f1b ldr r3, [r3, #112] ; 0x70 + 80062a4: 2b00 cmp r3, #0 + 80062a6: d012 beq.n 80062ce { /* Set the UART DMA Abort callback : will lead to call HAL_UART_ErrorCallback() at end of DMA abort procedure */ huart->hdmarx->XferAbortCallback = UART_DMAAbortOnError; - 800626c: 687b ldr r3, [r7, #4] - 800626e: 6f1b ldr r3, [r3, #112] ; 0x70 - 8006270: 4a50 ldr r2, [pc, #320] ; (80063b4 ) - 8006272: 639a str r2, [r3, #56] ; 0x38 + 80062a8: 687b ldr r3, [r7, #4] + 80062aa: 6f1b ldr r3, [r3, #112] ; 0x70 + 80062ac: 4a50 ldr r2, [pc, #320] ; (80063f0 ) + 80062ae: 639a str r2, [r3, #56] ; 0x38 /* Abort DMA RX */ if (HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK) - 8006274: 687b ldr r3, [r7, #4] - 8006276: 6f1b ldr r3, [r3, #112] ; 0x70 - 8006278: 0018 movs r0, r3 - 800627a: f7fd ffb0 bl 80041de - 800627e: 1e03 subs r3, r0, #0 - 8006280: d01a beq.n 80062b8 + 80062b0: 687b ldr r3, [r7, #4] + 80062b2: 6f1b ldr r3, [r3, #112] ; 0x70 + 80062b4: 0018 movs r0, r3 + 80062b6: f7fd ffb0 bl 800421a + 80062ba: 1e03 subs r3, r0, #0 + 80062bc: d01a beq.n 80062f4 { /* Call Directly huart->hdmarx->XferAbortCallback function in case of error */ huart->hdmarx->XferAbortCallback(huart->hdmarx); - 8006282: 687b ldr r3, [r7, #4] - 8006284: 6f1b ldr r3, [r3, #112] ; 0x70 - 8006286: 6b9a ldr r2, [r3, #56] ; 0x38 - 8006288: 687b ldr r3, [r7, #4] - 800628a: 6f1b ldr r3, [r3, #112] ; 0x70 - 800628c: 0018 movs r0, r3 - 800628e: 4790 blx r2 + 80062be: 687b ldr r3, [r7, #4] + 80062c0: 6f1b ldr r3, [r3, #112] ; 0x70 + 80062c2: 6b9a ldr r2, [r3, #56] ; 0x38 + 80062c4: 687b ldr r3, [r7, #4] + 80062c6: 6f1b ldr r3, [r3, #112] ; 0x70 + 80062c8: 0018 movs r0, r3 + 80062ca: 4790 blx r2 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) - 8006290: e012 b.n 80062b8 + 80062cc: e012 b.n 80062f4 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered error callback*/ huart->ErrorCallback(huart); #else /*Call legacy weak error callback*/ HAL_UART_ErrorCallback(huart); - 8006292: 687b ldr r3, [r7, #4] - 8006294: 0018 movs r0, r3 - 8006296: f000 f915 bl 80064c4 + 80062ce: 687b ldr r3, [r7, #4] + 80062d0: 0018 movs r0, r3 + 80062d2: f000 f915 bl 8006500 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) - 800629a: e00d b.n 80062b8 + 80062d6: e00d b.n 80062f4 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered error callback*/ huart->ErrorCallback(huart); #else /*Call legacy weak error callback*/ HAL_UART_ErrorCallback(huart); - 800629c: 687b ldr r3, [r7, #4] - 800629e: 0018 movs r0, r3 - 80062a0: f000 f910 bl 80064c4 + 80062d8: 687b ldr r3, [r7, #4] + 80062da: 0018 movs r0, r3 + 80062dc: f000 f910 bl 8006500 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) - 80062a4: e008 b.n 80062b8 + 80062e0: e008 b.n 80062f4 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered error callback*/ huart->ErrorCallback(huart); #else /*Call legacy weak error callback*/ HAL_UART_ErrorCallback(huart); - 80062a6: 687b ldr r3, [r7, #4] - 80062a8: 0018 movs r0, r3 - 80062aa: f000 f90b bl 80064c4 + 80062e2: 687b ldr r3, [r7, #4] + 80062e4: 0018 movs r0, r3 + 80062e6: f000 f90b bl 8006500 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ huart->ErrorCode = HAL_UART_ERROR_NONE; - 80062ae: 687b ldr r3, [r7, #4] - 80062b0: 2280 movs r2, #128 ; 0x80 - 80062b2: 2100 movs r1, #0 - 80062b4: 5099 str r1, [r3, r2] + 80062ea: 687b ldr r3, [r7, #4] + 80062ec: 2280 movs r2, #128 ; 0x80 + 80062ee: 2100 movs r1, #0 + 80062f0: 5099 str r1, [r3, r2] } } return; - 80062b6: e0f8 b.n 80064aa + 80062f2: e0f8 b.n 80064e6 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) - 80062b8: 46c0 nop ; (mov r8, r8) + 80062f4: 46c0 nop ; (mov r8, r8) return; - 80062ba: e0f6 b.n 80064aa + 80062f6: e0f6 b.n 80064e6 } /* End if some error occurs */ /* Check current reception Mode : If Reception till IDLE event has been selected : */ if ( (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) - 80062bc: 687b ldr r3, [r7, #4] - 80062be: 6e1b ldr r3, [r3, #96] ; 0x60 - 80062c0: 2b01 cmp r3, #1 - 80062c2: d000 beq.n 80062c6 - 80062c4: e0bb b.n 800643e + 80062f8: 687b ldr r3, [r7, #4] + 80062fa: 6e1b ldr r3, [r3, #96] ; 0x60 + 80062fc: 2b01 cmp r3, #1 + 80062fe: d000 beq.n 8006302 + 8006300: e0bb b.n 800647a &&((isrflags & USART_ISR_IDLE) != 0U) - 80062c6: 69fb ldr r3, [r7, #28] - 80062c8: 2210 movs r2, #16 - 80062ca: 4013 ands r3, r2 - 80062cc: d100 bne.n 80062d0 - 80062ce: e0b6 b.n 800643e + 8006302: 69fb ldr r3, [r7, #28] + 8006304: 2210 movs r2, #16 + 8006306: 4013 ands r3, r2 + 8006308: d100 bne.n 800630c + 800630a: e0b6 b.n 800647a &&((cr1its & USART_ISR_IDLE) != 0U)) - 80062d0: 69bb ldr r3, [r7, #24] - 80062d2: 2210 movs r2, #16 - 80062d4: 4013 ands r3, r2 - 80062d6: d100 bne.n 80062da - 80062d8: e0b1 b.n 800643e + 800630c: 69bb ldr r3, [r7, #24] + 800630e: 2210 movs r2, #16 + 8006310: 4013 ands r3, r2 + 8006312: d100 bne.n 8006316 + 8006314: e0b1 b.n 800647a { __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF); - 80062da: 687b ldr r3, [r7, #4] - 80062dc: 681b ldr r3, [r3, #0] - 80062de: 2210 movs r2, #16 - 80062e0: 621a str r2, [r3, #32] + 8006316: 687b ldr r3, [r7, #4] + 8006318: 681b ldr r3, [r3, #0] + 800631a: 2210 movs r2, #16 + 800631c: 621a str r2, [r3, #32] /* Check if DMA mode is enabled in UART */ if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) - 80062e2: 687b ldr r3, [r7, #4] - 80062e4: 681b ldr r3, [r3, #0] - 80062e6: 689b ldr r3, [r3, #8] - 80062e8: 2240 movs r2, #64 ; 0x40 - 80062ea: 4013 ands r3, r2 - 80062ec: 2b40 cmp r3, #64 ; 0x40 - 80062ee: d165 bne.n 80063bc + 800631e: 687b ldr r3, [r7, #4] + 8006320: 681b ldr r3, [r3, #0] + 8006322: 689b ldr r3, [r3, #8] + 8006324: 2240 movs r2, #64 ; 0x40 + 8006326: 4013 ands r3, r2 + 8006328: 2b40 cmp r3, #64 ; 0x40 + 800632a: d165 bne.n 80063f8 { /* DMA mode enabled */ /* Check received length : If all expected data are received, do nothing, (DMA cplt callback will be called). Otherwise, if at least one data has already been received, IDLE event is to be notified to user */ uint16_t nb_remaining_rx_data = (uint16_t) __HAL_DMA_GET_COUNTER(huart->hdmarx); - 80062f0: 687b ldr r3, [r7, #4] - 80062f2: 6f1b ldr r3, [r3, #112] ; 0x70 - 80062f4: 681b ldr r3, [r3, #0] - 80062f6: 685a ldr r2, [r3, #4] - 80062f8: 230a movs r3, #10 - 80062fa: 18fb adds r3, r7, r3 - 80062fc: 801a strh r2, [r3, #0] + 800632c: 687b ldr r3, [r7, #4] + 800632e: 6f1b ldr r3, [r3, #112] ; 0x70 + 8006330: 681b ldr r3, [r3, #0] + 8006332: 685a ldr r2, [r3, #4] + 8006334: 230a movs r3, #10 + 8006336: 18fb adds r3, r7, r3 + 8006338: 801a strh r2, [r3, #0] if ( (nb_remaining_rx_data > 0U) - 80062fe: 230a movs r3, #10 - 8006300: 18fb adds r3, r7, r3 - 8006302: 881b ldrh r3, [r3, #0] - 8006304: 2b00 cmp r3, #0 - 8006306: d100 bne.n 800630a - 8006308: e0d1 b.n 80064ae + 800633a: 230a movs r3, #10 + 800633c: 18fb adds r3, r7, r3 + 800633e: 881b ldrh r3, [r3, #0] + 8006340: 2b00 cmp r3, #0 + 8006342: d100 bne.n 8006346 + 8006344: e0d1 b.n 80064ea &&(nb_remaining_rx_data < huart->RxXferSize)) - 800630a: 687b ldr r3, [r7, #4] - 800630c: 2258 movs r2, #88 ; 0x58 - 800630e: 5a9b ldrh r3, [r3, r2] - 8006310: 220a movs r2, #10 - 8006312: 18ba adds r2, r7, r2 - 8006314: 8812 ldrh r2, [r2, #0] - 8006316: 429a cmp r2, r3 - 8006318: d300 bcc.n 800631c - 800631a: e0c8 b.n 80064ae + 8006346: 687b ldr r3, [r7, #4] + 8006348: 2258 movs r2, #88 ; 0x58 + 800634a: 5a9b ldrh r3, [r3, r2] + 800634c: 220a movs r2, #10 + 800634e: 18ba adds r2, r7, r2 + 8006350: 8812 ldrh r2, [r2, #0] + 8006352: 429a cmp r2, r3 + 8006354: d300 bcc.n 8006358 + 8006356: e0c8 b.n 80064ea { /* Reception is not complete */ huart->RxXferCount = nb_remaining_rx_data; - 800631c: 687b ldr r3, [r7, #4] - 800631e: 220a movs r2, #10 - 8006320: 18ba adds r2, r7, r2 - 8006322: 215a movs r1, #90 ; 0x5a - 8006324: 8812 ldrh r2, [r2, #0] - 8006326: 525a strh r2, [r3, r1] + 8006358: 687b ldr r3, [r7, #4] + 800635a: 220a movs r2, #10 + 800635c: 18ba adds r2, r7, r2 + 800635e: 215a movs r1, #90 ; 0x5a + 8006360: 8812 ldrh r2, [r2, #0] + 8006362: 525a strh r2, [r3, r1] /* In Normal mode, end DMA xfer and HAL UART Rx process*/ if (HAL_IS_BIT_CLR(huart->hdmarx->Instance->CCR, DMA_CCR_CIRC)) - 8006328: 687b ldr r3, [r7, #4] - 800632a: 6f1b ldr r3, [r3, #112] ; 0x70 - 800632c: 681b ldr r3, [r3, #0] - 800632e: 681b ldr r3, [r3, #0] - 8006330: 2220 movs r2, #32 - 8006332: 4013 ands r3, r2 - 8006334: d12a bne.n 800638c + 8006364: 687b ldr r3, [r7, #4] + 8006366: 6f1b ldr r3, [r3, #112] ; 0x70 + 8006368: 681b ldr r3, [r3, #0] + 800636a: 681b ldr r3, [r3, #0] + 800636c: 2220 movs r2, #32 + 800636e: 4013 ands r3, r2 + 8006370: d12a bne.n 80063c8 { /* Disable PE and ERR (Frame error, noise error, overrun error) interrupts */ CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE); - 8006336: 687b ldr r3, [r7, #4] - 8006338: 681b ldr r3, [r3, #0] - 800633a: 687a ldr r2, [r7, #4] - 800633c: 6812 ldr r2, [r2, #0] - 800633e: 6812 ldr r2, [r2, #0] - 8006340: 491d ldr r1, [pc, #116] ; (80063b8 ) - 8006342: 400a ands r2, r1 - 8006344: 601a str r2, [r3, #0] - CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); - 8006346: 687b ldr r3, [r7, #4] - 8006348: 681b ldr r3, [r3, #0] - 800634a: 687a ldr r2, [r7, #4] - 800634c: 6812 ldr r2, [r2, #0] - 800634e: 6892 ldr r2, [r2, #8] - 8006350: 2101 movs r1, #1 - 8006352: 438a bics r2, r1 - 8006354: 609a str r2, [r3, #8] - - /* Disable the DMA transfer for the receiver request by resetting the DMAR bit - in the UART CR3 register */ - CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); - 8006356: 687b ldr r3, [r7, #4] - 8006358: 681b ldr r3, [r3, #0] - 800635a: 687a ldr r2, [r7, #4] - 800635c: 6812 ldr r2, [r2, #0] - 800635e: 6892 ldr r2, [r2, #8] - 8006360: 2140 movs r1, #64 ; 0x40 - 8006362: 438a bics r2, r1 - 8006364: 609a str r2, [r3, #8] - - /* At end of Rx process, restore huart->RxState to Ready */ - huart->RxState = HAL_UART_STATE_READY; - 8006366: 687b ldr r3, [r7, #4] - 8006368: 2220 movs r2, #32 - 800636a: 67da str r2, [r3, #124] ; 0x7c - huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; - 800636c: 687b ldr r3, [r7, #4] - 800636e: 2200 movs r2, #0 - 8006370: 661a str r2, [r3, #96] ; 0x60 - - CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); 8006372: 687b ldr r3, [r7, #4] 8006374: 681b ldr r3, [r3, #0] 8006376: 687a ldr r2, [r7, #4] 8006378: 6812 ldr r2, [r2, #0] 800637a: 6812 ldr r2, [r2, #0] - 800637c: 2110 movs r1, #16 - 800637e: 438a bics r2, r1 + 800637c: 491d ldr r1, [pc, #116] ; (80063f4 ) + 800637e: 400a ands r2, r1 8006380: 601a str r2, [r3, #0] + CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); + 8006382: 687b ldr r3, [r7, #4] + 8006384: 681b ldr r3, [r3, #0] + 8006386: 687a ldr r2, [r7, #4] + 8006388: 6812 ldr r2, [r2, #0] + 800638a: 6892 ldr r2, [r2, #8] + 800638c: 2101 movs r1, #1 + 800638e: 438a bics r2, r1 + 8006390: 609a str r2, [r3, #8] + + /* Disable the DMA transfer for the receiver request by resetting the DMAR bit + in the UART CR3 register */ + CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); + 8006392: 687b ldr r3, [r7, #4] + 8006394: 681b ldr r3, [r3, #0] + 8006396: 687a ldr r2, [r7, #4] + 8006398: 6812 ldr r2, [r2, #0] + 800639a: 6892 ldr r2, [r2, #8] + 800639c: 2140 movs r1, #64 ; 0x40 + 800639e: 438a bics r2, r1 + 80063a0: 609a str r2, [r3, #8] + + /* At end of Rx process, restore huart->RxState to Ready */ + huart->RxState = HAL_UART_STATE_READY; + 80063a2: 687b ldr r3, [r7, #4] + 80063a4: 2220 movs r2, #32 + 80063a6: 67da str r2, [r3, #124] ; 0x7c + huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; + 80063a8: 687b ldr r3, [r7, #4] + 80063aa: 2200 movs r2, #0 + 80063ac: 661a str r2, [r3, #96] ; 0x60 + + CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); + 80063ae: 687b ldr r3, [r7, #4] + 80063b0: 681b ldr r3, [r3, #0] + 80063b2: 687a ldr r2, [r7, #4] + 80063b4: 6812 ldr r2, [r2, #0] + 80063b6: 6812 ldr r2, [r2, #0] + 80063b8: 2110 movs r1, #16 + 80063ba: 438a bics r2, r1 + 80063bc: 601a str r2, [r3, #0] /* Last bytes received, so no need as the abort is immediate */ (void)HAL_DMA_Abort(huart->hdmarx); - 8006382: 687b ldr r3, [r7, #4] - 8006384: 6f1b ldr r3, [r3, #112] ; 0x70 - 8006386: 0018 movs r0, r3 - 8006388: f7fd fee9 bl 800415e + 80063be: 687b ldr r3, [r7, #4] + 80063c0: 6f1b ldr r3, [r3, #112] ; 0x70 + 80063c2: 0018 movs r0, r3 + 80063c4: f7fd fee9 bl 800419a #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered Rx Event callback*/ huart->RxEventCallback(huart, (huart->RxXferSize - huart->RxXferCount)); #else /*Call legacy weak Rx Event callback*/ HAL_UARTEx_RxEventCallback(huart, (huart->RxXferSize - huart->RxXferCount)); - 800638c: 687b ldr r3, [r7, #4] - 800638e: 2258 movs r2, #88 ; 0x58 - 8006390: 5a9a ldrh r2, [r3, r2] - 8006392: 687b ldr r3, [r7, #4] - 8006394: 215a movs r1, #90 ; 0x5a - 8006396: 5a5b ldrh r3, [r3, r1] - 8006398: b29b uxth r3, r3 - 800639a: 1ad3 subs r3, r2, r3 - 800639c: b29a uxth r2, r3 - 800639e: 687b ldr r3, [r7, #4] - 80063a0: 0011 movs r1, r2 - 80063a2: 0018 movs r0, r3 - 80063a4: f000 f896 bl 80064d4 + 80063c8: 687b ldr r3, [r7, #4] + 80063ca: 2258 movs r2, #88 ; 0x58 + 80063cc: 5a9a ldrh r2, [r3, r2] + 80063ce: 687b ldr r3, [r7, #4] + 80063d0: 215a movs r1, #90 ; 0x5a + 80063d2: 5a5b ldrh r3, [r3, r1] + 80063d4: b29b uxth r3, r3 + 80063d6: 1ad3 subs r3, r2, r3 + 80063d8: b29a uxth r2, r3 + 80063da: 687b ldr r3, [r7, #4] + 80063dc: 0011 movs r1, r2 + 80063de: 0018 movs r0, r3 + 80063e0: f000 f896 bl 8006510 #endif } return; - 80063a8: e081 b.n 80064ae - 80063aa: 46c0 nop ; (mov r8, r8) - 80063ac: 0000080f .word 0x0000080f - 80063b0: 04000120 .word 0x04000120 - 80063b4: 08006db9 .word 0x08006db9 - 80063b8: fffffeff .word 0xfffffeff + 80063e4: e081 b.n 80064ea + 80063e6: 46c0 nop ; (mov r8, r8) + 80063e8: 0000080f .word 0x0000080f + 80063ec: 04000120 .word 0x04000120 + 80063f0: 08006df5 .word 0x08006df5 + 80063f4: fffffeff .word 0xfffffeff else { /* DMA mode not enabled */ /* Check received length : If all expected data are received, do nothing. Otherwise, if at least one data has already been received, IDLE event is to be notified to user */ uint16_t nb_rx_data = huart->RxXferSize - huart->RxXferCount; - 80063bc: 687b ldr r3, [r7, #4] - 80063be: 2258 movs r2, #88 ; 0x58 - 80063c0: 5a99 ldrh r1, [r3, r2] - 80063c2: 687b ldr r3, [r7, #4] - 80063c4: 225a movs r2, #90 ; 0x5a - 80063c6: 5a9b ldrh r3, [r3, r2] - 80063c8: b29a uxth r2, r3 - 80063ca: 2308 movs r3, #8 - 80063cc: 18fb adds r3, r7, r3 - 80063ce: 1a8a subs r2, r1, r2 - 80063d0: 801a strh r2, [r3, #0] + 80063f8: 687b ldr r3, [r7, #4] + 80063fa: 2258 movs r2, #88 ; 0x58 + 80063fc: 5a99 ldrh r1, [r3, r2] + 80063fe: 687b ldr r3, [r7, #4] + 8006400: 225a movs r2, #90 ; 0x5a + 8006402: 5a9b ldrh r3, [r3, r2] + 8006404: b29a uxth r2, r3 + 8006406: 2308 movs r3, #8 + 8006408: 18fb adds r3, r7, r3 + 800640a: 1a8a subs r2, r1, r2 + 800640c: 801a strh r2, [r3, #0] if ( (huart->RxXferCount > 0U) - 80063d2: 687b ldr r3, [r7, #4] - 80063d4: 225a movs r2, #90 ; 0x5a - 80063d6: 5a9b ldrh r3, [r3, r2] - 80063d8: b29b uxth r3, r3 - 80063da: 2b00 cmp r3, #0 - 80063dc: d100 bne.n 80063e0 - 80063de: e068 b.n 80064b2 + 800640e: 687b ldr r3, [r7, #4] + 8006410: 225a movs r2, #90 ; 0x5a + 8006412: 5a9b ldrh r3, [r3, r2] + 8006414: b29b uxth r3, r3 + 8006416: 2b00 cmp r3, #0 + 8006418: d100 bne.n 800641c + 800641a: e068 b.n 80064ee &&(nb_rx_data > 0U) ) - 80063e0: 2308 movs r3, #8 - 80063e2: 18fb adds r3, r7, r3 - 80063e4: 881b ldrh r3, [r3, #0] - 80063e6: 2b00 cmp r3, #0 - 80063e8: d063 beq.n 80064b2 + 800641c: 2308 movs r3, #8 + 800641e: 18fb adds r3, r7, r3 + 8006420: 881b ldrh r3, [r3, #0] + 8006422: 2b00 cmp r3, #0 + 8006424: d063 beq.n 80064ee { /* Disable the UART Parity Error Interrupt and RXNE interrupts */ CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE)); - 80063ea: 687b ldr r3, [r7, #4] - 80063ec: 681b ldr r3, [r3, #0] - 80063ee: 687a ldr r2, [r7, #4] - 80063f0: 6812 ldr r2, [r2, #0] - 80063f2: 6812 ldr r2, [r2, #0] - 80063f4: 4932 ldr r1, [pc, #200] ; (80064c0 ) - 80063f6: 400a ands r2, r1 - 80063f8: 601a str r2, [r3, #0] + 8006426: 687b ldr r3, [r7, #4] + 8006428: 681b ldr r3, [r3, #0] + 800642a: 687a ldr r2, [r7, #4] + 800642c: 6812 ldr r2, [r2, #0] + 800642e: 6812 ldr r2, [r2, #0] + 8006430: 4932 ldr r1, [pc, #200] ; (80064fc ) + 8006432: 400a ands r2, r1 + 8006434: 601a str r2, [r3, #0] /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) */ CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); - 80063fa: 687b ldr r3, [r7, #4] - 80063fc: 681b ldr r3, [r3, #0] - 80063fe: 687a ldr r2, [r7, #4] - 8006400: 6812 ldr r2, [r2, #0] - 8006402: 6892 ldr r2, [r2, #8] - 8006404: 2101 movs r1, #1 - 8006406: 438a bics r2, r1 - 8006408: 609a str r2, [r3, #8] + 8006436: 687b ldr r3, [r7, #4] + 8006438: 681b ldr r3, [r3, #0] + 800643a: 687a ldr r2, [r7, #4] + 800643c: 6812 ldr r2, [r2, #0] + 800643e: 6892 ldr r2, [r2, #8] + 8006440: 2101 movs r1, #1 + 8006442: 438a bics r2, r1 + 8006444: 609a str r2, [r3, #8] /* Rx process is completed, restore huart->RxState to Ready */ huart->RxState = HAL_UART_STATE_READY; - 800640a: 687b ldr r3, [r7, #4] - 800640c: 2220 movs r2, #32 - 800640e: 67da str r2, [r3, #124] ; 0x7c + 8006446: 687b ldr r3, [r7, #4] + 8006448: 2220 movs r2, #32 + 800644a: 67da str r2, [r3, #124] ; 0x7c huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; - 8006410: 687b ldr r3, [r7, #4] - 8006412: 2200 movs r2, #0 - 8006414: 661a str r2, [r3, #96] ; 0x60 + 800644c: 687b ldr r3, [r7, #4] + 800644e: 2200 movs r2, #0 + 8006450: 661a str r2, [r3, #96] ; 0x60 /* Clear RxISR function pointer */ huart->RxISR = NULL; - 8006416: 687b ldr r3, [r7, #4] - 8006418: 2200 movs r2, #0 - 800641a: 665a str r2, [r3, #100] ; 0x64 + 8006452: 687b ldr r3, [r7, #4] + 8006454: 2200 movs r2, #0 + 8006456: 665a str r2, [r3, #100] ; 0x64 CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); - 800641c: 687b ldr r3, [r7, #4] - 800641e: 681b ldr r3, [r3, #0] - 8006420: 687a ldr r2, [r7, #4] - 8006422: 6812 ldr r2, [r2, #0] - 8006424: 6812 ldr r2, [r2, #0] - 8006426: 2110 movs r1, #16 - 8006428: 438a bics r2, r1 - 800642a: 601a str r2, [r3, #0] + 8006458: 687b ldr r3, [r7, #4] + 800645a: 681b ldr r3, [r3, #0] + 800645c: 687a ldr r2, [r7, #4] + 800645e: 6812 ldr r2, [r2, #0] + 8006460: 6812 ldr r2, [r2, #0] + 8006462: 2110 movs r1, #16 + 8006464: 438a bics r2, r1 + 8006466: 601a str r2, [r3, #0] #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered Rx complete callback*/ huart->RxEventCallback(huart, nb_rx_data); #else /*Call legacy weak Rx Event callback*/ HAL_UARTEx_RxEventCallback(huart, nb_rx_data); - 800642c: 2308 movs r3, #8 - 800642e: 18fb adds r3, r7, r3 - 8006430: 881a ldrh r2, [r3, #0] - 8006432: 687b ldr r3, [r7, #4] - 8006434: 0011 movs r1, r2 - 8006436: 0018 movs r0, r3 - 8006438: f000 f84c bl 80064d4 + 8006468: 2308 movs r3, #8 + 800646a: 18fb adds r3, r7, r3 + 800646c: 881a ldrh r2, [r3, #0] + 800646e: 687b ldr r3, [r7, #4] + 8006470: 0011 movs r1, r2 + 8006472: 0018 movs r0, r3 + 8006474: f000 f84c bl 8006510 #endif } return; - 800643c: e039 b.n 80064b2 + 8006478: e039 b.n 80064ee } } /* UART wakeup from Stop mode interrupt occurred ---------------------------*/ if (((isrflags & USART_ISR_WUF) != 0U) && ((cr3its & USART_CR3_WUFIE) != 0U)) - 800643e: 69fa ldr r2, [r7, #28] - 8006440: 2380 movs r3, #128 ; 0x80 - 8006442: 035b lsls r3, r3, #13 - 8006444: 4013 ands r3, r2 - 8006446: d00e beq.n 8006466 - 8006448: 697a ldr r2, [r7, #20] - 800644a: 2380 movs r3, #128 ; 0x80 - 800644c: 03db lsls r3, r3, #15 - 800644e: 4013 ands r3, r2 - 8006450: d009 beq.n 8006466 + 800647a: 69fa ldr r2, [r7, #28] + 800647c: 2380 movs r3, #128 ; 0x80 + 800647e: 035b lsls r3, r3, #13 + 8006480: 4013 ands r3, r2 + 8006482: d00e beq.n 80064a2 + 8006484: 697a ldr r2, [r7, #20] + 8006486: 2380 movs r3, #128 ; 0x80 + 8006488: 03db lsls r3, r3, #15 + 800648a: 4013 ands r3, r2 + 800648c: d009 beq.n 80064a2 { __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_WUF); - 8006452: 687b ldr r3, [r7, #4] - 8006454: 681b ldr r3, [r3, #0] - 8006456: 2280 movs r2, #128 ; 0x80 - 8006458: 0352 lsls r2, r2, #13 - 800645a: 621a str r2, [r3, #32] + 800648e: 687b ldr r3, [r7, #4] + 8006490: 681b ldr r3, [r3, #0] + 8006492: 2280 movs r2, #128 ; 0x80 + 8006494: 0352 lsls r2, r2, #13 + 8006496: 621a str r2, [r3, #32] #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /* Call registered Wakeup Callback */ huart->WakeupCallback(huart); #else /* Call legacy weak Wakeup Callback */ HAL_UARTEx_WakeupCallback(huart); - 800645c: 687b ldr r3, [r7, #4] - 800645e: 0018 movs r0, r3 - 8006460: f000 fd4d bl 8006efe + 8006498: 687b ldr r3, [r7, #4] + 800649a: 0018 movs r0, r3 + 800649c: f000 fd4d bl 8006f3a #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ return; - 8006464: e028 b.n 80064b8 + 80064a0: e028 b.n 80064f4 } /* UART in mode Transmitter ------------------------------------------------*/ if (((isrflags & USART_ISR_TXE) != 0U) - 8006466: 69fb ldr r3, [r7, #28] - 8006468: 2280 movs r2, #128 ; 0x80 - 800646a: 4013 ands r3, r2 - 800646c: d00d beq.n 800648a + 80064a2: 69fb ldr r3, [r7, #28] + 80064a4: 2280 movs r2, #128 ; 0x80 + 80064a6: 4013 ands r3, r2 + 80064a8: d00d beq.n 80064c6 && ((cr1its & USART_CR1_TXEIE) != 0U)) - 800646e: 69bb ldr r3, [r7, #24] - 8006470: 2280 movs r2, #128 ; 0x80 - 8006472: 4013 ands r3, r2 - 8006474: d009 beq.n 800648a + 80064aa: 69bb ldr r3, [r7, #24] + 80064ac: 2280 movs r2, #128 ; 0x80 + 80064ae: 4013 ands r3, r2 + 80064b0: d009 beq.n 80064c6 { if (huart->TxISR != NULL) - 8006476: 687b ldr r3, [r7, #4] - 8006478: 6e9b ldr r3, [r3, #104] ; 0x68 - 800647a: 2b00 cmp r3, #0 - 800647c: d01b beq.n 80064b6 + 80064b2: 687b ldr r3, [r7, #4] + 80064b4: 6e9b ldr r3, [r3, #104] ; 0x68 + 80064b6: 2b00 cmp r3, #0 + 80064b8: d01b beq.n 80064f2 { huart->TxISR(huart); - 800647e: 687b ldr r3, [r7, #4] - 8006480: 6e9b ldr r3, [r3, #104] ; 0x68 - 8006482: 687a ldr r2, [r7, #4] - 8006484: 0010 movs r0, r2 - 8006486: 4798 blx r3 + 80064ba: 687b ldr r3, [r7, #4] + 80064bc: 6e9b ldr r3, [r3, #104] ; 0x68 + 80064be: 687a ldr r2, [r7, #4] + 80064c0: 0010 movs r0, r2 + 80064c2: 4798 blx r3 } return; - 8006488: e015 b.n 80064b6 + 80064c4: e015 b.n 80064f2 } /* UART in mode Transmitter (transmission end) -----------------------------*/ if (((isrflags & USART_ISR_TC) != 0U) && ((cr1its & USART_CR1_TCIE) != 0U)) - 800648a: 69fb ldr r3, [r7, #28] - 800648c: 2240 movs r2, #64 ; 0x40 - 800648e: 4013 ands r3, r2 - 8006490: d012 beq.n 80064b8 - 8006492: 69bb ldr r3, [r7, #24] - 8006494: 2240 movs r2, #64 ; 0x40 - 8006496: 4013 ands r3, r2 - 8006498: d00e beq.n 80064b8 + 80064c6: 69fb ldr r3, [r7, #28] + 80064c8: 2240 movs r2, #64 ; 0x40 + 80064ca: 4013 ands r3, r2 + 80064cc: d012 beq.n 80064f4 + 80064ce: 69bb ldr r3, [r7, #24] + 80064d0: 2240 movs r2, #64 ; 0x40 + 80064d2: 4013 ands r3, r2 + 80064d4: d00e beq.n 80064f4 { UART_EndTransmit_IT(huart); - 800649a: 687b ldr r3, [r7, #4] - 800649c: 0018 movs r0, r3 - 800649e: f000 fd14 bl 8006eca + 80064d6: 687b ldr r3, [r7, #4] + 80064d8: 0018 movs r0, r3 + 80064da: f000 fd14 bl 8006f06 return; - 80064a2: 46c0 nop ; (mov r8, r8) - 80064a4: e008 b.n 80064b8 + 80064de: 46c0 nop ; (mov r8, r8) + 80064e0: e008 b.n 80064f4 return; - 80064a6: 46c0 nop ; (mov r8, r8) - 80064a8: e006 b.n 80064b8 + 80064e2: 46c0 nop ; (mov r8, r8) + 80064e4: e006 b.n 80064f4 return; - 80064aa: 46c0 nop ; (mov r8, r8) - 80064ac: e004 b.n 80064b8 + 80064e6: 46c0 nop ; (mov r8, r8) + 80064e8: e004 b.n 80064f4 return; - 80064ae: 46c0 nop ; (mov r8, r8) - 80064b0: e002 b.n 80064b8 + 80064ea: 46c0 nop ; (mov r8, r8) + 80064ec: e002 b.n 80064f4 return; - 80064b2: 46c0 nop ; (mov r8, r8) - 80064b4: e000 b.n 80064b8 + 80064ee: 46c0 nop ; (mov r8, r8) + 80064f0: e000 b.n 80064f4 return; - 80064b6: 46c0 nop ; (mov r8, r8) + 80064f2: 46c0 nop ; (mov r8, r8) } } - 80064b8: 46bd mov sp, r7 - 80064ba: b008 add sp, #32 - 80064bc: bd80 pop {r7, pc} - 80064be: 46c0 nop ; (mov r8, r8) - 80064c0: fffffedf .word 0xfffffedf + 80064f4: 46bd mov sp, r7 + 80064f6: b008 add sp, #32 + 80064f8: bd80 pop {r7, pc} + 80064fa: 46c0 nop ; (mov r8, r8) + 80064fc: fffffedf .word 0xfffffedf -080064c4 : +08006500 : * @brief UART error callback. * @param huart UART handle. * @retval None */ __weak void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart) { - 80064c4: b580 push {r7, lr} - 80064c6: b082 sub sp, #8 - 80064c8: af00 add r7, sp, #0 - 80064ca: 6078 str r0, [r7, #4] + 8006500: b580 push {r7, lr} + 8006502: b082 sub sp, #8 + 8006504: af00 add r7, sp, #0 + 8006506: 6078 str r0, [r7, #4] UNUSED(huart); /* NOTE : This function should not be modified, when the callback is needed, the HAL_UART_ErrorCallback can be implemented in the user file. */ } - 80064cc: 46c0 nop ; (mov r8, r8) - 80064ce: 46bd mov sp, r7 - 80064d0: b002 add sp, #8 - 80064d2: bd80 pop {r7, pc} + 8006508: 46c0 nop ; (mov r8, r8) + 800650a: 46bd mov sp, r7 + 800650c: b002 add sp, #8 + 800650e: bd80 pop {r7, pc} -080064d4 : +08006510 : * @param Size Number of data available in application reception buffer (indicates a position in * reception buffer until which, data are available) * @retval None */ __weak void HAL_UARTEx_RxEventCallback(UART_HandleTypeDef *huart, uint16_t Size) { - 80064d4: b580 push {r7, lr} - 80064d6: b082 sub sp, #8 - 80064d8: af00 add r7, sp, #0 - 80064da: 6078 str r0, [r7, #4] - 80064dc: 000a movs r2, r1 - 80064de: 1cbb adds r3, r7, #2 - 80064e0: 801a strh r2, [r3, #0] + 8006510: b580 push {r7, lr} + 8006512: b082 sub sp, #8 + 8006514: af00 add r7, sp, #0 + 8006516: 6078 str r0, [r7, #4] + 8006518: 000a movs r2, r1 + 800651a: 1cbb adds r3, r7, #2 + 800651c: 801a strh r2, [r3, #0] UNUSED(Size); /* NOTE : This function should not be modified, when the callback is needed, the HAL_UARTEx_RxEventCallback can be implemented in the user file. */ } - 80064e2: 46c0 nop ; (mov r8, r8) - 80064e4: 46bd mov sp, r7 - 80064e6: b002 add sp, #8 - 80064e8: bd80 pop {r7, pc} + 800651e: 46c0 nop ; (mov r8, r8) + 8006520: 46bd mov sp, r7 + 8006522: b002 add sp, #8 + 8006524: bd80 pop {r7, pc} ... -080064ec : +08006528 : * @brief Configure the UART peripheral. * @param huart UART handle. * @retval HAL status */ HAL_StatusTypeDef UART_SetConfig(UART_HandleTypeDef *huart) { - 80064ec: b5b0 push {r4, r5, r7, lr} - 80064ee: b08e sub sp, #56 ; 0x38 - 80064f0: af00 add r7, sp, #0 - 80064f2: 61f8 str r0, [r7, #28] + 8006528: b5b0 push {r4, r5, r7, lr} + 800652a: b08e sub sp, #56 ; 0x38 + 800652c: af00 add r7, sp, #0 + 800652e: 61f8 str r0, [r7, #28] uint32_t tmpreg; uint16_t brrtemp; UART_ClockSourceTypeDef clocksource; uint32_t usartdiv; HAL_StatusTypeDef ret = HAL_OK; - 80064f4: 231a movs r3, #26 - 80064f6: 2218 movs r2, #24 - 80064f8: 4694 mov ip, r2 - 80064fa: 44bc add ip, r7 - 80064fc: 4463 add r3, ip - 80064fe: 2200 movs r2, #0 - 8006500: 701a strb r2, [r3, #0] + 8006530: 231a movs r3, #26 + 8006532: 2218 movs r2, #24 + 8006534: 4694 mov ip, r2 + 8006536: 44bc add ip, r7 + 8006538: 4463 add r3, ip + 800653a: 2200 movs r2, #0 + 800653c: 701a strb r2, [r3, #0] * the UART Word Length, Parity, Mode and oversampling: * set the M bits according to huart->Init.WordLength value * set PCE and PS bits according to huart->Init.Parity value * set TE and RE bits according to huart->Init.Mode value * set OVER8 bit according to huart->Init.OverSampling value */ tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling ; - 8006502: 69fb ldr r3, [r7, #28] - 8006504: 689a ldr r2, [r3, #8] - 8006506: 69fb ldr r3, [r7, #28] - 8006508: 691b ldr r3, [r3, #16] - 800650a: 431a orrs r2, r3 - 800650c: 69fb ldr r3, [r7, #28] - 800650e: 695b ldr r3, [r3, #20] - 8006510: 431a orrs r2, r3 - 8006512: 69fb ldr r3, [r7, #28] - 8006514: 69db ldr r3, [r3, #28] - 8006516: 4313 orrs r3, r2 - 8006518: 637b str r3, [r7, #52] ; 0x34 + 800653e: 69fb ldr r3, [r7, #28] + 8006540: 689a ldr r2, [r3, #8] + 8006542: 69fb ldr r3, [r7, #28] + 8006544: 691b ldr r3, [r3, #16] + 8006546: 431a orrs r2, r3 + 8006548: 69fb ldr r3, [r7, #28] + 800654a: 695b ldr r3, [r3, #20] + 800654c: 431a orrs r2, r3 + 800654e: 69fb ldr r3, [r7, #28] + 8006550: 69db ldr r3, [r3, #28] + 8006552: 4313 orrs r3, r2 + 8006554: 637b str r3, [r7, #52] ; 0x34 MODIFY_REG(huart->Instance->CR1, USART_CR1_FIELDS, tmpreg); - 800651a: 69fb ldr r3, [r7, #28] - 800651c: 681b ldr r3, [r3, #0] - 800651e: 69fa ldr r2, [r7, #28] - 8006520: 6812 ldr r2, [r2, #0] - 8006522: 6812 ldr r2, [r2, #0] - 8006524: 49c8 ldr r1, [pc, #800] ; (8006848 ) - 8006526: 4011 ands r1, r2 - 8006528: 6b7a ldr r2, [r7, #52] ; 0x34 - 800652a: 430a orrs r2, r1 - 800652c: 601a str r2, [r3, #0] + 8006556: 69fb ldr r3, [r7, #28] + 8006558: 681b ldr r3, [r3, #0] + 800655a: 69fa ldr r2, [r7, #28] + 800655c: 6812 ldr r2, [r2, #0] + 800655e: 6812 ldr r2, [r2, #0] + 8006560: 49c8 ldr r1, [pc, #800] ; (8006884 ) + 8006562: 4011 ands r1, r2 + 8006564: 6b7a ldr r2, [r7, #52] ; 0x34 + 8006566: 430a orrs r2, r1 + 8006568: 601a str r2, [r3, #0] /*-------------------------- USART CR2 Configuration -----------------------*/ /* Configure the UART Stop Bits: Set STOP[13:12] bits according * to huart->Init.StopBits value */ MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits); - 800652e: 69fb ldr r3, [r7, #28] - 8006530: 681b ldr r3, [r3, #0] - 8006532: 69fa ldr r2, [r7, #28] - 8006534: 6812 ldr r2, [r2, #0] - 8006536: 6852 ldr r2, [r2, #4] - 8006538: 49c4 ldr r1, [pc, #784] ; (800684c ) - 800653a: 4011 ands r1, r2 - 800653c: 69fa ldr r2, [r7, #28] - 800653e: 68d2 ldr r2, [r2, #12] - 8006540: 430a orrs r2, r1 - 8006542: 605a str r2, [r3, #4] + 800656a: 69fb ldr r3, [r7, #28] + 800656c: 681b ldr r3, [r3, #0] + 800656e: 69fa ldr r2, [r7, #28] + 8006570: 6812 ldr r2, [r2, #0] + 8006572: 6852 ldr r2, [r2, #4] + 8006574: 49c4 ldr r1, [pc, #784] ; (8006888 ) + 8006576: 4011 ands r1, r2 + 8006578: 69fa ldr r2, [r7, #28] + 800657a: 68d2 ldr r2, [r2, #12] + 800657c: 430a orrs r2, r1 + 800657e: 605a str r2, [r3, #4] /* Configure * - UART HardWare Flow Control: set CTSE and RTSE bits according * to huart->Init.HwFlowCtl value * - one-bit sampling method versus three samples' majority rule according * to huart->Init.OneBitSampling (not applicable to LPUART) */ tmpreg = (uint32_t)huart->Init.HwFlowCtl; - 8006544: 69fb ldr r3, [r7, #28] - 8006546: 699b ldr r3, [r3, #24] - 8006548: 637b str r3, [r7, #52] ; 0x34 + 8006580: 69fb ldr r3, [r7, #28] + 8006582: 699b ldr r3, [r3, #24] + 8006584: 637b str r3, [r7, #52] ; 0x34 if (!(UART_INSTANCE_LOWPOWER(huart))) - 800654a: 69fb ldr r3, [r7, #28] - 800654c: 681b ldr r3, [r3, #0] - 800654e: 4ac0 ldr r2, [pc, #768] ; (8006850 ) - 8006550: 4293 cmp r3, r2 - 8006552: d004 beq.n 800655e + 8006586: 69fb ldr r3, [r7, #28] + 8006588: 681b ldr r3, [r3, #0] + 800658a: 4ac0 ldr r2, [pc, #768] ; (800688c ) + 800658c: 4293 cmp r3, r2 + 800658e: d004 beq.n 800659a { tmpreg |= huart->Init.OneBitSampling; - 8006554: 69fb ldr r3, [r7, #28] - 8006556: 6a1b ldr r3, [r3, #32] - 8006558: 6b7a ldr r2, [r7, #52] ; 0x34 - 800655a: 4313 orrs r3, r2 - 800655c: 637b str r3, [r7, #52] ; 0x34 + 8006590: 69fb ldr r3, [r7, #28] + 8006592: 6a1b ldr r3, [r3, #32] + 8006594: 6b7a ldr r2, [r7, #52] ; 0x34 + 8006596: 4313 orrs r3, r2 + 8006598: 637b str r3, [r7, #52] ; 0x34 } MODIFY_REG(huart->Instance->CR3, USART_CR3_FIELDS, tmpreg); - 800655e: 69fb ldr r3, [r7, #28] - 8006560: 681b ldr r3, [r3, #0] - 8006562: 69fa ldr r2, [r7, #28] - 8006564: 6812 ldr r2, [r2, #0] - 8006566: 6892 ldr r2, [r2, #8] - 8006568: 49ba ldr r1, [pc, #744] ; (8006854 ) - 800656a: 4011 ands r1, r2 - 800656c: 6b7a ldr r2, [r7, #52] ; 0x34 - 800656e: 430a orrs r2, r1 - 8006570: 609a str r2, [r3, #8] + 800659a: 69fb ldr r3, [r7, #28] + 800659c: 681b ldr r3, [r3, #0] + 800659e: 69fa ldr r2, [r7, #28] + 80065a0: 6812 ldr r2, [r2, #0] + 80065a2: 6892 ldr r2, [r2, #8] + 80065a4: 49ba ldr r1, [pc, #744] ; (8006890 ) + 80065a6: 4011 ands r1, r2 + 80065a8: 6b7a ldr r2, [r7, #52] ; 0x34 + 80065aa: 430a orrs r2, r1 + 80065ac: 609a str r2, [r3, #8] /*-------------------------- USART BRR Configuration -----------------------*/ UART_GETCLOCKSOURCE(huart, clocksource); - 8006572: 69fb ldr r3, [r7, #28] - 8006574: 681b ldr r3, [r3, #0] - 8006576: 4ab8 ldr r2, [pc, #736] ; (8006858 ) - 8006578: 4293 cmp r3, r2 - 800657a: d134 bne.n 80065e6 - 800657c: 4bb7 ldr r3, [pc, #732] ; (800685c ) - 800657e: 6cdb ldr r3, [r3, #76] ; 0x4c - 8006580: 2203 movs r2, #3 - 8006582: 4013 ands r3, r2 - 8006584: 2b01 cmp r3, #1 - 8006586: d015 beq.n 80065b4 - 8006588: d304 bcc.n 8006594 - 800658a: 2b02 cmp r3, #2 - 800658c: d00a beq.n 80065a4 - 800658e: 2b03 cmp r3, #3 - 8006590: d018 beq.n 80065c4 - 8006592: e01f b.n 80065d4 - 8006594: 231b movs r3, #27 - 8006596: 2218 movs r2, #24 - 8006598: 4694 mov ip, r2 - 800659a: 44bc add ip, r7 - 800659c: 4463 add r3, ip - 800659e: 2201 movs r2, #1 - 80065a0: 701a strb r2, [r3, #0] - 80065a2: e0c5 b.n 8006730 - 80065a4: 231b movs r3, #27 - 80065a6: 2218 movs r2, #24 - 80065a8: 4694 mov ip, r2 - 80065aa: 44bc add ip, r7 - 80065ac: 4463 add r3, ip - 80065ae: 2202 movs r2, #2 - 80065b0: 701a strb r2, [r3, #0] - 80065b2: e0bd b.n 8006730 - 80065b4: 231b movs r3, #27 - 80065b6: 2218 movs r2, #24 - 80065b8: 4694 mov ip, r2 - 80065ba: 44bc add ip, r7 - 80065bc: 4463 add r3, ip - 80065be: 2204 movs r2, #4 - 80065c0: 701a strb r2, [r3, #0] - 80065c2: e0b5 b.n 8006730 - 80065c4: 231b movs r3, #27 - 80065c6: 2218 movs r2, #24 - 80065c8: 4694 mov ip, r2 - 80065ca: 44bc add ip, r7 - 80065cc: 4463 add r3, ip - 80065ce: 2208 movs r2, #8 - 80065d0: 701a strb r2, [r3, #0] - 80065d2: e0ad b.n 8006730 - 80065d4: 231b movs r3, #27 - 80065d6: 2218 movs r2, #24 - 80065d8: 4694 mov ip, r2 - 80065da: 44bc add ip, r7 - 80065dc: 4463 add r3, ip - 80065de: 2210 movs r2, #16 - 80065e0: 701a strb r2, [r3, #0] - 80065e2: 46c0 nop ; (mov r8, r8) - 80065e4: e0a4 b.n 8006730 - 80065e6: 69fb ldr r3, [r7, #28] - 80065e8: 681b ldr r3, [r3, #0] - 80065ea: 4a9d ldr r2, [pc, #628] ; (8006860 ) - 80065ec: 4293 cmp r3, r2 - 80065ee: d137 bne.n 8006660 - 80065f0: 4b9a ldr r3, [pc, #616] ; (800685c ) - 80065f2: 6cdb ldr r3, [r3, #76] ; 0x4c - 80065f4: 220c movs r2, #12 - 80065f6: 4013 ands r3, r2 - 80065f8: 2b04 cmp r3, #4 - 80065fa: d018 beq.n 800662e - 80065fc: d802 bhi.n 8006604 - 80065fe: 2b00 cmp r3, #0 - 8006600: d005 beq.n 800660e - 8006602: e024 b.n 800664e - 8006604: 2b08 cmp r3, #8 - 8006606: d00a beq.n 800661e - 8006608: 2b0c cmp r3, #12 - 800660a: d018 beq.n 800663e - 800660c: e01f b.n 800664e - 800660e: 231b movs r3, #27 - 8006610: 2218 movs r2, #24 - 8006612: 4694 mov ip, r2 - 8006614: 44bc add ip, r7 - 8006616: 4463 add r3, ip - 8006618: 2200 movs r2, #0 - 800661a: 701a strb r2, [r3, #0] - 800661c: e088 b.n 8006730 - 800661e: 231b movs r3, #27 - 8006620: 2218 movs r2, #24 - 8006622: 4694 mov ip, r2 - 8006624: 44bc add ip, r7 - 8006626: 4463 add r3, ip - 8006628: 2202 movs r2, #2 - 800662a: 701a strb r2, [r3, #0] - 800662c: e080 b.n 8006730 - 800662e: 231b movs r3, #27 - 8006630: 2218 movs r2, #24 - 8006632: 4694 mov ip, r2 - 8006634: 44bc add ip, r7 - 8006636: 4463 add r3, ip - 8006638: 2204 movs r2, #4 - 800663a: 701a strb r2, [r3, #0] - 800663c: e078 b.n 8006730 - 800663e: 231b movs r3, #27 - 8006640: 2218 movs r2, #24 - 8006642: 4694 mov ip, r2 - 8006644: 44bc add ip, r7 - 8006646: 4463 add r3, ip - 8006648: 2208 movs r2, #8 - 800664a: 701a strb r2, [r3, #0] - 800664c: e070 b.n 8006730 - 800664e: 231b movs r3, #27 - 8006650: 2218 movs r2, #24 - 8006652: 4694 mov ip, r2 - 8006654: 44bc add ip, r7 - 8006656: 4463 add r3, ip - 8006658: 2210 movs r2, #16 - 800665a: 701a strb r2, [r3, #0] - 800665c: 46c0 nop ; (mov r8, r8) - 800665e: e067 b.n 8006730 - 8006660: 69fb ldr r3, [r7, #28] - 8006662: 681b ldr r3, [r3, #0] - 8006664: 4a7f ldr r2, [pc, #508] ; (8006864 ) - 8006666: 4293 cmp r3, r2 - 8006668: d107 bne.n 800667a + 80065ae: 69fb ldr r3, [r7, #28] + 80065b0: 681b ldr r3, [r3, #0] + 80065b2: 4ab8 ldr r2, [pc, #736] ; (8006894 ) + 80065b4: 4293 cmp r3, r2 + 80065b6: d134 bne.n 8006622 + 80065b8: 4bb7 ldr r3, [pc, #732] ; (8006898 ) + 80065ba: 6cdb ldr r3, [r3, #76] ; 0x4c + 80065bc: 2203 movs r2, #3 + 80065be: 4013 ands r3, r2 + 80065c0: 2b01 cmp r3, #1 + 80065c2: d015 beq.n 80065f0 + 80065c4: d304 bcc.n 80065d0 + 80065c6: 2b02 cmp r3, #2 + 80065c8: d00a beq.n 80065e0 + 80065ca: 2b03 cmp r3, #3 + 80065cc: d018 beq.n 8006600 + 80065ce: e01f b.n 8006610 + 80065d0: 231b movs r3, #27 + 80065d2: 2218 movs r2, #24 + 80065d4: 4694 mov ip, r2 + 80065d6: 44bc add ip, r7 + 80065d8: 4463 add r3, ip + 80065da: 2201 movs r2, #1 + 80065dc: 701a strb r2, [r3, #0] + 80065de: e0c5 b.n 800676c + 80065e0: 231b movs r3, #27 + 80065e2: 2218 movs r2, #24 + 80065e4: 4694 mov ip, r2 + 80065e6: 44bc add ip, r7 + 80065e8: 4463 add r3, ip + 80065ea: 2202 movs r2, #2 + 80065ec: 701a strb r2, [r3, #0] + 80065ee: e0bd b.n 800676c + 80065f0: 231b movs r3, #27 + 80065f2: 2218 movs r2, #24 + 80065f4: 4694 mov ip, r2 + 80065f6: 44bc add ip, r7 + 80065f8: 4463 add r3, ip + 80065fa: 2204 movs r2, #4 + 80065fc: 701a strb r2, [r3, #0] + 80065fe: e0b5 b.n 800676c + 8006600: 231b movs r3, #27 + 8006602: 2218 movs r2, #24 + 8006604: 4694 mov ip, r2 + 8006606: 44bc add ip, r7 + 8006608: 4463 add r3, ip + 800660a: 2208 movs r2, #8 + 800660c: 701a strb r2, [r3, #0] + 800660e: e0ad b.n 800676c + 8006610: 231b movs r3, #27 + 8006612: 2218 movs r2, #24 + 8006614: 4694 mov ip, r2 + 8006616: 44bc add ip, r7 + 8006618: 4463 add r3, ip + 800661a: 2210 movs r2, #16 + 800661c: 701a strb r2, [r3, #0] + 800661e: 46c0 nop ; (mov r8, r8) + 8006620: e0a4 b.n 800676c + 8006622: 69fb ldr r3, [r7, #28] + 8006624: 681b ldr r3, [r3, #0] + 8006626: 4a9d ldr r2, [pc, #628] ; (800689c ) + 8006628: 4293 cmp r3, r2 + 800662a: d137 bne.n 800669c + 800662c: 4b9a ldr r3, [pc, #616] ; (8006898 ) + 800662e: 6cdb ldr r3, [r3, #76] ; 0x4c + 8006630: 220c movs r2, #12 + 8006632: 4013 ands r3, r2 + 8006634: 2b04 cmp r3, #4 + 8006636: d018 beq.n 800666a + 8006638: d802 bhi.n 8006640 + 800663a: 2b00 cmp r3, #0 + 800663c: d005 beq.n 800664a + 800663e: e024 b.n 800668a + 8006640: 2b08 cmp r3, #8 + 8006642: d00a beq.n 800665a + 8006644: 2b0c cmp r3, #12 + 8006646: d018 beq.n 800667a + 8006648: e01f b.n 800668a + 800664a: 231b movs r3, #27 + 800664c: 2218 movs r2, #24 + 800664e: 4694 mov ip, r2 + 8006650: 44bc add ip, r7 + 8006652: 4463 add r3, ip + 8006654: 2200 movs r2, #0 + 8006656: 701a strb r2, [r3, #0] + 8006658: e088 b.n 800676c + 800665a: 231b movs r3, #27 + 800665c: 2218 movs r2, #24 + 800665e: 4694 mov ip, r2 + 8006660: 44bc add ip, r7 + 8006662: 4463 add r3, ip + 8006664: 2202 movs r2, #2 + 8006666: 701a strb r2, [r3, #0] + 8006668: e080 b.n 800676c 800666a: 231b movs r3, #27 800666c: 2218 movs r2, #24 800666e: 4694 mov ip, r2 8006670: 44bc add ip, r7 8006672: 4463 add r3, ip - 8006674: 2200 movs r2, #0 + 8006674: 2204 movs r2, #4 8006676: 701a strb r2, [r3, #0] - 8006678: e05a b.n 8006730 - 800667a: 69fb ldr r3, [r7, #28] - 800667c: 681b ldr r3, [r3, #0] - 800667e: 4a7a ldr r2, [pc, #488] ; (8006868 ) - 8006680: 4293 cmp r3, r2 - 8006682: d107 bne.n 8006694 - 8006684: 231b movs r3, #27 - 8006686: 2218 movs r2, #24 - 8006688: 4694 mov ip, r2 - 800668a: 44bc add ip, r7 - 800668c: 4463 add r3, ip - 800668e: 2200 movs r2, #0 - 8006690: 701a strb r2, [r3, #0] - 8006692: e04d b.n 8006730 - 8006694: 69fb ldr r3, [r7, #28] - 8006696: 681b ldr r3, [r3, #0] - 8006698: 4a6d ldr r2, [pc, #436] ; (8006850 ) - 800669a: 4293 cmp r3, r2 - 800669c: d141 bne.n 8006722 - 800669e: 4b6f ldr r3, [pc, #444] ; (800685c ) - 80066a0: 6cda ldr r2, [r3, #76] ; 0x4c - 80066a2: 23c0 movs r3, #192 ; 0xc0 - 80066a4: 011b lsls r3, r3, #4 - 80066a6: 4013 ands r3, r2 - 80066a8: 2280 movs r2, #128 ; 0x80 - 80066aa: 00d2 lsls r2, r2, #3 - 80066ac: 4293 cmp r3, r2 - 80066ae: d01f beq.n 80066f0 - 80066b0: 2280 movs r2, #128 ; 0x80 - 80066b2: 00d2 lsls r2, r2, #3 - 80066b4: 4293 cmp r3, r2 - 80066b6: d802 bhi.n 80066be - 80066b8: 2b00 cmp r3, #0 - 80066ba: d009 beq.n 80066d0 - 80066bc: e028 b.n 8006710 - 80066be: 2280 movs r2, #128 ; 0x80 - 80066c0: 0112 lsls r2, r2, #4 - 80066c2: 4293 cmp r3, r2 - 80066c4: d00c beq.n 80066e0 - 80066c6: 22c0 movs r2, #192 ; 0xc0 - 80066c8: 0112 lsls r2, r2, #4 - 80066ca: 4293 cmp r3, r2 - 80066cc: d018 beq.n 8006700 - 80066ce: e01f b.n 8006710 - 80066d0: 231b movs r3, #27 - 80066d2: 2218 movs r2, #24 - 80066d4: 4694 mov ip, r2 - 80066d6: 44bc add ip, r7 - 80066d8: 4463 add r3, ip - 80066da: 2200 movs r2, #0 - 80066dc: 701a strb r2, [r3, #0] - 80066de: e027 b.n 8006730 - 80066e0: 231b movs r3, #27 - 80066e2: 2218 movs r2, #24 - 80066e4: 4694 mov ip, r2 - 80066e6: 44bc add ip, r7 - 80066e8: 4463 add r3, ip - 80066ea: 2202 movs r2, #2 - 80066ec: 701a strb r2, [r3, #0] - 80066ee: e01f b.n 8006730 - 80066f0: 231b movs r3, #27 - 80066f2: 2218 movs r2, #24 - 80066f4: 4694 mov ip, r2 - 80066f6: 44bc add ip, r7 - 80066f8: 4463 add r3, ip - 80066fa: 2204 movs r2, #4 - 80066fc: 701a strb r2, [r3, #0] - 80066fe: e017 b.n 8006730 - 8006700: 231b movs r3, #27 - 8006702: 2218 movs r2, #24 - 8006704: 4694 mov ip, r2 - 8006706: 44bc add ip, r7 - 8006708: 4463 add r3, ip - 800670a: 2208 movs r2, #8 - 800670c: 701a strb r2, [r3, #0] - 800670e: e00f b.n 8006730 - 8006710: 231b movs r3, #27 - 8006712: 2218 movs r2, #24 - 8006714: 4694 mov ip, r2 - 8006716: 44bc add ip, r7 - 8006718: 4463 add r3, ip - 800671a: 2210 movs r2, #16 - 800671c: 701a strb r2, [r3, #0] - 800671e: 46c0 nop ; (mov r8, r8) - 8006720: e006 b.n 8006730 - 8006722: 231b movs r3, #27 - 8006724: 2218 movs r2, #24 - 8006726: 4694 mov ip, r2 - 8006728: 44bc add ip, r7 - 800672a: 4463 add r3, ip - 800672c: 2210 movs r2, #16 - 800672e: 701a strb r2, [r3, #0] - - /* Check LPUART instance */ - if (UART_INSTANCE_LOWPOWER(huart)) - 8006730: 69fb ldr r3, [r7, #28] - 8006732: 681b ldr r3, [r3, #0] - 8006734: 4a46 ldr r2, [pc, #280] ; (8006850 ) - 8006736: 4293 cmp r3, r2 - 8006738: d000 beq.n 800673c - 800673a: e09f b.n 800687c - { - /* Retrieve frequency clock */ - switch (clocksource) + 8006678: e078 b.n 800676c + 800667a: 231b movs r3, #27 + 800667c: 2218 movs r2, #24 + 800667e: 4694 mov ip, r2 + 8006680: 44bc add ip, r7 + 8006682: 4463 add r3, ip + 8006684: 2208 movs r2, #8 + 8006686: 701a strb r2, [r3, #0] + 8006688: e070 b.n 800676c + 800668a: 231b movs r3, #27 + 800668c: 2218 movs r2, #24 + 800668e: 4694 mov ip, r2 + 8006690: 44bc add ip, r7 + 8006692: 4463 add r3, ip + 8006694: 2210 movs r2, #16 + 8006696: 701a strb r2, [r3, #0] + 8006698: 46c0 nop ; (mov r8, r8) + 800669a: e067 b.n 800676c + 800669c: 69fb ldr r3, [r7, #28] + 800669e: 681b ldr r3, [r3, #0] + 80066a0: 4a7f ldr r2, [pc, #508] ; (80068a0 ) + 80066a2: 4293 cmp r3, r2 + 80066a4: d107 bne.n 80066b6 + 80066a6: 231b movs r3, #27 + 80066a8: 2218 movs r2, #24 + 80066aa: 4694 mov ip, r2 + 80066ac: 44bc add ip, r7 + 80066ae: 4463 add r3, ip + 80066b0: 2200 movs r2, #0 + 80066b2: 701a strb r2, [r3, #0] + 80066b4: e05a b.n 800676c + 80066b6: 69fb ldr r3, [r7, #28] + 80066b8: 681b ldr r3, [r3, #0] + 80066ba: 4a7a ldr r2, [pc, #488] ; (80068a4 ) + 80066bc: 4293 cmp r3, r2 + 80066be: d107 bne.n 80066d0 + 80066c0: 231b movs r3, #27 + 80066c2: 2218 movs r2, #24 + 80066c4: 4694 mov ip, r2 + 80066c6: 44bc add ip, r7 + 80066c8: 4463 add r3, ip + 80066ca: 2200 movs r2, #0 + 80066cc: 701a strb r2, [r3, #0] + 80066ce: e04d b.n 800676c + 80066d0: 69fb ldr r3, [r7, #28] + 80066d2: 681b ldr r3, [r3, #0] + 80066d4: 4a6d ldr r2, [pc, #436] ; (800688c ) + 80066d6: 4293 cmp r3, r2 + 80066d8: d141 bne.n 800675e + 80066da: 4b6f ldr r3, [pc, #444] ; (8006898 ) + 80066dc: 6cda ldr r2, [r3, #76] ; 0x4c + 80066de: 23c0 movs r3, #192 ; 0xc0 + 80066e0: 011b lsls r3, r3, #4 + 80066e2: 4013 ands r3, r2 + 80066e4: 2280 movs r2, #128 ; 0x80 + 80066e6: 00d2 lsls r2, r2, #3 + 80066e8: 4293 cmp r3, r2 + 80066ea: d01f beq.n 800672c + 80066ec: 2280 movs r2, #128 ; 0x80 + 80066ee: 00d2 lsls r2, r2, #3 + 80066f0: 4293 cmp r3, r2 + 80066f2: d802 bhi.n 80066fa + 80066f4: 2b00 cmp r3, #0 + 80066f6: d009 beq.n 800670c + 80066f8: e028 b.n 800674c + 80066fa: 2280 movs r2, #128 ; 0x80 + 80066fc: 0112 lsls r2, r2, #4 + 80066fe: 4293 cmp r3, r2 + 8006700: d00c beq.n 800671c + 8006702: 22c0 movs r2, #192 ; 0xc0 + 8006704: 0112 lsls r2, r2, #4 + 8006706: 4293 cmp r3, r2 + 8006708: d018 beq.n 800673c + 800670a: e01f b.n 800674c + 800670c: 231b movs r3, #27 + 800670e: 2218 movs r2, #24 + 8006710: 4694 mov ip, r2 + 8006712: 44bc add ip, r7 + 8006714: 4463 add r3, ip + 8006716: 2200 movs r2, #0 + 8006718: 701a strb r2, [r3, #0] + 800671a: e027 b.n 800676c + 800671c: 231b movs r3, #27 + 800671e: 2218 movs r2, #24 + 8006720: 4694 mov ip, r2 + 8006722: 44bc add ip, r7 + 8006724: 4463 add r3, ip + 8006726: 2202 movs r2, #2 + 8006728: 701a strb r2, [r3, #0] + 800672a: e01f b.n 800676c + 800672c: 231b movs r3, #27 + 800672e: 2218 movs r2, #24 + 8006730: 4694 mov ip, r2 + 8006732: 44bc add ip, r7 + 8006734: 4463 add r3, ip + 8006736: 2204 movs r2, #4 + 8006738: 701a strb r2, [r3, #0] + 800673a: e017 b.n 800676c 800673c: 231b movs r3, #27 800673e: 2218 movs r2, #24 8006740: 4694 mov ip, r2 8006742: 44bc add ip, r7 8006744: 4463 add r3, ip - 8006746: 781b ldrb r3, [r3, #0] - 8006748: 2b02 cmp r3, #2 - 800674a: d00d beq.n 8006768 - 800674c: dc02 bgt.n 8006754 - 800674e: 2b00 cmp r3, #0 - 8006750: d005 beq.n 800675e - 8006752: e01d b.n 8006790 - 8006754: 2b04 cmp r3, #4 - 8006756: d012 beq.n 800677e - 8006758: 2b08 cmp r3, #8 - 800675a: d015 beq.n 8006788 - 800675c: e018 b.n 8006790 + 8006746: 2208 movs r2, #8 + 8006748: 701a strb r2, [r3, #0] + 800674a: e00f b.n 800676c + 800674c: 231b movs r3, #27 + 800674e: 2218 movs r2, #24 + 8006750: 4694 mov ip, r2 + 8006752: 44bc add ip, r7 + 8006754: 4463 add r3, ip + 8006756: 2210 movs r2, #16 + 8006758: 701a strb r2, [r3, #0] + 800675a: 46c0 nop ; (mov r8, r8) + 800675c: e006 b.n 800676c + 800675e: 231b movs r3, #27 + 8006760: 2218 movs r2, #24 + 8006762: 4694 mov ip, r2 + 8006764: 44bc add ip, r7 + 8006766: 4463 add r3, ip + 8006768: 2210 movs r2, #16 + 800676a: 701a strb r2, [r3, #0] + + /* Check LPUART instance */ + if (UART_INSTANCE_LOWPOWER(huart)) + 800676c: 69fb ldr r3, [r7, #28] + 800676e: 681b ldr r3, [r3, #0] + 8006770: 4a46 ldr r2, [pc, #280] ; (800688c ) + 8006772: 4293 cmp r3, r2 + 8006774: d000 beq.n 8006778 + 8006776: e09f b.n 80068b8 + { + /* Retrieve frequency clock */ + switch (clocksource) + 8006778: 231b movs r3, #27 + 800677a: 2218 movs r2, #24 + 800677c: 4694 mov ip, r2 + 800677e: 44bc add ip, r7 + 8006780: 4463 add r3, ip + 8006782: 781b ldrb r3, [r3, #0] + 8006784: 2b02 cmp r3, #2 + 8006786: d00d beq.n 80067a4 + 8006788: dc02 bgt.n 8006790 + 800678a: 2b00 cmp r3, #0 + 800678c: d005 beq.n 800679a + 800678e: e01d b.n 80067cc + 8006790: 2b04 cmp r3, #4 + 8006792: d012 beq.n 80067ba + 8006794: 2b08 cmp r3, #8 + 8006796: d015 beq.n 80067c4 + 8006798: e018 b.n 80067cc { case UART_CLOCKSOURCE_PCLK1: pclk = HAL_RCC_GetPCLK1Freq(); - 800675e: f7fe ffd5 bl 800570c - 8006762: 0003 movs r3, r0 - 8006764: 62fb str r3, [r7, #44] ; 0x2c + 800679a: f7fe ffd5 bl 8005748 + 800679e: 0003 movs r3, r0 + 80067a0: 62fb str r3, [r7, #44] ; 0x2c break; - 8006766: e01d b.n 80067a4 + 80067a2: e01d b.n 80067e0 case UART_CLOCKSOURCE_HSI: if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIDIV) != 0U) - 8006768: 4b3c ldr r3, [pc, #240] ; (800685c ) - 800676a: 681b ldr r3, [r3, #0] - 800676c: 2210 movs r2, #16 - 800676e: 4013 ands r3, r2 - 8006770: d002 beq.n 8006778 + 80067a4: 4b3c ldr r3, [pc, #240] ; (8006898 ) + 80067a6: 681b ldr r3, [r3, #0] + 80067a8: 2210 movs r2, #16 + 80067aa: 4013 ands r3, r2 + 80067ac: d002 beq.n 80067b4 { pclk = (uint32_t)(HSI_VALUE >> 2U); - 8006772: 4b3e ldr r3, [pc, #248] ; (800686c ) - 8006774: 62fb str r3, [r7, #44] ; 0x2c + 80067ae: 4b3e ldr r3, [pc, #248] ; (80068a8 ) + 80067b0: 62fb str r3, [r7, #44] ; 0x2c } else { pclk = (uint32_t) HSI_VALUE; } break; - 8006776: e015 b.n 80067a4 + 80067b2: e015 b.n 80067e0 pclk = (uint32_t) HSI_VALUE; - 8006778: 4b3d ldr r3, [pc, #244] ; (8006870 ) - 800677a: 62fb str r3, [r7, #44] ; 0x2c + 80067b4: 4b3d ldr r3, [pc, #244] ; (80068ac ) + 80067b6: 62fb str r3, [r7, #44] ; 0x2c break; - 800677c: e012 b.n 80067a4 + 80067b8: e012 b.n 80067e0 case UART_CLOCKSOURCE_SYSCLK: pclk = HAL_RCC_GetSysClockFreq(); - 800677e: f7fe ff19 bl 80055b4 - 8006782: 0003 movs r3, r0 - 8006784: 62fb str r3, [r7, #44] ; 0x2c + 80067ba: f7fe ff19 bl 80055f0 + 80067be: 0003 movs r3, r0 + 80067c0: 62fb str r3, [r7, #44] ; 0x2c break; - 8006786: e00d b.n 80067a4 + 80067c2: e00d b.n 80067e0 case UART_CLOCKSOURCE_LSE: pclk = (uint32_t) LSE_VALUE; - 8006788: 2380 movs r3, #128 ; 0x80 - 800678a: 021b lsls r3, r3, #8 - 800678c: 62fb str r3, [r7, #44] ; 0x2c + 80067c4: 2380 movs r3, #128 ; 0x80 + 80067c6: 021b lsls r3, r3, #8 + 80067c8: 62fb str r3, [r7, #44] ; 0x2c break; - 800678e: e009 b.n 80067a4 + 80067ca: e009 b.n 80067e0 default: pclk = 0U; - 8006790: 2300 movs r3, #0 - 8006792: 62fb str r3, [r7, #44] ; 0x2c + 80067cc: 2300 movs r3, #0 + 80067ce: 62fb str r3, [r7, #44] ; 0x2c ret = HAL_ERROR; - 8006794: 231a movs r3, #26 - 8006796: 2218 movs r2, #24 - 8006798: 4694 mov ip, r2 - 800679a: 44bc add ip, r7 - 800679c: 4463 add r3, ip - 800679e: 2201 movs r2, #1 - 80067a0: 701a strb r2, [r3, #0] + 80067d0: 231a movs r3, #26 + 80067d2: 2218 movs r2, #24 + 80067d4: 4694 mov ip, r2 + 80067d6: 44bc add ip, r7 + 80067d8: 4463 add r3, ip + 80067da: 2201 movs r2, #1 + 80067dc: 701a strb r2, [r3, #0] break; - 80067a2: 46c0 nop ; (mov r8, r8) + 80067de: 46c0 nop ; (mov r8, r8) } /* If proper clock source reported */ if (pclk != 0U) - 80067a4: 6afb ldr r3, [r7, #44] ; 0x2c - 80067a6: 2b00 cmp r3, #0 - 80067a8: d100 bne.n 80067ac - 80067aa: e145 b.n 8006a38 + 80067e0: 6afb ldr r3, [r7, #44] ; 0x2c + 80067e2: 2b00 cmp r3, #0 + 80067e4: d100 bne.n 80067e8 + 80067e6: e145 b.n 8006a74 { /* No Prescaler applicable */ /* Ensure that Frequency clock is in the range [3 * baudrate, 4096 * baudrate] */ if ((pclk < (3U * huart->Init.BaudRate)) || - 80067ac: 69fb ldr r3, [r7, #28] - 80067ae: 685a ldr r2, [r3, #4] - 80067b0: 0013 movs r3, r2 - 80067b2: 005b lsls r3, r3, #1 - 80067b4: 189a adds r2, r3, r2 - 80067b6: 6afb ldr r3, [r7, #44] ; 0x2c - 80067b8: 429a cmp r2, r3 - 80067ba: d805 bhi.n 80067c8 + 80067e8: 69fb ldr r3, [r7, #28] + 80067ea: 685a ldr r2, [r3, #4] + 80067ec: 0013 movs r3, r2 + 80067ee: 005b lsls r3, r3, #1 + 80067f0: 189a adds r2, r3, r2 + 80067f2: 6afb ldr r3, [r7, #44] ; 0x2c + 80067f4: 429a cmp r2, r3 + 80067f6: d805 bhi.n 8006804 (pclk > (4096U * huart->Init.BaudRate))) - 80067bc: 69fb ldr r3, [r7, #28] - 80067be: 685b ldr r3, [r3, #4] - 80067c0: 031a lsls r2, r3, #12 + 80067f8: 69fb ldr r3, [r7, #28] + 80067fa: 685b ldr r3, [r3, #4] + 80067fc: 031a lsls r2, r3, #12 if ((pclk < (3U * huart->Init.BaudRate)) || - 80067c2: 6afb ldr r3, [r7, #44] ; 0x2c - 80067c4: 429a cmp r2, r3 - 80067c6: d207 bcs.n 80067d8 + 80067fe: 6afb ldr r3, [r7, #44] ; 0x2c + 8006800: 429a cmp r2, r3 + 8006802: d207 bcs.n 8006814 { ret = HAL_ERROR; - 80067c8: 231a movs r3, #26 - 80067ca: 2218 movs r2, #24 - 80067cc: 4694 mov ip, r2 - 80067ce: 44bc add ip, r7 - 80067d0: 4463 add r3, ip - 80067d2: 2201 movs r2, #1 - 80067d4: 701a strb r2, [r3, #0] - 80067d6: e12f b.n 8006a38 + 8006804: 231a movs r3, #26 + 8006806: 2218 movs r2, #24 + 8006808: 4694 mov ip, r2 + 800680a: 44bc add ip, r7 + 800680c: 4463 add r3, ip + 800680e: 2201 movs r2, #1 + 8006810: 701a strb r2, [r3, #0] + 8006812: e12f b.n 8006a74 } else { usartdiv = (uint32_t)(UART_DIV_LPUART(pclk, huart->Init.BaudRate)); - 80067d8: 6afb ldr r3, [r7, #44] ; 0x2c - 80067da: 613b str r3, [r7, #16] - 80067dc: 2300 movs r3, #0 - 80067de: 617b str r3, [r7, #20] - 80067e0: 6939 ldr r1, [r7, #16] - 80067e2: 697a ldr r2, [r7, #20] - 80067e4: 000b movs r3, r1 - 80067e6: 0e1b lsrs r3, r3, #24 - 80067e8: 0010 movs r0, r2 - 80067ea: 0205 lsls r5, r0, #8 - 80067ec: 431d orrs r5, r3 - 80067ee: 000b movs r3, r1 - 80067f0: 021c lsls r4, r3, #8 - 80067f2: 69fb ldr r3, [r7, #28] - 80067f4: 685b ldr r3, [r3, #4] - 80067f6: 085b lsrs r3, r3, #1 - 80067f8: 60bb str r3, [r7, #8] - 80067fa: 2300 movs r3, #0 - 80067fc: 60fb str r3, [r7, #12] - 80067fe: 68b8 ldr r0, [r7, #8] - 8006800: 68f9 ldr r1, [r7, #12] - 8006802: 1900 adds r0, r0, r4 - 8006804: 4169 adcs r1, r5 - 8006806: 69fb ldr r3, [r7, #28] - 8006808: 685b ldr r3, [r3, #4] - 800680a: 603b str r3, [r7, #0] - 800680c: 2300 movs r3, #0 - 800680e: 607b str r3, [r7, #4] - 8006810: 683a ldr r2, [r7, #0] - 8006812: 687b ldr r3, [r7, #4] - 8006814: f7f9 fd7c bl 8000310 <__aeabi_uldivmod> - 8006818: 0003 movs r3, r0 - 800681a: 000c movs r4, r1 - 800681c: 62bb str r3, [r7, #40] ; 0x28 + 8006814: 6afb ldr r3, [r7, #44] ; 0x2c + 8006816: 613b str r3, [r7, #16] + 8006818: 2300 movs r3, #0 + 800681a: 617b str r3, [r7, #20] + 800681c: 6939 ldr r1, [r7, #16] + 800681e: 697a ldr r2, [r7, #20] + 8006820: 000b movs r3, r1 + 8006822: 0e1b lsrs r3, r3, #24 + 8006824: 0010 movs r0, r2 + 8006826: 0205 lsls r5, r0, #8 + 8006828: 431d orrs r5, r3 + 800682a: 000b movs r3, r1 + 800682c: 021c lsls r4, r3, #8 + 800682e: 69fb ldr r3, [r7, #28] + 8006830: 685b ldr r3, [r3, #4] + 8006832: 085b lsrs r3, r3, #1 + 8006834: 60bb str r3, [r7, #8] + 8006836: 2300 movs r3, #0 + 8006838: 60fb str r3, [r7, #12] + 800683a: 68b8 ldr r0, [r7, #8] + 800683c: 68f9 ldr r1, [r7, #12] + 800683e: 1900 adds r0, r0, r4 + 8006840: 4169 adcs r1, r5 + 8006842: 69fb ldr r3, [r7, #28] + 8006844: 685b ldr r3, [r3, #4] + 8006846: 603b str r3, [r7, #0] + 8006848: 2300 movs r3, #0 + 800684a: 607b str r3, [r7, #4] + 800684c: 683a ldr r2, [r7, #0] + 800684e: 687b ldr r3, [r7, #4] + 8006850: f7f9 fd5e bl 8000310 <__aeabi_uldivmod> + 8006854: 0003 movs r3, r0 + 8006856: 000c movs r4, r1 + 8006858: 62bb str r3, [r7, #40] ; 0x28 if ((usartdiv >= LPUART_BRR_MIN) && (usartdiv <= LPUART_BRR_MAX)) - 800681e: 6abb ldr r3, [r7, #40] ; 0x28 - 8006820: 4a14 ldr r2, [pc, #80] ; (8006874 ) - 8006822: 4293 cmp r3, r2 - 8006824: d908 bls.n 8006838 - 8006826: 6abb ldr r3, [r7, #40] ; 0x28 - 8006828: 4a13 ldr r2, [pc, #76] ; (8006878 ) - 800682a: 4293 cmp r3, r2 - 800682c: d804 bhi.n 8006838 + 800685a: 6abb ldr r3, [r7, #40] ; 0x28 + 800685c: 4a14 ldr r2, [pc, #80] ; (80068b0 ) + 800685e: 4293 cmp r3, r2 + 8006860: d908 bls.n 8006874 + 8006862: 6abb ldr r3, [r7, #40] ; 0x28 + 8006864: 4a13 ldr r2, [pc, #76] ; (80068b4 ) + 8006866: 4293 cmp r3, r2 + 8006868: d804 bhi.n 8006874 { huart->Instance->BRR = usartdiv; - 800682e: 69fb ldr r3, [r7, #28] - 8006830: 681b ldr r3, [r3, #0] - 8006832: 6aba ldr r2, [r7, #40] ; 0x28 - 8006834: 60da str r2, [r3, #12] - 8006836: e0ff b.n 8006a38 + 800686a: 69fb ldr r3, [r7, #28] + 800686c: 681b ldr r3, [r3, #0] + 800686e: 6aba ldr r2, [r7, #40] ; 0x28 + 8006870: 60da str r2, [r3, #12] + 8006872: e0ff b.n 8006a74 } else { ret = HAL_ERROR; - 8006838: 231a movs r3, #26 - 800683a: 2218 movs r2, #24 - 800683c: 4694 mov ip, r2 - 800683e: 44bc add ip, r7 - 8006840: 4463 add r3, ip - 8006842: 2201 movs r2, #1 - 8006844: 701a strb r2, [r3, #0] - 8006846: e0f7 b.n 8006a38 - 8006848: efff69f3 .word 0xefff69f3 - 800684c: ffffcfff .word 0xffffcfff - 8006850: 40004800 .word 0x40004800 - 8006854: fffff4ff .word 0xfffff4ff - 8006858: 40013800 .word 0x40013800 - 800685c: 40021000 .word 0x40021000 - 8006860: 40004400 .word 0x40004400 - 8006864: 40004c00 .word 0x40004c00 - 8006868: 40005000 .word 0x40005000 - 800686c: 003d0900 .word 0x003d0900 - 8006870: 00f42400 .word 0x00f42400 - 8006874: 000002ff .word 0x000002ff - 8006878: 000fffff .word 0x000fffff + 8006874: 231a movs r3, #26 + 8006876: 2218 movs r2, #24 + 8006878: 4694 mov ip, r2 + 800687a: 44bc add ip, r7 + 800687c: 4463 add r3, ip + 800687e: 2201 movs r2, #1 + 8006880: 701a strb r2, [r3, #0] + 8006882: e0f7 b.n 8006a74 + 8006884: efff69f3 .word 0xefff69f3 + 8006888: ffffcfff .word 0xffffcfff + 800688c: 40004800 .word 0x40004800 + 8006890: fffff4ff .word 0xfffff4ff + 8006894: 40013800 .word 0x40013800 + 8006898: 40021000 .word 0x40021000 + 800689c: 40004400 .word 0x40004400 + 80068a0: 40004c00 .word 0x40004c00 + 80068a4: 40005000 .word 0x40005000 + 80068a8: 003d0900 .word 0x003d0900 + 80068ac: 00f42400 .word 0x00f42400 + 80068b0: 000002ff .word 0x000002ff + 80068b4: 000fffff .word 0x000fffff } } /* if ( (pclk < (3 * huart->Init.BaudRate) ) || (pclk > (4096 * huart->Init.BaudRate) )) */ } /* if (pclk != 0) */ } /* Check UART Over Sampling to set Baud Rate Register */ else if (huart->Init.OverSampling == UART_OVERSAMPLING_8) - 800687c: 69fb ldr r3, [r7, #28] - 800687e: 69da ldr r2, [r3, #28] - 8006880: 2380 movs r3, #128 ; 0x80 - 8006882: 021b lsls r3, r3, #8 - 8006884: 429a cmp r2, r3 - 8006886: d000 beq.n 800688a - 8006888: e07d b.n 8006986 + 80068b8: 69fb ldr r3, [r7, #28] + 80068ba: 69da ldr r2, [r3, #28] + 80068bc: 2380 movs r3, #128 ; 0x80 + 80068be: 021b lsls r3, r3, #8 + 80068c0: 429a cmp r2, r3 + 80068c2: d000 beq.n 80068c6 + 80068c4: e07d b.n 80069c2 { switch (clocksource) - 800688a: 231b movs r3, #27 - 800688c: 2218 movs r2, #24 - 800688e: 4694 mov ip, r2 - 8006890: 44bc add ip, r7 - 8006892: 4463 add r3, ip - 8006894: 781b ldrb r3, [r3, #0] - 8006896: 2b08 cmp r3, #8 - 8006898: d822 bhi.n 80068e0 - 800689a: 009a lsls r2, r3, #2 - 800689c: 4b6e ldr r3, [pc, #440] ; (8006a58 ) - 800689e: 18d3 adds r3, r2, r3 - 80068a0: 681b ldr r3, [r3, #0] - 80068a2: 469f mov pc, r3 + 80068c6: 231b movs r3, #27 + 80068c8: 2218 movs r2, #24 + 80068ca: 4694 mov ip, r2 + 80068cc: 44bc add ip, r7 + 80068ce: 4463 add r3, ip + 80068d0: 781b ldrb r3, [r3, #0] + 80068d2: 2b08 cmp r3, #8 + 80068d4: d822 bhi.n 800691c + 80068d6: 009a lsls r2, r3, #2 + 80068d8: 4b6e ldr r3, [pc, #440] ; (8006a94 ) + 80068da: 18d3 adds r3, r2, r3 + 80068dc: 681b ldr r3, [r3, #0] + 80068de: 469f mov pc, r3 { case UART_CLOCKSOURCE_PCLK1: pclk = HAL_RCC_GetPCLK1Freq(); - 80068a4: f7fe ff32 bl 800570c - 80068a8: 0003 movs r3, r0 - 80068aa: 62fb str r3, [r7, #44] ; 0x2c + 80068e0: f7fe ff32 bl 8005748 + 80068e4: 0003 movs r3, r0 + 80068e6: 62fb str r3, [r7, #44] ; 0x2c break; - 80068ac: e022 b.n 80068f4 + 80068e8: e022 b.n 8006930 case UART_CLOCKSOURCE_PCLK2: pclk = HAL_RCC_GetPCLK2Freq(); - 80068ae: f7fe ff43 bl 8005738 - 80068b2: 0003 movs r3, r0 - 80068b4: 62fb str r3, [r7, #44] ; 0x2c + 80068ea: f7fe ff43 bl 8005774 + 80068ee: 0003 movs r3, r0 + 80068f0: 62fb str r3, [r7, #44] ; 0x2c break; - 80068b6: e01d b.n 80068f4 + 80068f2: e01d b.n 8006930 case UART_CLOCKSOURCE_HSI: if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIDIV) != 0U) - 80068b8: 4b68 ldr r3, [pc, #416] ; (8006a5c ) - 80068ba: 681b ldr r3, [r3, #0] - 80068bc: 2210 movs r2, #16 - 80068be: 4013 ands r3, r2 - 80068c0: d002 beq.n 80068c8 + 80068f4: 4b68 ldr r3, [pc, #416] ; (8006a98 ) + 80068f6: 681b ldr r3, [r3, #0] + 80068f8: 2210 movs r2, #16 + 80068fa: 4013 ands r3, r2 + 80068fc: d002 beq.n 8006904 { pclk = (uint32_t)(HSI_VALUE >> 2U); - 80068c2: 4b67 ldr r3, [pc, #412] ; (8006a60 ) - 80068c4: 62fb str r3, [r7, #44] ; 0x2c + 80068fe: 4b67 ldr r3, [pc, #412] ; (8006a9c ) + 8006900: 62fb str r3, [r7, #44] ; 0x2c } else { pclk = (uint32_t) HSI_VALUE; } break; - 80068c6: e015 b.n 80068f4 + 8006902: e015 b.n 8006930 pclk = (uint32_t) HSI_VALUE; - 80068c8: 4b66 ldr r3, [pc, #408] ; (8006a64 ) - 80068ca: 62fb str r3, [r7, #44] ; 0x2c + 8006904: 4b66 ldr r3, [pc, #408] ; (8006aa0 ) + 8006906: 62fb str r3, [r7, #44] ; 0x2c break; - 80068cc: e012 b.n 80068f4 + 8006908: e012 b.n 8006930 case UART_CLOCKSOURCE_SYSCLK: pclk = HAL_RCC_GetSysClockFreq(); - 80068ce: f7fe fe71 bl 80055b4 - 80068d2: 0003 movs r3, r0 - 80068d4: 62fb str r3, [r7, #44] ; 0x2c + 800690a: f7fe fe71 bl 80055f0 + 800690e: 0003 movs r3, r0 + 8006910: 62fb str r3, [r7, #44] ; 0x2c break; - 80068d6: e00d b.n 80068f4 + 8006912: e00d b.n 8006930 case UART_CLOCKSOURCE_LSE: pclk = (uint32_t) LSE_VALUE; - 80068d8: 2380 movs r3, #128 ; 0x80 - 80068da: 021b lsls r3, r3, #8 - 80068dc: 62fb str r3, [r7, #44] ; 0x2c + 8006914: 2380 movs r3, #128 ; 0x80 + 8006916: 021b lsls r3, r3, #8 + 8006918: 62fb str r3, [r7, #44] ; 0x2c break; - 80068de: e009 b.n 80068f4 + 800691a: e009 b.n 8006930 default: pclk = 0U; - 80068e0: 2300 movs r3, #0 - 80068e2: 62fb str r3, [r7, #44] ; 0x2c + 800691c: 2300 movs r3, #0 + 800691e: 62fb str r3, [r7, #44] ; 0x2c ret = HAL_ERROR; - 80068e4: 231a movs r3, #26 - 80068e6: 2218 movs r2, #24 - 80068e8: 4694 mov ip, r2 - 80068ea: 44bc add ip, r7 - 80068ec: 4463 add r3, ip - 80068ee: 2201 movs r2, #1 - 80068f0: 701a strb r2, [r3, #0] + 8006920: 231a movs r3, #26 + 8006922: 2218 movs r2, #24 + 8006924: 4694 mov ip, r2 + 8006926: 44bc add ip, r7 + 8006928: 4463 add r3, ip + 800692a: 2201 movs r2, #1 + 800692c: 701a strb r2, [r3, #0] break; - 80068f2: 46c0 nop ; (mov r8, r8) + 800692e: 46c0 nop ; (mov r8, r8) } /* USARTDIV must be greater than or equal to 0d16 */ if (pclk != 0U) - 80068f4: 6afb ldr r3, [r7, #44] ; 0x2c - 80068f6: 2b00 cmp r3, #0 - 80068f8: d100 bne.n 80068fc - 80068fa: e09d b.n 8006a38 + 8006930: 6afb ldr r3, [r7, #44] ; 0x2c + 8006932: 2b00 cmp r3, #0 + 8006934: d100 bne.n 8006938 + 8006936: e09d b.n 8006a74 { usartdiv = (uint16_t)(UART_DIV_SAMPLING8(pclk, huart->Init.BaudRate)); - 80068fc: 6afb ldr r3, [r7, #44] ; 0x2c - 80068fe: 005a lsls r2, r3, #1 - 8006900: 69fb ldr r3, [r7, #28] - 8006902: 685b ldr r3, [r3, #4] - 8006904: 085b lsrs r3, r3, #1 - 8006906: 18d2 adds r2, r2, r3 - 8006908: 69fb ldr r3, [r7, #28] - 800690a: 685b ldr r3, [r3, #4] - 800690c: 0019 movs r1, r3 - 800690e: 0010 movs r0, r2 - 8006910: f7f9 fbfa bl 8000108 <__udivsi3> - 8006914: 0003 movs r3, r0 - 8006916: b29b uxth r3, r3 - 8006918: 62bb str r3, [r7, #40] ; 0x28 + 8006938: 6afb ldr r3, [r7, #44] ; 0x2c + 800693a: 005a lsls r2, r3, #1 + 800693c: 69fb ldr r3, [r7, #28] + 800693e: 685b ldr r3, [r3, #4] + 8006940: 085b lsrs r3, r3, #1 + 8006942: 18d2 adds r2, r2, r3 + 8006944: 69fb ldr r3, [r7, #28] + 8006946: 685b ldr r3, [r3, #4] + 8006948: 0019 movs r1, r3 + 800694a: 0010 movs r0, r2 + 800694c: f7f9 fbdc bl 8000108 <__udivsi3> + 8006950: 0003 movs r3, r0 + 8006952: b29b uxth r3, r3 + 8006954: 62bb str r3, [r7, #40] ; 0x28 if ((usartdiv >= UART_BRR_MIN) && (usartdiv <= UART_BRR_MAX)) - 800691a: 6abb ldr r3, [r7, #40] ; 0x28 - 800691c: 2b0f cmp r3, #15 - 800691e: d92a bls.n 8006976 - 8006920: 6abb ldr r3, [r7, #40] ; 0x28 - 8006922: 4a51 ldr r2, [pc, #324] ; (8006a68 ) - 8006924: 4293 cmp r3, r2 - 8006926: d826 bhi.n 8006976 + 8006956: 6abb ldr r3, [r7, #40] ; 0x28 + 8006958: 2b0f cmp r3, #15 + 800695a: d92a bls.n 80069b2 + 800695c: 6abb ldr r3, [r7, #40] ; 0x28 + 800695e: 4a51 ldr r2, [pc, #324] ; (8006aa4 ) + 8006960: 4293 cmp r3, r2 + 8006962: d826 bhi.n 80069b2 { brrtemp = (uint16_t)(usartdiv & 0xFFF0U); - 8006928: 6abb ldr r3, [r7, #40] ; 0x28 - 800692a: b29a uxth r2, r3 - 800692c: 230e movs r3, #14 - 800692e: 2118 movs r1, #24 - 8006930: 468c mov ip, r1 - 8006932: 44bc add ip, r7 - 8006934: 4463 add r3, ip - 8006936: 210f movs r1, #15 - 8006938: 438a bics r2, r1 - 800693a: 801a strh r2, [r3, #0] + 8006964: 6abb ldr r3, [r7, #40] ; 0x28 + 8006966: b29a uxth r2, r3 + 8006968: 230e movs r3, #14 + 800696a: 2118 movs r1, #24 + 800696c: 468c mov ip, r1 + 800696e: 44bc add ip, r7 + 8006970: 4463 add r3, ip + 8006972: 210f movs r1, #15 + 8006974: 438a bics r2, r1 + 8006976: 801a strh r2, [r3, #0] brrtemp |= (uint16_t)((usartdiv & (uint16_t)0x000FU) >> 1U); - 800693c: 6abb ldr r3, [r7, #40] ; 0x28 - 800693e: 085b lsrs r3, r3, #1 - 8006940: b29b uxth r3, r3 - 8006942: 2207 movs r2, #7 - 8006944: 4013 ands r3, r2 - 8006946: b299 uxth r1, r3 - 8006948: 230e movs r3, #14 - 800694a: 2218 movs r2, #24 - 800694c: 4694 mov ip, r2 - 800694e: 44bc add ip, r7 - 8006950: 4463 add r3, ip - 8006952: 220e movs r2, #14 - 8006954: 2018 movs r0, #24 - 8006956: 4684 mov ip, r0 - 8006958: 44bc add ip, r7 - 800695a: 4462 add r2, ip - 800695c: 8812 ldrh r2, [r2, #0] - 800695e: 430a orrs r2, r1 - 8006960: 801a strh r2, [r3, #0] + 8006978: 6abb ldr r3, [r7, #40] ; 0x28 + 800697a: 085b lsrs r3, r3, #1 + 800697c: b29b uxth r3, r3 + 800697e: 2207 movs r2, #7 + 8006980: 4013 ands r3, r2 + 8006982: b299 uxth r1, r3 + 8006984: 230e movs r3, #14 + 8006986: 2218 movs r2, #24 + 8006988: 4694 mov ip, r2 + 800698a: 44bc add ip, r7 + 800698c: 4463 add r3, ip + 800698e: 220e movs r2, #14 + 8006990: 2018 movs r0, #24 + 8006992: 4684 mov ip, r0 + 8006994: 44bc add ip, r7 + 8006996: 4462 add r2, ip + 8006998: 8812 ldrh r2, [r2, #0] + 800699a: 430a orrs r2, r1 + 800699c: 801a strh r2, [r3, #0] huart->Instance->BRR = brrtemp; - 8006962: 69fb ldr r3, [r7, #28] - 8006964: 681b ldr r3, [r3, #0] - 8006966: 220e movs r2, #14 - 8006968: 2118 movs r1, #24 - 800696a: 468c mov ip, r1 - 800696c: 44bc add ip, r7 - 800696e: 4462 add r2, ip - 8006970: 8812 ldrh r2, [r2, #0] - 8006972: 60da str r2, [r3, #12] - 8006974: e060 b.n 8006a38 + 800699e: 69fb ldr r3, [r7, #28] + 80069a0: 681b ldr r3, [r3, #0] + 80069a2: 220e movs r2, #14 + 80069a4: 2118 movs r1, #24 + 80069a6: 468c mov ip, r1 + 80069a8: 44bc add ip, r7 + 80069aa: 4462 add r2, ip + 80069ac: 8812 ldrh r2, [r2, #0] + 80069ae: 60da str r2, [r3, #12] + 80069b0: e060 b.n 8006a74 } else { ret = HAL_ERROR; - 8006976: 231a movs r3, #26 - 8006978: 2218 movs r2, #24 - 800697a: 4694 mov ip, r2 - 800697c: 44bc add ip, r7 - 800697e: 4463 add r3, ip - 8006980: 2201 movs r2, #1 - 8006982: 701a strb r2, [r3, #0] - 8006984: e058 b.n 8006a38 + 80069b2: 231a movs r3, #26 + 80069b4: 2218 movs r2, #24 + 80069b6: 4694 mov ip, r2 + 80069b8: 44bc add ip, r7 + 80069ba: 4463 add r3, ip + 80069bc: 2201 movs r2, #1 + 80069be: 701a strb r2, [r3, #0] + 80069c0: e058 b.n 8006a74 } } } else { switch (clocksource) - 8006986: 231b movs r3, #27 - 8006988: 2218 movs r2, #24 - 800698a: 4694 mov ip, r2 - 800698c: 44bc add ip, r7 - 800698e: 4463 add r3, ip - 8006990: 781b ldrb r3, [r3, #0] - 8006992: 2b08 cmp r3, #8 - 8006994: d822 bhi.n 80069dc - 8006996: 009a lsls r2, r3, #2 - 8006998: 4b34 ldr r3, [pc, #208] ; (8006a6c ) - 800699a: 18d3 adds r3, r2, r3 - 800699c: 681b ldr r3, [r3, #0] - 800699e: 469f mov pc, r3 + 80069c2: 231b movs r3, #27 + 80069c4: 2218 movs r2, #24 + 80069c6: 4694 mov ip, r2 + 80069c8: 44bc add ip, r7 + 80069ca: 4463 add r3, ip + 80069cc: 781b ldrb r3, [r3, #0] + 80069ce: 2b08 cmp r3, #8 + 80069d0: d822 bhi.n 8006a18 + 80069d2: 009a lsls r2, r3, #2 + 80069d4: 4b34 ldr r3, [pc, #208] ; (8006aa8 ) + 80069d6: 18d3 adds r3, r2, r3 + 80069d8: 681b ldr r3, [r3, #0] + 80069da: 469f mov pc, r3 { case UART_CLOCKSOURCE_PCLK1: pclk = HAL_RCC_GetPCLK1Freq(); - 80069a0: f7fe feb4 bl 800570c - 80069a4: 0003 movs r3, r0 - 80069a6: 62fb str r3, [r7, #44] ; 0x2c + 80069dc: f7fe feb4 bl 8005748 + 80069e0: 0003 movs r3, r0 + 80069e2: 62fb str r3, [r7, #44] ; 0x2c break; - 80069a8: e022 b.n 80069f0 + 80069e4: e022 b.n 8006a2c case UART_CLOCKSOURCE_PCLK2: pclk = HAL_RCC_GetPCLK2Freq(); - 80069aa: f7fe fec5 bl 8005738 - 80069ae: 0003 movs r3, r0 - 80069b0: 62fb str r3, [r7, #44] ; 0x2c + 80069e6: f7fe fec5 bl 8005774 + 80069ea: 0003 movs r3, r0 + 80069ec: 62fb str r3, [r7, #44] ; 0x2c break; - 80069b2: e01d b.n 80069f0 + 80069ee: e01d b.n 8006a2c case UART_CLOCKSOURCE_HSI: if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIDIV) != 0U) - 80069b4: 4b29 ldr r3, [pc, #164] ; (8006a5c ) - 80069b6: 681b ldr r3, [r3, #0] - 80069b8: 2210 movs r2, #16 - 80069ba: 4013 ands r3, r2 - 80069bc: d002 beq.n 80069c4 + 80069f0: 4b29 ldr r3, [pc, #164] ; (8006a98 ) + 80069f2: 681b ldr r3, [r3, #0] + 80069f4: 2210 movs r2, #16 + 80069f6: 4013 ands r3, r2 + 80069f8: d002 beq.n 8006a00 { pclk = (uint32_t)(HSI_VALUE >> 2U); - 80069be: 4b28 ldr r3, [pc, #160] ; (8006a60 ) - 80069c0: 62fb str r3, [r7, #44] ; 0x2c + 80069fa: 4b28 ldr r3, [pc, #160] ; (8006a9c ) + 80069fc: 62fb str r3, [r7, #44] ; 0x2c } else { pclk = (uint32_t) HSI_VALUE; } break; - 80069c2: e015 b.n 80069f0 + 80069fe: e015 b.n 8006a2c pclk = (uint32_t) HSI_VALUE; - 80069c4: 4b27 ldr r3, [pc, #156] ; (8006a64 ) - 80069c6: 62fb str r3, [r7, #44] ; 0x2c + 8006a00: 4b27 ldr r3, [pc, #156] ; (8006aa0 ) + 8006a02: 62fb str r3, [r7, #44] ; 0x2c break; - 80069c8: e012 b.n 80069f0 + 8006a04: e012 b.n 8006a2c case UART_CLOCKSOURCE_SYSCLK: pclk = HAL_RCC_GetSysClockFreq(); - 80069ca: f7fe fdf3 bl 80055b4 - 80069ce: 0003 movs r3, r0 - 80069d0: 62fb str r3, [r7, #44] ; 0x2c + 8006a06: f7fe fdf3 bl 80055f0 + 8006a0a: 0003 movs r3, r0 + 8006a0c: 62fb str r3, [r7, #44] ; 0x2c break; - 80069d2: e00d b.n 80069f0 + 8006a0e: e00d b.n 8006a2c case UART_CLOCKSOURCE_LSE: pclk = (uint32_t) LSE_VALUE; - 80069d4: 2380 movs r3, #128 ; 0x80 - 80069d6: 021b lsls r3, r3, #8 - 80069d8: 62fb str r3, [r7, #44] ; 0x2c + 8006a10: 2380 movs r3, #128 ; 0x80 + 8006a12: 021b lsls r3, r3, #8 + 8006a14: 62fb str r3, [r7, #44] ; 0x2c break; - 80069da: e009 b.n 80069f0 + 8006a16: e009 b.n 8006a2c default: pclk = 0U; - 80069dc: 2300 movs r3, #0 - 80069de: 62fb str r3, [r7, #44] ; 0x2c + 8006a18: 2300 movs r3, #0 + 8006a1a: 62fb str r3, [r7, #44] ; 0x2c ret = HAL_ERROR; - 80069e0: 231a movs r3, #26 - 80069e2: 2218 movs r2, #24 - 80069e4: 4694 mov ip, r2 - 80069e6: 44bc add ip, r7 - 80069e8: 4463 add r3, ip - 80069ea: 2201 movs r2, #1 - 80069ec: 701a strb r2, [r3, #0] + 8006a1c: 231a movs r3, #26 + 8006a1e: 2218 movs r2, #24 + 8006a20: 4694 mov ip, r2 + 8006a22: 44bc add ip, r7 + 8006a24: 4463 add r3, ip + 8006a26: 2201 movs r2, #1 + 8006a28: 701a strb r2, [r3, #0] break; - 80069ee: 46c0 nop ; (mov r8, r8) + 8006a2a: 46c0 nop ; (mov r8, r8) } if (pclk != 0U) - 80069f0: 6afb ldr r3, [r7, #44] ; 0x2c - 80069f2: 2b00 cmp r3, #0 - 80069f4: d020 beq.n 8006a38 + 8006a2c: 6afb ldr r3, [r7, #44] ; 0x2c + 8006a2e: 2b00 cmp r3, #0 + 8006a30: d020 beq.n 8006a74 { /* USARTDIV must be greater than or equal to 0d16 */ usartdiv = (uint16_t)(UART_DIV_SAMPLING16(pclk, huart->Init.BaudRate)); - 80069f6: 69fb ldr r3, [r7, #28] - 80069f8: 685b ldr r3, [r3, #4] - 80069fa: 085a lsrs r2, r3, #1 - 80069fc: 6afb ldr r3, [r7, #44] ; 0x2c - 80069fe: 18d2 adds r2, r2, r3 - 8006a00: 69fb ldr r3, [r7, #28] - 8006a02: 685b ldr r3, [r3, #4] - 8006a04: 0019 movs r1, r3 - 8006a06: 0010 movs r0, r2 - 8006a08: f7f9 fb7e bl 8000108 <__udivsi3> - 8006a0c: 0003 movs r3, r0 - 8006a0e: b29b uxth r3, r3 - 8006a10: 62bb str r3, [r7, #40] ; 0x28 + 8006a32: 69fb ldr r3, [r7, #28] + 8006a34: 685b ldr r3, [r3, #4] + 8006a36: 085a lsrs r2, r3, #1 + 8006a38: 6afb ldr r3, [r7, #44] ; 0x2c + 8006a3a: 18d2 adds r2, r2, r3 + 8006a3c: 69fb ldr r3, [r7, #28] + 8006a3e: 685b ldr r3, [r3, #4] + 8006a40: 0019 movs r1, r3 + 8006a42: 0010 movs r0, r2 + 8006a44: f7f9 fb60 bl 8000108 <__udivsi3> + 8006a48: 0003 movs r3, r0 + 8006a4a: b29b uxth r3, r3 + 8006a4c: 62bb str r3, [r7, #40] ; 0x28 if ((usartdiv >= UART_BRR_MIN) && (usartdiv <= UART_BRR_MAX)) - 8006a12: 6abb ldr r3, [r7, #40] ; 0x28 - 8006a14: 2b0f cmp r3, #15 - 8006a16: d908 bls.n 8006a2a - 8006a18: 6abb ldr r3, [r7, #40] ; 0x28 - 8006a1a: 4a13 ldr r2, [pc, #76] ; (8006a68 ) - 8006a1c: 4293 cmp r3, r2 - 8006a1e: d804 bhi.n 8006a2a + 8006a4e: 6abb ldr r3, [r7, #40] ; 0x28 + 8006a50: 2b0f cmp r3, #15 + 8006a52: d908 bls.n 8006a66 + 8006a54: 6abb ldr r3, [r7, #40] ; 0x28 + 8006a56: 4a13 ldr r2, [pc, #76] ; (8006aa4 ) + 8006a58: 4293 cmp r3, r2 + 8006a5a: d804 bhi.n 8006a66 { huart->Instance->BRR = usartdiv; - 8006a20: 69fb ldr r3, [r7, #28] - 8006a22: 681b ldr r3, [r3, #0] - 8006a24: 6aba ldr r2, [r7, #40] ; 0x28 - 8006a26: 60da str r2, [r3, #12] - 8006a28: e006 b.n 8006a38 + 8006a5c: 69fb ldr r3, [r7, #28] + 8006a5e: 681b ldr r3, [r3, #0] + 8006a60: 6aba ldr r2, [r7, #40] ; 0x28 + 8006a62: 60da str r2, [r3, #12] + 8006a64: e006 b.n 8006a74 } else { ret = HAL_ERROR; - 8006a2a: 231a movs r3, #26 - 8006a2c: 2218 movs r2, #24 - 8006a2e: 4694 mov ip, r2 - 8006a30: 44bc add ip, r7 - 8006a32: 4463 add r3, ip - 8006a34: 2201 movs r2, #1 - 8006a36: 701a strb r2, [r3, #0] + 8006a66: 231a movs r3, #26 + 8006a68: 2218 movs r2, #24 + 8006a6a: 4694 mov ip, r2 + 8006a6c: 44bc add ip, r7 + 8006a6e: 4463 add r3, ip + 8006a70: 2201 movs r2, #1 + 8006a72: 701a strb r2, [r3, #0] } } /* Clear ISR function pointers */ huart->RxISR = NULL; - 8006a38: 69fb ldr r3, [r7, #28] - 8006a3a: 2200 movs r2, #0 - 8006a3c: 665a str r2, [r3, #100] ; 0x64 + 8006a74: 69fb ldr r3, [r7, #28] + 8006a76: 2200 movs r2, #0 + 8006a78: 665a str r2, [r3, #100] ; 0x64 huart->TxISR = NULL; - 8006a3e: 69fb ldr r3, [r7, #28] - 8006a40: 2200 movs r2, #0 - 8006a42: 669a str r2, [r3, #104] ; 0x68 + 8006a7a: 69fb ldr r3, [r7, #28] + 8006a7c: 2200 movs r2, #0 + 8006a7e: 669a str r2, [r3, #104] ; 0x68 return ret; - 8006a44: 231a movs r3, #26 - 8006a46: 2218 movs r2, #24 - 8006a48: 4694 mov ip, r2 - 8006a4a: 44bc add ip, r7 - 8006a4c: 4463 add r3, ip - 8006a4e: 781b ldrb r3, [r3, #0] + 8006a80: 231a movs r3, #26 + 8006a82: 2218 movs r2, #24 + 8006a84: 4694 mov ip, r2 + 8006a86: 44bc add ip, r7 + 8006a88: 4463 add r3, ip + 8006a8a: 781b ldrb r3, [r3, #0] } - 8006a50: 0018 movs r0, r3 - 8006a52: 46bd mov sp, r7 - 8006a54: b00e add sp, #56 ; 0x38 - 8006a56: bdb0 pop {r4, r5, r7, pc} - 8006a58: 08007444 .word 0x08007444 - 8006a5c: 40021000 .word 0x40021000 - 8006a60: 003d0900 .word 0x003d0900 - 8006a64: 00f42400 .word 0x00f42400 - 8006a68: 0000ffff .word 0x0000ffff - 8006a6c: 08007468 .word 0x08007468 + 8006a8c: 0018 movs r0, r3 + 8006a8e: 46bd mov sp, r7 + 8006a90: b00e add sp, #56 ; 0x38 + 8006a92: bdb0 pop {r4, r5, r7, pc} + 8006a94: 08007480 .word 0x08007480 + 8006a98: 40021000 .word 0x40021000 + 8006a9c: 003d0900 .word 0x003d0900 + 8006aa0: 00f42400 .word 0x00f42400 + 8006aa4: 0000ffff .word 0x0000ffff + 8006aa8: 080074a4 .word 0x080074a4 -08006a70 : +08006aac : * @brief Configure the UART peripheral advanced features. * @param huart UART handle. * @retval None */ void UART_AdvFeatureConfig(UART_HandleTypeDef *huart) { - 8006a70: b580 push {r7, lr} - 8006a72: b082 sub sp, #8 - 8006a74: af00 add r7, sp, #0 - 8006a76: 6078 str r0, [r7, #4] + 8006aac: b580 push {r7, lr} + 8006aae: b082 sub sp, #8 + 8006ab0: af00 add r7, sp, #0 + 8006ab2: 6078 str r0, [r7, #4] /* Check whether the set of advanced features to configure is properly set */ assert_param(IS_UART_ADVFEATURE_INIT(huart->AdvancedInit.AdvFeatureInit)); /* if required, configure TX pin active level inversion */ if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_TXINVERT_INIT)) - 8006a78: 687b ldr r3, [r7, #4] - 8006a7a: 6a5b ldr r3, [r3, #36] ; 0x24 - 8006a7c: 2201 movs r2, #1 - 8006a7e: 4013 ands r3, r2 - 8006a80: d00a beq.n 8006a98 + 8006ab4: 687b ldr r3, [r7, #4] + 8006ab6: 6a5b ldr r3, [r3, #36] ; 0x24 + 8006ab8: 2201 movs r2, #1 + 8006aba: 4013 ands r3, r2 + 8006abc: d00a beq.n 8006ad4 { assert_param(IS_UART_ADVFEATURE_TXINV(huart->AdvancedInit.TxPinLevelInvert)); MODIFY_REG(huart->Instance->CR2, USART_CR2_TXINV, huart->AdvancedInit.TxPinLevelInvert); - 8006a82: 687b ldr r3, [r7, #4] - 8006a84: 681b ldr r3, [r3, #0] - 8006a86: 687a ldr r2, [r7, #4] - 8006a88: 6812 ldr r2, [r2, #0] - 8006a8a: 6852 ldr r2, [r2, #4] - 8006a8c: 4945 ldr r1, [pc, #276] ; (8006ba4 ) - 8006a8e: 4011 ands r1, r2 - 8006a90: 687a ldr r2, [r7, #4] - 8006a92: 6a92 ldr r2, [r2, #40] ; 0x28 - 8006a94: 430a orrs r2, r1 - 8006a96: 605a str r2, [r3, #4] + 8006abe: 687b ldr r3, [r7, #4] + 8006ac0: 681b ldr r3, [r3, #0] + 8006ac2: 687a ldr r2, [r7, #4] + 8006ac4: 6812 ldr r2, [r2, #0] + 8006ac6: 6852 ldr r2, [r2, #4] + 8006ac8: 4945 ldr r1, [pc, #276] ; (8006be0 ) + 8006aca: 4011 ands r1, r2 + 8006acc: 687a ldr r2, [r7, #4] + 8006ace: 6a92 ldr r2, [r2, #40] ; 0x28 + 8006ad0: 430a orrs r2, r1 + 8006ad2: 605a str r2, [r3, #4] } /* if required, configure RX pin active level inversion */ if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_RXINVERT_INIT)) - 8006a98: 687b ldr r3, [r7, #4] - 8006a9a: 6a5b ldr r3, [r3, #36] ; 0x24 - 8006a9c: 2202 movs r2, #2 - 8006a9e: 4013 ands r3, r2 - 8006aa0: d00a beq.n 8006ab8 + 8006ad4: 687b ldr r3, [r7, #4] + 8006ad6: 6a5b ldr r3, [r3, #36] ; 0x24 + 8006ad8: 2202 movs r2, #2 + 8006ada: 4013 ands r3, r2 + 8006adc: d00a beq.n 8006af4 { assert_param(IS_UART_ADVFEATURE_RXINV(huart->AdvancedInit.RxPinLevelInvert)); MODIFY_REG(huart->Instance->CR2, USART_CR2_RXINV, huart->AdvancedInit.RxPinLevelInvert); - 8006aa2: 687b ldr r3, [r7, #4] - 8006aa4: 681b ldr r3, [r3, #0] - 8006aa6: 687a ldr r2, [r7, #4] - 8006aa8: 6812 ldr r2, [r2, #0] - 8006aaa: 6852 ldr r2, [r2, #4] - 8006aac: 493e ldr r1, [pc, #248] ; (8006ba8 ) - 8006aae: 4011 ands r1, r2 - 8006ab0: 687a ldr r2, [r7, #4] - 8006ab2: 6ad2 ldr r2, [r2, #44] ; 0x2c - 8006ab4: 430a orrs r2, r1 - 8006ab6: 605a str r2, [r3, #4] + 8006ade: 687b ldr r3, [r7, #4] + 8006ae0: 681b ldr r3, [r3, #0] + 8006ae2: 687a ldr r2, [r7, #4] + 8006ae4: 6812 ldr r2, [r2, #0] + 8006ae6: 6852 ldr r2, [r2, #4] + 8006ae8: 493e ldr r1, [pc, #248] ; (8006be4 ) + 8006aea: 4011 ands r1, r2 + 8006aec: 687a ldr r2, [r7, #4] + 8006aee: 6ad2 ldr r2, [r2, #44] ; 0x2c + 8006af0: 430a orrs r2, r1 + 8006af2: 605a str r2, [r3, #4] } /* if required, configure data inversion */ if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_DATAINVERT_INIT)) - 8006ab8: 687b ldr r3, [r7, #4] - 8006aba: 6a5b ldr r3, [r3, #36] ; 0x24 - 8006abc: 2204 movs r2, #4 - 8006abe: 4013 ands r3, r2 - 8006ac0: d00a beq.n 8006ad8 + 8006af4: 687b ldr r3, [r7, #4] + 8006af6: 6a5b ldr r3, [r3, #36] ; 0x24 + 8006af8: 2204 movs r2, #4 + 8006afa: 4013 ands r3, r2 + 8006afc: d00a beq.n 8006b14 { assert_param(IS_UART_ADVFEATURE_DATAINV(huart->AdvancedInit.DataInvert)); MODIFY_REG(huart->Instance->CR2, USART_CR2_DATAINV, huart->AdvancedInit.DataInvert); - 8006ac2: 687b ldr r3, [r7, #4] - 8006ac4: 681b ldr r3, [r3, #0] - 8006ac6: 687a ldr r2, [r7, #4] - 8006ac8: 6812 ldr r2, [r2, #0] - 8006aca: 6852 ldr r2, [r2, #4] - 8006acc: 4937 ldr r1, [pc, #220] ; (8006bac ) - 8006ace: 4011 ands r1, r2 - 8006ad0: 687a ldr r2, [r7, #4] - 8006ad2: 6b12 ldr r2, [r2, #48] ; 0x30 - 8006ad4: 430a orrs r2, r1 - 8006ad6: 605a str r2, [r3, #4] + 8006afe: 687b ldr r3, [r7, #4] + 8006b00: 681b ldr r3, [r3, #0] + 8006b02: 687a ldr r2, [r7, #4] + 8006b04: 6812 ldr r2, [r2, #0] + 8006b06: 6852 ldr r2, [r2, #4] + 8006b08: 4937 ldr r1, [pc, #220] ; (8006be8 ) + 8006b0a: 4011 ands r1, r2 + 8006b0c: 687a ldr r2, [r7, #4] + 8006b0e: 6b12 ldr r2, [r2, #48] ; 0x30 + 8006b10: 430a orrs r2, r1 + 8006b12: 605a str r2, [r3, #4] } /* if required, configure RX/TX pins swap */ if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_SWAP_INIT)) - 8006ad8: 687b ldr r3, [r7, #4] - 8006ada: 6a5b ldr r3, [r3, #36] ; 0x24 - 8006adc: 2208 movs r2, #8 - 8006ade: 4013 ands r3, r2 - 8006ae0: d00a beq.n 8006af8 + 8006b14: 687b ldr r3, [r7, #4] + 8006b16: 6a5b ldr r3, [r3, #36] ; 0x24 + 8006b18: 2208 movs r2, #8 + 8006b1a: 4013 ands r3, r2 + 8006b1c: d00a beq.n 8006b34 { assert_param(IS_UART_ADVFEATURE_SWAP(huart->AdvancedInit.Swap)); MODIFY_REG(huart->Instance->CR2, USART_CR2_SWAP, huart->AdvancedInit.Swap); - 8006ae2: 687b ldr r3, [r7, #4] - 8006ae4: 681b ldr r3, [r3, #0] - 8006ae6: 687a ldr r2, [r7, #4] - 8006ae8: 6812 ldr r2, [r2, #0] - 8006aea: 6852 ldr r2, [r2, #4] - 8006aec: 4930 ldr r1, [pc, #192] ; (8006bb0 ) - 8006aee: 4011 ands r1, r2 - 8006af0: 687a ldr r2, [r7, #4] - 8006af2: 6b52 ldr r2, [r2, #52] ; 0x34 - 8006af4: 430a orrs r2, r1 - 8006af6: 605a str r2, [r3, #4] + 8006b1e: 687b ldr r3, [r7, #4] + 8006b20: 681b ldr r3, [r3, #0] + 8006b22: 687a ldr r2, [r7, #4] + 8006b24: 6812 ldr r2, [r2, #0] + 8006b26: 6852 ldr r2, [r2, #4] + 8006b28: 4930 ldr r1, [pc, #192] ; (8006bec ) + 8006b2a: 4011 ands r1, r2 + 8006b2c: 687a ldr r2, [r7, #4] + 8006b2e: 6b52 ldr r2, [r2, #52] ; 0x34 + 8006b30: 430a orrs r2, r1 + 8006b32: 605a str r2, [r3, #4] } /* if required, configure RX overrun detection disabling */ if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_RXOVERRUNDISABLE_INIT)) - 8006af8: 687b ldr r3, [r7, #4] - 8006afa: 6a5b ldr r3, [r3, #36] ; 0x24 - 8006afc: 2210 movs r2, #16 - 8006afe: 4013 ands r3, r2 - 8006b00: d00a beq.n 8006b18 + 8006b34: 687b ldr r3, [r7, #4] + 8006b36: 6a5b ldr r3, [r3, #36] ; 0x24 + 8006b38: 2210 movs r2, #16 + 8006b3a: 4013 ands r3, r2 + 8006b3c: d00a beq.n 8006b54 { assert_param(IS_UART_OVERRUN(huart->AdvancedInit.OverrunDisable)); MODIFY_REG(huart->Instance->CR3, USART_CR3_OVRDIS, huart->AdvancedInit.OverrunDisable); - 8006b02: 687b ldr r3, [r7, #4] - 8006b04: 681b ldr r3, [r3, #0] - 8006b06: 687a ldr r2, [r7, #4] - 8006b08: 6812 ldr r2, [r2, #0] - 8006b0a: 6892 ldr r2, [r2, #8] - 8006b0c: 4929 ldr r1, [pc, #164] ; (8006bb4 ) - 8006b0e: 4011 ands r1, r2 - 8006b10: 687a ldr r2, [r7, #4] - 8006b12: 6b92 ldr r2, [r2, #56] ; 0x38 - 8006b14: 430a orrs r2, r1 - 8006b16: 609a str r2, [r3, #8] + 8006b3e: 687b ldr r3, [r7, #4] + 8006b40: 681b ldr r3, [r3, #0] + 8006b42: 687a ldr r2, [r7, #4] + 8006b44: 6812 ldr r2, [r2, #0] + 8006b46: 6892 ldr r2, [r2, #8] + 8006b48: 4929 ldr r1, [pc, #164] ; (8006bf0 ) + 8006b4a: 4011 ands r1, r2 + 8006b4c: 687a ldr r2, [r7, #4] + 8006b4e: 6b92 ldr r2, [r2, #56] ; 0x38 + 8006b50: 430a orrs r2, r1 + 8006b52: 609a str r2, [r3, #8] } /* if required, configure DMA disabling on reception error */ if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_DMADISABLEONERROR_INIT)) - 8006b18: 687b ldr r3, [r7, #4] - 8006b1a: 6a5b ldr r3, [r3, #36] ; 0x24 - 8006b1c: 2220 movs r2, #32 - 8006b1e: 4013 ands r3, r2 - 8006b20: d00a beq.n 8006b38 + 8006b54: 687b ldr r3, [r7, #4] + 8006b56: 6a5b ldr r3, [r3, #36] ; 0x24 + 8006b58: 2220 movs r2, #32 + 8006b5a: 4013 ands r3, r2 + 8006b5c: d00a beq.n 8006b74 { assert_param(IS_UART_ADVFEATURE_DMAONRXERROR(huart->AdvancedInit.DMADisableonRxError)); MODIFY_REG(huart->Instance->CR3, USART_CR3_DDRE, huart->AdvancedInit.DMADisableonRxError); - 8006b22: 687b ldr r3, [r7, #4] - 8006b24: 681b ldr r3, [r3, #0] - 8006b26: 687a ldr r2, [r7, #4] - 8006b28: 6812 ldr r2, [r2, #0] - 8006b2a: 6892 ldr r2, [r2, #8] - 8006b2c: 4922 ldr r1, [pc, #136] ; (8006bb8 ) - 8006b2e: 4011 ands r1, r2 - 8006b30: 687a ldr r2, [r7, #4] - 8006b32: 6bd2 ldr r2, [r2, #60] ; 0x3c - 8006b34: 430a orrs r2, r1 - 8006b36: 609a str r2, [r3, #8] + 8006b5e: 687b ldr r3, [r7, #4] + 8006b60: 681b ldr r3, [r3, #0] + 8006b62: 687a ldr r2, [r7, #4] + 8006b64: 6812 ldr r2, [r2, #0] + 8006b66: 6892 ldr r2, [r2, #8] + 8006b68: 4922 ldr r1, [pc, #136] ; (8006bf4 ) + 8006b6a: 4011 ands r1, r2 + 8006b6c: 687a ldr r2, [r7, #4] + 8006b6e: 6bd2 ldr r2, [r2, #60] ; 0x3c + 8006b70: 430a orrs r2, r1 + 8006b72: 609a str r2, [r3, #8] } /* if required, configure auto Baud rate detection scheme */ if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_AUTOBAUDRATE_INIT)) - 8006b38: 687b ldr r3, [r7, #4] - 8006b3a: 6a5b ldr r3, [r3, #36] ; 0x24 - 8006b3c: 2240 movs r2, #64 ; 0x40 - 8006b3e: 4013 ands r3, r2 - 8006b40: d01b beq.n 8006b7a + 8006b74: 687b ldr r3, [r7, #4] + 8006b76: 6a5b ldr r3, [r3, #36] ; 0x24 + 8006b78: 2240 movs r2, #64 ; 0x40 + 8006b7a: 4013 ands r3, r2 + 8006b7c: d01b beq.n 8006bb6 { assert_param(IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(huart->Instance)); assert_param(IS_UART_ADVFEATURE_AUTOBAUDRATE(huart->AdvancedInit.AutoBaudRateEnable)); MODIFY_REG(huart->Instance->CR2, USART_CR2_ABREN, huart->AdvancedInit.AutoBaudRateEnable); - 8006b42: 687b ldr r3, [r7, #4] - 8006b44: 681b ldr r3, [r3, #0] - 8006b46: 687a ldr r2, [r7, #4] - 8006b48: 6812 ldr r2, [r2, #0] - 8006b4a: 6852 ldr r2, [r2, #4] - 8006b4c: 491b ldr r1, [pc, #108] ; (8006bbc ) - 8006b4e: 4011 ands r1, r2 - 8006b50: 687a ldr r2, [r7, #4] - 8006b52: 6c12 ldr r2, [r2, #64] ; 0x40 - 8006b54: 430a orrs r2, r1 - 8006b56: 605a str r2, [r3, #4] + 8006b7e: 687b ldr r3, [r7, #4] + 8006b80: 681b ldr r3, [r3, #0] + 8006b82: 687a ldr r2, [r7, #4] + 8006b84: 6812 ldr r2, [r2, #0] + 8006b86: 6852 ldr r2, [r2, #4] + 8006b88: 491b ldr r1, [pc, #108] ; (8006bf8 ) + 8006b8a: 4011 ands r1, r2 + 8006b8c: 687a ldr r2, [r7, #4] + 8006b8e: 6c12 ldr r2, [r2, #64] ; 0x40 + 8006b90: 430a orrs r2, r1 + 8006b92: 605a str r2, [r3, #4] /* set auto Baudrate detection parameters if detection is enabled */ if (huart->AdvancedInit.AutoBaudRateEnable == UART_ADVFEATURE_AUTOBAUDRATE_ENABLE) - 8006b58: 687b ldr r3, [r7, #4] - 8006b5a: 6c1a ldr r2, [r3, #64] ; 0x40 - 8006b5c: 2380 movs r3, #128 ; 0x80 - 8006b5e: 035b lsls r3, r3, #13 - 8006b60: 429a cmp r2, r3 - 8006b62: d10a bne.n 8006b7a + 8006b94: 687b ldr r3, [r7, #4] + 8006b96: 6c1a ldr r2, [r3, #64] ; 0x40 + 8006b98: 2380 movs r3, #128 ; 0x80 + 8006b9a: 035b lsls r3, r3, #13 + 8006b9c: 429a cmp r2, r3 + 8006b9e: d10a bne.n 8006bb6 { assert_param(IS_UART_ADVFEATURE_AUTOBAUDRATEMODE(huart->AdvancedInit.AutoBaudRateMode)); MODIFY_REG(huart->Instance->CR2, USART_CR2_ABRMODE, huart->AdvancedInit.AutoBaudRateMode); - 8006b64: 687b ldr r3, [r7, #4] - 8006b66: 681b ldr r3, [r3, #0] - 8006b68: 687a ldr r2, [r7, #4] - 8006b6a: 6812 ldr r2, [r2, #0] - 8006b6c: 6852 ldr r2, [r2, #4] - 8006b6e: 4914 ldr r1, [pc, #80] ; (8006bc0 ) - 8006b70: 4011 ands r1, r2 - 8006b72: 687a ldr r2, [r7, #4] - 8006b74: 6c52 ldr r2, [r2, #68] ; 0x44 - 8006b76: 430a orrs r2, r1 - 8006b78: 605a str r2, [r3, #4] + 8006ba0: 687b ldr r3, [r7, #4] + 8006ba2: 681b ldr r3, [r3, #0] + 8006ba4: 687a ldr r2, [r7, #4] + 8006ba6: 6812 ldr r2, [r2, #0] + 8006ba8: 6852 ldr r2, [r2, #4] + 8006baa: 4914 ldr r1, [pc, #80] ; (8006bfc ) + 8006bac: 4011 ands r1, r2 + 8006bae: 687a ldr r2, [r7, #4] + 8006bb0: 6c52 ldr r2, [r2, #68] ; 0x44 + 8006bb2: 430a orrs r2, r1 + 8006bb4: 605a str r2, [r3, #4] } } /* if required, configure MSB first on communication line */ if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_MSBFIRST_INIT)) - 8006b7a: 687b ldr r3, [r7, #4] - 8006b7c: 6a5b ldr r3, [r3, #36] ; 0x24 - 8006b7e: 2280 movs r2, #128 ; 0x80 - 8006b80: 4013 ands r3, r2 - 8006b82: d00a beq.n 8006b9a + 8006bb6: 687b ldr r3, [r7, #4] + 8006bb8: 6a5b ldr r3, [r3, #36] ; 0x24 + 8006bba: 2280 movs r2, #128 ; 0x80 + 8006bbc: 4013 ands r3, r2 + 8006bbe: d00a beq.n 8006bd6 { assert_param(IS_UART_ADVFEATURE_MSBFIRST(huart->AdvancedInit.MSBFirst)); MODIFY_REG(huart->Instance->CR2, USART_CR2_MSBFIRST, huart->AdvancedInit.MSBFirst); - 8006b84: 687b ldr r3, [r7, #4] - 8006b86: 681b ldr r3, [r3, #0] - 8006b88: 687a ldr r2, [r7, #4] - 8006b8a: 6812 ldr r2, [r2, #0] - 8006b8c: 6852 ldr r2, [r2, #4] - 8006b8e: 490d ldr r1, [pc, #52] ; (8006bc4 ) - 8006b90: 4011 ands r1, r2 - 8006b92: 687a ldr r2, [r7, #4] - 8006b94: 6c92 ldr r2, [r2, #72] ; 0x48 - 8006b96: 430a orrs r2, r1 - 8006b98: 605a str r2, [r3, #4] + 8006bc0: 687b ldr r3, [r7, #4] + 8006bc2: 681b ldr r3, [r3, #0] + 8006bc4: 687a ldr r2, [r7, #4] + 8006bc6: 6812 ldr r2, [r2, #0] + 8006bc8: 6852 ldr r2, [r2, #4] + 8006bca: 490d ldr r1, [pc, #52] ; (8006c00 ) + 8006bcc: 4011 ands r1, r2 + 8006bce: 687a ldr r2, [r7, #4] + 8006bd0: 6c92 ldr r2, [r2, #72] ; 0x48 + 8006bd2: 430a orrs r2, r1 + 8006bd4: 605a str r2, [r3, #4] } } - 8006b9a: 46c0 nop ; (mov r8, r8) - 8006b9c: 46bd mov sp, r7 - 8006b9e: b002 add sp, #8 - 8006ba0: bd80 pop {r7, pc} - 8006ba2: 46c0 nop ; (mov r8, r8) - 8006ba4: fffdffff .word 0xfffdffff - 8006ba8: fffeffff .word 0xfffeffff - 8006bac: fffbffff .word 0xfffbffff - 8006bb0: ffff7fff .word 0xffff7fff - 8006bb4: ffffefff .word 0xffffefff - 8006bb8: ffffdfff .word 0xffffdfff - 8006bbc: ffefffff .word 0xffefffff - 8006bc0: ff9fffff .word 0xff9fffff - 8006bc4: fff7ffff .word 0xfff7ffff + 8006bd6: 46c0 nop ; (mov r8, r8) + 8006bd8: 46bd mov sp, r7 + 8006bda: b002 add sp, #8 + 8006bdc: bd80 pop {r7, pc} + 8006bde: 46c0 nop ; (mov r8, r8) + 8006be0: fffdffff .word 0xfffdffff + 8006be4: fffeffff .word 0xfffeffff + 8006be8: fffbffff .word 0xfffbffff + 8006bec: ffff7fff .word 0xffff7fff + 8006bf0: ffffefff .word 0xffffefff + 8006bf4: ffffdfff .word 0xffffdfff + 8006bf8: ffefffff .word 0xffefffff + 8006bfc: ff9fffff .word 0xff9fffff + 8006c00: fff7ffff .word 0xfff7ffff -08006bc8 : +08006c04 : * @brief Check the UART Idle State. * @param huart UART handle. * @retval HAL status */ HAL_StatusTypeDef UART_CheckIdleState(UART_HandleTypeDef *huart) { - 8006bc8: b580 push {r7, lr} - 8006bca: b086 sub sp, #24 - 8006bcc: af02 add r7, sp, #8 - 8006bce: 6078 str r0, [r7, #4] + 8006c04: b580 push {r7, lr} + 8006c06: b086 sub sp, #24 + 8006c08: af02 add r7, sp, #8 + 8006c0a: 6078 str r0, [r7, #4] uint32_t tickstart; /* Initialize the UART ErrorCode */ huart->ErrorCode = HAL_UART_ERROR_NONE; - 8006bd0: 687b ldr r3, [r7, #4] - 8006bd2: 2280 movs r2, #128 ; 0x80 - 8006bd4: 2100 movs r1, #0 - 8006bd6: 5099 str r1, [r3, r2] + 8006c0c: 687b ldr r3, [r7, #4] + 8006c0e: 2280 movs r2, #128 ; 0x80 + 8006c10: 2100 movs r1, #0 + 8006c12: 5099 str r1, [r3, r2] /* Init tickstart for timeout management */ tickstart = HAL_GetTick(); - 8006bd8: f7fd f9a8 bl 8003f2c - 8006bdc: 0003 movs r3, r0 - 8006bde: 60fb str r3, [r7, #12] + 8006c14: f7fd f9a8 bl 8003f68 + 8006c18: 0003 movs r3, r0 + 8006c1a: 60fb str r3, [r7, #12] /* Check if the Transmitter is enabled */ if ((huart->Instance->CR1 & USART_CR1_TE) == USART_CR1_TE) - 8006be0: 687b ldr r3, [r7, #4] - 8006be2: 681b ldr r3, [r3, #0] - 8006be4: 681b ldr r3, [r3, #0] - 8006be6: 2208 movs r2, #8 - 8006be8: 4013 ands r3, r2 - 8006bea: 2b08 cmp r3, #8 - 8006bec: d10d bne.n 8006c0a + 8006c1c: 687b ldr r3, [r7, #4] + 8006c1e: 681b ldr r3, [r3, #0] + 8006c20: 681b ldr r3, [r3, #0] + 8006c22: 2208 movs r2, #8 + 8006c24: 4013 ands r3, r2 + 8006c26: 2b08 cmp r3, #8 + 8006c28: d10d bne.n 8006c46 { /* Wait until TEACK flag is set */ if (UART_WaitOnFlagUntilTimeout(huart, USART_ISR_TEACK, RESET, tickstart, HAL_UART_TIMEOUT_VALUE) != HAL_OK) - 8006bee: 68fa ldr r2, [r7, #12] - 8006bf0: 2380 movs r3, #128 ; 0x80 - 8006bf2: 0399 lsls r1, r3, #14 - 8006bf4: 6878 ldr r0, [r7, #4] - 8006bf6: 4b18 ldr r3, [pc, #96] ; (8006c58 ) - 8006bf8: 9300 str r3, [sp, #0] - 8006bfa: 0013 movs r3, r2 - 8006bfc: 2200 movs r2, #0 - 8006bfe: f000 f82d bl 8006c5c - 8006c02: 1e03 subs r3, r0, #0 - 8006c04: d001 beq.n 8006c0a + 8006c2a: 68fa ldr r2, [r7, #12] + 8006c2c: 2380 movs r3, #128 ; 0x80 + 8006c2e: 0399 lsls r1, r3, #14 + 8006c30: 6878 ldr r0, [r7, #4] + 8006c32: 4b18 ldr r3, [pc, #96] ; (8006c94 ) + 8006c34: 9300 str r3, [sp, #0] + 8006c36: 0013 movs r3, r2 + 8006c38: 2200 movs r2, #0 + 8006c3a: f000 f82d bl 8006c98 + 8006c3e: 1e03 subs r3, r0, #0 + 8006c40: d001 beq.n 8006c46 { /* Timeout occurred */ return HAL_TIMEOUT; - 8006c06: 2303 movs r3, #3 - 8006c08: e022 b.n 8006c50 + 8006c42: 2303 movs r3, #3 + 8006c44: e022 b.n 8006c8c } } /* Check if the Receiver is enabled */ if ((huart->Instance->CR1 & USART_CR1_RE) == USART_CR1_RE) - 8006c0a: 687b ldr r3, [r7, #4] - 8006c0c: 681b ldr r3, [r3, #0] - 8006c0e: 681b ldr r3, [r3, #0] - 8006c10: 2204 movs r2, #4 - 8006c12: 4013 ands r3, r2 - 8006c14: 2b04 cmp r3, #4 - 8006c16: d10d bne.n 8006c34 + 8006c46: 687b ldr r3, [r7, #4] + 8006c48: 681b ldr r3, [r3, #0] + 8006c4a: 681b ldr r3, [r3, #0] + 8006c4c: 2204 movs r2, #4 + 8006c4e: 4013 ands r3, r2 + 8006c50: 2b04 cmp r3, #4 + 8006c52: d10d bne.n 8006c70 { /* Wait until REACK flag is set */ if (UART_WaitOnFlagUntilTimeout(huart, USART_ISR_REACK, RESET, tickstart, HAL_UART_TIMEOUT_VALUE) != HAL_OK) - 8006c18: 68fa ldr r2, [r7, #12] - 8006c1a: 2380 movs r3, #128 ; 0x80 - 8006c1c: 03d9 lsls r1, r3, #15 - 8006c1e: 6878 ldr r0, [r7, #4] - 8006c20: 4b0d ldr r3, [pc, #52] ; (8006c58 ) - 8006c22: 9300 str r3, [sp, #0] - 8006c24: 0013 movs r3, r2 - 8006c26: 2200 movs r2, #0 - 8006c28: f000 f818 bl 8006c5c - 8006c2c: 1e03 subs r3, r0, #0 - 8006c2e: d001 beq.n 8006c34 + 8006c54: 68fa ldr r2, [r7, #12] + 8006c56: 2380 movs r3, #128 ; 0x80 + 8006c58: 03d9 lsls r1, r3, #15 + 8006c5a: 6878 ldr r0, [r7, #4] + 8006c5c: 4b0d ldr r3, [pc, #52] ; (8006c94 ) + 8006c5e: 9300 str r3, [sp, #0] + 8006c60: 0013 movs r3, r2 + 8006c62: 2200 movs r2, #0 + 8006c64: f000 f818 bl 8006c98 + 8006c68: 1e03 subs r3, r0, #0 + 8006c6a: d001 beq.n 8006c70 { /* Timeout occurred */ return HAL_TIMEOUT; - 8006c30: 2303 movs r3, #3 - 8006c32: e00d b.n 8006c50 + 8006c6c: 2303 movs r3, #3 + 8006c6e: e00d b.n 8006c8c } } /* Initialize the UART State */ huart->gState = HAL_UART_STATE_READY; - 8006c34: 687b ldr r3, [r7, #4] - 8006c36: 2220 movs r2, #32 - 8006c38: 679a str r2, [r3, #120] ; 0x78 + 8006c70: 687b ldr r3, [r7, #4] + 8006c72: 2220 movs r2, #32 + 8006c74: 679a str r2, [r3, #120] ; 0x78 huart->RxState = HAL_UART_STATE_READY; - 8006c3a: 687b ldr r3, [r7, #4] - 8006c3c: 2220 movs r2, #32 - 8006c3e: 67da str r2, [r3, #124] ; 0x7c + 8006c76: 687b ldr r3, [r7, #4] + 8006c78: 2220 movs r2, #32 + 8006c7a: 67da str r2, [r3, #124] ; 0x7c huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; - 8006c40: 687b ldr r3, [r7, #4] - 8006c42: 2200 movs r2, #0 - 8006c44: 661a str r2, [r3, #96] ; 0x60 + 8006c7c: 687b ldr r3, [r7, #4] + 8006c7e: 2200 movs r2, #0 + 8006c80: 661a str r2, [r3, #96] ; 0x60 __HAL_UNLOCK(huart); - 8006c46: 687b ldr r3, [r7, #4] - 8006c48: 2274 movs r2, #116 ; 0x74 - 8006c4a: 2100 movs r1, #0 - 8006c4c: 5499 strb r1, [r3, r2] + 8006c82: 687b ldr r3, [r7, #4] + 8006c84: 2274 movs r2, #116 ; 0x74 + 8006c86: 2100 movs r1, #0 + 8006c88: 5499 strb r1, [r3, r2] return HAL_OK; - 8006c4e: 2300 movs r3, #0 + 8006c8a: 2300 movs r3, #0 } - 8006c50: 0018 movs r0, r3 - 8006c52: 46bd mov sp, r7 - 8006c54: b004 add sp, #16 - 8006c56: bd80 pop {r7, pc} - 8006c58: 01ffffff .word 0x01ffffff + 8006c8c: 0018 movs r0, r3 + 8006c8e: 46bd mov sp, r7 + 8006c90: b004 add sp, #16 + 8006c92: bd80 pop {r7, pc} + 8006c94: 01ffffff .word 0x01ffffff -08006c5c : +08006c98 : * @param Timeout Timeout duration * @retval HAL status */ HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout) { - 8006c5c: b580 push {r7, lr} - 8006c5e: b084 sub sp, #16 - 8006c60: af00 add r7, sp, #0 - 8006c62: 60f8 str r0, [r7, #12] - 8006c64: 60b9 str r1, [r7, #8] - 8006c66: 603b str r3, [r7, #0] - 8006c68: 1dfb adds r3, r7, #7 - 8006c6a: 701a strb r2, [r3, #0] + 8006c98: b580 push {r7, lr} + 8006c9a: b084 sub sp, #16 + 8006c9c: af00 add r7, sp, #0 + 8006c9e: 60f8 str r0, [r7, #12] + 8006ca0: 60b9 str r1, [r7, #8] + 8006ca2: 603b str r3, [r7, #0] + 8006ca4: 1dfb adds r3, r7, #7 + 8006ca6: 701a strb r2, [r3, #0] /* Wait until flag is set */ while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status) - 8006c6c: e05e b.n 8006d2c + 8006ca8: e05e b.n 8006d68 { /* Check for the Timeout */ if (Timeout != HAL_MAX_DELAY) - 8006c6e: 69bb ldr r3, [r7, #24] - 8006c70: 3301 adds r3, #1 - 8006c72: d05b beq.n 8006d2c + 8006caa: 69bb ldr r3, [r7, #24] + 8006cac: 3301 adds r3, #1 + 8006cae: d05b beq.n 8006d68 { if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U)) - 8006c74: f7fd f95a bl 8003f2c - 8006c78: 0002 movs r2, r0 - 8006c7a: 683b ldr r3, [r7, #0] - 8006c7c: 1ad2 subs r2, r2, r3 - 8006c7e: 69bb ldr r3, [r7, #24] - 8006c80: 429a cmp r2, r3 - 8006c82: d802 bhi.n 8006c8a - 8006c84: 69bb ldr r3, [r7, #24] - 8006c86: 2b00 cmp r3, #0 - 8006c88: d11b bne.n 8006cc2 + 8006cb0: f7fd f95a bl 8003f68 + 8006cb4: 0002 movs r2, r0 + 8006cb6: 683b ldr r3, [r7, #0] + 8006cb8: 1ad2 subs r2, r2, r3 + 8006cba: 69bb ldr r3, [r7, #24] + 8006cbc: 429a cmp r2, r3 + 8006cbe: d802 bhi.n 8006cc6 + 8006cc0: 69bb ldr r3, [r7, #24] + 8006cc2: 2b00 cmp r3, #0 + 8006cc4: d11b bne.n 8006cfe { /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */ CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE)); - 8006c8a: 68fb ldr r3, [r7, #12] - 8006c8c: 681b ldr r3, [r3, #0] - 8006c8e: 68fa ldr r2, [r7, #12] - 8006c90: 6812 ldr r2, [r2, #0] - 8006c92: 6812 ldr r2, [r2, #0] - 8006c94: 492f ldr r1, [pc, #188] ; (8006d54 ) - 8006c96: 400a ands r2, r1 - 8006c98: 601a str r2, [r3, #0] + 8006cc6: 68fb ldr r3, [r7, #12] + 8006cc8: 681b ldr r3, [r3, #0] + 8006cca: 68fa ldr r2, [r7, #12] + 8006ccc: 6812 ldr r2, [r2, #0] + 8006cce: 6812 ldr r2, [r2, #0] + 8006cd0: 492f ldr r1, [pc, #188] ; (8006d90 ) + 8006cd2: 400a ands r2, r1 + 8006cd4: 601a str r2, [r3, #0] CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); - 8006c9a: 68fb ldr r3, [r7, #12] - 8006c9c: 681b ldr r3, [r3, #0] - 8006c9e: 68fa ldr r2, [r7, #12] - 8006ca0: 6812 ldr r2, [r2, #0] - 8006ca2: 6892 ldr r2, [r2, #8] - 8006ca4: 2101 movs r1, #1 - 8006ca6: 438a bics r2, r1 - 8006ca8: 609a str r2, [r3, #8] + 8006cd6: 68fb ldr r3, [r7, #12] + 8006cd8: 681b ldr r3, [r3, #0] + 8006cda: 68fa ldr r2, [r7, #12] + 8006cdc: 6812 ldr r2, [r2, #0] + 8006cde: 6892 ldr r2, [r2, #8] + 8006ce0: 2101 movs r1, #1 + 8006ce2: 438a bics r2, r1 + 8006ce4: 609a str r2, [r3, #8] huart->gState = HAL_UART_STATE_READY; - 8006caa: 68fb ldr r3, [r7, #12] - 8006cac: 2220 movs r2, #32 - 8006cae: 679a str r2, [r3, #120] ; 0x78 + 8006ce6: 68fb ldr r3, [r7, #12] + 8006ce8: 2220 movs r2, #32 + 8006cea: 679a str r2, [r3, #120] ; 0x78 huart->RxState = HAL_UART_STATE_READY; - 8006cb0: 68fb ldr r3, [r7, #12] - 8006cb2: 2220 movs r2, #32 - 8006cb4: 67da str r2, [r3, #124] ; 0x7c + 8006cec: 68fb ldr r3, [r7, #12] + 8006cee: 2220 movs r2, #32 + 8006cf0: 67da str r2, [r3, #124] ; 0x7c __HAL_UNLOCK(huart); - 8006cb6: 68fb ldr r3, [r7, #12] - 8006cb8: 2274 movs r2, #116 ; 0x74 - 8006cba: 2100 movs r1, #0 - 8006cbc: 5499 strb r1, [r3, r2] + 8006cf2: 68fb ldr r3, [r7, #12] + 8006cf4: 2274 movs r2, #116 ; 0x74 + 8006cf6: 2100 movs r1, #0 + 8006cf8: 5499 strb r1, [r3, r2] return HAL_TIMEOUT; - 8006cbe: 2303 movs r3, #3 - 8006cc0: e044 b.n 8006d4c + 8006cfa: 2303 movs r3, #3 + 8006cfc: e044 b.n 8006d88 } if (READ_BIT(huart->Instance->CR1, USART_CR1_RE) != 0U) - 8006cc2: 68fb ldr r3, [r7, #12] - 8006cc4: 681b ldr r3, [r3, #0] - 8006cc6: 681b ldr r3, [r3, #0] - 8006cc8: 2204 movs r2, #4 - 8006cca: 4013 ands r3, r2 - 8006ccc: d02e beq.n 8006d2c + 8006cfe: 68fb ldr r3, [r7, #12] + 8006d00: 681b ldr r3, [r3, #0] + 8006d02: 681b ldr r3, [r3, #0] + 8006d04: 2204 movs r2, #4 + 8006d06: 4013 ands r3, r2 + 8006d08: d02e beq.n 8006d68 { if (__HAL_UART_GET_FLAG(huart, UART_FLAG_RTOF) == SET) - 8006cce: 68fb ldr r3, [r7, #12] - 8006cd0: 681b ldr r3, [r3, #0] - 8006cd2: 69da ldr r2, [r3, #28] - 8006cd4: 2380 movs r3, #128 ; 0x80 - 8006cd6: 011b lsls r3, r3, #4 - 8006cd8: 401a ands r2, r3 - 8006cda: 2380 movs r3, #128 ; 0x80 - 8006cdc: 011b lsls r3, r3, #4 - 8006cde: 429a cmp r2, r3 - 8006ce0: d124 bne.n 8006d2c + 8006d0a: 68fb ldr r3, [r7, #12] + 8006d0c: 681b ldr r3, [r3, #0] + 8006d0e: 69da ldr r2, [r3, #28] + 8006d10: 2380 movs r3, #128 ; 0x80 + 8006d12: 011b lsls r3, r3, #4 + 8006d14: 401a ands r2, r3 + 8006d16: 2380 movs r3, #128 ; 0x80 + 8006d18: 011b lsls r3, r3, #4 + 8006d1a: 429a cmp r2, r3 + 8006d1c: d124 bne.n 8006d68 { /* Clear Receiver Timeout flag*/ __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_RTOF); - 8006ce2: 68fb ldr r3, [r7, #12] - 8006ce4: 681b ldr r3, [r3, #0] - 8006ce6: 2280 movs r2, #128 ; 0x80 - 8006ce8: 0112 lsls r2, r2, #4 - 8006cea: 621a str r2, [r3, #32] + 8006d1e: 68fb ldr r3, [r7, #12] + 8006d20: 681b ldr r3, [r3, #0] + 8006d22: 2280 movs r2, #128 ; 0x80 + 8006d24: 0112 lsls r2, r2, #4 + 8006d26: 621a str r2, [r3, #32] /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */ CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE)); - 8006cec: 68fb ldr r3, [r7, #12] - 8006cee: 681b ldr r3, [r3, #0] - 8006cf0: 68fa ldr r2, [r7, #12] - 8006cf2: 6812 ldr r2, [r2, #0] - 8006cf4: 6812 ldr r2, [r2, #0] - 8006cf6: 4917 ldr r1, [pc, #92] ; (8006d54 ) - 8006cf8: 400a ands r2, r1 - 8006cfa: 601a str r2, [r3, #0] + 8006d28: 68fb ldr r3, [r7, #12] + 8006d2a: 681b ldr r3, [r3, #0] + 8006d2c: 68fa ldr r2, [r7, #12] + 8006d2e: 6812 ldr r2, [r2, #0] + 8006d30: 6812 ldr r2, [r2, #0] + 8006d32: 4917 ldr r1, [pc, #92] ; (8006d90 ) + 8006d34: 400a ands r2, r1 + 8006d36: 601a str r2, [r3, #0] CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); - 8006cfc: 68fb ldr r3, [r7, #12] - 8006cfe: 681b ldr r3, [r3, #0] - 8006d00: 68fa ldr r2, [r7, #12] - 8006d02: 6812 ldr r2, [r2, #0] - 8006d04: 6892 ldr r2, [r2, #8] - 8006d06: 2101 movs r1, #1 - 8006d08: 438a bics r2, r1 - 8006d0a: 609a str r2, [r3, #8] + 8006d38: 68fb ldr r3, [r7, #12] + 8006d3a: 681b ldr r3, [r3, #0] + 8006d3c: 68fa ldr r2, [r7, #12] + 8006d3e: 6812 ldr r2, [r2, #0] + 8006d40: 6892 ldr r2, [r2, #8] + 8006d42: 2101 movs r1, #1 + 8006d44: 438a bics r2, r1 + 8006d46: 609a str r2, [r3, #8] huart->gState = HAL_UART_STATE_READY; - 8006d0c: 68fb ldr r3, [r7, #12] - 8006d0e: 2220 movs r2, #32 - 8006d10: 679a str r2, [r3, #120] ; 0x78 + 8006d48: 68fb ldr r3, [r7, #12] + 8006d4a: 2220 movs r2, #32 + 8006d4c: 679a str r2, [r3, #120] ; 0x78 huart->RxState = HAL_UART_STATE_READY; - 8006d12: 68fb ldr r3, [r7, #12] - 8006d14: 2220 movs r2, #32 - 8006d16: 67da str r2, [r3, #124] ; 0x7c + 8006d4e: 68fb ldr r3, [r7, #12] + 8006d50: 2220 movs r2, #32 + 8006d52: 67da str r2, [r3, #124] ; 0x7c huart->ErrorCode = HAL_UART_ERROR_RTO; - 8006d18: 68fb ldr r3, [r7, #12] - 8006d1a: 2280 movs r2, #128 ; 0x80 - 8006d1c: 2120 movs r1, #32 - 8006d1e: 5099 str r1, [r3, r2] + 8006d54: 68fb ldr r3, [r7, #12] + 8006d56: 2280 movs r2, #128 ; 0x80 + 8006d58: 2120 movs r1, #32 + 8006d5a: 5099 str r1, [r3, r2] /* Process Unlocked */ __HAL_UNLOCK(huart); - 8006d20: 68fb ldr r3, [r7, #12] - 8006d22: 2274 movs r2, #116 ; 0x74 - 8006d24: 2100 movs r1, #0 - 8006d26: 5499 strb r1, [r3, r2] + 8006d5c: 68fb ldr r3, [r7, #12] + 8006d5e: 2274 movs r2, #116 ; 0x74 + 8006d60: 2100 movs r1, #0 + 8006d62: 5499 strb r1, [r3, r2] return HAL_TIMEOUT; - 8006d28: 2303 movs r3, #3 - 8006d2a: e00f b.n 8006d4c + 8006d64: 2303 movs r3, #3 + 8006d66: e00f b.n 8006d88 while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status) - 8006d2c: 68fb ldr r3, [r7, #12] - 8006d2e: 681b ldr r3, [r3, #0] - 8006d30: 69db ldr r3, [r3, #28] - 8006d32: 68ba ldr r2, [r7, #8] - 8006d34: 401a ands r2, r3 - 8006d36: 68bb ldr r3, [r7, #8] - 8006d38: 1ad3 subs r3, r2, r3 - 8006d3a: 425a negs r2, r3 - 8006d3c: 4153 adcs r3, r2 - 8006d3e: b2db uxtb r3, r3 - 8006d40: 001a movs r2, r3 - 8006d42: 1dfb adds r3, r7, #7 - 8006d44: 781b ldrb r3, [r3, #0] - 8006d46: 429a cmp r2, r3 - 8006d48: d091 beq.n 8006c6e + 8006d68: 68fb ldr r3, [r7, #12] + 8006d6a: 681b ldr r3, [r3, #0] + 8006d6c: 69db ldr r3, [r3, #28] + 8006d6e: 68ba ldr r2, [r7, #8] + 8006d70: 401a ands r2, r3 + 8006d72: 68bb ldr r3, [r7, #8] + 8006d74: 1ad3 subs r3, r2, r3 + 8006d76: 425a negs r2, r3 + 8006d78: 4153 adcs r3, r2 + 8006d7a: b2db uxtb r3, r3 + 8006d7c: 001a movs r2, r3 + 8006d7e: 1dfb adds r3, r7, #7 + 8006d80: 781b ldrb r3, [r3, #0] + 8006d82: 429a cmp r2, r3 + 8006d84: d091 beq.n 8006caa } } } } return HAL_OK; - 8006d4a: 2300 movs r3, #0 + 8006d86: 2300 movs r3, #0 } - 8006d4c: 0018 movs r0, r3 - 8006d4e: 46bd mov sp, r7 - 8006d50: b004 add sp, #16 - 8006d52: bd80 pop {r7, pc} - 8006d54: fffffe5f .word 0xfffffe5f + 8006d88: 0018 movs r0, r3 + 8006d8a: 46bd mov sp, r7 + 8006d8c: b004 add sp, #16 + 8006d8e: bd80 pop {r7, pc} + 8006d90: fffffe5f .word 0xfffffe5f -08006d58 : +08006d94 : * @brief End ongoing Rx transfer on UART peripheral (following error detection or Reception completion). * @param huart UART handle. * @retval None */ static void UART_EndRxTransfer(UART_HandleTypeDef *huart) { - 8006d58: b580 push {r7, lr} - 8006d5a: b082 sub sp, #8 - 8006d5c: af00 add r7, sp, #0 - 8006d5e: 6078 str r0, [r7, #4] + 8006d94: b580 push {r7, lr} + 8006d96: b082 sub sp, #8 + 8006d98: af00 add r7, sp, #0 + 8006d9a: 6078 str r0, [r7, #4] /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */ CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE)); - 8006d60: 687b ldr r3, [r7, #4] - 8006d62: 681b ldr r3, [r3, #0] - 8006d64: 687a ldr r2, [r7, #4] - 8006d66: 6812 ldr r2, [r2, #0] - 8006d68: 6812 ldr r2, [r2, #0] - 8006d6a: 4912 ldr r1, [pc, #72] ; (8006db4 ) - 8006d6c: 400a ands r2, r1 - 8006d6e: 601a str r2, [r3, #0] + 8006d9c: 687b ldr r3, [r7, #4] + 8006d9e: 681b ldr r3, [r3, #0] + 8006da0: 687a ldr r2, [r7, #4] + 8006da2: 6812 ldr r2, [r2, #0] + 8006da4: 6812 ldr r2, [r2, #0] + 8006da6: 4912 ldr r1, [pc, #72] ; (8006df0 ) + 8006da8: 400a ands r2, r1 + 8006daa: 601a str r2, [r3, #0] CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); - 8006d70: 687b ldr r3, [r7, #4] - 8006d72: 681b ldr r3, [r3, #0] - 8006d74: 687a ldr r2, [r7, #4] - 8006d76: 6812 ldr r2, [r2, #0] - 8006d78: 6892 ldr r2, [r2, #8] - 8006d7a: 2101 movs r1, #1 - 8006d7c: 438a bics r2, r1 - 8006d7e: 609a str r2, [r3, #8] + 8006dac: 687b ldr r3, [r7, #4] + 8006dae: 681b ldr r3, [r3, #0] + 8006db0: 687a ldr r2, [r7, #4] + 8006db2: 6812 ldr r2, [r2, #0] + 8006db4: 6892 ldr r2, [r2, #8] + 8006db6: 2101 movs r1, #1 + 8006db8: 438a bics r2, r1 + 8006dba: 609a str r2, [r3, #8] /* In case of reception waiting for IDLE event, disable also the IDLE IE interrupt source */ if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) - 8006d80: 687b ldr r3, [r7, #4] - 8006d82: 6e1b ldr r3, [r3, #96] ; 0x60 - 8006d84: 2b01 cmp r3, #1 - 8006d86: d107 bne.n 8006d98 + 8006dbc: 687b ldr r3, [r7, #4] + 8006dbe: 6e1b ldr r3, [r3, #96] ; 0x60 + 8006dc0: 2b01 cmp r3, #1 + 8006dc2: d107 bne.n 8006dd4 { CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); - 8006d88: 687b ldr r3, [r7, #4] - 8006d8a: 681b ldr r3, [r3, #0] - 8006d8c: 687a ldr r2, [r7, #4] - 8006d8e: 6812 ldr r2, [r2, #0] - 8006d90: 6812 ldr r2, [r2, #0] - 8006d92: 2110 movs r1, #16 - 8006d94: 438a bics r2, r1 - 8006d96: 601a str r2, [r3, #0] + 8006dc4: 687b ldr r3, [r7, #4] + 8006dc6: 681b ldr r3, [r3, #0] + 8006dc8: 687a ldr r2, [r7, #4] + 8006dca: 6812 ldr r2, [r2, #0] + 8006dcc: 6812 ldr r2, [r2, #0] + 8006dce: 2110 movs r1, #16 + 8006dd0: 438a bics r2, r1 + 8006dd2: 601a str r2, [r3, #0] } /* At end of Rx process, restore huart->RxState to Ready */ huart->RxState = HAL_UART_STATE_READY; - 8006d98: 687b ldr r3, [r7, #4] - 8006d9a: 2220 movs r2, #32 - 8006d9c: 67da str r2, [r3, #124] ; 0x7c + 8006dd4: 687b ldr r3, [r7, #4] + 8006dd6: 2220 movs r2, #32 + 8006dd8: 67da str r2, [r3, #124] ; 0x7c huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; - 8006d9e: 687b ldr r3, [r7, #4] - 8006da0: 2200 movs r2, #0 - 8006da2: 661a str r2, [r3, #96] ; 0x60 + 8006dda: 687b ldr r3, [r7, #4] + 8006ddc: 2200 movs r2, #0 + 8006dde: 661a str r2, [r3, #96] ; 0x60 /* Reset RxIsr function pointer */ huart->RxISR = NULL; - 8006da4: 687b ldr r3, [r7, #4] - 8006da6: 2200 movs r2, #0 - 8006da8: 665a str r2, [r3, #100] ; 0x64 + 8006de0: 687b ldr r3, [r7, #4] + 8006de2: 2200 movs r2, #0 + 8006de4: 665a str r2, [r3, #100] ; 0x64 } - 8006daa: 46c0 nop ; (mov r8, r8) - 8006dac: 46bd mov sp, r7 - 8006dae: b002 add sp, #8 - 8006db0: bd80 pop {r7, pc} - 8006db2: 46c0 nop ; (mov r8, r8) - 8006db4: fffffedf .word 0xfffffedf + 8006de6: 46c0 nop ; (mov r8, r8) + 8006de8: 46bd mov sp, r7 + 8006dea: b002 add sp, #8 + 8006dec: bd80 pop {r7, pc} + 8006dee: 46c0 nop ; (mov r8, r8) + 8006df0: fffffedf .word 0xfffffedf -08006db8 : +08006df4 : * (To be called at end of DMA Abort procedure following error occurrence). * @param hdma DMA handle. * @retval None */ static void UART_DMAAbortOnError(DMA_HandleTypeDef *hdma) { - 8006db8: b580 push {r7, lr} - 8006dba: b084 sub sp, #16 - 8006dbc: af00 add r7, sp, #0 - 8006dbe: 6078 str r0, [r7, #4] + 8006df4: b580 push {r7, lr} + 8006df6: b084 sub sp, #16 + 8006df8: af00 add r7, sp, #0 + 8006dfa: 6078 str r0, [r7, #4] UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent); - 8006dc0: 687b ldr r3, [r7, #4] - 8006dc2: 6a9b ldr r3, [r3, #40] ; 0x28 - 8006dc4: 60fb str r3, [r7, #12] + 8006dfc: 687b ldr r3, [r7, #4] + 8006dfe: 6a9b ldr r3, [r3, #40] ; 0x28 + 8006e00: 60fb str r3, [r7, #12] huart->RxXferCount = 0U; - 8006dc6: 68fb ldr r3, [r7, #12] - 8006dc8: 225a movs r2, #90 ; 0x5a - 8006dca: 2100 movs r1, #0 - 8006dcc: 5299 strh r1, [r3, r2] + 8006e02: 68fb ldr r3, [r7, #12] + 8006e04: 225a movs r2, #90 ; 0x5a + 8006e06: 2100 movs r1, #0 + 8006e08: 5299 strh r1, [r3, r2] huart->TxXferCount = 0U; - 8006dce: 68fb ldr r3, [r7, #12] - 8006dd0: 2252 movs r2, #82 ; 0x52 - 8006dd2: 2100 movs r1, #0 - 8006dd4: 5299 strh r1, [r3, r2] + 8006e0a: 68fb ldr r3, [r7, #12] + 8006e0c: 2252 movs r2, #82 ; 0x52 + 8006e0e: 2100 movs r1, #0 + 8006e10: 5299 strh r1, [r3, r2] #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered error callback*/ huart->ErrorCallback(huart); #else /*Call legacy weak error callback*/ HAL_UART_ErrorCallback(huart); - 8006dd6: 68fb ldr r3, [r7, #12] - 8006dd8: 0018 movs r0, r3 - 8006dda: f7ff fb73 bl 80064c4 + 8006e12: 68fb ldr r3, [r7, #12] + 8006e14: 0018 movs r0, r3 + 8006e16: f7ff fb73 bl 8006500 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ } - 8006dde: 46c0 nop ; (mov r8, r8) - 8006de0: 46bd mov sp, r7 - 8006de2: b004 add sp, #16 - 8006de4: bd80 pop {r7, pc} + 8006e1a: 46c0 nop ; (mov r8, r8) + 8006e1c: 46bd mov sp, r7 + 8006e1e: b004 add sp, #16 + 8006e20: bd80 pop {r7, pc} -08006de6 : +08006e22 : * interruptions have been enabled by HAL_UART_Transmit_IT(). * @param huart UART handle. * @retval None */ static void UART_TxISR_8BIT(UART_HandleTypeDef *huart) { - 8006de6: b580 push {r7, lr} - 8006de8: b082 sub sp, #8 - 8006dea: af00 add r7, sp, #0 - 8006dec: 6078 str r0, [r7, #4] + 8006e22: b580 push {r7, lr} + 8006e24: b082 sub sp, #8 + 8006e26: af00 add r7, sp, #0 + 8006e28: 6078 str r0, [r7, #4] /* Check that a Tx process is ongoing */ if (huart->gState == HAL_UART_STATE_BUSY_TX) - 8006dee: 687b ldr r3, [r7, #4] - 8006df0: 6f9b ldr r3, [r3, #120] ; 0x78 - 8006df2: 2b21 cmp r3, #33 ; 0x21 - 8006df4: d12a bne.n 8006e4c + 8006e2a: 687b ldr r3, [r7, #4] + 8006e2c: 6f9b ldr r3, [r3, #120] ; 0x78 + 8006e2e: 2b21 cmp r3, #33 ; 0x21 + 8006e30: d12a bne.n 8006e88 { if (huart->TxXferCount == 0U) - 8006df6: 687b ldr r3, [r7, #4] - 8006df8: 2252 movs r2, #82 ; 0x52 - 8006dfa: 5a9b ldrh r3, [r3, r2] - 8006dfc: b29b uxth r3, r3 - 8006dfe: 2b00 cmp r3, #0 - 8006e00: d110 bne.n 8006e24 + 8006e32: 687b ldr r3, [r7, #4] + 8006e34: 2252 movs r2, #82 ; 0x52 + 8006e36: 5a9b ldrh r3, [r3, r2] + 8006e38: b29b uxth r3, r3 + 8006e3a: 2b00 cmp r3, #0 + 8006e3c: d110 bne.n 8006e60 { /* Disable the UART Transmit Data Register Empty Interrupt */ CLEAR_BIT(huart->Instance->CR1, USART_CR1_TXEIE); - 8006e02: 687b ldr r3, [r7, #4] - 8006e04: 681b ldr r3, [r3, #0] - 8006e06: 687a ldr r2, [r7, #4] - 8006e08: 6812 ldr r2, [r2, #0] - 8006e0a: 6812 ldr r2, [r2, #0] - 8006e0c: 2180 movs r1, #128 ; 0x80 - 8006e0e: 438a bics r2, r1 - 8006e10: 601a str r2, [r3, #0] + 8006e3e: 687b ldr r3, [r7, #4] + 8006e40: 681b ldr r3, [r3, #0] + 8006e42: 687a ldr r2, [r7, #4] + 8006e44: 6812 ldr r2, [r2, #0] + 8006e46: 6812 ldr r2, [r2, #0] + 8006e48: 2180 movs r1, #128 ; 0x80 + 8006e4a: 438a bics r2, r1 + 8006e4c: 601a str r2, [r3, #0] /* Enable the UART Transmit Complete Interrupt */ SET_BIT(huart->Instance->CR1, USART_CR1_TCIE); - 8006e12: 687b ldr r3, [r7, #4] - 8006e14: 681b ldr r3, [r3, #0] - 8006e16: 687a ldr r2, [r7, #4] - 8006e18: 6812 ldr r2, [r2, #0] - 8006e1a: 6812 ldr r2, [r2, #0] - 8006e1c: 2140 movs r1, #64 ; 0x40 - 8006e1e: 430a orrs r2, r1 - 8006e20: 601a str r2, [r3, #0] + 8006e4e: 687b ldr r3, [r7, #4] + 8006e50: 681b ldr r3, [r3, #0] + 8006e52: 687a ldr r2, [r7, #4] + 8006e54: 6812 ldr r2, [r2, #0] + 8006e56: 6812 ldr r2, [r2, #0] + 8006e58: 2140 movs r1, #64 ; 0x40 + 8006e5a: 430a orrs r2, r1 + 8006e5c: 601a str r2, [r3, #0] huart->Instance->TDR = (uint8_t)(*huart->pTxBuffPtr & (uint8_t)0xFF); huart->pTxBuffPtr++; huart->TxXferCount--; } } } - 8006e22: e013 b.n 8006e4c + 8006e5e: e013 b.n 8006e88 huart->Instance->TDR = (uint8_t)(*huart->pTxBuffPtr & (uint8_t)0xFF); - 8006e24: 687b ldr r3, [r7, #4] - 8006e26: 681b ldr r3, [r3, #0] - 8006e28: 687a ldr r2, [r7, #4] - 8006e2a: 6cd2 ldr r2, [r2, #76] ; 0x4c - 8006e2c: 7812 ldrb r2, [r2, #0] - 8006e2e: 629a str r2, [r3, #40] ; 0x28 + 8006e60: 687b ldr r3, [r7, #4] + 8006e62: 681b ldr r3, [r3, #0] + 8006e64: 687a ldr r2, [r7, #4] + 8006e66: 6cd2 ldr r2, [r2, #76] ; 0x4c + 8006e68: 7812 ldrb r2, [r2, #0] + 8006e6a: 629a str r2, [r3, #40] ; 0x28 huart->pTxBuffPtr++; - 8006e30: 687b ldr r3, [r7, #4] - 8006e32: 6cdb ldr r3, [r3, #76] ; 0x4c - 8006e34: 1c5a adds r2, r3, #1 - 8006e36: 687b ldr r3, [r7, #4] - 8006e38: 64da str r2, [r3, #76] ; 0x4c + 8006e6c: 687b ldr r3, [r7, #4] + 8006e6e: 6cdb ldr r3, [r3, #76] ; 0x4c + 8006e70: 1c5a adds r2, r3, #1 + 8006e72: 687b ldr r3, [r7, #4] + 8006e74: 64da str r2, [r3, #76] ; 0x4c huart->TxXferCount--; - 8006e3a: 687b ldr r3, [r7, #4] - 8006e3c: 2252 movs r2, #82 ; 0x52 - 8006e3e: 5a9b ldrh r3, [r3, r2] - 8006e40: b29b uxth r3, r3 - 8006e42: 3b01 subs r3, #1 - 8006e44: b299 uxth r1, r3 - 8006e46: 687b ldr r3, [r7, #4] - 8006e48: 2252 movs r2, #82 ; 0x52 - 8006e4a: 5299 strh r1, [r3, r2] + 8006e76: 687b ldr r3, [r7, #4] + 8006e78: 2252 movs r2, #82 ; 0x52 + 8006e7a: 5a9b ldrh r3, [r3, r2] + 8006e7c: b29b uxth r3, r3 + 8006e7e: 3b01 subs r3, #1 + 8006e80: b299 uxth r1, r3 + 8006e82: 687b ldr r3, [r7, #4] + 8006e84: 2252 movs r2, #82 ; 0x52 + 8006e86: 5299 strh r1, [r3, r2] } - 8006e4c: 46c0 nop ; (mov r8, r8) - 8006e4e: 46bd mov sp, r7 - 8006e50: b002 add sp, #8 - 8006e52: bd80 pop {r7, pc} + 8006e88: 46c0 nop ; (mov r8, r8) + 8006e8a: 46bd mov sp, r7 + 8006e8c: b002 add sp, #8 + 8006e8e: bd80 pop {r7, pc} -08006e54 : +08006e90 : * interruptions have been enabled by HAL_UART_Transmit_IT(). * @param huart UART handle. * @retval None */ static void UART_TxISR_16BIT(UART_HandleTypeDef *huart) { - 8006e54: b580 push {r7, lr} - 8006e56: b084 sub sp, #16 - 8006e58: af00 add r7, sp, #0 - 8006e5a: 6078 str r0, [r7, #4] + 8006e90: b580 push {r7, lr} + 8006e92: b084 sub sp, #16 + 8006e94: af00 add r7, sp, #0 + 8006e96: 6078 str r0, [r7, #4] uint16_t *tmp; /* Check that a Tx process is ongoing */ if (huart->gState == HAL_UART_STATE_BUSY_TX) - 8006e5c: 687b ldr r3, [r7, #4] - 8006e5e: 6f9b ldr r3, [r3, #120] ; 0x78 - 8006e60: 2b21 cmp r3, #33 ; 0x21 - 8006e62: d12e bne.n 8006ec2 + 8006e98: 687b ldr r3, [r7, #4] + 8006e9a: 6f9b ldr r3, [r3, #120] ; 0x78 + 8006e9c: 2b21 cmp r3, #33 ; 0x21 + 8006e9e: d12e bne.n 8006efe { if (huart->TxXferCount == 0U) - 8006e64: 687b ldr r3, [r7, #4] - 8006e66: 2252 movs r2, #82 ; 0x52 - 8006e68: 5a9b ldrh r3, [r3, r2] - 8006e6a: b29b uxth r3, r3 - 8006e6c: 2b00 cmp r3, #0 - 8006e6e: d110 bne.n 8006e92 + 8006ea0: 687b ldr r3, [r7, #4] + 8006ea2: 2252 movs r2, #82 ; 0x52 + 8006ea4: 5a9b ldrh r3, [r3, r2] + 8006ea6: b29b uxth r3, r3 + 8006ea8: 2b00 cmp r3, #0 + 8006eaa: d110 bne.n 8006ece { /* Disable the UART Transmit Data Register Empty Interrupt */ CLEAR_BIT(huart->Instance->CR1, USART_CR1_TXEIE); - 8006e70: 687b ldr r3, [r7, #4] - 8006e72: 681b ldr r3, [r3, #0] - 8006e74: 687a ldr r2, [r7, #4] - 8006e76: 6812 ldr r2, [r2, #0] - 8006e78: 6812 ldr r2, [r2, #0] - 8006e7a: 2180 movs r1, #128 ; 0x80 - 8006e7c: 438a bics r2, r1 - 8006e7e: 601a str r2, [r3, #0] + 8006eac: 687b ldr r3, [r7, #4] + 8006eae: 681b ldr r3, [r3, #0] + 8006eb0: 687a ldr r2, [r7, #4] + 8006eb2: 6812 ldr r2, [r2, #0] + 8006eb4: 6812 ldr r2, [r2, #0] + 8006eb6: 2180 movs r1, #128 ; 0x80 + 8006eb8: 438a bics r2, r1 + 8006eba: 601a str r2, [r3, #0] /* Enable the UART Transmit Complete Interrupt */ SET_BIT(huart->Instance->CR1, USART_CR1_TCIE); - 8006e80: 687b ldr r3, [r7, #4] - 8006e82: 681b ldr r3, [r3, #0] - 8006e84: 687a ldr r2, [r7, #4] - 8006e86: 6812 ldr r2, [r2, #0] - 8006e88: 6812 ldr r2, [r2, #0] - 8006e8a: 2140 movs r1, #64 ; 0x40 - 8006e8c: 430a orrs r2, r1 - 8006e8e: 601a str r2, [r3, #0] + 8006ebc: 687b ldr r3, [r7, #4] + 8006ebe: 681b ldr r3, [r3, #0] + 8006ec0: 687a ldr r2, [r7, #4] + 8006ec2: 6812 ldr r2, [r2, #0] + 8006ec4: 6812 ldr r2, [r2, #0] + 8006ec6: 2140 movs r1, #64 ; 0x40 + 8006ec8: 430a orrs r2, r1 + 8006eca: 601a str r2, [r3, #0] huart->Instance->TDR = (((uint32_t)(*tmp)) & 0x01FFUL); huart->pTxBuffPtr += 2U; huart->TxXferCount--; } } } - 8006e90: e017 b.n 8006ec2 + 8006ecc: e017 b.n 8006efe tmp = (uint16_t *) huart->pTxBuffPtr; - 8006e92: 687b ldr r3, [r7, #4] - 8006e94: 6cdb ldr r3, [r3, #76] ; 0x4c - 8006e96: 60fb str r3, [r7, #12] + 8006ece: 687b ldr r3, [r7, #4] + 8006ed0: 6cdb ldr r3, [r3, #76] ; 0x4c + 8006ed2: 60fb str r3, [r7, #12] huart->Instance->TDR = (((uint32_t)(*tmp)) & 0x01FFUL); - 8006e98: 687b ldr r3, [r7, #4] - 8006e9a: 681b ldr r3, [r3, #0] - 8006e9c: 68fa ldr r2, [r7, #12] - 8006e9e: 8812 ldrh r2, [r2, #0] - 8006ea0: 05d2 lsls r2, r2, #23 - 8006ea2: 0dd2 lsrs r2, r2, #23 - 8006ea4: 629a str r2, [r3, #40] ; 0x28 + 8006ed4: 687b ldr r3, [r7, #4] + 8006ed6: 681b ldr r3, [r3, #0] + 8006ed8: 68fa ldr r2, [r7, #12] + 8006eda: 8812 ldrh r2, [r2, #0] + 8006edc: 05d2 lsls r2, r2, #23 + 8006ede: 0dd2 lsrs r2, r2, #23 + 8006ee0: 629a str r2, [r3, #40] ; 0x28 huart->pTxBuffPtr += 2U; - 8006ea6: 687b ldr r3, [r7, #4] - 8006ea8: 6cdb ldr r3, [r3, #76] ; 0x4c - 8006eaa: 1c9a adds r2, r3, #2 - 8006eac: 687b ldr r3, [r7, #4] - 8006eae: 64da str r2, [r3, #76] ; 0x4c + 8006ee2: 687b ldr r3, [r7, #4] + 8006ee4: 6cdb ldr r3, [r3, #76] ; 0x4c + 8006ee6: 1c9a adds r2, r3, #2 + 8006ee8: 687b ldr r3, [r7, #4] + 8006eea: 64da str r2, [r3, #76] ; 0x4c huart->TxXferCount--; - 8006eb0: 687b ldr r3, [r7, #4] - 8006eb2: 2252 movs r2, #82 ; 0x52 - 8006eb4: 5a9b ldrh r3, [r3, r2] - 8006eb6: b29b uxth r3, r3 - 8006eb8: 3b01 subs r3, #1 - 8006eba: b299 uxth r1, r3 - 8006ebc: 687b ldr r3, [r7, #4] - 8006ebe: 2252 movs r2, #82 ; 0x52 - 8006ec0: 5299 strh r1, [r3, r2] + 8006eec: 687b ldr r3, [r7, #4] + 8006eee: 2252 movs r2, #82 ; 0x52 + 8006ef0: 5a9b ldrh r3, [r3, r2] + 8006ef2: b29b uxth r3, r3 + 8006ef4: 3b01 subs r3, #1 + 8006ef6: b299 uxth r1, r3 + 8006ef8: 687b ldr r3, [r7, #4] + 8006efa: 2252 movs r2, #82 ; 0x52 + 8006efc: 5299 strh r1, [r3, r2] } - 8006ec2: 46c0 nop ; (mov r8, r8) - 8006ec4: 46bd mov sp, r7 - 8006ec6: b004 add sp, #16 - 8006ec8: bd80 pop {r7, pc} + 8006efe: 46c0 nop ; (mov r8, r8) + 8006f00: 46bd mov sp, r7 + 8006f02: b004 add sp, #16 + 8006f04: bd80 pop {r7, pc} -08006eca : +08006f06 : * @param huart pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval None */ static void UART_EndTransmit_IT(UART_HandleTypeDef *huart) { - 8006eca: b580 push {r7, lr} - 8006ecc: b082 sub sp, #8 - 8006ece: af00 add r7, sp, #0 - 8006ed0: 6078 str r0, [r7, #4] + 8006f06: b580 push {r7, lr} + 8006f08: b082 sub sp, #8 + 8006f0a: af00 add r7, sp, #0 + 8006f0c: 6078 str r0, [r7, #4] /* Disable the UART Transmit Complete Interrupt */ CLEAR_BIT(huart->Instance->CR1, USART_CR1_TCIE); - 8006ed2: 687b ldr r3, [r7, #4] - 8006ed4: 681b ldr r3, [r3, #0] - 8006ed6: 687a ldr r2, [r7, #4] - 8006ed8: 6812 ldr r2, [r2, #0] - 8006eda: 6812 ldr r2, [r2, #0] - 8006edc: 2140 movs r1, #64 ; 0x40 - 8006ede: 438a bics r2, r1 - 8006ee0: 601a str r2, [r3, #0] + 8006f0e: 687b ldr r3, [r7, #4] + 8006f10: 681b ldr r3, [r3, #0] + 8006f12: 687a ldr r2, [r7, #4] + 8006f14: 6812 ldr r2, [r2, #0] + 8006f16: 6812 ldr r2, [r2, #0] + 8006f18: 2140 movs r1, #64 ; 0x40 + 8006f1a: 438a bics r2, r1 + 8006f1c: 601a str r2, [r3, #0] /* Tx process is ended, restore huart->gState to Ready */ huart->gState = HAL_UART_STATE_READY; - 8006ee2: 687b ldr r3, [r7, #4] - 8006ee4: 2220 movs r2, #32 - 8006ee6: 679a str r2, [r3, #120] ; 0x78 + 8006f1e: 687b ldr r3, [r7, #4] + 8006f20: 2220 movs r2, #32 + 8006f22: 679a str r2, [r3, #120] ; 0x78 /* Cleat TxISR function pointer */ huart->TxISR = NULL; - 8006ee8: 687b ldr r3, [r7, #4] - 8006eea: 2200 movs r2, #0 - 8006eec: 669a str r2, [r3, #104] ; 0x68 + 8006f24: 687b ldr r3, [r7, #4] + 8006f26: 2200 movs r2, #0 + 8006f28: 669a str r2, [r3, #104] ; 0x68 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered Tx complete callback*/ huart->TxCpltCallback(huart); #else /*Call legacy weak Tx complete callback*/ HAL_UART_TxCpltCallback(huart); - 8006eee: 687b ldr r3, [r7, #4] - 8006ef0: 0018 movs r0, r3 - 8006ef2: f7fc febf bl 8003c74 + 8006f2a: 687b ldr r3, [r7, #4] + 8006f2c: 0018 movs r0, r3 + 8006f2e: f7fc feb5 bl 8003c9c #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ } - 8006ef6: 46c0 nop ; (mov r8, r8) - 8006ef8: 46bd mov sp, r7 - 8006efa: b002 add sp, #8 - 8006efc: bd80 pop {r7, pc} + 8006f32: 46c0 nop ; (mov r8, r8) + 8006f34: 46bd mov sp, r7 + 8006f36: b002 add sp, #8 + 8006f38: bd80 pop {r7, pc} -08006efe : +08006f3a : * @brief UART wakeup from Stop mode callback. * @param huart UART handle. * @retval None */ __weak void HAL_UARTEx_WakeupCallback(UART_HandleTypeDef *huart) { - 8006efe: b580 push {r7, lr} - 8006f00: b082 sub sp, #8 - 8006f02: af00 add r7, sp, #0 - 8006f04: 6078 str r0, [r7, #4] + 8006f3a: b580 push {r7, lr} + 8006f3c: b082 sub sp, #8 + 8006f3e: af00 add r7, sp, #0 + 8006f40: 6078 str r0, [r7, #4] UNUSED(huart); /* NOTE : This function should not be modified, when the callback is needed, the HAL_UARTEx_WakeupCallback can be implemented in the user file. */ } - 8006f06: 46c0 nop ; (mov r8, r8) - 8006f08: 46bd mov sp, r7 - 8006f0a: b002 add sp, #8 - 8006f0c: bd80 pop {r7, pc} + 8006f42: 46c0 nop ; (mov r8, r8) + 8006f44: 46bd mov sp, r7 + 8006f46: b002 add sp, #8 + 8006f48: bd80 pop {r7, pc} ... -08006f10 : +08006f4c : .section .text.Reset_Handler .weak Reset_Handler .type Reset_Handler, %function Reset_Handler: ldr r0, =_estack - 8006f10: 480d ldr r0, [pc, #52] ; (8006f48 ) + 8006f4c: 480d ldr r0, [pc, #52] ; (8006f84 ) mov sp, r0 /* set stack pointer */ - 8006f12: 4685 mov sp, r0 + 8006f4e: 4685 mov sp, r0 /* Copy the data segment initializers from flash to SRAM */ ldr r0, =_sdata - 8006f14: 480d ldr r0, [pc, #52] ; (8006f4c ) + 8006f50: 480d ldr r0, [pc, #52] ; (8006f88 ) ldr r1, =_edata - 8006f16: 490e ldr r1, [pc, #56] ; (8006f50 ) + 8006f52: 490e ldr r1, [pc, #56] ; (8006f8c ) ldr r2, =_sidata - 8006f18: 4a0e ldr r2, [pc, #56] ; (8006f54 ) + 8006f54: 4a0e ldr r2, [pc, #56] ; (8006f90 ) movs r3, #0 - 8006f1a: 2300 movs r3, #0 + 8006f56: 2300 movs r3, #0 b LoopCopyDataInit - 8006f1c: e002 b.n 8006f24 + 8006f58: e002 b.n 8006f60 -08006f1e : +08006f5a : CopyDataInit: ldr r4, [r2, r3] - 8006f1e: 58d4 ldr r4, [r2, r3] + 8006f5a: 58d4 ldr r4, [r2, r3] str r4, [r0, r3] - 8006f20: 50c4 str r4, [r0, r3] + 8006f5c: 50c4 str r4, [r0, r3] adds r3, r3, #4 - 8006f22: 3304 adds r3, #4 + 8006f5e: 3304 adds r3, #4 -08006f24 : +08006f60 : LoopCopyDataInit: adds r4, r0, r3 - 8006f24: 18c4 adds r4, r0, r3 + 8006f60: 18c4 adds r4, r0, r3 cmp r4, r1 - 8006f26: 428c cmp r4, r1 + 8006f62: 428c cmp r4, r1 bcc CopyDataInit - 8006f28: d3f9 bcc.n 8006f1e + 8006f64: d3f9 bcc.n 8006f5a /* Zero fill the bss segment. */ ldr r2, =_sbss - 8006f2a: 4a0b ldr r2, [pc, #44] ; (8006f58 ) + 8006f66: 4a0b ldr r2, [pc, #44] ; (8006f94 ) ldr r4, =_ebss - 8006f2c: 4c0b ldr r4, [pc, #44] ; (8006f5c ) + 8006f68: 4c0b ldr r4, [pc, #44] ; (8006f98 ) movs r3, #0 - 8006f2e: 2300 movs r3, #0 + 8006f6a: 2300 movs r3, #0 b LoopFillZerobss - 8006f30: e001 b.n 8006f36 + 8006f6c: e001 b.n 8006f72 -08006f32 : +08006f6e : FillZerobss: str r3, [r2] - 8006f32: 6013 str r3, [r2, #0] + 8006f6e: 6013 str r3, [r2, #0] adds r2, r2, #4 - 8006f34: 3204 adds r2, #4 + 8006f70: 3204 adds r2, #4 -08006f36 : +08006f72 : LoopFillZerobss: cmp r2, r4 - 8006f36: 42a2 cmp r2, r4 + 8006f72: 42a2 cmp r2, r4 bcc FillZerobss - 8006f38: d3fb bcc.n 8006f32 + 8006f74: d3fb bcc.n 8006f6e /* Call the clock system intitialization function.*/ bl SystemInit - 8006f3a: f7fb f9df bl 80022fc + 8006f76: f7fb f9d5 bl 8002324 /* Call static constructors */ bl __libc_init_array - 8006f3e: f000 f811 bl 8006f64 <__libc_init_array> + 8006f7a: f000 f811 bl 8006fa0 <__libc_init_array> /* Call the application's entry point.*/ bl main - 8006f42: f7fb f89b bl 800207c
+ 8006f7e: f7fb f86b bl 8002058
-08006f46 : +08006f82 : LoopForever: b LoopForever - 8006f46: e7fe b.n 8006f46 + 8006f82: e7fe b.n 8006f82 ldr r0, =_estack - 8006f48: 20005000 .word 0x20005000 + 8006f84: 20005000 .word 0x20005000 ldr r0, =_sdata - 8006f4c: 20000000 .word 0x20000000 + 8006f88: 20000000 .word 0x20000000 ldr r1, =_edata - 8006f50: 20000010 .word 0x20000010 + 8006f8c: 20000010 .word 0x20000010 ldr r2, =_sidata - 8006f54: 0800749c .word 0x0800749c + 8006f90: 080074d8 .word 0x080074d8 ldr r2, =_sbss - 8006f58: 20000010 .word 0x20000010 + 8006f94: 20000010 .word 0x20000010 ldr r4, =_ebss - 8006f5c: 200003a8 .word 0x200003a8 + 8006f98: 200003b0 .word 0x200003b0 -08006f60 : +08006f9c : * @retval : None */ .section .text.Default_Handler,"ax",%progbits Default_Handler: Infinite_Loop: b Infinite_Loop - 8006f60: e7fe b.n 8006f60 + 8006f9c: e7fe b.n 8006f9c ... -08006f64 <__libc_init_array>: - 8006f64: b570 push {r4, r5, r6, lr} - 8006f66: 2600 movs r6, #0 - 8006f68: 4d0c ldr r5, [pc, #48] ; (8006f9c <__libc_init_array+0x38>) - 8006f6a: 4c0d ldr r4, [pc, #52] ; (8006fa0 <__libc_init_array+0x3c>) - 8006f6c: 1b64 subs r4, r4, r5 - 8006f6e: 10a4 asrs r4, r4, #2 - 8006f70: 42a6 cmp r6, r4 - 8006f72: d109 bne.n 8006f88 <__libc_init_array+0x24> - 8006f74: 2600 movs r6, #0 - 8006f76: f000 f82b bl 8006fd0 <_init> - 8006f7a: 4d0a ldr r5, [pc, #40] ; (8006fa4 <__libc_init_array+0x40>) - 8006f7c: 4c0a ldr r4, [pc, #40] ; (8006fa8 <__libc_init_array+0x44>) - 8006f7e: 1b64 subs r4, r4, r5 - 8006f80: 10a4 asrs r4, r4, #2 - 8006f82: 42a6 cmp r6, r4 - 8006f84: d105 bne.n 8006f92 <__libc_init_array+0x2e> - 8006f86: bd70 pop {r4, r5, r6, pc} - 8006f88: 00b3 lsls r3, r6, #2 - 8006f8a: 58eb ldr r3, [r5, r3] - 8006f8c: 4798 blx r3 - 8006f8e: 3601 adds r6, #1 - 8006f90: e7ee b.n 8006f70 <__libc_init_array+0xc> - 8006f92: 00b3 lsls r3, r6, #2 - 8006f94: 58eb ldr r3, [r5, r3] - 8006f96: 4798 blx r3 - 8006f98: 3601 adds r6, #1 - 8006f9a: e7f2 b.n 8006f82 <__libc_init_array+0x1e> - 8006f9c: 08007494 .word 0x08007494 - 8006fa0: 08007494 .word 0x08007494 - 8006fa4: 08007494 .word 0x08007494 - 8006fa8: 08007498 .word 0x08007498 +08006fa0 <__libc_init_array>: + 8006fa0: b570 push {r4, r5, r6, lr} + 8006fa2: 2600 movs r6, #0 + 8006fa4: 4d0c ldr r5, [pc, #48] ; (8006fd8 <__libc_init_array+0x38>) + 8006fa6: 4c0d ldr r4, [pc, #52] ; (8006fdc <__libc_init_array+0x3c>) + 8006fa8: 1b64 subs r4, r4, r5 + 8006faa: 10a4 asrs r4, r4, #2 + 8006fac: 42a6 cmp r6, r4 + 8006fae: d109 bne.n 8006fc4 <__libc_init_array+0x24> + 8006fb0: 2600 movs r6, #0 + 8006fb2: f000 f82b bl 800700c <_init> + 8006fb6: 4d0a ldr r5, [pc, #40] ; (8006fe0 <__libc_init_array+0x40>) + 8006fb8: 4c0a ldr r4, [pc, #40] ; (8006fe4 <__libc_init_array+0x44>) + 8006fba: 1b64 subs r4, r4, r5 + 8006fbc: 10a4 asrs r4, r4, #2 + 8006fbe: 42a6 cmp r6, r4 + 8006fc0: d105 bne.n 8006fce <__libc_init_array+0x2e> + 8006fc2: bd70 pop {r4, r5, r6, pc} + 8006fc4: 00b3 lsls r3, r6, #2 + 8006fc6: 58eb ldr r3, [r5, r3] + 8006fc8: 4798 blx r3 + 8006fca: 3601 adds r6, #1 + 8006fcc: e7ee b.n 8006fac <__libc_init_array+0xc> + 8006fce: 00b3 lsls r3, r6, #2 + 8006fd0: 58eb ldr r3, [r5, r3] + 8006fd2: 4798 blx r3 + 8006fd4: 3601 adds r6, #1 + 8006fd6: e7f2 b.n 8006fbe <__libc_init_array+0x1e> + 8006fd8: 080074d0 .word 0x080074d0 + 8006fdc: 080074d0 .word 0x080074d0 + 8006fe0: 080074d0 .word 0x080074d0 + 8006fe4: 080074d4 .word 0x080074d4 -08006fac : - 8006fac: 2300 movs r3, #0 - 8006fae: b510 push {r4, lr} - 8006fb0: 429a cmp r2, r3 - 8006fb2: d100 bne.n 8006fb6 - 8006fb4: bd10 pop {r4, pc} - 8006fb6: 5ccc ldrb r4, [r1, r3] - 8006fb8: 54c4 strb r4, [r0, r3] - 8006fba: 3301 adds r3, #1 - 8006fbc: e7f8 b.n 8006fb0 +08006fe8 : + 8006fe8: 2300 movs r3, #0 + 8006fea: b510 push {r4, lr} + 8006fec: 429a cmp r2, r3 + 8006fee: d100 bne.n 8006ff2 + 8006ff0: bd10 pop {r4, pc} + 8006ff2: 5ccc ldrb r4, [r1, r3] + 8006ff4: 54c4 strb r4, [r0, r3] + 8006ff6: 3301 adds r3, #1 + 8006ff8: e7f8 b.n 8006fec -08006fbe : - 8006fbe: 0003 movs r3, r0 - 8006fc0: 1882 adds r2, r0, r2 - 8006fc2: 4293 cmp r3, r2 - 8006fc4: d100 bne.n 8006fc8 - 8006fc6: 4770 bx lr - 8006fc8: 7019 strb r1, [r3, #0] - 8006fca: 3301 adds r3, #1 - 8006fcc: e7f9 b.n 8006fc2 +08006ffa : + 8006ffa: 0003 movs r3, r0 + 8006ffc: 1882 adds r2, r0, r2 + 8006ffe: 4293 cmp r3, r2 + 8007000: d100 bne.n 8007004 + 8007002: 4770 bx lr + 8007004: 7019 strb r1, [r3, #0] + 8007006: 3301 adds r3, #1 + 8007008: e7f9 b.n 8006ffe ... -08006fd0 <_init>: - 8006fd0: b5f8 push {r3, r4, r5, r6, r7, lr} - 8006fd2: 46c0 nop ; (mov r8, r8) - 8006fd4: bcf8 pop {r3, r4, r5, r6, r7} - 8006fd6: bc08 pop {r3} - 8006fd8: 469e mov lr, r3 - 8006fda: 4770 bx lr +0800700c <_init>: + 800700c: b5f8 push {r3, r4, r5, r6, r7, lr} + 800700e: 46c0 nop ; (mov r8, r8) + 8007010: bcf8 pop {r3, r4, r5, r6, r7} + 8007012: bc08 pop {r3} + 8007014: 469e mov lr, r3 + 8007016: 4770 bx lr -08006fdc <_fini>: - 8006fdc: b5f8 push {r3, r4, r5, r6, r7, lr} - 8006fde: 46c0 nop ; (mov r8, r8) - 8006fe0: bcf8 pop {r3, r4, r5, r6, r7} - 8006fe2: bc08 pop {r3} - 8006fe4: 469e mov lr, r3 - 8006fe6: 4770 bx lr +08007018 <_fini>: + 8007018: b5f8 push {r3, r4, r5, r6, r7, lr} + 800701a: 46c0 nop ; (mov r8, r8) + 800701c: bcf8 pop {r3, r4, r5, r6, r7} + 800701e: bc08 pop {r3} + 8007020: 469e mov lr, r3 + 8007022: 4770 bx lr diff --git a/Debug/A141 Amplifier.map b/Debug/A141 Amplifier.map index 72a5369..37d28b7 100644 --- a/Debug/A141 Amplifier.map +++ b/Debug/A141 Amplifier.map @@ -173,10 +173,6 @@ Discarded input sections 0x00000000 0x14 Core\Src\tim.o .rodata.time35 0x00000000 0x14 Core\Src\tim.o - .bss.timerUPER - 0x00000000 0x2 Core\Src\tim.o - .bss.timerOP 0x00000000 0x2 Core\Src\tim.o - .bss.timerKZ 0x00000000 0x2 Core\Src\tim.o .text.HAL_TIM_Base_MspDeInit 0x00000000 0x34 Core\Src\tim.o .text 0x00000000 0x0 Core\Src\usart.o @@ -1281,7 +1277,7 @@ LOAD c:/program files (x86)/atollic/truestudio for stm32 9.1.0/armtools/bin/../l 0x08000000 g_pfnVectors 0x080000c0 . = ALIGN (0x4) -.text 0x080000c0 0x6f28 +.text 0x080000c0 0x6f64 0x080000c0 . = ALIGN (0x4) *(.text) .text 0x080000c0 0x48 c:/program files (x86)/atollic/truestudio for stm32 9.1.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/armv6-m/crtbegin.o @@ -1375,393 +1371,393 @@ LOAD c:/program files (x86)/atollic/truestudio for stm32 9.1.0/armtools/bin/../l .text.rdCorr 0x08001e28 0xc4 Core\Src\flash.o 0x08001e28 rdCorr .text.MX_GPIO_Init - 0x08001eec 0x190 Core\Src\gpio.o + 0x08001eec 0x16c Core\Src\gpio.o 0x08001eec MX_GPIO_Init - .text.main 0x0800207c 0x74 Core\Src\main.o - 0x0800207c main + .text.main 0x08002058 0x78 Core\Src\main.o + 0x08002058 main .text.SystemClock_Config - 0x080020f0 0xfc Core\Src\main.o - 0x080020f0 SystemClock_Config + 0x080020d0 0xfc Core\Src\main.o + 0x080020d0 SystemClock_Config .text.Error_Handler - 0x080021ec 0x8 Core\Src\main.o - 0x080021ec Error_Handler + 0x080021cc 0x8 Core\Src\main.o + 0x080021cc Error_Handler .text.HAL_MspInit - 0x080021f4 0x28 Core\Src\stm32l0xx_hal_msp.o - 0x080021f4 HAL_MspInit + 0x080021d4 0x28 Core\Src\stm32l0xx_hal_msp.o + 0x080021d4 HAL_MspInit .text.NMI_Handler - 0x0800221c 0x6 Core\Src\stm32l0xx_it.o - 0x0800221c NMI_Handler + 0x080021fc 0x6 Core\Src\stm32l0xx_it.o + 0x080021fc NMI_Handler .text.HardFault_Handler - 0x08002222 0x6 Core\Src\stm32l0xx_it.o - 0x08002222 HardFault_Handler + 0x08002202 0x6 Core\Src\stm32l0xx_it.o + 0x08002202 HardFault_Handler .text.SVC_Handler - 0x08002228 0xa Core\Src\stm32l0xx_it.o - 0x08002228 SVC_Handler + 0x08002208 0xa Core\Src\stm32l0xx_it.o + 0x08002208 SVC_Handler .text.PendSV_Handler - 0x08002232 0xa Core\Src\stm32l0xx_it.o - 0x08002232 PendSV_Handler + 0x08002212 0xa Core\Src\stm32l0xx_it.o + 0x08002212 PendSV_Handler .text.SysTick_Handler - 0x0800223c 0x80 Core\Src\stm32l0xx_it.o - 0x0800223c SysTick_Handler + 0x0800221c 0xc8 Core\Src\stm32l0xx_it.o + 0x0800221c SysTick_Handler .text.EXTI0_1_IRQHandler - 0x080022bc 0x16 Core\Src\stm32l0xx_it.o - 0x080022bc EXTI0_1_IRQHandler + 0x080022e4 0x16 Core\Src\stm32l0xx_it.o + 0x080022e4 EXTI0_1_IRQHandler .text.EXTI2_3_IRQHandler - 0x080022d2 0x10 Core\Src\stm32l0xx_it.o - 0x080022d2 EXTI2_3_IRQHandler - *fill* 0x080022e2 0x2 + 0x080022fa 0x10 Core\Src\stm32l0xx_it.o + 0x080022fa EXTI2_3_IRQHandler + *fill* 0x0800230a 0x2 .text.TIM7_IRQHandler - 0x080022e4 0x18 Core\Src\stm32l0xx_it.o - 0x080022e4 TIM7_IRQHandler + 0x0800230c 0x18 Core\Src\stm32l0xx_it.o + 0x0800230c TIM7_IRQHandler .text.SystemInit - 0x080022fc 0xa Core\Src\system_stm32l0xx.o - 0x080022fc SystemInit - *fill* 0x08002306 0x2 + 0x08002324 0xa Core\Src\system_stm32l0xx.o + 0x08002324 SystemInit + *fill* 0x0800232e 0x2 .text.MX_TIM7_Init - 0x08002308 0x80 Core\Src\tim.o - 0x08002308 MX_TIM7_Init + 0x08002330 0x80 Core\Src\tim.o + 0x08002330 MX_TIM7_Init .text.HAL_TIM_Base_MspInit - 0x08002388 0x40 Core\Src\tim.o - 0x08002388 HAL_TIM_Base_MspInit + 0x080023b0 0x40 Core\Src\tim.o + 0x080023b0 HAL_TIM_Base_MspInit .text.HAL_TIM_PeriodElapsedCallback - 0x080023c8 0x2c Core\Src\tim.o - 0x080023c8 HAL_TIM_PeriodElapsedCallback + 0x080023f0 0x2c Core\Src\tim.o + 0x080023f0 HAL_TIM_PeriodElapsedCallback .text.MX_USART1_UART_Init - 0x080023f4 0x140 Core\Src\usart.o - 0x080023f4 MX_USART1_UART_Init + 0x0800241c 0x140 Core\Src\usart.o + 0x0800241c MX_USART1_UART_Init .text.MX_USART1_UART_DeInit - 0x08002534 0x24 Core\Src\usart.o - 0x08002534 MX_USART1_UART_DeInit + 0x0800255c 0x24 Core\Src\usart.o + 0x0800255c MX_USART1_UART_DeInit .text.HAL_UART_MspInit - 0x08002558 0xa4 Core\Src\usart.o - 0x08002558 HAL_UART_MspInit + 0x08002580 0xa4 Core\Src\usart.o + 0x08002580 HAL_UART_MspInit .text.HAL_UART_MspDeInit - 0x080025fc 0x48 Core\Src\usart.o - 0x080025fc HAL_UART_MspDeInit + 0x08002624 0x48 Core\Src\usart.o + 0x08002624 HAL_UART_MspDeInit .text.USART1_IRQHandler - 0x08002644 0x94 Core\Src\usart.o - 0x08002644 USART1_IRQHandler - .text.strtOut 0x080026d8 0x98 Core\Src\usart.o - 0x080026d8 strtOut - .text.Crc16 0x08002770 0x80 Core\Src\usart.o - 0x08002770 Crc16 + 0x0800266c 0x94 Core\Src\usart.o + 0x0800266c USART1_IRQHandler + .text.strtOut 0x08002700 0x98 Core\Src\usart.o + 0x08002700 strtOut + .text.Crc16 0x08002798 0x80 Core\Src\usart.o + 0x08002798 Crc16 .text.Crc16_TX - 0x080027f0 0x80 Core\Src\usart.o - 0x080027f0 Crc16_TX + 0x08002818 0x80 Core\Src\usart.o + 0x08002818 Crc16_TX .text.SetBaudRate - 0x08002870 0x4c Core\Src\usart.o - 0x08002870 SetBaudRate + 0x08002898 0x4c Core\Src\usart.o + 0x08002898 SetBaudRate .text.HAL_UART_RxCpltCallback - 0x080028bc 0x13b8 Core\Src\usart.o - 0x080028bc HAL_UART_RxCpltCallback + 0x080028e4 0x13b8 Core\Src\usart.o + 0x080028e4 HAL_UART_RxCpltCallback .text.HAL_UART_TxCpltCallback - 0x08003c74 0xc4 Core\Src\usart.o - 0x08003c74 HAL_UART_TxCpltCallback + 0x08003c9c 0xc4 Core\Src\usart.o + 0x08003c9c HAL_UART_TxCpltCallback .text.StartTransfer - 0x08003d38 0x28 Core\Src\usart.o - 0x08003d38 StartTransfer + 0x08003d60 0x28 Core\Src\usart.o + 0x08003d60 StartTransfer .text.HAL_GPIO_EXTI_Callback - 0x08003d60 0x100 Core\Src\usart.o - 0x08003d60 HAL_GPIO_EXTI_Callback + 0x08003d88 0x114 Core\Src\usart.o + 0x08003d88 HAL_GPIO_EXTI_Callback .text.HAL_Init - 0x08003e60 0x40 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal.o - 0x08003e60 HAL_Init + 0x08003e9c 0x40 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal.o + 0x08003e9c HAL_Init .text.HAL_InitTick - 0x08003ea0 0x68 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal.o - 0x08003ea0 HAL_InitTick + 0x08003edc 0x68 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal.o + 0x08003edc HAL_InitTick .text.HAL_IncTick - 0x08003f08 0x24 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal.o - 0x08003f08 HAL_IncTick + 0x08003f44 0x24 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal.o + 0x08003f44 HAL_IncTick .text.HAL_GetTick - 0x08003f2c 0x14 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal.o - 0x08003f2c HAL_GetTick + 0x08003f68 0x14 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal.o + 0x08003f68 HAL_GetTick .text.__NVIC_EnableIRQ - 0x08003f40 0x34 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_cortex.o + 0x08003f7c 0x34 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_cortex.o .text.__NVIC_DisableIRQ - 0x08003f74 0x40 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_cortex.o + 0x08003fb0 0x40 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_cortex.o .text.__NVIC_SetPriority - 0x08003fb4 0xdc Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_cortex.o + 0x08003ff0 0xdc Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_cortex.o .text.SysTick_Config - 0x08004090 0x48 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_cortex.o + 0x080040cc 0x48 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_cortex.o .text.HAL_NVIC_SetPriority - 0x080040d8 0x2c Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_cortex.o - 0x080040d8 HAL_NVIC_SetPriority + 0x08004114 0x2c Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_cortex.o + 0x08004114 HAL_NVIC_SetPriority .text.HAL_NVIC_EnableIRQ - 0x08004104 0x20 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_cortex.o - 0x08004104 HAL_NVIC_EnableIRQ + 0x08004140 0x20 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_cortex.o + 0x08004140 HAL_NVIC_EnableIRQ .text.HAL_NVIC_DisableIRQ - 0x08004124 0x20 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_cortex.o - 0x08004124 HAL_NVIC_DisableIRQ + 0x08004160 0x20 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_cortex.o + 0x08004160 HAL_NVIC_DisableIRQ .text.HAL_SYSTICK_Config - 0x08004144 0x1a Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_cortex.o - 0x08004144 HAL_SYSTICK_Config + 0x08004180 0x1a Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_cortex.o + 0x08004180 HAL_SYSTICK_Config .text.HAL_DMA_Abort - 0x0800415e 0x80 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_dma.o - 0x0800415e HAL_DMA_Abort + 0x0800419a 0x80 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_dma.o + 0x0800419a HAL_DMA_Abort .text.HAL_DMA_Abort_IT - 0x080041de 0x90 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_dma.o - 0x080041de HAL_DMA_Abort_IT - *fill* 0x0800426e 0x2 + 0x0800421a 0x90 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_dma.o + 0x0800421a HAL_DMA_Abort_IT + *fill* 0x080042aa 0x2 .text.HAL_FLASH_Program - 0x08004270 0x78 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_flash.o - 0x08004270 HAL_FLASH_Program + 0x080042ac 0x78 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_flash.o + 0x080042ac HAL_FLASH_Program .text.HAL_FLASH_Unlock - 0x080042e8 0xa0 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_flash.o - 0x080042e8 HAL_FLASH_Unlock + 0x08004324 0xa0 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_flash.o + 0x08004324 HAL_FLASH_Unlock .text.HAL_FLASH_Lock - 0x08004388 0x28 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_flash.o - 0x08004388 HAL_FLASH_Lock + 0x080043c4 0x28 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_flash.o + 0x080043c4 HAL_FLASH_Lock .text.FLASH_WaitForLastOperation - 0x080043b0 0xe4 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_flash.o - 0x080043b0 FLASH_WaitForLastOperation + 0x080043ec 0xe4 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_flash.o + 0x080043ec FLASH_WaitForLastOperation .text.FLASH_SetErrorCode - 0x08004494 0x138 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_flash.o + 0x080044d0 0x138 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_flash.o .text.FLASH_PageErase - 0x080045cc 0x44 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_flash_ex.o - 0x080045cc FLASH_PageErase + 0x08004608 0x44 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_flash_ex.o + 0x08004608 FLASH_PageErase .text.HAL_GPIO_Init - 0x08004610 0x2fc Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_gpio.o - 0x08004610 HAL_GPIO_Init + 0x0800464c 0x2fc Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_gpio.o + 0x0800464c HAL_GPIO_Init .text.HAL_GPIO_DeInit - 0x0800490c 0x1c8 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_gpio.o - 0x0800490c HAL_GPIO_DeInit + 0x08004948 0x1c8 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_gpio.o + 0x08004948 HAL_GPIO_DeInit .text.HAL_GPIO_ReadPin - 0x08004ad4 0x3a Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_gpio.o - 0x08004ad4 HAL_GPIO_ReadPin + 0x08004b10 0x3a Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_gpio.o + 0x08004b10 HAL_GPIO_ReadPin .text.HAL_GPIO_WritePin - 0x08004b0e 0x3a Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_gpio.o - 0x08004b0e HAL_GPIO_WritePin + 0x08004b4a 0x3a Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_gpio.o + 0x08004b4a HAL_GPIO_WritePin .text.HAL_GPIO_EXTI_IRQHandler - 0x08004b48 0x38 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_gpio.o - 0x08004b48 HAL_GPIO_EXTI_IRQHandler + 0x08004b84 0x38 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_gpio.o + 0x08004b84 HAL_GPIO_EXTI_IRQHandler .text.HAL_RCC_OscConfig - 0x08004b80 0x7a4 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_rcc.o - 0x08004b80 HAL_RCC_OscConfig + 0x08004bbc 0x7a4 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_rcc.o + 0x08004bbc HAL_RCC_OscConfig .text.HAL_RCC_ClockConfig - 0x08005324 0x290 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_rcc.o - 0x08005324 HAL_RCC_ClockConfig + 0x08005360 0x290 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_rcc.o + 0x08005360 HAL_RCC_ClockConfig .text.HAL_RCC_GetSysClockFreq - 0x080055b4 0x144 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_rcc.o - 0x080055b4 HAL_RCC_GetSysClockFreq + 0x080055f0 0x144 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_rcc.o + 0x080055f0 HAL_RCC_GetSysClockFreq .text.HAL_RCC_GetHCLKFreq - 0x080056f8 0x14 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_rcc.o - 0x080056f8 HAL_RCC_GetHCLKFreq + 0x08005734 0x14 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_rcc.o + 0x08005734 HAL_RCC_GetHCLKFreq .text.HAL_RCC_GetPCLK1Freq - 0x0800570c 0x2c Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_rcc.o - 0x0800570c HAL_RCC_GetPCLK1Freq + 0x08005748 0x2c Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_rcc.o + 0x08005748 HAL_RCC_GetPCLK1Freq .text.HAL_RCC_GetPCLK2Freq - 0x08005738 0x2c Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_rcc.o - 0x08005738 HAL_RCC_GetPCLK2Freq + 0x08005774 0x2c Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_rcc.o + 0x08005774 HAL_RCC_GetPCLK2Freq .text.HAL_RCCEx_PeriphCLKConfig - 0x08005764 0x2a4 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_rcc_ex.o - 0x08005764 HAL_RCCEx_PeriphCLKConfig + 0x080057a0 0x2a4 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_rcc_ex.o + 0x080057a0 HAL_RCCEx_PeriphCLKConfig .text.HAL_TIM_Base_Init - 0x08005a08 0x80 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_tim.o - 0x08005a08 HAL_TIM_Base_Init + 0x08005a44 0x80 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_tim.o + 0x08005a44 HAL_TIM_Base_Init .text.HAL_TIM_Base_Start_IT - 0x08005a88 0xa4 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_tim.o - 0x08005a88 HAL_TIM_Base_Start_IT + 0x08005ac4 0xa4 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_tim.o + 0x08005ac4 HAL_TIM_Base_Start_IT .text.HAL_TIM_IRQHandler - 0x08005b2c 0x1d0 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_tim.o - 0x08005b2c HAL_TIM_IRQHandler + 0x08005b68 0x1d0 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_tim.o + 0x08005b68 HAL_TIM_IRQHandler .text.HAL_TIM_OC_DelayElapsedCallback - 0x08005cfc 0x10 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_tim.o - 0x08005cfc HAL_TIM_OC_DelayElapsedCallback + 0x08005d38 0x10 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_tim.o + 0x08005d38 HAL_TIM_OC_DelayElapsedCallback .text.HAL_TIM_IC_CaptureCallback - 0x08005d0c 0x10 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_tim.o - 0x08005d0c HAL_TIM_IC_CaptureCallback + 0x08005d48 0x10 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_tim.o + 0x08005d48 HAL_TIM_IC_CaptureCallback .text.HAL_TIM_PWM_PulseFinishedCallback - 0x08005d1c 0x10 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_tim.o - 0x08005d1c HAL_TIM_PWM_PulseFinishedCallback + 0x08005d58 0x10 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_tim.o + 0x08005d58 HAL_TIM_PWM_PulseFinishedCallback .text.HAL_TIM_TriggerCallback - 0x08005d2c 0x10 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_tim.o - 0x08005d2c HAL_TIM_TriggerCallback + 0x08005d68 0x10 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_tim.o + 0x08005d68 HAL_TIM_TriggerCallback .text.TIM_Base_SetConfig - 0x08005d3c 0xbc Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_tim.o + 0x08005d78 0xbc Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_tim.o .text.HAL_TIMEx_MasterConfigSynchronization - 0x08005df8 0xbc Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_tim_ex.o - 0x08005df8 HAL_TIMEx_MasterConfigSynchronization + 0x08005e34 0xbc Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_tim_ex.o + 0x08005e34 HAL_TIMEx_MasterConfigSynchronization .text.HAL_UART_Init - 0x08005eb4 0xa8 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_uart.o - 0x08005eb4 HAL_UART_Init + 0x08005ef0 0xa8 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_uart.o + 0x08005ef0 HAL_UART_Init .text.HAL_UART_DeInit - 0x08005f5c 0x74 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_uart.o - 0x08005f5c HAL_UART_DeInit + 0x08005f98 0x74 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_uart.o + 0x08005f98 HAL_UART_DeInit .text.HAL_UART_Transmit_IT - 0x08005fd0 0xdc Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_uart.o - 0x08005fd0 HAL_UART_Transmit_IT + 0x0800600c 0xdc Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_uart.o + 0x0800600c HAL_UART_Transmit_IT .text.HAL_UART_IRQHandler - 0x080060ac 0x418 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_uart.o - 0x080060ac HAL_UART_IRQHandler + 0x080060e8 0x418 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_uart.o + 0x080060e8 HAL_UART_IRQHandler .text.HAL_UART_ErrorCallback - 0x080064c4 0x10 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_uart.o - 0x080064c4 HAL_UART_ErrorCallback + 0x08006500 0x10 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_uart.o + 0x08006500 HAL_UART_ErrorCallback .text.HAL_UARTEx_RxEventCallback - 0x080064d4 0x16 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_uart.o - 0x080064d4 HAL_UARTEx_RxEventCallback - *fill* 0x080064ea 0x2 + 0x08006510 0x16 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_uart.o + 0x08006510 HAL_UARTEx_RxEventCallback + *fill* 0x08006526 0x2 .text.UART_SetConfig - 0x080064ec 0x584 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_uart.o - 0x080064ec UART_SetConfig + 0x08006528 0x584 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_uart.o + 0x08006528 UART_SetConfig .text.UART_AdvFeatureConfig - 0x08006a70 0x158 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_uart.o - 0x08006a70 UART_AdvFeatureConfig + 0x08006aac 0x158 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_uart.o + 0x08006aac UART_AdvFeatureConfig .text.UART_CheckIdleState - 0x08006bc8 0x94 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_uart.o - 0x08006bc8 UART_CheckIdleState + 0x08006c04 0x94 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_uart.o + 0x08006c04 UART_CheckIdleState .text.UART_WaitOnFlagUntilTimeout - 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0x08006efe 0x10 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_uart_ex.o - 0x08006efe HAL_UARTEx_WakeupCallback - *fill* 0x08006f0e 0x2 + 0x08006f3a 0x10 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_uart_ex.o + 0x08006f3a HAL_UARTEx_WakeupCallback + *fill* 0x08006f4a 0x2 .text.Reset_Handler - 0x08006f10 0x50 startup\startup_stm32l072xx.o - 0x08006f10 Reset_Handler + 0x08006f4c 0x50 startup\startup_stm32l072xx.o + 0x08006f4c Reset_Handler .text.Default_Handler - 0x08006f60 0x2 startup\startup_stm32l072xx.o - 0x08006f60 TSC_IRQHandler - 0x08006f60 ADC1_COMP_IRQHandler - 0x08006f60 PVD_IRQHandler - 0x08006f60 I2C1_IRQHandler - 0x08006f60 RCC_CRS_IRQHandler - 0x08006f60 SPI1_IRQHandler - 0x08006f60 TIM6_DAC_IRQHandler - 0x08006f60 I2C2_IRQHandler - 0x08006f60 RTC_IRQHandler - 0x08006f60 DMA1_Channel4_5_6_7_IRQHandler - 0x08006f60 TIM3_IRQHandler - 0x08006f60 EXTI4_15_IRQHandler - 0x08006f60 DMA1_Channel1_IRQHandler - 0x08006f60 USART4_5_IRQHandler - 0x08006f60 Default_Handler - 0x08006f60 TIM22_IRQHandler - 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.fini 0x08006fdc 0x4 c:/program files (x86)/atollic/truestudio for stm32 9.1.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/armv6-m/crti.o - 0x08006fdc _fini - .fini 0x08006fe0 0x8 c:/program files (x86)/atollic/truestudio for stm32 9.1.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/armv6-m/crtn.o - 0x08006fe8 . = ALIGN (0x4) - 0x08006fe8 _etext = . + .fini 0x08007018 0x4 c:/program files (x86)/atollic/truestudio for stm32 9.1.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/armv6-m/crti.o + 0x08007018 _fini + .fini 0x0800701c 0x8 c:/program files (x86)/atollic/truestudio for stm32 9.1.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/armv6-m/crtn.o + 0x08007024 . = ALIGN (0x4) + 0x08007024 _etext = . -.vfp11_veneer 0x08006fe8 0x0 - .vfp11_veneer 0x08006fe8 0x0 linker stubs +.vfp11_veneer 0x08007024 0x0 + .vfp11_veneer 0x08007024 0x0 linker stubs -.v4_bx 0x08006fe8 0x0 - .v4_bx 0x08006fe8 0x0 linker stubs +.v4_bx 0x08007024 0x0 + .v4_bx 0x08007024 0x0 linker stubs -.iplt 0x08006fe8 0x0 - .iplt 0x08006fe8 0x0 c:/program files (x86)/atollic/truestudio for stm32 9.1.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/armv6-m/crtbegin.o +.iplt 0x08007024 0x0 + .iplt 0x08007024 0x0 c:/program files (x86)/atollic/truestudio for stm32 9.1.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/armv6-m/crtbegin.o -.rodata 0x08006fe8 0x4a4 - 0x08006fe8 . = ALIGN (0x4) +.rodata 0x08007024 0x4a4 + 0x08007024 . = ALIGN (0x4) *(.rodata) - .rodata 0x08006fe8 0x80 c:/program files (x86)/atollic/truestudio for stm32 9.1.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/armv6-m\libgcc.a(divsf3.o) - .rodata 0x08007068 0x40 c:/program files (x86)/atollic/truestudio for stm32 9.1.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/armv6-m\libgcc.a(mulsf3.o) + .rodata 0x08007024 0x80 c:/program files (x86)/atollic/truestudio for stm32 9.1.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/armv6-m\libgcc.a(divsf3.o) + .rodata 0x080070a4 0x40 c:/program files (x86)/atollic/truestudio for stm32 9.1.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/armv6-m\libgcc.a(mulsf3.o) *(.rodata*) .rodata.SetAndCorrect - 0x080070a8 0x68 Core\Src\amplif.o + 0x080070e4 0x68 Core\Src\amplif.o .rodata.initCalibr - 0x08007110 0x5c Core\Src\amplif.o + 0x0800714c 0x5c Core\Src\amplif.o .rodata.FACTORY_CORR - 0x0800716c 0x50 Core\Src\flash.o + 0x080071a8 0x50 Core\Src\flash.o .rodata.time35 - 0x080071bc 0x14 Core\Src\stm32l0xx_it.o + 0x080071f8 0x14 Core\Src\stm32l0xx_it.o .rodata.AHBPrescTable - 0x080071d0 0x10 Core\Src\system_stm32l0xx.o - 0x080071d0 AHBPrescTable + 0x0800720c 0x10 Core\Src\system_stm32l0xx.o + 0x0800720c AHBPrescTable .rodata.APBPrescTable - 0x080071e0 0x8 Core\Src\system_stm32l0xx.o - 0x080071e0 APBPrescTable + 0x0800721c 0x8 Core\Src\system_stm32l0xx.o + 0x0800721c APBPrescTable .rodata.PLLMulTable - 0x080071e8 0x9 Core\Src\system_stm32l0xx.o - 0x080071e8 PLLMulTable - *fill* 0x080071f1 0x3 + 0x08007224 0x9 Core\Src\system_stm32l0xx.o + 0x08007224 PLLMulTable + *fill* 0x0800722d 0x3 .rodata.Crc16Table - 0x080071f4 0x200 Core\Src\usart.o + 0x08007230 0x200 Core\Src\usart.o .rodata.sendtime - 0x080073f4 0x14 Core\Src\usart.o + 0x08007430 0x14 Core\Src\usart.o .rodata.time35 - 0x08007408 0x14 Core\Src\usart.o + 0x08007444 0x14 Core\Src\usart.o .rodata.BAUDRATE - 0x0800741c 0x28 Core\Src\usart.o + 0x08007458 0x28 Core\Src\usart.o .rodata.UART_SetConfig - 0x08007444 0x48 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_uart.o - 0x0800748c . = ALIGN (0x4) + 0x08007480 0x48 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_uart.o + 0x080074c8 . = ALIGN (0x4) .ARM.extab *(.ARM.extab* .gnu.linkonce.armextab.*) -.ARM 0x0800748c 0x8 - 0x0800748c __exidx_start = . +.ARM 0x080074c8 0x8 + 0x080074c8 __exidx_start = . *(.ARM.exidx*) - .ARM.exidx 0x0800748c 0x8 c:/program files (x86)/atollic/truestudio for stm32 9.1.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/armv6-m\libgcc.a(_udivmoddi4.o) - 0x08007494 __exidx_end = . + .ARM.exidx 0x080074c8 0x8 c:/program files (x86)/atollic/truestudio for stm32 9.1.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/armv6-m\libgcc.a(_udivmoddi4.o) + 0x080074d0 __exidx_end = . -.rel.dyn 0x08007494 0x0 - .rel.iplt 0x08007494 0x0 c:/program files (x86)/atollic/truestudio for stm32 9.1.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/armv6-m/crtbegin.o +.rel.dyn 0x080074d0 0x0 + .rel.iplt 0x080074d0 0x0 c:/program files (x86)/atollic/truestudio for stm32 9.1.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/armv6-m/crtbegin.o -.preinit_array 0x08007494 0x0 - 0x08007494 PROVIDE (__preinit_array_start, .) +.preinit_array 0x080074d0 0x0 + 0x080074d0 PROVIDE (__preinit_array_start, .) *(.preinit_array*) - 0x08007494 PROVIDE (__preinit_array_end, .) + 0x080074d0 PROVIDE (__preinit_array_end, .) -.init_array 0x08007494 0x4 - 0x08007494 PROVIDE (__init_array_start, .) +.init_array 0x080074d0 0x4 + 0x080074d0 PROVIDE (__init_array_start, .) *(SORT(.init_array.*)) *(.init_array*) - .init_array 0x08007494 0x4 c:/program files (x86)/atollic/truestudio for stm32 9.1.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/armv6-m/crtbegin.o - 0x08007498 PROVIDE (__init_array_end, .) + .init_array 0x080074d0 0x4 c:/program files (x86)/atollic/truestudio for stm32 9.1.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/armv6-m/crtbegin.o + 0x080074d4 PROVIDE (__init_array_end, .) -.fini_array 0x08007498 0x4 +.fini_array 0x080074d4 0x4 [!provide] PROVIDE (__fini_array_start, .) *(SORT(.fini_array.*)) *(.fini_array*) - .fini_array 0x08007498 0x4 c:/program files (x86)/atollic/truestudio for stm32 9.1.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/armv6-m/crtbegin.o + .fini_array 0x080074d4 0x4 c:/program files (x86)/atollic/truestudio for stm32 9.1.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/armv6-m/crtbegin.o [!provide] PROVIDE (__fini_array_end, .) - 0x0800749c _sidata = LOADADDR (.data) + 0x080074d8 _sidata = LOADADDR (.data) -.data 0x20000000 0x10 load address 0x0800749c +.data 0x20000000 0x10 load address 0x080074d8 0x20000000 . = ALIGN (0x4) 0x20000000 _sdata = . *(.data) @@ -1784,11 +1780,11 @@ LOAD c:/program files (x86)/atollic/truestudio for stm32 9.1.0/armtools/bin/../l *fill* 0x2000000d 0x3 0x20000010 _edata = . -.igot.plt 0x20000010 0x0 load address 0x080074ac +.igot.plt 0x20000010 0x0 load address 0x080074e8 .igot.plt 0x20000010 0x0 c:/program files (x86)/atollic/truestudio for stm32 9.1.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/armv6-m/crtbegin.o 0x20000010 . = ALIGN (0x4) -.bss 0x20000010 0x398 load address 0x080074ac +.bss 0x20000010 0x3a0 load address 0x080074e8 0x20000010 _sbss = . 0x20000010 __bss_start__ = _sbss *(.bss) @@ -1797,58 +1793,65 @@ LOAD c:/program files (x86)/atollic/truestudio for stm32 9.1.0/armtools/bin/../l .bss.AMP_STATUS 0x2000002c 0x2 Core\Src\tim.o 0x2000002c AMP_STATUS - .bss.needClbr 0x2000002e 0x1 Core\Src\usart.o - 0x2000002e needClbr - *fill* 0x2000002f 0x1 - .bss.faseClbr 0x20000030 0x4 Core\Src\usart.o - 0x20000030 faseClbr - .bss.clbr 0x20000034 0x1 Core\Src\usart.o - 0x20000034 clbr - .bss.iolen 0x20000035 0x1 Core\Src\usart.o - 0x20000035 iolen - .bss.sendreq 0x20000036 0x1 Core\Src\usart.o - 0x20000036 sendreq - .bss.needSave 0x20000037 0x1 Core\Src\usart.o - 0x20000037 needSave - .bss.needCorr 0x20000038 0x1 Core\Src\usart.o - 0x20000038 needCorr + .bss.timerUPER + 0x2000002e 0x2 Core\Src\tim.o + 0x2000002e timerUPER + .bss.timerOP 0x20000030 0x2 Core\Src\tim.o + 0x20000030 timerOP + .bss.timerKZ 0x20000032 0x2 Core\Src\tim.o + 0x20000032 timerKZ + .bss.needClbr 0x20000034 0x1 Core\Src\usart.o + 0x20000034 needClbr + *fill* 0x20000035 0x3 + .bss.faseClbr 0x20000038 0x4 Core\Src\usart.o + 0x20000038 faseClbr + .bss.clbr 0x2000003c 0x1 Core\Src\usart.o + 0x2000003c clbr + .bss.iolen 0x2000003d 0x1 Core\Src\usart.o + 0x2000003d iolen + .bss.sendreq 0x2000003e 0x1 Core\Src\usart.o + 0x2000003e sendreq + .bss.needSave 0x2000003f 0x1 Core\Src\usart.o + 0x2000003f needSave + .bss.needCorr 0x20000040 0x1 Core\Src\usart.o + 0x20000040 needCorr *(COMMON) - *fill* 0x20000039 0x3 - COMMON 0x2000003c 0xc Core\Src\amplif.o - 0x2000003c OffsetKuDisplay - 0x20000040 DVD - 0x20000044 kNormToDAC - COMMON 0x20000048 0x78 Core\Src\flash.o - 0x20000048 CorrWord - 0x20000098 pardata - COMMON 0x200000c0 0x40 Core\Src\tim.o - 0x200000c0 htim7 - COMMON 0x20000100 0x28c Core\Src\usart.o - 0x20000100 ioa - 0x20000102 delayREDE - 0x20000104 huart1 - 0x20000188 tx - 0x20000288 timeout - 0x2000028a lastbyte - 0x2000028c iobuf - COMMON 0x2000038c 0x4 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal.o - 0x2000038c uwTick - COMMON 0x20000390 0x18 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_flash.o - 0x20000390 pFlash - 0x200003a8 . = ALIGN (0x4) - 0x200003a8 _ebss = . - 0x200003a8 __bss_end__ = _ebss + *fill* 0x20000041 0x3 + COMMON 0x20000044 0xc Core\Src\amplif.o + 0x20000044 OffsetKuDisplay + 0x20000048 DVD + 0x2000004c kNormToDAC + COMMON 0x20000050 0x78 Core\Src\flash.o + 0x20000050 CorrWord + 0x200000a0 pardata + COMMON 0x200000c8 0x40 Core\Src\tim.o + 0x200000c8 htim7 + COMMON 0x20000108 0x28c Core\Src\usart.o + 0x20000108 ioa + 0x2000010a delayREDE + 0x2000010c huart1 + 0x20000190 tx + 0x20000290 timeout + 0x20000292 lastbyte + 0x20000294 iobuf + COMMON 0x20000394 0x4 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal.o + 0x20000394 uwTick + COMMON 0x20000398 0x18 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_flash.o + 0x20000398 pFlash + 0x200003b0 . = ALIGN (0x4) + 0x200003b0 _ebss = . + 0x200003b0 __bss_end__ = _ebss ._user_heap_stack - 0x200003a8 0x600 load address 0x080074ac - 0x200003a8 . = ALIGN (0x4) - 0x200003a8 PROVIDE (end, .) + 0x200003b0 0x600 load address 0x080074e8 + 0x200003b0 . = ALIGN (0x4) + 0x200003b0 PROVIDE (end, .) [!provide] PROVIDE (_end, .) - 0x200005a8 . = (. + _Min_Heap_Size) - *fill* 0x200003a8 0x200 - 0x200009a8 . = (. + _Min_Stack_Size) - *fill* 0x200005a8 0x400 - 0x200009a8 . = ALIGN (0x4) + 0x200005b0 . = (. + _Min_Heap_Size) + *fill* 0x200003b0 0x200 + 0x200009b0 . = (. + _Min_Stack_Size) + *fill* 0x200005b0 0x400 + 0x200009b0 . = ALIGN (0x4) /DISCARD/ libc.a(*) @@ -1960,53 +1963,53 @@ LOAD c:/program files (x86)/atollic/truestudio for stm32 9.1.0/armtools/bin/../l 0x00000870 0x1e c:/program files (x86)/atollic/truestudio for stm32 9.1.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/armv6-m/crtn.o OUTPUT(A141 Amplifier.elf elf32-littlearm) -.debug_info 0x00000000 0x1130a +.debug_info 0x00000000 0x111e9 .debug_info 0x00000000 0xd9c Core\Src\amplif.o .debug_info 0x00000d9c 0xf50 Core\Src\flash.o - .debug_info 0x00001cec 0x4de Core\Src\gpio.o - .debug_info 0x000021ca 0x15ac Core\Src\main.o - .debug_info 0x00003776 0x2a6 Core\Src\stm32l0xx_hal_msp.o - .debug_info 0x00003a1c 0x13a9 Core\Src\stm32l0xx_it.o - .debug_info 0x00004dc5 0x336 Core\Src\system_stm32l0xx.o - .debug_info 0x000050fb 0x1390 Core\Src\tim.o - .debug_info 0x0000648b 0x19d2 Core\Src\usart.o - .debug_info 0x00007e5d 0x8b5 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal.o - .debug_info 0x00008712 0x930 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_cortex.o - .debug_info 0x00009042 0x7c2 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_dma.o - .debug_info 0x00009804 0x672 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_flash.o - .debug_info 0x00009e76 0xb64 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_flash_ex.o - .debug_info 0x0000a9da 0x722 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_gpio.o - .debug_info 0x0000b0fc 0x9e9 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_rcc.o - .debug_info 0x0000bae5 0x857 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_rcc_ex.o - .debug_info 0x0000c33c 0x26c1 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_tim.o - .debug_info 0x0000e9fd 0x762 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_tim_ex.o - .debug_info 0x0000f15f 0x1703 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_uart.o - .debug_info 0x00010862 0xa49 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_uart_ex.o - .debug_info 0x000112ab 0x5f startup\startup_stm32l072xx.o + .debug_info 0x00001cec 0x3ff Core\Src\gpio.o + .debug_info 0x000020eb 0x15ac Core\Src\main.o + .debug_info 0x00003697 0x2a6 Core\Src\stm32l0xx_hal_msp.o + .debug_info 0x0000393d 0x13ca Core\Src\stm32l0xx_it.o + .debug_info 0x00004d07 0x336 Core\Src\system_stm32l0xx.o + .debug_info 0x0000503d 0x1390 Core\Src\tim.o + .debug_info 0x000063cd 0x196f Core\Src\usart.o + .debug_info 0x00007d3c 0x8b5 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal.o + .debug_info 0x000085f1 0x930 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_cortex.o + .debug_info 0x00008f21 0x7c2 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_dma.o + .debug_info 0x000096e3 0x672 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_flash.o + .debug_info 0x00009d55 0xb64 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_flash_ex.o + .debug_info 0x0000a8b9 0x722 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_gpio.o + .debug_info 0x0000afdb 0x9e9 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_rcc.o + .debug_info 0x0000b9c4 0x857 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_rcc_ex.o + .debug_info 0x0000c21b 0x26c1 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_tim.o + .debug_info 0x0000e8dc 0x762 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_tim_ex.o + .debug_info 0x0000f03e 0x1703 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_uart.o + .debug_info 0x00010741 0xa49 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_uart_ex.o + .debug_info 0x0001118a 0x5f startup\startup_stm32l072xx.o -.debug_abbrev 0x00000000 0x29ed +.debug_abbrev 0x00000000 0x29e4 .debug_abbrev 0x00000000 0x259 Core\Src\amplif.o .debug_abbrev 0x00000259 0x1ef Core\Src\flash.o - .debug_abbrev 0x00000448 0x138 Core\Src\gpio.o - .debug_abbrev 0x00000580 0x20f Core\Src\main.o - .debug_abbrev 0x0000078f 0xe1 Core\Src\stm32l0xx_hal_msp.o - .debug_abbrev 0x00000870 0x1d3 Core\Src\stm32l0xx_it.o - .debug_abbrev 0x00000a43 0x126 Core\Src\system_stm32l0xx.o - .debug_abbrev 0x00000b69 0x225 Core\Src\tim.o - .debug_abbrev 0x00000d8e 0x2dd Core\Src\usart.o - .debug_abbrev 0x0000106b 0x230 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal.o - .debug_abbrev 0x0000129b 0x277 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_cortex.o - .debug_abbrev 0x00001512 0x1c7 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_dma.o - .debug_abbrev 0x000016d9 0x29d Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_flash.o - .debug_abbrev 0x00001976 0x2df Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_flash_ex.o - .debug_abbrev 0x00001c55 0x1bb Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_gpio.o - .debug_abbrev 0x00001e10 0x215 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_rcc.o - .debug_abbrev 0x00002025 0x1dc Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_rcc_ex.o - .debug_abbrev 0x00002201 0x238 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_tim.o - .debug_abbrev 0x00002439 0x197 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_tim_ex.o - .debug_abbrev 0x000025d0 0x21f Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_uart.o - .debug_abbrev 0x000027ef 0x1ec Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_uart_ex.o - .debug_abbrev 0x000029db 0x12 startup\startup_stm32l072xx.o + .debug_abbrev 0x00000448 0x12f Core\Src\gpio.o + .debug_abbrev 0x00000577 0x20f Core\Src\main.o + .debug_abbrev 0x00000786 0xe1 Core\Src\stm32l0xx_hal_msp.o + .debug_abbrev 0x00000867 0x1d3 Core\Src\stm32l0xx_it.o + .debug_abbrev 0x00000a3a 0x126 Core\Src\system_stm32l0xx.o + .debug_abbrev 0x00000b60 0x225 Core\Src\tim.o + .debug_abbrev 0x00000d85 0x2dd Core\Src\usart.o + .debug_abbrev 0x00001062 0x230 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal.o + .debug_abbrev 0x00001292 0x277 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_cortex.o + .debug_abbrev 0x00001509 0x1c7 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_dma.o + .debug_abbrev 0x000016d0 0x29d Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_flash.o + .debug_abbrev 0x0000196d 0x2df Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_flash_ex.o + .debug_abbrev 0x00001c4c 0x1bb Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_gpio.o + .debug_abbrev 0x00001e07 0x215 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_rcc.o + .debug_abbrev 0x0000201c 0x1dc Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_rcc_ex.o + .debug_abbrev 0x000021f8 0x238 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_tim.o + .debug_abbrev 0x00002430 0x197 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_tim_ex.o + .debug_abbrev 0x000025c7 0x21f Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_uart.o + .debug_abbrev 0x000027e6 0x1ec Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_uart_ex.o + .debug_abbrev 0x000029d2 0x12 startup\startup_stm32l072xx.o .debug_aranges 0x00000000 0xe40 .debug_aranges @@ -2078,60 +2081,60 @@ OUTPUT(A141 Amplifier.elf elf32-littlearm) .debug_ranges 0x00000c90 0x68 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_uart_ex.o .debug_ranges 0x00000cf8 0x20 startup\startup_stm32l072xx.o -.debug_line 0x00000000 0x7152 +.debug_line 0x00000000 0x715d .debug_line 0x00000000 0x3fc Core\Src\amplif.o .debug_line 0x000003fc 0x35d Core\Src\flash.o - .debug_line 0x00000759 0x1ed Core\Src\gpio.o - .debug_line 0x00000946 0x384 Core\Src\main.o - .debug_line 0x00000cca 0x1c3 Core\Src\stm32l0xx_hal_msp.o - .debug_line 0x00000e8d 0x361 Core\Src\stm32l0xx_it.o - .debug_line 0x000011ee 0x1f1 Core\Src\system_stm32l0xx.o - .debug_line 0x000013df 0x2f6 Core\Src\tim.o - .debug_line 0x000016d5 0x75c Core\Src\usart.o - .debug_line 0x00001e31 0x45a Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal.o - .debug_line 0x0000228b 0x463 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_cortex.o - .debug_line 0x000026ee 0x404 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_dma.o - .debug_line 0x00002af2 0x445 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_flash.o - .debug_line 0x00002f37 0x597 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_flash_ex.o - .debug_line 0x000034ce 0x3ad Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_gpio.o - .debug_line 0x0000387b 0x4ef Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_rcc.o - .debug_line 0x00003d6a 0x537 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_rcc_ex.o - .debug_line 0x000042a1 0x18a9 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_tim.o - .debug_line 0x00005b4a 0x297 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_tim_ex.o - .debug_line 0x00005de1 0xe0d Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_uart.o - .debug_line 0x00006bee 0x4e2 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_uart_ex.o - .debug_line 0x000070d0 0x82 startup\startup_stm32l072xx.o + .debug_line 0x00000759 0x1eb Core\Src\gpio.o + .debug_line 0x00000944 0x385 Core\Src\main.o + .debug_line 0x00000cc9 0x1c3 Core\Src\stm32l0xx_hal_msp.o + .debug_line 0x00000e8c 0x367 Core\Src\stm32l0xx_it.o + .debug_line 0x000011f3 0x1f1 Core\Src\system_stm32l0xx.o + .debug_line 0x000013e4 0x2f6 Core\Src\tim.o + .debug_line 0x000016da 0x762 Core\Src\usart.o + .debug_line 0x00001e3c 0x45a Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal.o + .debug_line 0x00002296 0x463 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_cortex.o + .debug_line 0x000026f9 0x404 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_dma.o + .debug_line 0x00002afd 0x445 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_flash.o + .debug_line 0x00002f42 0x597 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_flash_ex.o + .debug_line 0x000034d9 0x3ad Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_gpio.o + .debug_line 0x00003886 0x4ef Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_rcc.o + .debug_line 0x00003d75 0x537 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_rcc_ex.o + .debug_line 0x000042ac 0x18a9 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_tim.o + .debug_line 0x00005b55 0x297 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_tim_ex.o + .debug_line 0x00005dec 0xe0d Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_uart.o + .debug_line 0x00006bf9 0x4e2 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_uart_ex.o + .debug_line 0x000070db 0x82 startup\startup_stm32l072xx.o .debug_str 0x00000000 0x45bb .debug_str 0x00000000 0x786 Core\Src\amplif.o 0x81d (size before relaxing) .debug_str 0x00000786 0x16b Core\Src\flash.o 0x8d9 (size before relaxing) - .debug_str 0x000008f1 0x217 Core\Src\gpio.o - 0x53c (size before relaxing) - .debug_str 0x00000b08 0x8d5 Core\Src\main.o + .debug_str 0x000008f1 0x5d Core\Src\gpio.o + 0x382 (size before relaxing) + .debug_str 0x0000094e 0x8d5 Core\Src\main.o 0x1036 (size before relaxing) - .debug_str 0x000013dd 0x2c Core\Src\stm32l0xx_hal_msp.o + .debug_str 0x00001223 0x2c Core\Src\stm32l0xx_hal_msp.o 0x2fe (size before relaxing) - .debug_str 0x00001409 0xb5 Core\Src\stm32l0xx_it.o - 0xe3f (size before relaxing) - .debug_str 0x000014be 0x61 Core\Src\system_stm32l0xx.o + .debug_str 0x0000124f 0xcf Core\Src\stm32l0xx_it.o + 0xe59 (size before relaxing) + .debug_str 0x0000131e 0x61 Core\Src\system_stm32l0xx.o 0x333 (size before relaxing) - .debug_str 0x0000151f 0xec Core\Src\tim.o + .debug_str 0x0000137f 0x28c Core\Src\tim.o 0xf0a (size before relaxing) - .debug_str 0x0000160b 0x18a Core\Src\usart.o - 0x1087 (size before relaxing) - .debug_str 0x00001795 0x369 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal.o + .debug_str 0x0000160b 0x16d Core\Src\usart.o + 0x106a (size before relaxing) + .debug_str 0x00001778 0x369 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal.o 0x884 (size before relaxing) - .debug_str 0x00001afe 0x39d Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_cortex.o + .debug_str 0x00001ae1 0x39d Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_cortex.o 0x7e7 (size before relaxing) - .debug_str 0x00001e9b 0x267 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_dma.o + .debug_str 0x00001e7e 0x267 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_dma.o 0x6e5 (size before relaxing) - .debug_str 0x00002102 0x236 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_flash.o + .debug_str 0x000020e5 0x236 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_flash.o 0x56b (size before relaxing) - .debug_str 0x00002338 0x478 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_flash_ex.o + .debug_str 0x0000231b 0x478 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_flash_ex.o 0x8ae (size before relaxing) - .debug_str 0x000027b0 0xe8 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_gpio.o + .debug_str 0x00002793 0x105 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_gpio.o 0x50b (size before relaxing) .debug_str 0x00002898 0x1e8 Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_rcc.o 0x745 (size before relaxing)